JP2005322889A - Measuring method of ferroelectric capacitor and designing method of ferroelectric memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the measuring method of a ferroelectric capacitor capable of measuring a ferroelectric capacitor at a high-speed pulse used to drive the ferroelectric memory element and capable of accurately performing the measurement and prediction of an imprint by excluding the affection of depolarization and retention loss caused by stress. <P>SOLUTION: A switching curve indicating the change of an inverse polarized amount to an applied voltage of the ferroelectric capacitor which is a measured object is measured. A first inverse polarized amount of the ferroelectric capacitor is measured. The stress is applied to the ferroelectric capacitor at a predetermined temperature for a predetermined time of period. A second inverse polarized amount of the ferroelectric capacitor after the stress is applied thereto, and an offset voltage introduced by the stress is calculated in accordance with the gradient of a linear area in the switching curve and a difference between the first inverse polarized amount and the second inverse polarized amount. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a ferroelectric capacitor measurement method for measuring imprint characteristics of a ferroelectric capacitor, and a ferroelectric memory design method using this measurement method.

  A volatile memory such as a dynamic random access memory (DRAM) and a static random access memory (SRAM) is used for a main storage device of a computer. The volatile memory can hold data only during a period when power is supplied, and the stored data is lost when the supply of power is stopped. On the other hand, as a non-volatile memory that can be freely rewritten and does not lose data even when power supply is stopped, a ferroelectric random access memory using a ferroelectric film (hereinafter, referred to as “non-volatile memory”). "FeRAM") is drawing attention. In addition to being a non-volatile memory, FeRAM has the advantages of low power consumption and high integration.

  A general structure of FeRAM will be described with reference to FIG.

  In the silicon substrate 100, an element isolation region 102 that defines an active region is formed. A well 104 is formed in the silicon substrate 100 in the active region. A MOS transistor 112 having a gate electrode 106 and source / drain regions 108 and 110 is formed on the surface of the active region.

  An interlayer insulating film 114 is formed on the silicon substrate 100 on which the MOS transistor 112 is formed. Plugs 116 and 118 connected to the source / drain regions 108 and 110 are embedded in the interlayer insulating film 114.

On the interlayer insulating film 114 in which the plugs 116 and 118 are embedded, a lower electrode made of an Ir film 120 and an IrO _x film 122, a ferroelectric film made of a PZT film 124, and an upper electrode made of an IrO _x film 126, A ferroelectric capacitor 130 is formed.

  An interlayer insulating film 132 is formed on the interlayer insulating film 114 on which the ferroelectric capacitor 130 is formed. A plug 134 connected to the plug 116 is embedded in the interlayer insulating film 132.

  On the interlayer insulating film 132, a wiring layer 136 connected to the upper electrode of the ferroelectric capacitor 130 and a bit line 138 connected to the source / drain region 108 through plugs 134 and 116 are formed. .

  Thus, an FeRAM having the MOS transistor 112 and the ferroelectric capacitor 130 is configured.

  FeRAM is a memory that uses spontaneous polarization of a ferroelectric. In a ferroelectric capacitor having a ferroelectric film sandwiched between a pair of electrodes, “1” and “0” are stored as information corresponding to the polarization axis direction of the ferroelectric film. Therefore, the characteristics of the ferroelectric capacitor directly affect the characteristics of the FeRAM, and in order to develop a highly reliable FeRAM, a technique for measuring various characteristics of the ferroelectric capacitor is indispensable.

  One of the factors affecting the reliability of a ferroelectric capacitor is imprint. Imprinting is a phenomenon in which the polarization direction is wrinkled (rubbed) according to written data, and is difficult to reverse in the reverse direction. In FeRAM, data is identified by detecting the amount of polarization, and therefore it becomes difficult to write reverse data when imprinting occurs. Therefore, measuring imprint is extremely important for extending the reliability life of, for example, FeRAM.

  When imprinting occurs in the ferroelectric capacitor, an offset voltage (built-in internal voltage) is generated in the ferroelectric capacitor. To know imprint, it is necessary to measure the offset voltage, but direct measurement of the offset voltage is uncertain. This requires another approach to know the offset voltage.

  The standard method for evaluating the offset voltage is to measure the coercive voltage offset in the hysteresis loop. This method is used in various documents as an evaluation method for imprinting a ferroelectric capacitor, as in the case of verification of a physical model of imprinting (for example, Non-Patent Documents 2 and 3). .

Further, Patent Document 1 and Non-Patent Document 1 have a suitable methodology for quantifying the charge in a ferroelectric capacitor by comparing two capacitors polarized in opposite directions with respect to the measurement of retention and imprint. It is disclosed.
US Pat. No. 6,0086,559 A. Noma, et al., Extended Abstract of the 2003 International Conference on Solid State Devices and Materials, Tokyo, 2003, pp. 45-46 W. Warren et al., Appl. Phys. Lett. 67, 1995, p. 866 Grossman et al., J. Appl. Phys. Vol. 42, 2003, p. L1519 Kunisato Yamaoka et al., "A 0.9V 1T1C SBT-Based Embedded Non-Volatile FeRAM with a Reference Voltage Scheme and Multi-Layer Shielded Bit-Line Structure", 2004 IEEE International Solid-State Circuits Conference, 2004, Digest of Technical Papers , p. 50

  However, an approach based on measurement of coercive voltage offset is inappropriate for predicting polarization loss in a ferroelectric memory device. First, the coercive voltage offset exactly matches the built-in voltage only in the case of a perfect saturation loop, but in a thin film polycrystalline capacitor used in a ferroelectric memory device, perfect saturation is achieved by limiting the applied voltage. It is difficult to do. In addition, the coercive voltage is known to be easily affected by the measurement frequency of the loop and other parameters, and the loop parameter for measuring the voltage offset with a high-speed pulse used for driving a ferroelectric memory device. The choice is not easy.

  Further, in the methods described in Patent Document 1 and Non-Patent Document 2, since imprint effects, depolarization due to thermal stress, and retention loss are detected in a mixed manner, only imprints cannot be measured. Therefore, it is difficult to predict the imprint that occurs when the polarization state is maintained for a long period of time based on the measurement result.

  Also, since there is no physical model that explains why imprinting occurs and how to predict imprinting as a function of temperature and voltage, imprint evaluation itself has been difficult.

  Fabricating a ferroelectric capacitor with less imprinting is one problem in developing a low voltage FeRAM. Accurately measuring imprints and correlating and predicting imprints and offset voltages are essential to achieving the long-term reliability of FeRAM. In addition, knowing the progress of imprinting is also essential for selecting a suitable reference level for FeRAM operation.

  The object of the present invention is to enable measurement with high-speed pulses such as those used for driving a ferroelectric memory device, and to accurately measure imprints by eliminating the influence of stress depolarization and retention loss. Another object of the present invention is to provide a method for measuring a ferroelectric capacitor that can be predicted.

  Another object of the present invention is to provide a ferroelectric memory design method for appropriately setting the capacitance of a reference capacitor.

  According to one aspect of the present invention, for a ferroelectric capacitor to be measured, a switching curve representing a change in the amount of inversion polarization with respect to an applied voltage is measured, and for the ferroelectric capacitor, a first inversion polarization amount is measured. Applying a stress to the ferroelectric capacitor at a predetermined temperature for a predetermined time, measuring a second inversion polarization amount of the ferroelectric capacitor to which the stress is applied, and measuring a slope of a linear region of the switching curve and A method for measuring a ferroelectric capacitor is provided that calculates an offset voltage introduced by the stress based on a difference between the first inversion polarization amount and the second inversion polarization amount.

  According to another aspect of the present invention, in the method for measuring a ferroelectric capacitor, when the stress application time is different by repeatedly applying the stress and measuring the second inversion polarization amount. And calculating a fitting curve obtained by fitting a model equation describing the relationship between the offset voltage and an arbitrary time with a plurality of measured values of the offset voltage, and calculating an arbitrary time based on the fitting curve. A method of measuring a ferroelectric capacitor that predicts an offset voltage at is provided.

  According to still another aspect of the present invention, there is provided a ferroelectric memory design method including a ferroelectric capacitor and a reference capacitor used when reading information recorded in the ferroelectric capacitor, For the ferroelectric capacitor, a switching curve representing a change in the amount of inversion polarization with respect to an applied voltage is measured. For the ferroelectric capacitor, a first inversion polarization amount and a first non-inversion polarization amount are measured. The dielectric capacitor is repeatedly subjected to stress application for a predetermined time at a predetermined temperature and measurement of the second inversion polarization amount and the second non-inversion polarization amount after the stress application, and the time during which the stress is applied The offset voltage at different time points is expressed by the slope of the linear region of the switching curve, the first inversion polarization amount, and the second inversion polarization amount. Based on the difference, calculate a fitting curve obtained by fitting a model equation describing the relationship between the offset voltage and an arbitrary time with a plurality of measured values of the offset voltage, and based on the fitting curve, A first characteristic curve representing a relationship with time and a second characteristic curve representing a relationship between the amount of non-inverted polarization and time are calculated, and the accumulated charge amount of the reference capacitor is measured over a desired time range. A ferroelectric memory design method is provided in which the capacitance of the reference capacitor is set so as to be located between the first characteristic curve and the second characteristic curve.

  According to the present invention, since the offset voltage is calculated based on the switching curve representing the change in the amount of reversed polarization with respect to the applied voltage and the difference between the amount of reversed polarization before and after the stress application, a complete loop necessary for the measurement based on the coercive voltage offset is obtained. There is no need to set complicated parameters. Therefore, measurement under conditions close to actual use conditions can be performed with a high-speed pulse used for driving a ferroelectric memory device.

  In addition, a characteristic curve representing the relationship between the offset voltage and time is fitted with a model that shows a very good agreement with the measurement result, so that the offset voltage and the amount of inversion polarization at an arbitrary time can be predicted easily and accurately. .

  In addition, the influence of depolarization and retention loss due to stress can be eliminated, and imprint can be accurately measured and predicted.

  Further, when determining the capacitance value of the reference capacitor of the ferroelectric memory, it is possible to make an error even if imprinting occurs due to maintaining the polarization state for a long period of time (for example, 10 years or more) by using the ferroelectric capacitor measuring method. It is possible to easily set the reference level to a level at which reading does not occur.

[Theoretical analysis of nonlinear imprint]
Before showing the method of measuring a ferroelectric capacitor of the present invention, a physical model that can be used for imprint measurement and prediction is established.

  The imprint generated by charge injection has thin passive layers 16 and 18 between the lower electrode 10 and the ferroelectric film 14 and between the upper electrode 12 and the ferroelectric film 14 as shown in FIG. When a ferroelectric capacitor is assumed, it can be described by equations of electromagnetics and charge transport. The passive layers 16 and 18 can be considered as intermediate layers formed between the ferroelectric film and the electrodes.

ここで、Ｖは印加電圧、Ｄ_fは強誘電体膜中における電束密度、Ｅ_fは強誘電体膜中における電界、ｈは強誘電体膜の膜厚、Ｅ_dはパッシブ層中の電界、ｄはパッシブ層の膜厚、ε_dはパッシブ層の誘電率、σは強誘電体膜とパッシブ層との界面にトラップされた電荷の単位面積あたりの密度、Ｊ（Ｅ_d）はパッシブ層を通して強誘電体に注入される電流の密度である。

Here, V is the applied voltage, D _f is the electric flux density in the ferroelectric film, E _f is the electric field in the ferroelectric film, h is the film thickness of the ferroelectric film, and E _d is the electric field in the passive layer. , D is the thickness of the passive layer, ε _d is the dielectric constant of the passive layer, σ is the density per unit area of charges trapped at the interface between the ferroelectric film and the passive layer, and J (E _d ) is the passive layer The density of current injected through the ferroelectric into the ferroelectric.

To determine the imprint, 1) specify the density σ of charge accumulated at the interface between the ferroelectric film and the passive layer by the injection current, and 2) the voltage offset V _off caused by this injected charge. It is necessary to evaluate

Therefore, in the present invention, in order to define the voltage offset, the relationship between the offset voltage V _off and the charge density σ is evaluated based on the following formula (4).

式（４）は、式（１）及び式（２）から導き出される。この関係式から、強誘電体膜／パッシブ層界面に電荷が注入されていない場合と電荷が注入されている場合とで、同じ分極反転を行う、すなわち同じ電束密度Ｄ_f及び電界Ｅ_fに到達するためには、印加電圧Ｖは、以下の式により表される分だけ異なっていることが必要である。

Equation (4) is derived from Equation (1) and Equation (2). From this relational expression, the same polarization inversion is performed when the charge is not injected into the ferroelectric film / passive layer interface and when the charge is injected, that is, the same electric flux density D _f and electric field E _f . In order to reach it, the applied voltage V needs to differ by the amount expressed by the following equation.

界面にトラップされた電荷の計算は、ハード強誘電体（hard ferroelectric）近似を用いて行うことができる。すなわち、
Ｄ_f ＝ Ｐ_N ＋ ε_fＥ_f (6)
を用いる。ここで、Ｐ_N及びε_fは、それぞれ強誘電体の分極量と強誘電体の誘電率である。

The calculation of the charge trapped at the interface can be performed using the hard ferroelectric approximation. That is,
D _f = P _N + ε _f E _f (6)
Is used. Here, P _N and ε _f are the polarization amount of the ferroelectric and the dielectric constant of the ferroelectric, respectively.

Here, consider a case where the ferroelectric is not polarized, that is, P _N = 0, and the interface charge is almost zero, that is, σ = 0. In this state, the ferroelectric is polarized by applying a voltage pulse to one of the electrodes, and the polarization state is memorized. Thereby, immediately after the pulse application, P _N = P ₀ and V = 0. When a passive layer is present at the interface, a depolarized electric field is generated in the ferroelectric and the passive layer due to polarization of the ferroelectric.

When the electric field applied to the ferroelectric is relatively low, slight back switching occurs. When a high electric field is applied to the passive layer, charge injection beyond the passive layer occurs, resulting in a charge of density σ at the interface. This charge density σ is obtained as a function (σ (t, P ₀ )) of P ₀ when the back switching rate is smaller than the elapsed time t in the polarization state and the charge accumulation rate at the interface. That is, it is assumed that P _N = P ₀ regardless of time.

Electric field _{E d} of the passive layer is of the formula (1), based on (2), (3), (6), satisfy the following relationship.

ここで、式（７），（８）は、強誘電体中における時間無依存の電気変位に相当する開回路の電気的条件を用いることにより得られる。式（９）は、Ｖ＝０の状態、すなわちｔ＝０である分極直後の状態に相当する。

Here, equations (7) and (8) are obtained by using open circuit electrical conditions corresponding to time-independent electrical displacement in the ferroelectric. Equation (9) corresponds to a state of V = 0, that is, a state immediately after polarization where t = 0.

  Assuming that charge transport across the passive layer is described by an exponential equation, the charge transport equation J (E) is expressed as follows:

この式は、高電界下における誘電体の典型的な状態であるプール・フレンケル（Pool-Frenkel）伝導機構や熱イオン及び冷電界放出の場合をカバーするものである。

This equation covers the Pool-Frenkel conduction mechanism, which is a typical state of a dielectric under a high electric field, and the case of thermionic and cold field emission.

  Where the variable

を導入することにより、式（７）は、以下のように書き換えることができる。

(7) can be rewritten as follows.

ここで、τ及びγは、

Where τ and γ are

である。

It is.

When only the charges trapped at the interface between the ferroelectric film and the passive layer make the bound charge of the ferroelectric polarization slightly invisible, that is, when σ / P ₀ << 1, and the state of the passive layer is true If it is exponential, that is, if 1 / | lnq | << 1, the solution of equation (12) can be expressed as follows within the accuracy of these small parameters.

ここで、τ₀は、

Where τ ₀ is

であり、ｑの初期値ｑ（０）は、

The initial value q (0) of q is

である。

It is.

  By using the equations (5), (8), (11), and (14), the time dependence of the voltage offset can be obtained as follows.

したがって、パッシブ層の伝導方程式が指数関数型である場合、パッシブ層を越えるキャリア輸送に伴う減極電界による弱い補償が生じた場合の電圧オフセットは、普遍的な対数型の時間依存性を有することが導かれる。弱い補償は強誘電体キャパシタの実際の測定で観察されるものであり、σ≒Ｐ₀であるような強い補償を観察するためには指数関数的に長い時間が必要である。

Therefore, when the conduction equation of the passive layer is exponential, the voltage offset when the weak compensation due to the depolarized electric field accompanying carrier transport across the passive layer occurs has a universal logarithmic time dependence. Is guided. Weak compensation is observed in actual measurement of the ferroelectric capacitor, and it takes an exponentially long time to observe strong compensation such that σ≈P ₀ .

Equation (15) representing the voltage offset is limited only by two parameters, V ₀ and τ ₀ . These parameters mean the “logarithmic slope” in the logarithmic charge relaxation region and the crossover time between the linear region and logarithmic relaxation. Equations (15) and (16) and the parameters in these equations allow the formulation of theoretical predictions.

  First, the imprint found in ferroelectric capacitors is not linear on the semi-logarithmic scale. The curve shown in such a figure gives the impression that the imprint is accelerated over time. In reality, however, mitigation is slowing over time.

  From equations (15) to (17), the temperature dependence of the imprint in the case of the Pool-Frenkel conduction mechanism, thermionic ions, and cold field emission can be obtained. The theoretically predicted dependence on thermionic emission and the Pool-Frenkel conduction mechanism is very similar.

In the case of thermionic emission, β = 1/2 and E _th is

である。ここで、κ_hは材料の光学的な誘電率、Ｔは温度、ｅは電子の電荷量、ε₀は真空誘電率である。パラメータＡ及びαは、種々の電界インターバルにより異なる。電界がＥ_thより大きいが臨界電界
Ｅ_DW ＝ ｅ（６４πε₀κ_hｍ²μ⁴）^-1/3）
よりも小さいとき、α＝３／４であり、

It is. Here, κ _h is the optical dielectric constant of the material, T is the temperature, e is the charge amount of electrons, and ε ₀ is the vacuum dielectric constant. Parameters A and α vary with different electric field intervals. Field is greater than E _th critical field _{E DW = e (64πε 0 κ} h m 2 μ 4) -1/3)
Is smaller than, α = 3/4,

である。ここで、Φは電極とキャパシタ材料との界面におけるキャリアに対する電位障壁の高さ、ｍは電子質量、μはキャリア移動度、τ_conはＥ＜Ｅ_thの時に生じる低電界伝導である。Ｅ＞Ｅ_DWであるような極めて高電界では、α＝０であり、

It is. Here, Φ is the height of the potential barrier against carriers at the interface between the electrode and the capacitor material, m is the electron mass, μ is the carrier mobility, and τ _con is the low electric field conduction that occurs when E <E _th . For very high electric fields such that E> _EDW , α = 0,

である。ここで、Ａ_Rは、リチャードソン定数である。

It is. Here, A _R is a Richardson constant.

In the Pool-Frenkel conduction mechanism in the bulk case, equations (10), (18), (19) are parameters reduced by a factor having values between β = 1/2, α = 1, 1-2. E _th is given. In this case, Φ means the activation energy of the trap center that controls conduction.

  From the above relationship, it has been found that the following equation holds in a situation where charge transfer in the passive layer is limited by thermionic emission or the Pool-Frenkel conduction mechanism.

ここで、Ａ₀は弱い温度依存定数であり、Φ′はイメージフォースローアリング（image force lowering）により僅かに低減された活性化バリアである。

Where A ₀ is a weak temperature dependent constant and Φ ′ is an activation barrier slightly reduced by image force lowering.

From these relationships and equation (15), it can be seen that the temperature dependence of imprint is very different between the linear charge relaxation region and the logarithmic charge relaxation region. Linear region, i.e. the T«tau _0, the temperature dependency of V _off αV ₀ / τ ₀ exponentially with respect to activation energy equal to the activation energy of the conduction mechanism responsible for charge transport in the passive layer It becomes. On the other hand, in a logarithmic region, that is, t >> τ ₀ , a clear temperature dependence of V _off ∝V ₀ (lnt−lnτ ₀ ) appears.

[Embodiment]
A method for measuring a ferroelectric capacitor according to an embodiment of the present invention will be described with reference to FIGS.

FIG. 2 is a flowchart showing a method for measuring a ferroelectric capacitor according to the present embodiment, FIG. 3 is a diagram showing a measurement circuit and measurement waveforms used in the method for measuring a ferroelectric capacitor according to the present embodiment, and FIG. 4 shows the embodiment. FIG. 5 is a schematic diagram showing the shape of an active probe used in the ferroelectric capacitor measurement method according to FIG. 5, FIG. 5 is a diagram showing a pulse train for measurement used in step S11, and FIG. 6 is a graph showing a switching curve measured in step S11. FIG. 7 is a diagram showing a measurement pulse train used in steps S12 and S14, FIG. 8 is a graph showing the time dependence of the polarization amount decrease value ΔP, and FIG. 9 is a graph showing the time dependence of the offset voltage V _off , 10 is a graph showing the temperature dependence of the parameter τ ₀ , FIG. 11 is a graph showing the time dependence of the reverse polarization amount P _SW , and FIG. 12 is an inversion. 13 is a graph showing the time dependency of the polarization amount P _SW , FIG. 13 is a graph showing the time dependency of the reverse polarization amount P _SW and the voltage V applied to the ferroelectric film, and FIG. 14 is a method for setting the size of the reference capacitor. FIG. 15 is a graph showing the result of measuring the hysteresis loop of the discrete capacitor, FIG. 16 is a graph showing the result of measuring the hysteresis loop of the array capacitor, and FIG. 17 is a decrease value ΔP of the polarization amount in the discrete capacitor and the array capacitor. FIG. 18 is a graph showing the time dependency of the offset voltage V _off in the discrete capacitor and the array capacitor.

  In the ferroelectric capacitor measuring method according to the present embodiment, imprint measurement and prediction are performed according to the flowchart shown in FIG.

That is, in the method for measuring a ferroelectric capacitor according to the present embodiment, the step of measuring the relationship between the inversion polarization amount P _SW and the applied voltage V (step S11) and the step of initializing the ferroelectric capacitor (step S12). If, in step (step S13) of applying a stress to the ferroelectric capacitor, a step of resetting the polarization state while measuring the inverted polarization amount P _SW (step S14), and step (step S15 of calculating the offset voltage V _off ), A step of calculating τ ₀ (step S16), and a step of predicting the relationship between the inversion polarization amount P _SW and the baking time, that is, imprint (step S17).

Hereinafter, the method for measuring a ferroelectric capacitor according to the present embodiment will be described in detail along each step. Note that the specific measurement data used in the following description uses a ferroelectric capacitor in which the upper electrode is processed to a size of 15 × 15 μm ² by RIE.

(Step S11)
In step S11, a characteristic curve (switching curve) indicating the relationship between the amount of inversion polarization _PSW and the applied voltage is measured.

For the measurement, a Soya tower circuit shown in FIG. 3A can be used. Sawyer tower circuit includes a ferroelectric capacitor C and the load resistance R _L of the measurement target (also referred to as a shunt resistor) are connected in series, both ends of the ferroelectric capacitor C connected in series with the load resistor R _L, the positive and negative The pulse generator 20 for generating the pulse is connected. A digital storage oscilloscope (DSO) 22 is connected to both ends of the load resistor _RL .

  The amount of charge injected into the ferroelectric capacitor C can be calculated by integrating the charge flowing through the resistor when a voltage is applied to the capacitor, using a mathematical function built into the DSC 22.

For example, when a negative pulse 24 having a magnitude of 3V as shown in FIG. 3B is applied by the pulse generator 20, a voltage V _L as shown is applied to the load resistor R _L. Then, the charge injected into the ferroelectric capacitor C is observed by the DSO 22 as a waveform as shown in FIG.

Usually, the load resistance _RL is connected to an active probe for measuring the switching current. However, in measuring a ferroelectric capacitor, it is important not only to reduce the circuit capacitance in order to improve the S / N ratio, but also to reduce the mismatch of the circuit impedance that causes ringing.

Therefore, as shown in FIG. 4, it is desirable to integrate the load resistance _RL on the probe chip of the active probe 30. In FIG. 4, the load resistance _RL is soldered between the probe pin 32 and the ground pin 34 of the active probe 30. By this improvement, the S / N ratio is improved and more accurate measurement can be performed. In order to improve the S / N ratio, it is desirable to connect the load resistor _RL at a place where the distance between the probe pin 32 and the ground pin 34 is 1 cm or less.

In step S11, measurement is performed using a pulse train composed of three pulses shown in FIG. That is, a pulse N for applying a negative electric field, a pulse P for applying a positive electric field, and a pulse N ₂ for applying a negative electric field are used. In the present specification, the voltage application direction is based on the lower electrode side.

The rise times / widths of the pulse N, the pulse P, and the pulse N ₂ are 30/130 ns, 30/230 ns, and 30/130 ns, respectively, and the delay time between the pulses is 1 second. The magnitudes of the pulse N and the pulse N ₂ are 4 V, and are such a magnitude that complete polarization reversal can be performed at a given pulse interval. The pulse P is boosted sequentially from 0.1V to 4V in steps of 0.1V.

The pulse N is a pulse for presetting the ferroelectric capacitor C. By applying the pulse N, the ferroelectric capacitor C is polarized in the negative direction. The pulse P is a pulse for reversing the polarization partially or completely according to the magnitude of the pulse P. The pulse N ₂ is a pulse for measuring the inversion polarization amount P _SW . That is, P _SW is
P _{SW, P (0.1-4V)} = N _{4V, P (0.1-4V)} −D _4V (23)
Represented as: Note that the right side of the equation (23) corresponds to the ND charge amount in FIG.

In the present embodiment, the measurement of the amount of reversed polarization (P _SW = ND) is mainly described, but N and D are also measured when measuring the amount of reversed polarization. Accordingly, the non-inverted polarization amount (= D) is also measured simultaneously with the measurement of the inversion polarization amount.

The above pulse train is repeatedly applied while sequentially raising the pulse P, and the polarization inversion amount P _SW is measured. Thereby, the relationship between the inversion polarization amount P _SW and the applied voltage V (the magnitude of the pulse P) can be measured. Incidentally, when the present inventors have measured, a measurement error of P _SW in this measurement was ± 0.6μC / cm ² with a standard deviation.

  FIG. 6 is a switching curve measured by the above procedure. The switching curve of FIG. 6 shows a substantially linear profile (shown as a “linear region” in the figure) between about 0.8 V and 1.9 V, and a substantially flat profile at about 2.7 V or more ( In the figure, it is indicated as “flat region”. Such behavior of the switching curve is extremely important in interpreting the measurement results.

(Step S12)
Step S12 is a step for initializing the ferroelectric capacitor C.

In this step, the pulse state consisting of four pulses shown in FIG. 7 is used, and the polarization state as the initial state is stored in the ferroelectric capacitor. That is, the pulse train includes a pulse P for applying a positive electric field, a pulse N for applying a negative electric field, a pulse P _1.8 for applying a positive electric field, and a pulse N ₂ for applying a negative electric field. And are used.

The rise times / widths of pulse P, pulse N, pulse P _1.8 and pulse N ₂ are 30/130 ns, 30/130 ns, 30/230 ns and 30/130 ns, respectively, and the delay time between pulses is 1 second. . The magnitude of the pulse P, the pulse N, and the pulse N ₂ is 3V, and the magnitude of the pulse P _1.8 is 1.8V. The magnitudes of these voltages are obtained by selecting a predetermined value on the lower voltage side of the flat region and a predetermined value on the higher voltage side of the linear region in the switching curve of FIG. 6, and depending on the characteristics of the ferroelectric capacitor. Is set as appropriate.

The inversion polarization amount N _{2, initial (t = 0) in the initial} state by applying the pulse train is recorded as the inversion polarization amount when the pulse N ₂ is applied.

(Step S13)
Step S13 is for generating an imprint, that is, an offset voltage V _off resulting from the imprint, in the ferroelectric capacitor that has been negatively polarized in step S12. For the introduction of imprinting, a method of applying thermal and temporal stress as used in an acceleration test or the like in a reliability test can be used.

  The stress is applied, for example, by leaving at 85 ° C., 120 ° C., 150 ° C. or room temperature for a predetermined time. The temperature can be raised by baking on a hot plate. The thermal stress is preferably applied in a temperature range in which operation guarantee is required in an actual device, for example, in the range of −45 to 250 ° C.

  In the evaluation performed by the present inventor, stress was applied at room temperature, 85 ° C., 120 ° C., and 150 ° C. for 36 to 1000 minutes (6 weeks).

(Step S14)
In step S14, the amount of polarization reversal after stress application is measured, and the polarization state is reset for further stress application.

In this step, the amount of inversion polarization of the ferroelectric capacitor C is measured by the Soya tower circuit of FIG. 3A using the same pulse train (FIG. 7) having the same four pulses used in step S12. That is, by applying the fourth pulse N ₂ , the reversal polarization amount N _{2, bake (t> 0)} after applying the stress is measured and recorded. After application of the pulse N ₂ is ferroelectric capacitor C is reset to the polarization state on the negative.

By this measurement, the decrease value ΔP of the polarization amount due to the stress application is
ΔP = N _{2, initial (t = 0)} − N _{2, bake (t> 0)} (24)
It can be calculated from

  Next, step S13 and step S14 are repeated as necessary to measure the time dependence of the polarization amount decrease value ΔP.

  One of the problems in performing imprint measurement accurately is the influence of the retention characteristics of the ferroelectric capacitor. In other words, the amount of polarization is partially back-switched due to the thermal depolarization in the temperature rising bake, so that the amount of polarization measured by the pulse immediately after baking is reduced.

  Therefore, in the method for measuring a ferroelectric capacitor according to the present embodiment, in order to remove the retention loss due to baking and measure a pure imprint, two pulses of a pulse P and a pulse N are measured before measuring the polarization amount. Use to pre-polarize. In this regard, the ferroelectric capacitor measuring method according to the present embodiment is different from the conventional measuring method in which the retention loss and the imprint are mixed and measured.

The inventor of the present application has confirmed that applying such an additional inversion pulse at room temperature does not affect the measured value of the offset voltage V _off .

(Step S15)
In step S15, the offset voltage V _off is calculated based on the calculated decrease amount ΔP of the polarization amount.

In general, N _{2, bake} is expected to be lower than N _{2, initial} due to the offset voltage V _off generated in the ferroelectric capacitor by imprinting. Due to this offset voltage V _off, the actual voltage applied to the ferroelectric is _1.8 V-V _{off for} the third pulse P _1.8 and 3 V + V _{off for} the fourth pulse N ₂ .

As shown in FIG. 6, since the switching curve is saturated when the applied voltage V is 3 V or more, the change from 3 V to 3 V + V _off has little influence on the measured value of the inversion polarization. On the other hand, since the amount of inversion polarization strongly depends on a voltage of 1.8 V or less, a voltage change from 1.8 V to 1.8 V-V _off is a significant change in the amount of inversion polarization (or a decrease value ΔP of the amount of polarization). Bring.

From FIG. 6, the variable ΔP as a function of the offset voltage V _off, assuming a reasonable value of not exceeding 1V as the offset voltage V _off, can be linearly approximated. Therefore, the measured decrease amount ΔP of the polarization amount can be immediately converted into the voltage offset V _off . From FIG. 6, the conversion coefficient calculated as the reciprocal of the slope of the regression line is determined to be 0.041 Vcm ² / μC, so the conversion formula is as follows.

V _off = 0.041 × ΔP (25)
Each experimental point was calculated from an average value of measured values in five or more ferroelectric capacitors. The error of the calculated value was ± 0.6 μC / cm ² in standard deviation. This is about the same as the measurement error of the amount of inversion polarization in step S11.

The offset voltage V _off obtained in this way is an accurate parameter representing imprint after the stress is applied without the retention loss or the like when the stress is applied.

(Step S16)
In step S16, parameter τ ₀ is calculated based on the measurement results up to step S15. The parameter τ ₀ can be calculated as a parameter of Expression (15) representing the V _{off -time} curve.

FIG. 8 is a graph showing the change over time in the decrease value ΔP of the polarization amount when the measurement in step S14 is performed at different temperatures. As described above, since the decrease amount ΔP of the polarization amount and the offset voltage V _off have the relationship of Expression (25), the ΔP-time curve shown in FIG. 8 is immediately converted to the V _off -time curve shown in FIG. be able to.

In FIG. 9, data points represent experimental data, and solid lines represent fitting curves using Equation (15). As is apparent from FIG. 9, the equation (15) is in good agreement with the measurement data at four different temperatures by using the fitting parameters shown in Table 1. The parameter τ ₀ matches the point where the regression line of the ΔP-time curve in FIG. 8 intersects the time axis.

非線型インプリントの理論（式（２２））から予測されるパラメータτ₀の活性化エネルギーの温度依存性は、理論の正当性を検証するための最も重要なポイントの一つである。この検証は、図１０に示すτ₀と１／Ｔとの関係を表すグラフにより行うことができる。なお、図１０では、温度の逆数（１／Ｔ）は、エネルギーの単位（ｅＶ^-1）によりプロットしている。

The temperature dependence of the activation energy of the parameter τ ₀ predicted from the theory of nonlinear imprint (formula (22)) is one of the most important points for verifying the correctness of the theory. This verification can be performed by a graph showing the relationship between τ ₀ and 1 / T shown in FIG. In FIG. 10, the reciprocal of temperature (1 / T) is plotted in units of energy (eV ⁻¹ ).

  The plot in FIG. 10 shows a linear relationship that agrees with Equation (22), and the activation energy obtained from the slope of this straight line was calculated to be 0.27 eV. This value corresponds to a reduced interface barrier in the case of Schottky injection, or the activation energy of the trap center in the Pool-Frenkel conduction mechanism. In any mechanism, the obtained activation energy value is reasonable.

  Thus, it can be seen that the measurement results obtained by the ferroelectric capacitor measurement method of the present embodiment are in good agreement with the above-described nonlinear imprint theory.

(Step S17)
In this step, based on the measurement results up to step S16, the imprint prediction in the ferroelectric capacitor, that is, the relationship between the amount of inversion polarization _PSW and the baking time is predicted.

When the equation (15) was fitted using the parameters shown in Table 1, the correlation coefficient was extremely high at 0.99, and it was found that the model of the present invention accurately fits the data particularly in the baked sample. Therefore, imprinting due to long-term polarization state retention is accurately predicted by extrapolating the V _{off -time} curve shown in FIG. 9 in the long-time direction using the parameters of Equation (15) and Table 1. Can be expected.

FIG. 11 is a P _SW -time curve calculated based on the V _off -time curve fitting curve shown in FIG. In creating the graph, the predicted value of the voltage offset V _off is calculated by extrapolating the fitting curve of FIG. 9, and the decrease value ΔP of the polarization amount is calculated by Equation (25) using this predicted value, and the polarization amount is calculated. The reverse polarization amount P _SW was calculated backward from the decrease value ΔP.

In the ferroelectric capacitor C after 10 years (10 ^4.9 hours) at 150 ° C., the voltage offset V _off increases to about 0.9V. Therefore, when the polarization of the ferroelectric capacitor C is reversed with a 3V pulse, the actual voltage felt by the ferroelectric is 2.1V. It can be seen that the amount of inversion polarization P _{SW in} this case changes from the initial value of 35.4 μC / cm ² to about 31.6 μC / cm ² according to the switching curve of FIG. This means that the pure decrease value of the polarization amount by imprinting in this case is about 11%.

When the inversion polarization amount P _SW is divided into N component and D component and plotted separately at 150 ° C., as shown in FIG. 12, the decrease in the inversion polarization amount P _SW is mainly caused by the decrease in the N component. I understand that. Note that the N component and the D component correspond to N and D in FIG.

  FIG. 13 is a graph showing the dependence of the amount of inversion polarization and the voltage applied to the ferroelectric on the baking time. FIG. 13A shows a case of baking at 85 ° C., and FIG. 13B shows a case of baking at 150 ° C.

In each graph, the applied voltage V to the ferroelectric was calculated by subtracting the offset voltage _Voff predicted from the fitting curve of FIG. 9 from the 3V pulse applied by the pulse generator.

As shown in the figure, the voltage V applied to the ferroelectric decreases linearly with respect to the logarithmic scale time axis. When the baking temperature is 85 ° C., the inversion polarization amount P _SW is substantially constant until the voltage V is about 2.7 V, but decreases when the voltage V falls below about 2.7 V. On the other hand, when the baking temperature is 150 ° C., the voltage V and the polarization inversion amount P _SW applied to the ferroelectric decrease at a faster rate than the case of 85 ° C. as the time increases.

From the results of FIG. 13, it can be seen that the change in the offset voltage _Voff increases as the temperature increases, and the polarization loss with respect to the stress time is accelerated. By comparing the offset voltage V _off after 500 hours and normalizing it to a room temperature state, the acceleration factor AF of the offset voltage V _off can be calculated by the following equation.

AF = V _off (predetermined temperature, 500 hours) / V _off (25 ° C, 500 hours) (26)
As a result of obtaining the acceleration factor AF of the offset voltage V _off in this way, the acceleration factors AF at 25 ° C., 85 ° C., 120 ° C., and 150 ° C. are 1.0, 2.1, 2.7, and 3. 2. When the stress exposure temperature is increased, the acceleration factor AF doubles at 85 ° C. and triples at 150 ° C. From these results, it was proved that the imprint was accelerated compared with the case where the temperature was the offset voltage V _off and the room temperature.

  As described above, by using the ferroelectric capacitor measurement method according to the present embodiment, it is possible to accurately measure the imprint after the stress application while eliminating the retention loss during the stress application. Prediction of imprinting by maintaining the polarization state can also be performed accurately. Accurate prediction of imprint is extremely useful for setting a reference level used when reading information stored in FeRAM.

FIG. 14 is a graph showing temporal changes in the bit line voltage V _sig of FeRAM. FIG. 14A shows a case where stress is applied in the “0” state, and FIG. 14B shows a case where stress is applied in the “1” state. In each figure, ““ 1 ”-Data” is the bit line voltage V _sig when reading “1”, and ““ 0 ”-Data” is the bit line voltage V _sig when reading “0”. The bit line voltage V _sig changes over time due to imprinting. In FIGS. 14A and 14B, (P) means a voltage corresponding to the amount of inversion polarization, and (U) means a voltage corresponding to the amount of non-inversion polarization. I mean.

  The graph shown in FIG. 14 can be calculated by using the measurement method and model described above. Therefore, by setting the size of the reference capacitor based on this graph, the reference level (Reference) is set to a level that does not cause erroneous reading even if imprinting due to polarization state maintenance for a long time (for example, 10 years or more) occurs. Can be set. The reference level is desirably set so that the intervals between (P) and (U) are equal in order to ensure a sufficient operation margin of FeRAM.

  Next, the result of verifying the applicability of the ferroelectric capacitor measuring method according to the present embodiment to an actual FeRAM capacitor will be shown.

In the above description, the measurement results for a discrete capacitor having an area of 15 × 15 μm ² are shown. However, since the actual FeRAM is configured by arranging capacitors having an area of 2 μm ^{2 in} a two-dimensional array, for example, can the method of measuring the ferroelectric capacitor according to the present embodiment be applied to the actual measurement of the FeRAM capacitor? Is not clear. Therefore, the method of measuring the ferroelectric capacitor according to the present embodiment was verified for the FeRAM array capacitor.

FIG. 15 is a graph showing the measurement results of the relationship between the amount of polarization and the applied voltage (hysteresis loop) in a discrete capacitor having an area of 15 × 15 μm ² , and FIG. 16 is a diagram showing 100 capacitors having an area of 2 μm ² with aluminum (Al) wiring. 5 is a graph showing a measurement result of a relationship (hysteresis loop) between a polarization amount and an applied voltage in a capacitor array (total area: 200 μm ² ) connected in parallel via an aluminum (Al) pad. For the measurement of the hysteresis loop, the measurement circuit of FIG. 3A using a 300Ω shunt resistor R _L was used.

  In the figure, □ is the measurement result in the initial state where no stress is applied, ▲ is the measurement result after applying stress at 150 ° C for 1000 hours in the “1” state, and ● is in the “0” state This is a measurement result after applying stress at 1000C for 1000 hours.

  As shown in FIGS. 15 and 16, in both the discrete capacitor and the array capacitor, the hysteresis loop is shifted along the voltage axis with the application of stress. That is, it can be seen that imprinting occurs in both capacitors.

  When the shift amount of the hysteresis loop was compared, the shift amount of the discrete capacitor was larger than that of the array capacitor. In the discrete capacitor, the loop shape is slightly distorted after the stress is applied. The reason why discrete capacitors show more imprints is not clear, but many defects exist in the ferroelectric film, probably because the manufacturing process is optimized for array capacitors. This is probably because of this.

  FIG. 17 is a graph showing the time dependency of the decrease value ΔP of the polarization amount measured using the ferroelectric capacitor measurement method according to the present embodiment. In the figure, □ and ● are the measurement results of the discrete capacitors, and × and ▲ are the measurement results of the array capacitors. Also, when □ and X marks are at “0” state and 150 ° C. and 1000 hours of stress are applied, ● and ▲ marks are at “1” state and 150 ° C. and 1000 hours of stress are applied. is there.

  As shown in FIG. 17, in both the discrete capacitor and the array capacitor, it can be seen that the decrease amount ΔP of the polarization amount changes linearly with respect to the logarithmic axis of time. That is, the ferroelectric capacitor measurement method according to the present embodiment can be applied to both the discrete capacitor and the array capacitor.

  Further, as shown in FIG. 17, in both the discrete capacitor and the array capacitor, the decrease amount ΔP of the polarization amount increases with the baking time. Comparing the magnitude of the decrease in polarization amount, the shift amount of the discrete capacitor was larger than that of the array capacitor.

FIG. 18 shows the polarization amount decrease value ΔP converted to the offset voltage V _off based on the result of FIG. In the figure, □ and ● are the measurement results of the discrete capacitors, and × and ▲ are the measurement results of the array capacitors. Also, when □ and X marks are at “0” state and 150 ° C. and 1000 hours of stress are applied, ● and ▲ marks are at “1” state and 150 ° C. and 1000 hours of stress are applied. is there.

In the measurement results of the array capacitor, the offset voltage V _off after applying stress for 20 hours was 0.21V, and the offset voltage V _off after applying stress for 1000 hours was 0.38V. The graph was extrapolated based on the measurement result when stress was applied for 1000 hours, and the offset voltage V _off after 10 years (after ^10.4.94 hours) was calculated. The predicted value of V _off was 0.54V. .

On the other hand, the graph was extrapolated based on the measurement result when the stress was applied for 1 hour, the measurement result when the stress was applied for 4 hours, and the measurement result when the stress was applied for 20 hours, and 1000 hours and 10 years later (10 ^{When the} offset voltage V _off after ^4.94 hours) was calculated, the predicted value of the offset voltage V _off after 1000 hours was 0.35V, and the predicted value of the offset voltage V _off after 10 years was 0.51V. there were.

Thus, the prediction value of the offset voltage V _off, which is calculated from the measurement result in the case of applying stress for 1000 hours, the predicted value of the offset voltage V _off, which is calculated from the measurement result in the case of applying a stress 20 hours The difference between them was as extremely small as 0.03V. This type of test is mainly used as a screening to evaluate the imprint characteristics of the capacitor, but the offset voltage difference of 0.03V is within the measurement error.

The above results show that if the measurement is performed for about 20 hours or one day, the offset voltage V _off after 10 years required for the device reliability test can be accurately predicted. Then, by using the ferroelectric capacitor measuring method according to the present embodiment, it is possible to perform imprint evaluation very quickly.

  As described above, according to the present embodiment, the offset voltage is calculated based on the switching curve representing the change in the reverse polarization amount with respect to the applied voltage and the difference between the reverse polarization amounts before and after the stress application. No need for complete loops or complex parameter settings. Therefore, measurement under conditions close to actual use conditions can be performed with a high-speed pulse (for example, 1 ps to 1 μs) used for driving the ferroelectric memory element.

  In addition, a characteristic curve representing the relationship between the offset voltage and time is fitted with a model that shows a very good agreement with the measurement result, so that the offset voltage and the amount of inversion polarization at an arbitrary time can be predicted easily and accurately. .

  In addition, the influence of depolarization and retention loss due to stress can be eliminated, and imprint can be accurately measured and predicted.

  Further, when determining the capacitance value of the reference capacitor of the ferroelectric memory, it is possible to make an error even if imprinting occurs due to maintaining the polarization state for a long period of time (for example, 10 years or more) by using the ferroelectric capacitor measuring method. It is possible to easily set the reference level to a level at which reading does not occur.

  The method for measuring a ferroelectric capacitor according to the present embodiment can be applied not only to a discrete capacitor but also to an array capacitor of a cell as applied to an actual FeRAM.

[Modified Embodiment]
The present invention is not limited to the above embodiment, and various modifications can be made.

  For example, in the above-described embodiment, the measurement method in the case where voltage pulses of 1.8 V and 3 V are used is shown assuming a ferroelectric capacitor used in a nonvolatile memory having a design rule of 0.35 μm. In the method for measuring a ferroelectric capacitor according to the present embodiment, the imprint can be measured and predicted by the same method regardless of the drive voltage used. Further, the rise time and width of the voltage pulse are not limited to the conditions of the above embodiment.

  Moreover, in the said embodiment, although heat stress is applied in the state polarized in the negative direction, you may make it apply heat stress in the state polarized in the positive direction. In this case, the polarity of the applied pulse may be reversed, or the connection between the upper electrode and the lower electrode may be switched.

  In the above embodiment, the method for measuring a ferroelectric capacitor using a PZT film as the ferroelectric film has been described. However, the ferroelectric capacitor to which the present invention can be applied is limited to that using a PZT film. It is not a thing. In addition to the PZT film, for example, a BST film, a BLT film, a BFO film, an SBT film, and other ferroelectric capacitors using other ferroelectric materials can be similarly applied.

  As detailed above, the characteristics of the present invention are summarized as follows.

(Supplementary note 1) For a ferroelectric capacitor to be measured, a switching curve representing a change in the amount of inversion polarization with respect to an applied voltage is measured,
For the ferroelectric capacitor, a first inversion polarization amount is measured,
Applying stress to the ferroelectric capacitor for a predetermined time at a predetermined temperature,
For the ferroelectric capacitor to which the stress is applied, a second inversion polarization amount is measured,
An offset voltage introduced by the stress is calculated based on a slope of a linear region of the switching curve and a difference between the first inversion polarization amount and the second inversion polarization amount. Measuring method.

(Additional remark 2) In the measuring method of the ferroelectric capacitor of Additional remark 1,
By repeatedly applying the stress and measuring the second inversion polarization amount, the offset voltage when the stress application time is different is calculated,
Calculating a fitting curve obtained by fitting a model equation describing the relationship between the offset voltage and an arbitrary time with a plurality of measured values of the offset voltage;
A method of measuring a ferroelectric capacitor, wherein an offset voltage at an arbitrary time is predicted based on the fitting curve.

(Supplementary Note 3) In the method for measuring a ferroelectric capacitor according to Supplementary Note 2,
A method for measuring a ferroelectric capacitor, comprising: calculating a first characteristic curve representing a relationship between an amount of inversion polarization and time based on the fitting curve.

(Additional remark 4) In the measuring method of the ferroelectric capacitor of Additional remark 3,
During the measurement of the first and second inversion polarization amounts, the non-inversion polarization amount is simultaneously measured,
A method for measuring a ferroelectric capacitor, comprising: calculating a second characteristic curve representing a relationship between the amount of non-inverted polarization and time based on the fitting curve.

(Appendix 5) In the method for measuring a ferroelectric capacitor according to any one of appendices 1 to 4,
Using a pulse train having a first pulse, a second pulse having a polarity opposite to that of the first pulse, and a third pulse having the same polarity as that of the first pulse, the magnitude of the second pulse is determined. The ferroelectric capacitor is characterized in that the switching curve is measured by repeatedly applying the pulse train while sequentially increasing and measuring the amount of inversion polarization when the third pulse is applied. Method.

(Appendix 6) In the method for measuring a ferroelectric capacitor according to any one of appendices 1 to 5,
For the measurement of the first inversion polarization amount and the second inversion polarization amount,
A first pulse, a second pulse having the opposite polarity to the first pulse, a third pulse having the same polarity as the first pulse, and a fourth pulse having the same polarity as the second pulse, A method for measuring a ferroelectric capacitor, comprising using a pulse train having the following characteristics.

(Supplementary Note 7) In the method for measuring a ferroelectric capacitor according to Supplementary Note 6,
The method for measuring a ferroelectric capacitor, wherein the first inversion polarization amount and the second inversion polarization amount are measured as an inversion polarization amount when the fourth pulse is applied.

(Appendix 8) In the method for measuring a ferroelectric capacitor according to any one of appendices 1 to 7,
The method for measuring a ferroelectric capacitor, wherein the first to third inversion polarization amounts are measured by applying a negative pulse.

(Appendix 9) In the method for measuring a ferroelectric capacitor according to any one of appendices 1 to 8,
The method for measuring a ferroelectric capacitor, comprising applying the stress in a temperature range of −45 ° C. to 250 ° C.

(Appendix 10) In the method for measuring a ferroelectric capacitor according to any one of appendices 1 to 9,
A method of measuring a ferroelectric capacitor, wherein a width of a pulse applied at the time of measurement is 1 ps or more and 1 μs or less.

(Appendix 11) In the method for measuring a ferroelectric capacitor according to any one of appendices 1 to 10,
The method of measuring a ferroelectric capacitor, wherein the ferroelectric capacitor to be measured is a discrete capacitor or an array capacitor.

(Supplementary Note 12) A ferroelectric capacitor measuring apparatus that measures an inversion charge amount of a ferroelectric capacitor using an active probe,
The active probe has a probe pin which is a measurement terminal and a ground pin connected to a reference potential, and a load resistance is connected between the probe pin and the ground pin, and the probe pin and the ground pin The measuring apparatus of a ferroelectric capacitor, wherein the interval is 1 cm or less.

(Supplementary note 13) A ferroelectric memory design method including a ferroelectric capacitor and a reference capacitor used when reading information recorded in the ferroelectric capacitor,
For the ferroelectric capacitor, a switching curve representing a change in the amount of inversion polarization with respect to the applied voltage is measured,
For the ferroelectric capacitor, a first inversion polarization amount and a first non-inversion polarization amount are measured,
For the ferroelectric capacitor, repeatedly applying stress for a predetermined time at a predetermined temperature, and measuring the second inversion polarization amount and the second non-inversion polarization amount after the stress application,
An offset voltage at a time when the stress application time is different is calculated based on a slope of a linear region of the switching curve and a difference between the first inversion polarization amount and the second inversion polarization amount,
Calculating a fitting curve obtained by fitting a model equation describing the relationship between the offset voltage and an arbitrary time with a plurality of measured values of the offset voltage;
Based on the fitting curve, a first characteristic curve representing the relationship between the amount of reversed polarization and time and a second characteristic curve representing the relationship between the amount of non-reversed polarization and time are calculated,
The capacitance of the reference capacitor is set so that the accumulated charge amount of the reference capacitor is located between the first characteristic curve and the second characteristic curve over a desired time range. To design a ferroelectric memory.

It is a figure which shows the model of the ferroelectric capacitor used for the theoretical calculation of the imprint. 3 is a flowchart illustrating a method for measuring a ferroelectric capacitor according to an embodiment of the present invention. It is a figure which shows the measurement circuit and measurement waveform which were used for the measuring method of the ferroelectric capacitor by one Embodiment of this invention. It is the schematic which shows the shape of the active probe used for the measuring method of the ferroelectric capacitor by one Embodiment of this invention. It is a figure which shows the pulse train for a measurement used in step S11. It is a graph which shows the switching curve measured in step S11. It is a figure which shows the pulse waveform sequence for a measurement used in step S12 and step S14. It is a graph which shows the time dependence of decrease value (DELTA) P of the amount of polarization. It is a graph which shows the time dependence of offset voltage _Voff . It is a graph which shows the temperature dependence of parameter (tau) ₀ . It is a graph which shows the time dependence of inversion polarization amount _PSW . It is a graph which shows the time dependence of inversion polarization amount _PSW . It is a graph which shows the time dependence of the voltage V applied to the amount of inversion polarization _PSW and a ferroelectric film. It is a figure which shows the setting method of the size of a reference capacitor. It is a graph which shows the result of having measured the hysteresis loop of a discrete capacitor. It is a graph which shows the result of having measured the hysteresis loop of the array capacitor. It is a graph which shows the time dependence of decrease value (DELTA) P of the polarization amount in a discrete capacitor and an array capacitor. It is a graph which shows the time dependence of offset voltage _Voff in a discrete capacitor and an array capacitor. It is a schematic sectional drawing which shows the structure of FeRAM.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Lower electrode 12 ... Upper electrode 14 ... Ferroelectric film 16, 18 ... Passive layer 20 ... Pulse generator 22 ... Digital storage oscilloscope 30 ... Active probe 32 ... Probe pin 34 ... Ground pin 100 ... Silicon substrate 102 ... Element isolation region 104 ... well 106 ... gate electrode 108, 110 ... source / drain region 112 ... MOS transistor 114, 132 ... interlayer insulating film 116, 118, 134 ... plug 120 ... Ir film 122, 126 ... IrOx film 124 ... PZT film 130 ... strong Dielectric capacitor 136... Wiring layer 138... Bit line

Claims (5)

For the ferroelectric capacitor to be measured, measure the switching curve representing the change in the amount of reversed polarization with respect to the applied voltage,
For the ferroelectric capacitor, a first inversion polarization amount is measured,
Applying stress to the ferroelectric capacitor for a predetermined time at a predetermined temperature,
For the ferroelectric capacitor to which the stress is applied, a second inversion polarization amount is measured,
An offset voltage introduced by the stress is calculated based on a slope of a linear region of the switching curve and a difference between the first inversion polarization amount and the second inversion polarization amount. Measuring method. The method of measuring a ferroelectric capacitor according to claim 1,
By repeatedly applying the stress and measuring the second inversion polarization amount, the offset voltage when the stress application time is different is calculated,
Calculating a fitting curve obtained by fitting a model equation describing the relationship between the offset voltage and an arbitrary time with a plurality of measured values of the offset voltage;
A method of measuring a ferroelectric capacitor, wherein an offset voltage at an arbitrary time is predicted based on the fitting curve. The method of measuring a ferroelectric capacitor according to claim 2.
A method for measuring a ferroelectric capacitor, comprising: calculating a first characteristic curve representing a relationship between an amount of inversion polarization and time based on the fitting curve. In the measuring method of the ferroelectric capacitor according to claim 3,
During the measurement of the first and second inversion polarization amounts, the non-inversion polarization amount is simultaneously measured,
A method for measuring a ferroelectric capacitor, comprising: calculating a second characteristic curve representing a relationship between the amount of non-inverted polarization and time based on the fitting curve. A ferroelectric memory design method comprising a ferroelectric capacitor and a reference capacitor used when reading information recorded in the ferroelectric capacitor,
For the ferroelectric capacitor, a switching curve representing a change in the amount of inversion polarization with respect to the applied voltage is measured,
For the ferroelectric capacitor, a first inversion polarization amount and a first non-inversion polarization amount are measured,
For the ferroelectric capacitor, repeatedly applying stress for a predetermined time at a predetermined temperature and measuring the second inversion polarization amount and the second non-inversion polarization amount after the stress application,
An offset voltage at a time when the stress application time is different is calculated based on a slope of a linear region of the switching curve and a difference between the first inversion polarization amount and the second inversion polarization amount,
Calculating a fitting curve obtained by fitting a model equation describing the relationship between the offset voltage and an arbitrary time with a plurality of measured values of the offset voltage;
Based on the fitting curve, a first characteristic curve representing the relationship between the amount of inverted polarization and time, and a second characteristic curve representing the relationship between the amount of non-inverted polarization and time, are calculated.
The capacitance of the reference capacitor is set so that the accumulated charge amount of the reference capacitor is located between the first characteristic curve and the second characteristic curve over a desired time range. To design a ferroelectric memory.

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