JP2005317842A - Nitride semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide the method of manufacturing a reliable nitride semiconductor device at an excellent yield ratio. <P>SOLUTION: The method of manufacturing a nitride semiconductor comprises steps of: (A) preparing an n-GaN substrate 101 having a polished principal plane and containing a first impurity whose average density in the principal plane is equal to or more than 1×10<SP>17</SP>cm<SP>-3</SP>; (B) growing n-GaN crystal 106 on the principal plane of the n-GaN substrate 101; and (C) selectively growing Al<SB>x</SB>Ga<SB>y</SB>In<SB>z</SB>N crystal (0≤x, y, z≤1:x+y+z=1) to each of a plurality of striped regions on the top surface of the n-GaN crystal 106. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a nitride semiconductor device for a semiconductor laser or a light emitting diode and a method for manufacturing the same.

  A blue-violet semiconductor laser manufactured using a group III-V nitride semiconductor material typified by gallium nitride is a key device for realizing ultra-high density recording by an optical disk device, and is currently reaching a practical level. is there. The high output of this blue-violet semiconductor laser not only enables high-speed writing of optical discs, but also opens up new technical fields such as application to laser displays.

  Conventionally, a GaN-based semiconductor laser using a sapphire substrate has been developed. In recent years, it has been studied to manufacture a GaN-based semiconductor laser using a nitride semiconductor substrate such as a GaN substrate. For example, Non-Patent Document 1 discloses a GaN-based semiconductor laser at a practical level. Hereinafter, a conventional method for manufacturing a GaN-based semiconductor laser will be described with reference to FIG.

As shown in FIG. 23, this semiconductor laser is manufactured using an undoped GaN substrate 3601 whose main surface is covered with a SiO ₂ mask 3602. A plurality of stripe-shaped openings 3603 are formed in the SiO ₂ mask 3602. A GaN layer 3604 is grown on the undoped GaN substrate 3601 by selective lateral growth (ELO) using metal organic vapor phase epitaxy (MOVPE). The GaN layer 3604 is epitaxially grown on the main surface of the GaN substrate 3601 exposed through the individual stripe-shaped openings 3603 of the SiO ₂ mask 3602, but the GaN layer 3604 is not only in the direction perpendicular to the main surface of the substrate but also in the horizontal direction. It also grows laterally and contacts each other to form a layer.

On the GaN layer 3604, by the MOVPE method, n-GaN crystal 3605, n-AlGaN cladding layer 3606, n-GaN optical guide layer _{3607, Ga 1-x In x} N / Ga 1-y In y N (0 < A multi-quantum well (MQW) active layer 3608 made of y <x <1), a p-GaN light guide layer 3609, a p-AlGaN cladding layer 3610, and a p-GaN contact layer 3611 are stacked. In the GaN layer 3604 formed by selective lateral growth (ELO), edge dislocations exist in the portion where the individual stripe-like GaN grown in the lateral direction are combined, and in the semiconductor layer grown thereon, Also, edge dislocations extend from the GaN layer 3604.

On the p-GaN contact layer 3611, a ridge stripe having a width of about 1.5 to 10 μm is formed in a region where no edge dislocation exists. Thereafter, both sides of the ridge stripe are filled with the SiO ₂ layer 3613.

Thereafter, a p-electrode 3612 made of, for example, Ni / Au is formed on the ridge stripe and the SiO ₂ layer 3613. A part of the stacked body is etched until the n-GaN crystal 3605 is exposed, and an n-electrode 3614 made of, for example, Ti / Al is formed on the surface of the n-GaN crystal 3605 exposed by this etching. .

In the semiconductor laser shown in FIG. 23, when the n-electrode 3614 is grounded and a voltage is applied to the p-electrode 3612, holes are injected from the p-electrode 3612 side and electrons are injected from the n-electrode 3614 side toward the MQW active layer 3608. Is done. As a result, a carrier inversion distribution is generated in the MQW active layer 3608, so that an optical gain is generated, and laser oscillation in a wavelength band of 400 nm can be caused. The oscillation wavelength varies depending on the composition and thickness of the Ga _{1 -x} In _x N / Ga _{1 -y} In _y N thin film that is the material of the MQW active layer 3608.

  In the semiconductor laser disclosed in Non-Patent Document 1, the width and height of the ridge stripe are adjusted so that laser oscillation occurs in the horizontal basic transverse mode. That is, by providing a difference in the optical confinement factor between the basic lateral mode and the higher order mode (first-order or higher mode), oscillation in the basic lateral mode is possible.

  The undoped GaN substrate 3601 is manufactured as follows, for example.

  First, a relatively thin GaN layer is grown on a sapphire substrate by MOCVD. Thereafter, a thick GaN film is grown on the GaN layer by a method such as hydride VPE (H-VPE). At this time, the GaN thick film is not intentionally doped with impurities. After growing the GaN film to a sufficient thickness, the sapphire substrate is peeled off to obtain a GaN substrate.

The GaN substrate produced by the above method has a problem that dislocations such as edge dislocations, screw dislocations, and mixed dislocations exist at a density of the order of 10 ⁷ cm ⁻² . If dislocations exist with such a large density, it is difficult to obtain a highly reliable semiconductor laser.

The growth of the GaN layer 1604 shown in FIG. 23 is performed in order to obtain a GaN layer with few dislocations. By adding the ELO process of the GaN layer 1604, the dislocation density in GaN can be reduced to about 7 × 10 ⁵ cm ⁻² . By forming the active region (current injection region) above the region with few dislocations formed in this way, it becomes possible to improve the reliability of the semiconductor laser.

Further, in order to reduce the influence of the remaining strain on the surface of the GaN substrate grown by H-VPE and improve the surface morphology, Patent Document 1 discloses a GaN substrate manufactured by H-VPE as shown in FIG. It describes that a relaxation layer 3701 made of AlGaN is deposited on 3601 by MOVPE, and the above-described n-GaN layer 3605 is formed thereon. Although it is desirable that the GaN substrate 3601 is in an undoped state where impurities are not intentionally added, it is described that Si may be doped so that the impurity concentration is about 1 × 10 ¹⁸ cm ⁻³ . .

  On the other hand, in the method described in Patent Document 2, in a kind of selective growth in which GaN is grown while forming and maintaining a facet by holding H-VPE on the substrate, a regular pattern is formed on the substrate to be a seed crystal. It is attempted to control the pit generation position by forming the.

Patent Document 3 discloses a GaN substrate doped with oxygen (O) to obtain n-type conduction. According to the method for manufacturing a substrate described in Patent Document 3, there is a case where a distribution occurs in how impurities are taken in the crystal plane. This is because the growth is performed while forming facets such as the C-plane and the R-plane, so that the way in which impurities are incorporated differs depending on the plane orientation.
Japan Journal of Applied Physics (Jpn. J. Appl. Phys.), Vol. 39, p. L648 (2000) JP 2001-196700 A JP 2003-165799 A JP 2000-044400 A

  Although the nitride semiconductor device described in Non-Patent Document 1 and Patent Document 1 has a possibility of improving the reliability of the laser device, there is a new problem to be solved as described below. Has been clarified by experiments of the present inventors. It has also been found that this problem is significant when impurities are doped in the nitride semiconductor substrate (GaN substrate). That is, when the GaN substrate is doped with impurities such as oxygen and silicon, the following problems may occur when selective lateral growth (lateral growth) of a nitride semiconductor crystal is performed on such a GaN substrate. all right.

(1) large unevenness is formed on the growth surface of the nitride semiconductor layer formed by lateral growth, and flatness is deteriorated; and (2) portions of the nitride semiconductor layer grown in the lateral direction are mutually connected. Misalignment occurs at the merged part (merged part).

  For example, when a semiconductor laser is manufactured, the flatness is deteriorated, because a swell (in the direction of the resonator) is generated in a striped waveguide, resulting in variations in laser characteristics (especially threshold current and operating current), resulting in a decrease in yield. It will cause a decline. In addition, edge dislocations are likely to occur in the merged portion of the laterally grown portion, and if the position of the merged portion varies (displacement), the dislocation enters the stripe position of the semiconductor laser, reducing reliability. There is a case to let you.

The phenomenon as shown in the above (1) and (2) was remarkably observed in the nitride semiconductor substrate having the impurity distribution in the plane of the substrate. In particular, problems occur with substrates having an impurity concentration of 1 × 10 ¹⁸ cm ⁻³ or more.

  Further, the same problem has been clarified in the nitride semiconductor substrate subjected to planarization by polishing or the like. This is considered to be because the surface is damaged by the polishing treatment, and segregation of impurities is likely to occur.

  The present invention has been made in view of the above circumstances, and a main object of the present invention is to provide a method of manufacturing a highly reliable nitride semiconductor device with high yield.

The method for producing a nitride semiconductor according to the present invention provides a nitride semiconductor substrate having a polished main surface and containing a first impurity having an average concentration of 1 × 10 ¹⁷ cm ⁻³ or more on the main surface. A step (A), a step (B) of growing an Al _u Ga _v In _w N crystal layer (0 ≦ u, v, w ≦ 1: u + v + w = 1) on the main surface of the nitride semiconductor substrate, An Al _x Ga _y In _z N crystal (0 ≦ x, y, z ≦ 1: x + y + z = 1) is selectively grown on each of the plurality of stripe regions on the upper surface of the Al _u Ga _v In _w N crystal layer. Step (C).

  In a preferred embodiment, the first impurity concentration is oxygen.

In a preferred embodiment, n _max / n _min is 10 or more when a maximum value of the impurity concentration on the main surface of the nitride semiconductor substrate is n _max and a minimum value is n _min .

In a preferred embodiment, the Al _u Ga _v In _w N crystal layer contains a second impurity different from the first impurity contained in the nitride semiconductor substrate.

In a preferred embodiment, the vapor pressure of the first impurity at the growth temperature of the Al _x Ga _y In _z N crystal is higher than the vapor pressure of the second impurity at the growth temperature.

  In a preferred embodiment, the first impurity is oxygen, and the second impurity is at least one selected from the group consisting of silicon, germanium, selenium, and sulfur.

In a preferred embodiment, the average concentration of the second impurity in the Al _u Ga _v In _w N crystal layer is lower than the average concentration of the first impurity in the main surface of the nitride semiconductor substrate.

  In a preferred embodiment, the first impurity is at least one selected from the group consisting of oxygen, silicon, germanium, selenium, and sulfur.

In a preferred embodiment, the Al _u Ga _v In _w N growth temperature of the well than the growth temperature of the crystal layer Al _x Ga _y In _z N crystal layer is high.

  In a preferred embodiment, the step (A) includes a step (a1) of growing a nitride semiconductor so as to form a plurality of facets inclined with respect to the main surface on the upper surface, and polishing the upper surface of the nitride semiconductor. And a step (a2) of forming the main surface by flattening.

  In a preferred embodiment, the step (a1) includes a step of doping the nitride semiconductor with an impurity so as to have a concentration distribution according to an arrangement period of the plurality of facets.

In a preferred embodiment, the step (a1) includes a step of growing the nitride semiconductor by a hydride VPE method, and the step (B) grows the Al _u Ga _v In _w N crystal layer by a MOVPE method. Process.

In a preferred embodiment, the Al _u Ga _v In _w N crystal is an undoped semiconductor layer.

In a preferred embodiment, the average concentration of the second impurity in the Al _u Ga _v In _w N crystal layer is 1 × 10 ¹⁹ cm ⁻³ or less.

In a preferred embodiment, before the step (C), a step of forming a plurality of striped ridges having an upper surface parallel to the main surface of the nitride semiconductor substrate in the Al _u Ga _v In _w N crystal layer is included. The step (C) includes a step of selectively growing the Al _x Ga _y In _z N crystal on the upper surfaces of the plurality of striped ridges.

In a preferred embodiment, before performing the step (C), a region in which the plurality of stripe-shaped ridges are not formed in the Al _u Ga _v In _w N crystal layer or the nitride semiconductor substrate is used for selective growth. Cover with a mask.

  In a preferred embodiment, in the step (B), the width of the upper surface of the stripe ridge is set in the range of 1 μm to 400 μm, and the arrangement pitch of the stripe ridge is set in the range of 2 μm to 500 μm. Process.

Another method of manufacturing a nitride semiconductor device according to the present invention includes a step (A) of preparing a nitride semiconductor substrate having a polished main surface, and an Al _u Ga _v In _w N crystal layer (0 ≦ u, v, w ≦ 1: u + v + w = 1) on the main surface of the nitride semiconductor substrate (B), and for each of the plurality of stripe regions on the upper surface of the Al _u Ga _v In _w N crystal layer A step (C) of selectively growing a first nitride semiconductor layer, and an active layer made of a second nitride semiconductor having a band gap smaller than that of the first nitride semiconductor layer above the first nitride semiconductor layer; And (D) growing a multilayer body including a third nitride semiconductor having a band gap larger than that of the active layer, and a current confinement structure for selectively injecting carriers into the active layer. Step (E).

In a preferred embodiment, before the step (C), a step of forming a plurality of striped ridges having an upper surface parallel to the main surface of the nitride semiconductor substrate in the Al _u Ga _v In _w N crystal layer is included. The step (C) includes a step of selectively growing the first nitride semiconductor layer on the upper surfaces of the plurality of striped ridges.

In a preferred embodiment, before performing the step (C), a region in which the plurality of stripe-shaped ridges are not formed in the Al _u Ga _v In _w N crystal layer or the nitride semiconductor substrate is selectively grown. Cover with.

In a preferred embodiment, before performing the step (C), the Al _u Ga _v In _w N crystal layer or the nitride semiconductor substrate in which the plurality of stripe ridges are not formed and each stripe ridge Cover the side with a selective growth mask.

  In a preferred embodiment, the region into which carriers are injected is formed in the upper part between the two adjacent stripe ridges.

The nitride semiconductor of the present invention includes a nitride semiconductor substrate having a polished main surface and containing a first impurity having an average concentration of 1 × 10 ¹⁷ cm ⁻³ or more on the main surface, and the nitride semiconductor Al _u grown on the main surface of the substrate Ga _v in _w N crystal layer (0 ≦ u, v, w ≦ 1: u + v + w = 1) and, formed on the upper surface of the Al _u Ga _v in _w N crystal layer Al _x Ga _y In _z N crystal (0 ≦ x, y, z ≦ 1: x + y + z = 1) selectively grown for each of the plurality of stripe regions.

In a preferred embodiment, n _max / n _min is 10 or more when the maximum value of the first impurity concentration on the main surface of the nitride semiconductor substrate is n _max and the minimum value is n _min .

In a preferred embodiment, the vapor pressure of the first impurity at the growth temperature of the Al _x Ga _y In _z N crystal is higher than the vapor pressure of the second impurity at the growth temperature.

In a preferred embodiment, the average concentration of the second impurity in the Al _u Ga _v In _w N crystal layer is lower than the average concentration of the first impurity in the main surface of the nitride semiconductor substrate.

  The nitride semiconductor device according to the present invention is a nitride semiconductor device including any one of the nitride semiconductors, a semiconductor stacked structure including an active layer provided on the nitride semiconductor, and carriers selectively in a partial region of the active layer. And a current confinement structure to be injected.

  According to the present invention, when a nitride semiconductor crystal is formed on a selected region of a nitride semiconductor substrate by lateral growth (lateral growth), it is caused by the influence of impurities contained in the nitride semiconductor substrate. It is possible to suppress a decrease in flatness in an easy crystal growth layer. In addition, since generation of edge dislocations can be suppressed, a nitride semiconductor with a low dislocation density can be manufactured with a high yield.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
First, refer to FIG. FIG. 1 shows a cross section of a nitride semiconductor device (semiconductor laser) according to this embodiment.

The semiconductor laser of this embodiment is manufactured using an n-GaN substrate 101 having an Al _u Ga _v In _w N crystal layer (0 ≦ u, v, w ≦ 1: u + v + w = 1) on the main surface. A plurality of striped ridges are formed in the Al _u Ga _v In _w N crystal layer. In this embodiment, as an example of the Al _u Ga _v In _w N crystal layer formed on the n-GaN substrate 101, a crystal layer having a composition of u = 0, v = 1, and w = 0 is used. The Al _u Ga _v In _w N crystal layer is referred to as a GaN buffer layer 120, and in particular, the GaN buffer layer 120 doped with an n-type impurity is referred to as an n-GaN buffer layer 120. In the GaN buffer layer 120, the influence of impurities contained in the substrate 101 does not adversely affect the Al _x Ga _y In _z N crystal (0 ≦ x, y, z ≦ 1: x + y + z = 1) formed by selective lateral growth. To function. In the present embodiment, an n-GaN crystal 106 is grown as a Al _x Ga _y In _z N crystal in a selected region of the GaN buffer layer 120.

  In the semiconductor laser shown in FIG. 1, the main surface of the n-GaN buffer layer 120 other than the upper surface of the striped ridge is covered with a mask layer 102 made of SiNx (0 <x <3/4). Yes.

  The upper surface of each stripe ridge functions as a seed portion 105 having a crystal plane parallel to the main surface of the substrate, and a recess is formed between adjacent stripe ridges. The recess is not filled with a semiconductor or the like, and an air gap 103 exists between the main surface of the n-GaN substrate 101 and the bottom surface of the semiconductor multilayer structure.

In the present embodiment, the semiconductor multilayer structure formed on the ridge has an n-GaN crystal 106, an n-Al _0.1 Ga _0.9 N / GaN superlattice cladding layer 107, and an n-GaN light guide layer 108 from the side close to the substrate. A multi-quantum well (MQW) active layer 109, a p-GaN light guide layer 110, a p-Al _0.1 Ga _0.9 N / GaN cladding layer 111, and a p-GaN layer 112. The MQW active layer 109 is fabricated by alternately stacking a Ga _0.8 In _0.2 N well layer having a thickness of 3 nm and a GaN barrier layer having a thickness of 6 nm.

A ridge stripe is formed in the p-GaN layer 112 for current and light confinement, and an insulating layer 114 made of Ta ₂ O ₅ or the like having an opening located on the upper surface of the ridge stripe is formed on the upper surface of the semiconductor stacked structure. Covering. With such a configuration, carriers can be injected into a specific region of the MQW active layer 109. A p-electrode 113 is formed on the ridge stripe of the p-GaN layer 112 and connected to the wiring electrode 116. An n-electrode 115 is formed on the back surface of the n-GaN substrate 101.

  In the semiconductor laser of this embodiment, when a voltage is applied between the p electrode 113 and the n electrode 115, holes are injected from the p electrode 113 toward the MQW active layer 109, and electrons are injected from the n electrode 115. The As a result, a gain occurs in the carrier injection region of the active layer 109, and laser oscillation occurs at a wavelength of 408 nm.

  Next, a preferred embodiment of a method for manufacturing the semiconductor laser of FIG. 1 will be described with reference to FIGS.

  First, an n-GaN substrate 101 shown in FIG. 2 is prepared. A plane parallel to the paper surface of FIG. 2 is a {1-100} plane. The upper surface (main surface) of the n-GaN substrate 101 is the (0001) plane, and the normal direction of the main surface is <0001>.

As the n-GaN substrate 101, substrates manufactured by various methods can be used. In this embodiment, a plurality of facets inclined with respect to the main surface are formed on the upper surface by hydride VPE (H-VPE). A GaN substrate manufactured by performing the step (a1) of growing a GaN layer to form and the step (a2) of forming the main surface by polishing and planarizing the upper surface of the GaN layer is used. . In order to dope an n-type impurity into the GaN substrate manufactured by such a method, for example, a method of supplying a gas containing an n-type impurity to the growth surface in the step (a1) can be employed. The n-GaN substrate 101 used in this embodiment contains oxygen that functions as an n-type dopant, and the average oxygen concentration in the main surface of the substrate is 1 × 10 ¹⁷ cm ⁻³ or more. The GaN substrate produced by the above method tends to be doped with a relatively high concentration of oxygen, and the impurity concentration tends to vary depending on the position of the main surface of the substrate. More specifically, the impurity concentration in the main surface of the substrate fluctuates at a period corresponding to the arrangement period of facets formed during crystal growth. This is considered to be caused by the fact that the amount of oxygen taken into the GaN layer during crystal growth differs depending on the position relative to the facet.

  The main surface of the GaN substrate 101 is polished to improve its flatness. Since the polishing of the GaN substrate is performed by mechanical polishing (mechanical polishing), processing strain tends to remain on the main surface of the GaN substrate 101, and in-plane distribution tends to occur in the magnitude of the strain. Furthermore, scratches may remain on the substrate surface as a result of mechanical polishing.

Next, heat treatment is performed at about 500 to 1100 ° C. for the purpose of recovering the scratch. This heat treatment is performed, for example, at 750 ° C. for 1 minute or longer, desirably 5 minutes or longer (for example, 10 minutes). During this heat treatment, a gas containing nitrogen atoms (N) (N ₂ , NH ₃ , hydrazine, etc.) is preferably supplied to the substrate surface. Such heat treatment can reduce processing strain and scratches existing near the surface of the GaN substrate 101.

  When scratch scratches on the substrate surface before heat treatment were evaluated by AFM, the depth was about several tens of μm and the RMS value (value in a 50 μm square area) was 1.6 nm. As a result, scratch scratches on the surface of the GaN substrate 101 disappeared, and the RMS value was improved to 0.6 nm. However, when such heat treatment is performed for a long time, there is a problem that the flatness of the main surface of the substrate increases.

  After the heat treatment, an n-GaN buffer layer 120 shown in FIG. 3 is grown by MOVPE. The growth of the n-GaN buffer layer 120 is performed at 1060 ° C., for example. The thickness of the n-GaN buffer layer 120 is set, for example, in the range of 10 nm to 1100 nm. In addition, the preferable range of growth temperature is 500-1100 degreeC.

  Thereafter, a resist mask 401 patterned in a stripe shape by a photolithography technique is formed on the main surface of the n-GaN substrate 101 as shown in FIG. The resist mask 401 has a pattern that defines the layout of the striped ridge. Specifically, the resist film 301 defines a stripe pattern extending in the <1-100> direction.

Next, by dry etching using Cl ₂ , a portion of the n-GaN buffer layer 120 that is not covered with the resist mask 401 is etched to form irregularities in the n-GaN buffer layer 120 as shown in FIG. To do. The convex portion is a striped ridge extending in the <1-100> direction, and its width is about 3 μm. The width of the recess in the region sandwiched between the stripe ridges is about 12 μm. The height of the ridge (depth of the recess) is adjusted by the etching time or the like, and is set to about 1 μm, for example. The width of the stripe ridge is preferably set in the range of 1 to 10 μm, and the width of the recess in the region sandwiched between the stripe ridges is preferably set in the range of 1 to 50 μm. The height of the ridge (depth of the recess) is preferably set in the range of 0.2 to 5 μm.

As shown in FIG. 5, after removing the resist mask 401, a selective growth mask layer (thickness: 5 to 1000 nm) 102 made of SiN _x is deposited on the n-GaN buffer layer 120 using ECR sputtering. To do. In this embodiment, the mask layer 102 is formed from silicon nitride (SiN _x ), but the mask layer 102 may be formed from other materials as long as GaN does not easily grow. For example, silicon oxide (SiO ₂ ), silicon oxynitride (SiON), aluminum oxide (Al ₂ O ₃ ), aluminum nitride oxide (AlNO), titanium oxide (TiO ₂ ), gallium oxide (GaO _x ), zirconium oxide (ZrO) ₂ ), the mask layer 102 can be suitably formed from a material such as niobium oxide (Nb ₂ O ₅ ) or titanium nitride (TiN). The mask layer 102 covers a region where a plurality of stripe ridges are not formed, and preferably covers the side surfaces of each stripe ridge.

Next, after depositing a planarizing resist 601 on the mask layer 102 as shown in FIG. 6, the resist 601 is etched back until the upper surface (top) of the ridge is exposed as shown in FIG. This etch back can be performed by dry etching using, for example, O ₂ plasma. In this embodiment, the striped ridge is covered with the planarizing resist 501 and then etched back. However, the striped ridge may be covered with a material other than the planarizing resist.

Next, dry etching using SF ₆ is performed with the top surface of the ridge exposed, thereby removing the portion of the mask layer 102 located on the top surface of the ridge as shown in FIG. The face (crystal face that functions as the seed portion 105) is exposed. Thereafter, as shown in FIG. 9, the resist 601 is removed using an organic solvent or the like.

  Thereafter, n-GaN is selectively grown on the seed portion 105 by MOVPE, for example, at 1060 ° C. to form the n-GaN crystal 106 shown in FIG.

Impurities doped into the n-GaN crystal 106 are, for example, silicon (Si), selenium (Se), germanium (Ge), sulfur (S), and the like. If n-type conductivity can be secured in the end, p-type impurities such as magnesium (Mg) and zinc (Zn) at a relatively low concentration are added to the n-GaN crystal 106 together with the n-type impurities. You may dope. In this embodiment, the thickness of the n-GaN crystal 106 is set to about 3 μm, and Si is doped so that the n-type impurity concentration is 7 × 10 ¹⁸ cm ⁻³ .

  The growth of the n-GaN crystal 106 is carried out until the above-described region where the recess is formed is united to form one continuous GaN layer as shown in FIG.

Next, as shown in FIG. 12, the n-Al _0.1 Ga _0.9 N / GaN superlattice clad layer 107 (total film thickness 1.5 μm), the n-GaN light guide layer 108 (film thickness 0.1 μm), multiple quantum Well (MQW) active layer 109, p-GaN light guide layer 110 (film thickness 0.1 μm), p-Al _0.1 Ga _0.9 N / GaN cladding layer 111 (total film thickness 0.6 μm), p-GaN layer 112 ( A film thickness of 0.5 μm is sequentially deposited.

Thereafter, as shown in FIG. 1, the p-GaN layer 112 and the p-Al _0.1 Ga _0.9 N / GaN cladding layer 111 are processed into a ridge stripe shape having a width of about 1.7 μm, and both sides of the ridge stripe are insulated by 114. A current (carrier) injection region is formed so as to cover it.

  The current injection region is preferably formed in a region with little dislocation above the air gap 103. The current injection region is preferably formed at a position deviating from a position directly above the void 104 formed in the merged portion.

  A p-electrode 113 (Pd / Au) is formed on the surface of the p-GaN layer 112, and a wiring electrode 116 (Ti / Au) is formed on the p-electrode 113 and the insulating layer 114. An n electrode 115 (Mo / Pt / Au) is formed on the back side of the n-GaN substrate 101. In this way, the semiconductor laser of this embodiment shown in FIG. 1 can be obtained.

In this embodiment, the n-GaN substrate 101 having a dislocation density of about 5 × 10 ⁶ cm ⁻² is used. However, the dislocation density in the n-GaN crystal 106 formed by lateral growth (lateral growth) is determined in the substrate. It can be reduced by an order of magnitude or more than the dislocation density. Further, the tilt of the GaN crystal 106 (in this case, the tilt of the C-axis <0001>) is small, and new generation of edge dislocations in the merged portion can be prevented.

  Hereinafter, the growth of the n-GaN crystal 106 will be described in detail with reference to FIGS.

  First, refer to FIG. FIG. 13A is a cross-sectional view corresponding to FIG. When the n-GaN crystal 106 is grown by the MOVPE method on the n-GaN buffer layer 120 of the n-GaN substrate 101 in which the ridge or the recess shown in FIG. 13A is formed, it is covered with the mask layer 102 made of SiNx. In this region, no epitaxial growth of GaN occurs, and selective epitaxial growth proceeds to the seed portion 105 of the n-GaN buffer layer 120 exposed through the opening of the mask layer 102. The seed part 105 has the same (0001) plane as the main surface of the substrate, and has a stripe shape each having a width of about 3 μm. The width of the seed portion 105 and the width of the air gap 103 (that is, the width of the concave portion) is 1: 3 or more, preferably 1: 4 or more.

  When the n-GaN crystal 106 is grown in this way, polycrystalline GaN 1301 may be deposited on the mask layer 102 in the recess as shown in FIG. In particular, when heat treatment (thermal cleaning) is performed before the n-GaN crystal 106 is formed, if Ga or GaN droplets are deposited on the mask layer 102 in the recess, GaN grows on the mask layer 102 as a starting point. It becomes easy to do. However, since the deposited polycrystalline GaN 1301 is smaller than the height of the ridge, it does not adversely affect the crystallinity of the n-GaN crystal 106 grown from the seed portion 105 on the top of the ridge.

  As shown in FIG. 13C, by growing the n-GaN crystal 106 in the vertical and horizontal directions, as shown in FIG. 13D, the n-GaN crystal 106 grown on two adjacent ridges. Are combined to form a single nitride semiconductor layer. A merged portion 1302 is formed at the position where the n-GaN crystal 106 is merged. Note that “a” illustrated in FIG. 13C indicates the vertical size (thickness) of the n-GaN crystal 106, and “b” indicates the region of the n-GaN crystal 106 grown in the lateral direction. The size (width) is shown.

  The nitride semiconductor layer formed of the n-GaN crystal 106 formed in this manner does not collide with the polycrystalline GaN 1301 deposited on the mask layer 102, so that the crystallinity is not lowered by the polycrystalline GaN 1301. As a result, variations in element characteristics finally obtained can be reduced, and the manufacturing yield of elements can be improved.

  Since the void 104 is formed in the merged portion 1202 and there are many defects such as dislocations, it adversely affects the semiconductor layer grown immediately above. Therefore, the light emitting portion (current injection region) of the semiconductor laser element shown in FIG. 1 is preferably arranged at a position shifted from directly above the merged portion 1302 shown in FIG.

  A particularly important point in this embodiment is that the GaN buffer layer 120 is formed on the n-GaN substrate 101. Hereinafter, the function of the GaN buffer layer 120 will be described with reference to FIGS.

  In order to make the conductivity type of the GaN substrate 101 n-type, the GaN substrate 101 used in the present embodiment is doped with an n-type impurity, but the vapor pressure of this impurity is relatively high, and the n-GaN substrate. 101 may be easily detached. In such a case, when a striped ridge is formed on the n-GaN substrate 101 and selective lateral growth of the GaN crystal 106 is performed thereon, the growth rate of the GaN crystal 106 in the c-axis direction is A. May increase compared to the growth rate in the axis (<11-20> direction). According to the study by the present inventor, such a phenomenon is caused by the separation of impurities from the surface of the n-GaN substrate 101 at a high temperature (about 1000 ° C.) at which the GaN crystal 106 is grown, thereby causing the growth of the GaN crystal 106. It is thought to be caused by being affected.

  FIG. 14A shows the GaN crystal 106 in the case where the impurity doped in the n-GaN substrate 101 is likely to be detached during the growth of the GaN crystal 106. On the other hand, FIG. 14B shows the GaN crystal 106 in the case where such desorption of impurities hardly occurs. Thus, when the degree of the influence of the impurities contained in the n-GaN substrate 101 changes, the sizes a and b shown in FIG. 13C will fluctuate.

  Next, a problem when the impurity concentration varies greatly in the in-plane direction of the n-GaN substrate 101 will be described.

In general, for manufacturing reasons, the concentration of impurities contained in the GaN substrate 101 may vary greatly in the in-plane direction of the substrate. Specifically, depending on the position on the main surface of the GaN substrate 101, the impurity concentration may differ by two digits. That is, n _max / n _min may be 100 or more, where n _{max is} the maximum impurity concentration and n _min is the minimum value of the main surface of the substrate.

  If the impurity concentration in the n-GaN substrate 101 greatly varies in the plane, when the selective lateral growth of the GaN-based crystal is performed on the n-GaN substrate 101, the growth rate anisotropy depends on the underlying impurity concentration. A changing phenomenon is observed. As a result, large irregularities are formed on the surface of the layer made of these n-GaN crystals 106, and the flatness is deteriorated. In addition, when the size of the laterally grown portion (size b) varies, there is a problem that misalignment occurs in the portion where the GaN crystals 106 are merged with each other (merged portion 1302).

  15A to 15C, the shape of the GaN crystal grown on the main surface of the n-GaN substrate 101 on which the mask 102 having the stripe-shaped opening is formed corresponds to the impurity concentration of the n-GaN substrate 101. It is a perspective view showing typically how it changes according to it.

  In a place where the impurity concentration of the n-GaN substrate 101 is high, the carrier mobility is relatively small, so that the thermal conductivity is lowered. As a result, as shown in FIG. 15A, the effective temperature on the surface of the n-GaN substrate 101 decreases. This is because heat supplied from the back surface of the substrate is difficult to conduct to the main surface of the substrate in a region having low thermal conductivity. Therefore, when the impurity concentration of the n-GaN substrate 101 has a distribution in the in-plane direction, the temperature of the main surface of the substrate also shows the distribution in the plane. As a result, the shape of the GaN crystal grown on the GaN substrate changes as shown in FIGS.

  As shown in FIG. 15A, at a position where the impurity concentration of the base is high, the base temperature is relatively low, so the growth rate of the GaN crystal in the C-axis direction increases, and the A-axis (<11-20). > Direction) growth rate decreases. In addition, higher-order surfaces such as the (11-22) surface are likely to occur. On the other hand, since the substrate temperature is relatively high at a position where the impurity concentration of the substrate is low, the growth rate in the C-axis direction is suppressed and the A-axis (<11-20) as shown in FIG. > Direction) growth rate increases. Therefore, if there is an impurity concentration distribution in the GaN substrate 101, irregularities occur on the surface of the GaN crystal, and the surface morphology and flatness deteriorate.

  FIG. 16A is an optical micrograph showing a state in which a gap is formed in such a combined portion. In a portion where the lateral growth of the n-GaN crystal 106 is slow (a portion where the size b in FIG. 13C is relatively small), a gap having a width of about several μm is formed as shown in FIG. Yes.

  FIG. 17A is an electron microscope (SEM) photograph showing a cross section of the n-GaN crystal 106 grown directly on the n-GaN substrate 101 without passing through the n-GaN buffer layer 120, and FIG. These are SEM photographs showing the upper surface of the n-GaN crystal 106.

  Since the thickness and width of the n-GaN crystal 106 shown in FIGS. 17A and 17B vary depending on the location, the flatness is deteriorated. When a semiconductor product is further laminated on such an n-GaN crystal 106, undulation occurs in the stripe waveguide of the finally obtained semiconductor laser. When such waviness exists, the characteristics (for example, threshold current and operating current) of the laser element vary, and the manufacturing yield of the element decreases.

  In addition, edge dislocations are likely to occur in the merged portion of the laterally grown portion in the n-GaN crystal 106, but dislocation enters the ridge stripe functioning as the active region due to the displacement of the merged portion. Problems such as reduced reliability and reduced screening yield also occur.

  Such a phenomenon is likely to occur when an impurity that exhibits a high vapor pressure at the growth temperature (about 1000 to 1100 ° C.) of the GaN crystal 106 is contained in the n-GaN substrate. The growth rate in the c-axis direction varies depending on the type of impurities doped in the GaN substrate, but any impurity may cause problems such as deterioration of flatness and deviation of the merged portion. According to the experiments by the present inventors, when the GaN substrate 101 contains an element selected from the group consisting of oxygen, silicon, selenium, germanium, and sulfur as an impurity, the growth of the GaN crystal 106 is particularly easily affected. Among these impurities, oxygen is particularly a gas and is easily desorbed from the substrate surface, so that it tends to affect the selective growth of the GaN crystal 106 performed at a high temperature.

  In this embodiment, by forming the GaN buffer layer 120 on the n-GaN substrate 101, the adverse effect of the n-GaN substrate 101 on the lateral growth of the GaN crystal 106 is suppressed. For this reason, even if an n-GaN substrate whose impurity concentration varies greatly in the plane is used, it is not affected by variations in impurity concentration in the n-GaN substrate.

FIG. 18A is an optical micrograph showing the upper surface of the n-GaN crystal 106 in the present embodiment, FIG. 18B is a diagram schematically showing the cross section, and FIG. 2 is an optical micrograph showing a cross section of an n-GaN crystal 106. As shown in FIGS. 18A to 18C, in this embodiment, the layer made of the GaN crystal 106 has good flatness and a low dislocation density. When dislocation density was evaluated by cathodoluminescence (CL), dislocations exist at a density of about 5 × 10 ⁶ cm ⁻² just above the seed portion 105 located at the top of the striped ridge. The dislocation density in the grown part (wing part) could be reduced to 2 × 10 ⁵ cm ⁻² .

In the present embodiment, when etching is performed to form a striped ridge in the n-GaN buffer layer 120, the recess (groove) existing between the ridges does not reach the n-GaN substrate 101. However, the present invention is not limited to such a case, and may reach the GaN substrate 101 as shown in FIG. In the example shown in FIG. 19, the surface of the GaN substrate 101 is covered with the mask 102 made of SiN _x , so that the detachment of impurities from the GaN substrate 101 is suppressed.

  Further, although the GaN buffer layer 120 in this embodiment is doped with n-type impurities, the GaN buffer layer 120 may not be doped with impurities. In the semiconductor laser shown in FIG. 1, carriers flow in the vertical direction (substrate thickness direction). In such a case, if the thickness of the GaN buffer layer 120 is set to be smaller than the electron diffusion length, the GaN There is no problem even if the buffer layer 120 is in an undoped state.

  In the present embodiment, as described above, after the stripe ridge is formed in the n-GaN buffer layer 120, the n-GaN layer 106 is grown as shown in FIGS. It is possible to suppress the influence of impurities contained in the GaN substrate 101 from adversely affecting the growth of the n-GaN layer 106. In order to obtain such an effect, it is preferable to pay attention to the type and concentration of impurities doped in the n-GaN layer 106.

  The following knowledge was acquired by examination of this inventor.

That is, in the n-GaN buffer layer 120, the vapor pressure of impurities contained in the n-GaN substrate 101 (vapor pressure at the growth temperature of the Al _x Ga _y In _z N crystal formed on the n-GaN buffer layer 120). It is preferable to dope impurities that exhibit a low vapor pressure. By doing so, when growing an Al _x Ga _y In _z N crystal, it is possible to effectively suppress adverse effects due to impurities from the base (deterioration of flatness during lateral growth, etc.).

  The vapor pressure of impurities tends to be higher as the boiling point of a material composed of a single impurity element is lower. Among the impurities that can be doped in GaN, the boiling points of oxygen, sulfur, selenium, silicon, and germanium are higher in the order of oxygen <sulfur <selenium <silicon <germanium. For this reason, the vapor pressure of oxygen, sulfur, selenium, silicon, and germanium decreases in the order of oxygen> sulfur> selenium> silicon> germanium.

  Therefore, if the impurity contained in the n-GaN substrate 101 is oxygen, the n-GaN buffer layer 120 is doped with at least one impurity selected from the group consisting of silicon, germanium, selenium, and sulfur. It is preferable. These impurities may be added alone, or two or more of them may be added.

When the concentration of impurities contained in the GaN substrate 101 is 1 × 10 ¹⁶ cm ⁻³ or more, particularly 1 × 10 ¹⁷ cm ⁻³ or more, the influence on the growth of the GaN layer becomes large. For this reason, when the concentration of impurities contained in the GaN substrate 101 is 1 × 10 ¹⁶ cm ⁻³ or more, the effect of providing the n-GaN crystal 106 is increased.

  Note that the concentration of impurities contained in the n-GaN substrate 101 and the n-GaN crystal 106 need not be uniform in the thickness direction of the substrate. Further, an impurity-free (undoped) layer region that is thinner than the electron diffusion length may exist in a part of the n-GaN type 106.

  Next, the range in which the impurity concentration in the n-GaN buffer layer 120 is preferably set will be described.

According to the study by the present inventors, the concentration (N1) of the impurity doped into the n-GaN buffer layer 120 is set lower than the concentration (N2) of the impurity contained in the n-GaN substrate 101 (N2> N1). Was found to be preferable. By doing so, when growing an Al _x Ga _y In _z N crystal, it is possible to effectively suppress adverse effects due to impurities from the base (deterioration of flatness during lateral growth, etc.). According to the experiments by the present inventors, the concentration of the impurity doped into the n-GaN buffer layer 120 is preferably 1 × 10 ¹⁹ cm ⁻³ or less, more preferably 5 × 10 ¹⁸ cm ⁻³ or less, Most preferably, it is 2 × 10 ¹⁸ cm ⁻³ or less.

  In this embodiment, the nitride semiconductor is grown by the MOVPE (MOCVD) method. However, the present invention is not limited to such a growth method, and the impurity concentration such as the molecular beam epitaxy (MBE) method can be used. A method having excellent controllability may be used.

  In addition, a method for manufacturing a substrate described using a nitride semiconductor substrate is not limited to the above-described method using hydride VPE (H-VPE), and a growth rate such as a high-pressure melting method, a liquid layer growth method, or a flux method is used. It may be produced by using another crystal growth method having a high value. However, as is apparent from the above description, the present invention provides a particularly remarkable effect when using a substrate whose impurity concentration is likely to change greatly in the in-plane direction.

(Embodiment 2)
Next, a second embodiment (semiconductor laser) of a nitride semiconductor device according to the present invention will be described with reference to FIG.

  The difference between this embodiment and the previous embodiment is the difference in the arrangement of the electrodes. In the above-described embodiment, the n-electrode 115 is formed on the back surface of the n-GaN substrate 101. However, the n-electrode 1904 in this embodiment is formed on the semiconductor stacked structure provided on the main surface of the n-GaN substrate 101. Is formed.

The semiconductor laser device shown in FIG. 20 includes an n-GaN substrate 101 having a GaN buffer layer 120 formed on the main surface, and a semiconductor multilayer structure formed on the main surface side. This semiconductor multilayer structure includes a GaN crystal 106, an n-Al _0.1 Ga _0.9 N / GaN superlattice contact layer 1903, an n-Al _0.1 Ga _0.9 N / GaN superlattice cladding layer 107, from the side close to the n-GaN substrate 101, An n-GaN light guide layer 108, a multiple quantum well (MQW) active layer 109, a p-GaN light guide layer 110, a p-Al _0.1 Ga _0.9 N / GaN cladding layer 111, and a p-GaN layer 112 are provided. The MQW active layer 109 is fabricated by alternately stacking a Ga _0.8 In _0.2 N well layer having a thickness of 3 nm and a GaN barrier layer having a thickness of 6 nm.

A ridge stripe is formed in the p-GaN layer 112 for current and light confinement, and an insulating layer 114 having an opening located on the upper surface of the ridge stripe covers the upper surface of the semiconductor multilayer structure. A part of the semiconductor stacked structure is etched until the n-Al _0.1 Ga _0.9 N / GaN superlattice contact layer 1903 is exposed, and an n-electrode is formed on the n-Al _0.1 Ga _0.9 N / GaN superlattice contact layer 1903. 1904 and a wiring electrode 1905 are formed.

In the semiconductor laser of this embodiment, when a voltage is applied between the p electrode 113 and the n electrode 1904, holes are injected from the p electrode 113 toward the MQW active layer 109, and electrons are injected from the n electrode 1904. The Electrons injected from the n-electrode 1904 into the n-Al _0.1 Ga _0.9 N / GaN superlattice contact layer 1903 flow through the n-Al _0.1 Ga _0.9 N / GaN superlattice contact layer 1903 in the lateral direction, and then the n-Al It is injected into the active layer 109 via the _0.1 Ga _0.9 N / GaN superlattice cladding layer 107 and the n-GaN light guide layer 108. As a result, a gain occurs in the carrier injection region of the active layer 109, and laser oscillation occurs at a wavelength of 408 nm.

  In this embodiment, since no current flows through the GaN substrate 101, it is not necessary to dope the GaN substrate 101 with impurities. For the same reason, it is not necessary to dope impurities into the GaN buffer layer 120 and the GaN layer 106. However, any of the GaN substrate 101, the GaN buffer layer 120, and the GaN layer 106 may be doped with an n-type impurity or a p-type impurity.

In the semiconductor laser shown in FIG. 20, the contact layer 1903 that contacts the n-electrode 1904 is formed of an n-Al _0.1 Ga _0.9 N / GaN superlattice in order to reduce the resistance component of the current flowing in the lateral direction.

  In order to reduce the resistance component of the current flowing in the lateral direction, it is preferable that the GaN layer 106 is doped with n-type impurities and the thickness thereof is increased. For example, the thickness of the GaN layer 106 is preferably set to about 1000 to 50000 nm, for example.

  In this embodiment, the mask layer 102 covers not only the bottom surfaces of the recesses located between the stripe ridges but also the side surfaces of the stripe ridges. However, if the air gap 103 can be appropriately formed, the stripe shape There is no need to cover the sides of the ridge. However, in order to prevent detachment of impurities contained in the n-GaN crystal 106 and the GaN substrate 101, the mask layer 102 is preferably formed.

(Embodiment 3)
In the first and second embodiments described above, when the GaN crystal 106 is grown by selective lateral growth, the GaN buffer layer 120 is processed into a concave shape in order to form a striped ridge on the underlayer. Is not limited to such a case.

  Hereinafter, a third embodiment (semiconductor laser) of a nitride semiconductor device according to the present invention will be described with reference to FIG.

  The present embodiment is different from the above-described second embodiment in that a stripe-shaped ridge is not formed in the GaN buffer layer 120 in the present embodiment.

  In this embodiment, as shown in FIG. 21, a mask layer 102 made of SiNx is formed on a GaN buffer layer 120 having a flat upper surface. The mask layer 102 is provided with striped openings 2103. The position of the stripe-shaped opening 2103 corresponds to the position of the top of the stripe-shaped ridge in FIG.

  As shown in FIG. 21, edge dislocations may occur in the merged portion of the GaN crystal 106. Such edge dislocations are generated when the C axis of the GaN crystal 106 is tilted (tilt is generated) due to the influence of strain generated between the GaN crystal 106 and the mask layer 102. This is because when the tilt of the GaN crystal 106 occurs, a lattice shift occurs in the merged portion. In order to avoid a merged portion with many edge dislocations, the active region of the laser (stripe-shaped current injection region) is preferably disposed immediately above the center between the opening 2103 and the merged portion.

(Embodiment 4)
The present invention is also applied to a nitride semiconductor device other than a semiconductor laser, for example, a light emitting diode (LED) shown in FIG. According to the present invention, since the nonuniformity of the emission wavelength can be improved by suppressing the influence of impurities contained in the GaN substrate, a light-emitting element with good characteristics can be obtained.

In each of the above embodiments, the crystal buffer layer 120 formed on the GaN substrate 101 is a layer formed of GaN. This layer is represented by Al _u Ga _v In _w N (u + v + w = 1). It may be formed from a mixed crystal of a nitride semiconductor. When the crystal buffer layer 120 is formed from an Al _u Ga _v In _w N crystal (for example, Ga _0.9 In _0.1 N) containing In, a temperature lower than the growth temperature of the Al _x Ga _y In _z N crystal grown on the crystal buffer layer 120 It is necessary to grow an Al _u Ga _v In _w N crystal layer. This growth temperature is preferably in the range of 600 ° C. or higher and 1000 ° C. or lower, and more preferably in the range of 700 ° C. or higher and 900 ° C. or lower.

Further, the crystal buffer layer 120 is not limited to the one having a single layer structure. For example, Al _u1 Ga _v1 In _w1 N (u1 + v1 + w1 = 1) layers and Al _u2 Ga _v2 In _w2 N (u2 + v2 + w2 = 1) layers are alternately arranged. It may have a laminated structure. Specifically, it may have a superlattice structure in which AlGaN layers and GaN layers are alternately stacked. When the crystal buffer layer 120 having such a stacked structure is doped with impurities such as Si, one of the constituent layers may be doped with impurities.

  The nitride semiconductor device produced by the present invention is useful as a light source for an optical recording device, an optical display (laser display) device, and the like that require a highly reliable GaN-based semiconductor laser, and laser processing, medical use, and the like. It can be applied to. Furthermore, if an active region such as a transistor is formed in the low defect region of the nitride semiconductor according to the present invention, a highly reliable GaN-based electronic device (such as a power device) can be realized.

It is sectional drawing of 1st Embodiment (semiconductor laser) of the nitride semiconductor element by this invention. FIG. 3 is a process cross-sectional view illustrating a method for manufacturing the semiconductor laser of FIG. 1. It is process sectional drawing which shows the manufacturing method of the said semiconductor laser. It is process sectional drawing which shows the manufacturing method of the said semiconductor laser. It is process sectional drawing which shows the manufacturing method of the said semiconductor laser. It is process sectional drawing which shows the manufacturing method of the said semiconductor laser. It is process sectional drawing which shows the manufacturing method of the said semiconductor laser. It is process sectional drawing which shows the manufacturing method of the said semiconductor laser. It is process sectional drawing which shows the manufacturing method of the said semiconductor laser. It is process sectional drawing which shows the manufacturing method of the said semiconductor laser. It is process sectional drawing which shows the manufacturing method of the said semiconductor laser. It is process sectional drawing which shows the manufacturing method of the said semiconductor laser. (A) to (d) are process cross-sectional views showing the growth of the n-GaN crystal 106. (A) is a perspective view of the n-GaN crystal 106 grown on a region of the n-GaN substrate 101 where many impurities are detached, and (b) is an impurity separation of the n-GaN substrate 101. FIG. 6 is a perspective view of an n-GaN crystal 106 grown on a region with a small amount of. (A) to (c) are perspective views showing that the shape of the n-GaN crystal 106 changes depending on the impurity concentration in the n-GaN substrate 101. (A) is an optical micrograph showing the n-GaN crystal 106 grown directly on the n-GaN substrate without passing through the n-GaN buffer layer 120, and (b) is a stripe of the n-GaN buffer layer 120. 5 is an optical micrograph showing an n-GaN crystal 106 grown on a ridge. (A) is the electron microscope (SEM) photograph which shows the cross section of the n-GaN crystal 106 grown directly on the n-GaN substrate 101 without passing through the n-GaN buffer layer 120, and (b) shows the n 3 is an SEM photograph showing the upper surface of a GaN crystal 106. (A) is an optical microscope photograph which shows the upper surface of the n-GaN crystal 106 in the 1st Embodiment of this invention, (b) is the figure which shows the cross section typically, (c), 2 is an optical micrograph showing a cross section of an n-GaN crystal 106. 3 is a cross-sectional view showing a semiconductor laser in which a stripe ridge is formed deeper than the thickness of an n-GaN buffer layer 120 in the first embodiment of the present invention. FIG. It is sectional drawing of 2nd Embodiment (semiconductor laser) of the nitride semiconductor element by this invention. It is sectional drawing of 3rd Embodiment (semiconductor laser) of the nitride semiconductor element by this invention. 1 is a cross-sectional view of an LED according to the present invention. It is sectional drawing which shows the prior art example of the nitride semiconductor element (semiconductor laser). It is sectional drawing which shows the other conventional example of the nitride semiconductor element (semiconductor laser).

Explanation of symbols

101 n-GaN substrate 102 mask layer 103 air gap 104 void 105 seed part 106 n-GaN layer 107 n-Al _0.1 Ga _0.9 N / GaN superlattice clad layer 108 n-GaN light guide layer 109 MQW active layer 110 p-GaN Optical guide layer 111 p-Al _0.1 Ga _0.9 N / GaN superlattice cladding layer 112 p-GaN layer 113 p electrode 114 insulating layer 115 n electrode 116 wiring electrode 120 n-GaN layer 401 resist mask 601 planarizing resist 1301 polycrystalline GaN
1302 Combined portion 1801 Al _0.02 Ga _0.97 N layer 2103 Opening 3601 Undoped GaN substrate 3602 SiO ₂
3603 Opening 3604 GaN layer 3605 n-GaN layer 3606 n-AlGaN cladding layer 3607 n-GaN light guide layer 3608 MQW active layer 3609 p-GaN light guide layer 3610 p-AlGaN cladding layer 3611 p-GaN contact layer 3612 p-electrode 3613 SiO ₂
3614 n-electrode 3614 relaxation layer

Claims (27)

A step (A) of preparing a nitride semiconductor substrate having a polished main surface and containing a first impurity having an average concentration of 1 × 10 ¹⁷ cm ⁻³ or more in the main surface;
A step (B) of growing an Al _u Ga _v In _w N crystal layer (0 ≦ u, v, w ≦ 1: u + v + w = 1) on the main surface of the nitride semiconductor substrate;
An Al _x Ga _y In _z N crystal (0 ≦ x, y, z ≦ 1: x + y + z = 1) is selectively applied to each of the plurality of stripe regions on the upper surface of the Al _u Ga _v In _w N crystal layer. Growing (C);
A method for producing a nitride semiconductor comprising:   The manufacturing method according to claim 1, wherein the first impurity concentration is oxygen. 3. The manufacturing method according to claim 1, wherein n _max / n _min is 10 or more when a maximum value of the impurity concentration on the main surface of the nitride semiconductor substrate is n _max and a minimum value is n _min. . 4. The manufacturing method according to claim 1, wherein the Al _u Ga _v In _w N crystal layer contains a second impurity different from the first impurity contained in the nitride semiconductor substrate. 5. The manufacturing method according to claim 4, wherein the vapor pressure of the first impurity at the growth temperature of the Al _x Ga _y In _z N crystal is higher than the vapor pressure of the second impurity at the growth temperature.   The manufacturing method according to claim 5, wherein the first impurity is oxygen, and the second impurity is at least one selected from the group consisting of silicon, germanium, selenium, and sulfur. 4. The average concentration of the second impurity in the Al _u Ga _v In _w N crystal layer is lower than the average concentration of the first impurity in the main surface of the nitride semiconductor substrate. 5. Production method.   The manufacturing method according to claim 7, wherein the first impurity is at least one selected from the group consisting of oxygen, silicon, germanium, selenium, and sulfur. The manufacturing method according to claim 7, wherein the growth temperature of the Al _x Ga _y In _z N crystal layer is higher than the growth temperature of the Al _u Ga _v In _w N crystal layer. The step (A)
A step (a1) of growing a nitride semiconductor so as to form a plurality of facets inclined on the main surface on the upper surface;
The manufacturing method according to claim 1, further comprising: a step (a2) of forming the main surface by polishing and flattening an upper surface of the nitride semiconductor.   The manufacturing method according to claim 10, wherein the step (a1) includes a step of doping the nitride semiconductor with an impurity so as to have a concentration distribution according to an arrangement period of the plurality of facets. The step (a1) includes a step of growing the nitride semiconductor by a hydride VPE method,
The method according to any one of claims 1 to 11, wherein the step (B) includes a step of growing the Al _u Ga _v In _w N crystal layer by a MOVPE method. The manufacturing method according to claim 1, wherein the Al _u Ga _v In _w N crystal is an undoped semiconductor layer. The manufacturing method according to claim 1, wherein an average concentration of the second impurity in the Al _u Ga _v In _w N crystal layer is 1 × 10 ¹⁹ cm ⁻³ or less. Forming a plurality of stripe-shaped ridges having an upper surface parallel to a main surface of the nitride semiconductor substrate in the Al _u Ga _v In _w N crystal layer before the step (C);
The manufacturing method according to claim 1, wherein the step (C) includes a step of selectively growing the Al _x Ga _y In _z N crystal on the upper surfaces of the plurality of striped ridges. Before performing the step (C), the Al _u Ga _v In _w N crystal layer or the nitride semiconductor substrate is covered with a selective growth mask in a region where the plurality of striped ridges are not formed. Item 16. The production method according to Item 15.   The step (B) includes a step of setting a width of an upper surface of the stripe ridge within a range of 1 μm to 400 μm, and an arrangement pitch of the stripe ridges within a range of 2 μm to 500 μm. Item 15. The manufacturing method according to Item 15 or 16. Preparing a nitride semiconductor substrate having a polished main surface (A);
A step (B) of growing an Al _u Ga _v In _w N crystal layer (0 ≦ u, v, w ≦ 1: u + v + w = 1) on the main surface of the nitride semiconductor substrate;
A step (C) of selectively growing a first nitride semiconductor layer on each of a plurality of stripe-shaped regions on the upper surface of the Al _u Ga _v In _w N crystal layer;
An active layer made of a second nitride semiconductor having a band gap smaller than that of the first nitride semiconductor layer and a third nitride semiconductor having a band gap larger than that of the active layer are formed on the first nitride semiconductor layer. A step (D) of growing a laminate including:
And a step (E) of forming a current confinement structure for selectively injecting carriers into the active layer on the stacked body. Forming a plurality of stripe-shaped ridges having an upper surface parallel to a main surface of the nitride semiconductor substrate in the Al _u Ga _v In _w N crystal layer before the step (C);
The manufacturing method according to claim 18, wherein the step (C) includes a step of selectively growing the first nitride semiconductor layer on the upper surfaces of the plurality of striped ridges. The area where the plurality of stripe-shaped ridges are not formed in the Al _u Ga _v In _w N crystal layer or the nitride semiconductor substrate is covered with a selective growth mask before performing the step (C). The production method according to 18 or 19. Before performing the step (C), the Al _u Ga _v In _w N crystal layer or the nitride semiconductor substrate is selectively grown in the region where the plurality of stripe-shaped ridges are not formed and the side surfaces of the stripe-shaped ridges. The manufacturing method according to claim 18 or 19, which is covered with a mask for use. 21. The manufacturing method according to claim 18, wherein the carrier injection region is formed in an upper portion between the two adjacent stripe-shaped ridges. A nitride semiconductor substrate having a polished main surface and containing a first impurity having an average concentration of 1 × 10 ¹⁷ cm ⁻³ or more in the main surface;
An Al _u Ga _v In _w N crystal layer (0 ≦ u, v, w ≦ 1: u + v + w = 1) grown on the main surface of the nitride semiconductor substrate;
Al _x Ga _y In _z N crystal (0 ≦ x, y, z ≦ 1: selectively grown on each of the plurality of stripe-shaped regions formed on the upper surface of the Al _u Ga _v In _w N crystal layer. x + y + z = 1),
A nitride semiconductor. The nitride semiconductor substrate maximum value n _max of the concentration of the first impurity in the major surface of, when the minimum value n _min, n _max / n _min nitride according to claim 1 is 10 or more semiconductor. 25. The nitride semiconductor according to claim 23, wherein a vapor pressure of the first impurity at a growth temperature of the Al _x Ga _y In _z N crystal is higher than a vapor pressure of the second impurity at the growth temperature. The nitride semiconductor according to claim 23 or 24, wherein an average concentration of the second impurity in the Al _u Ga _v In _w N crystal layer is lower than an average concentration of the first impurity in a main surface of the nitride semiconductor substrate. . A nitride semiconductor according to any of claims 23 to 26;
A semiconductor multilayer structure including an active layer provided on the nitride semiconductor;
A current confinement structure for selectively injecting carriers into a partial region of the active layer;
A nitride semiconductor device comprising: