JP2005311326A - Semiconductor element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize a semiconductor element whose uniformity of resistivity is high on a surface of a conductive layer, where reduction of voltage resistance due to the concentration of electric field will not occur. <P>SOLUTION: A channel layer 12 made up of n-type GaAs is formed on a semi-insulating GaAs substrate 11, and an undope AlGaAs layer 13 is formed on the channel 12. A gate electrode 18 is formed on the AlGaAs layer 13 and is formed between a source electrode 16 and a drain electrode 17. The source electrode 16 and drain electrode 17 are formed on a source region 14 and drain region 15, which are the regions of high carrier concentration formed on the GaAs substrate 11, respectively. A semi-insulating BCN film 19 containing boron, carbon, and nitrogen is formed on a layer of the AlGaAs layer 13. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor element that requires a high breakdown voltage, particularly a field effect transistor, a bipolar transistor, a diode, and the like.

  One of semiconductor devices using compound semiconductors such as gallium arsenide (GaAs), indium phosphide (InP), and gallium nitride (GaN) is a MESFET (metal-semiconductor field effect transistor). The MESFET has a Schottky junction in which a metal gate electrode is formed directly on the semiconductor layer, and the size of the depletion layer formed in the semiconductor layer by the Schottky junction varies depending on the voltage applied to the gate electrode. The current flowing in the electron transit layer (channel) is controlled.

  One type of MESFET is a HEMT (High Electron Mobility Transistor) that uses heterojunctions of different semiconductors. Since the HEMT can be operated at high speed, it is widely used as a low noise amplifier for receiving satellite broadcasts, a switch device for a mobile phone, a power device for a mobile phone, and the like.

  When a MESFET including HEMT is used for a switch device, a power device, etc., it is necessary to increase the breakdown voltage between the gate and the drain, and the semiconductor layer forming the gate electrode is undoped and has a larger band gap than the channel layer. It is desirable to form with a semiconductor.

FIG. 9 shows a cross-sectional configuration of a conventional GaAs-MESFET. As shown in FIG. 9, a channel layer 102 made of an n-type semiconductor is formed on a semi-insulating GaAs substrate 101, and an undoped aluminum gallium arsenide (AlGaAs) layer 103 is formed on the channel layer 102. ing. A gate electrode 108 is formed on the AlGaAs layer 103, and a source electrode 106 and a drain electrode 107 are formed with the gate electrode 108 interposed therebetween. The source electrode 106 and the drain electrode 107 are respectively formed on the source region 104 and the drain region 105 that are regions of high carrier concentration formed on the GaAs substrate 101. A protective film 109 made of an insulating film such as a silicon oxide film (SiO ₂ ) is provided on the surface of the MESFET thus formed.

The protective film 109 is provided to prevent generation of surface levels due to dangling bonds or oxidation on the surface of the semiconductor layer. Recently, in order to reduce the dielectric constant of the protective film, a BCN film made of boron, carbon, and nitrogen is also used as the protective film (see, for example, Patent Document 1).
JP 2003-115487 A

  However, the surface resistivity of the undoped AlGaAs layer 103 is non-uniform because crystal defects or the like generated during crystal growth or other manufacturing processes exist. When the resistivity of the surface of the undoped AlGaAs layer 103 is non-uniform, if a high voltage reverse bias is applied between the gate electrode 108 and the drain electrode 107, it is locally caused by the non-uniformity of the resistivity. A region where the electric field is concentrated is generated. As a result, there is a problem in that the breakdown voltage (breakdown voltage) of the semiconductor element is significantly lower than the design value.

  Similar problems occur not only in field effect transistors (FETs) but also in heterobipolar transistors (HBTs) and Schottky diodes.

  Such a significant decrease in breakdown voltage is likely to occur in semiconductor devices using compound semiconductors such as GaAs, InP, and GaN. In a compound semiconductor, since the semiconductor material is composed of two or more elements, a stoichiometric composition ratio deviation tends to occur on the surface of the semiconductor layer, and the resistivity of the surface of the semiconductor layer becomes non-uniform. This is because it is easy.

  An object of the present invention is to solve the above-described conventional problems and to realize a semiconductor element that has high resistivity uniformity on the surface of a semiconductor layer and does not cause a decrease in breakdown voltage due to electric field concentration.

  In order to achieve the above object, the present invention is configured to cover the surface of a semiconductor element with a semi-insulating film.

  Specifically, the semiconductor element of the present invention includes an element formation region including at least one semiconductor region formed on a substrate, a first electrode and a second electrode formed on the element formation region at intervals. And a portion between the first electrode and the second electrode on the surface of the element formation region, and a depletion layer when a reverse bias is applied between the first electrode and the second electrode And a semi-insulating film covering a portion where the film spreads.

  According to the semiconductor element of the present invention, a reverse bias is applied between the first electrode and the second electrode in the portion between the first electrode and the second electrode on the surface of the element formation region. Since a semi-insulating film covering a portion where the depletion layer spreads is provided, the resistance value of the surface of the element formation region between the electrodes can be made substantially constant. Therefore, when a reverse bias is applied between the electrodes, electric field concentration occurs at one point due to crystal defects or the like on the surface of the element formation region where the depletion layer spreads, and the dielectric breakdown caused by applying a high voltage locally is prevented. As a result, a high breakdown voltage semiconductor element can be realized.

  The semiconductor element of the present invention preferably further includes an insulating film provided between the semi-insulating film and the surface of the element forming region. With such a configuration, the leakage current can be reliably reduced.

  In the semiconductor element of the present invention, the semi-insulating film is preferably a compound containing at least one of boron, aluminum, and gallium, nitrogen, and carbon. With such a configuration, the electric field applied to the surface of the element formation region can be surely made uniform.

  In the semiconductor element of the present invention, the element formation region preferably includes an epitaxial layer formed on the substrate. Further, a diffusion layer formed by implanting impurities into the substrate may be included.

  In the semiconductor element of the present invention, the element formation region includes a channel layer through which electrons travel, the first electrode is a gate electrode, the second electrode is a drain electrode, and the semiconductor element of the present invention is a gate. A source electrode formed at a position opposite to the drain electrode across the electrode, and operating as a field effect transistor, and the semi-insulating film at least a portion between the gate electrode and the drain electrode in the element formation region It is preferable to cover. With such a configuration, a high withstand voltage field effect transistor can be obtained.

  In this case, the resistivity of the semi-insulating film is lower than the resistivity of silicon nitride, and the capacitance value between the drain electrode and the source electrode and the electrical resistance value between the drain electrode and the source electrode are Of these, the resistivity is preferably such that the time constant, which is the product of the electrical resistance values of the semi-insulating film, is longer than the time that is the reciprocal of the maximum oscillation frequency of the field effect transistor. The resistivity of the semi-insulating film is lower than the resistivity of silicon nitride, and half of the capacitance value between the drain electrode and the gate electrode and the electric resistance value between the drain electrode and the gate electrode. The resistivity may be such that the time constant that is the product of the electrical resistance values by the insulating film is longer than the time that is the reciprocal of the maximum oscillation frequency of the field effect transistor. With such a configuration, it is possible to apply the electric field uniformly without affecting the high frequency characteristics and the direct current characteristics.

In this case, the resistivity of the semi-insulating film is preferably 1 × 10 ⁶ Ωcm or more and 1 × 10 ¹⁰ Ωcm or less.

  In the semiconductor element of the present invention, the element formation region includes a collector region, a base region, and an emitter region that are sequentially formed from the bottom, and the first electrode is a collector electrode formed in a predetermined portion on the collector region. The second electrode is a base electrode formed in a predetermined portion on the base region, and the semiconductor device of the present invention further includes an emitter electrode formed in the predetermined portion on the emitter region, and a heterobipolar transistor The semi-insulating film preferably covers at least a portion between the collector electrode and the base electrode on the surface of the element formation region. With such a configuration, a high breakdown voltage heterobipolar transistor can be obtained with certainty.

  In this case, the resistivity of the semi-insulating film is lower than that of silicon nitride, and the capacitance value between the collector electrode and the emitter electrode and the electric resistance value between the collector electrode and the emitter electrode are Of these, the resistivity is preferably such that the time constant, which is the product of the electrical resistance values of the semi-insulating film, is longer than the time that is the reciprocal of the maximum oscillation frequency of the heterobipolar transistor. Moreover, the product of the electrical resistance value by the semi-insulating film is lower than the resistivity of silicon nitride and the capacitance value between the collector electrode and the base electrode and the electrical resistance value between the collector electrode and the base electrode. May be a resistivity that is longer than the time that is the reciprocal of the maximum oscillation frequency of the heterobipolar transistor. With such a configuration, the electric field applied to the surface of the element formation region can be made uniform without affecting the high frequency characteristics and direct current characteristics of the heterobipolar transistor.

In this case, the resistivity of the semi-insulating film is preferably 1 × 10 ⁶ Ωcm or more and 1 × 10 ¹⁰ Ωcm or less.

  In the semiconductor element of the present invention, the element formation region includes a low carrier concentration region and a high carrier concentration region having an impurity concentration higher than that of the low carrier concentration region, and the first electrode is formed on the low carrier concentration region. The second electrode is an ohmic electrode formed on the high carrier concentration region, the semiconductor element of the present invention operates as a diode, and the semi-insulating film is the element forming region. It is preferable to cover at least a portion of the surface between the Schottky electrode and the ohmic electrode. With such a configuration, a high breakdown voltage Schottky barrier diode can be obtained with certainty.

In this case, the resistivity of the semi-insulating film is preferably 1 × 10 ⁶ Ωcm or more and 1 × 10 ¹⁰ Ωcm or less.

  According to the semiconductor element of the present invention, it is possible to realize a semiconductor element that has high uniformity of resistivity on the surface of the semiconductor layer and does not cause a decrease in breakdown voltage due to electric field concentration.

(First embodiment)
A semiconductor device according to a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a cross-sectional configuration of a semiconductor element according to this embodiment. As shown in FIG. 1, the semiconductor element of this embodiment is a metal-semiconductor field effect transistor (MESFET). A channel layer 12 made of n-type GaAs formed on a semi-insulating GaAs substrate 11, an undoped AlGaAs layer 13 formed on the channel layer 12, and both sides of the channel layer 12 and the AlGaAs layer 13 are sandwiched. An element formation region 23 composed of a source region 14 and a drain region 15, which are regions having a high carrier concentration, is formed. A gate electrode 18 is formed on the AlGaAs layer 13, and a source electrode 16 and a drain electrode 17 are formed with the gate electrode 18 interposed therebetween. The source electrode 16 and the drain electrode 17 are formed on the source region 14 and the drain region 15, respectively.

The surface of the semiconductor element of this embodiment is covered with a semi-insulating BCN film 19 containing boron, carbon, and nitrogen. The BCN film 19 is a film having a thickness of 100 nm to 500 nm deposited by plasma enhanced chemical vapor deposition (plasma CVD), and is a semi-insulating film having a volume resistivity of about 1 × 10 ⁸ Ωcm. Is formed. As a result, when a high bias voltage is applied between the gate electrode 18 and the drain electrode 17, an electric field is uniformly applied to the surface of the AlGaAs layer 13 below the BCN film 19.

Since the breakdown voltage of the AlGaAs layer 13 is about 4 × 10 ⁵ V / cm, the breakdown voltage in the ideal state when the distance between the gate electrode 18 and the drain electrode 17 is 3 μm is about 120V. However, normally, when a reverse bias of about 10 V is applied, breakdown occurs. This is because the resistivity on the surface of the AlGaAs layer 13 becomes non-uniform due to crystal defects or the like existing on the surface of the AlGaAs layer 13 and electric field concentration occurs, so that a high voltage is locally applied.

  On the other hand, in the MESFET of this embodiment, the semi-insulating BCN film 19 formed on the AlGaAs layer 13 makes the resistivity on the surface of the AlGaAs layer 13 substantially uniform, so that a crystal is formed on the surface of the AlGaAs layer 13. Even if a defect or the like exists, an electric field is uniformly applied to the surface of the AlGaAs layer 13. For this reason, the breakdown voltage can be brought close to an ideal state.

When the inter-electrode distance between the gate electrode 18 and the drain electrode 17 is 3 μm, if the BCN film 19 having a volume resistivity of 1 × 10 ⁸ Ωcm and a film thickness of 200 nm is provided, the gate electrode 18 and the drain per unit gate width are provided. The resistance between the electrode 17 is 1.5 × 10 ¹⁰ Ωmm. In this case, the value of the leakage current generated when a reverse bias of 50 V is applied between the gate electrode 18 and the drain electrode 17 is 3.3 × 10 ⁻⁹ A / mm. Therefore, the leak current value in a typical FET having a gate width of 10 mm is 33 nA, and this value is sufficiently smaller than 1 μA, which is a problem of the leak current in the FET, so that the BCN film 19 is a high-power transistor. This does not have a great influence on the leakage current characteristics.

The lower the volume resistivity of the BCN film 19, the greater the effect of making the electric field on the semiconductor surface uniform, but the leakage current increases. However, in a normal FET, the leakage current between the gate electrode and the drain electrode is about 1 μA. In the case of a FET having a normal gate width and inter-electrode distance, if there is a volume resistivity of 1 × 10 ⁶ Ωcm or more, The increase in leakage current can be ignored. Further, if the volume resistivity is about 1 × 10 ¹⁰ Ωcm or less, which is the same as that of a high-resistance semiconductor substrate, the effect of making the electric field uniform and improving the breakdown voltage can be obtained.

Further, since the capacitance value between the gate electrode 18 and the drain electrode 17 is about 0.5 pF / mm, the capacitance value between the gate electrode 18 and the drain electrode 17, and the gate electrode 18 and the drain electrode 17. The time constant obtained by the product of the resistance value of the BCN film 19 between the two is about 7.5 × 10 ⁻³ seconds. This is sufficiently longer than 1 × 10 ⁻⁹ seconds, which is the reciprocal of the 1 GHz frequency often used in mobile phones and the like, and the influence on the high frequency characteristics due to the provision of the BCN film 19 in this frequency band. There is almost no.

From the viewpoint of the time constant, if the resistivity of the BCN film is reduced to about 1 × 10 ³ Ωcm by 5 digits, use at a frequency of 1 GHz appears to be affected. The operating frequency of the FET is about one third of the maximum oscillation frequency, and there is no problem in actual use as long as the high frequency characteristics are not affected at the maximum oscillation frequency. Therefore, if the time constant determined by the capacitance value between the gate electrode and the drain electrode and the resistance value of the BCN film is longer than the reciprocal of the maximum oscillation frequency, the influence of the BCN film on the high frequency characteristics of the FET can be ignored.

  In the present embodiment, the BCN film 19 is also provided between the gate electrode 18 and the source electrode 16, but normally a high voltage is not applied between the gate and the source, and therefore the gate electrode 18 and the source electrode 16 are not applied. The BCN film 19 may not be provided between the two. In the present embodiment, the BCN film 19 is also provided on each electrode. However, the BCN film 19 is not necessarily provided on the electrode, and at least the surface of the region where the depletion layer in the AlGaAs layer 13 spreads is BCN19. If it is covered with, the same effect can be obtained.

  In this embodiment, a MESFET using GaAs is shown as an example. However, the same effect can be obtained if a semiconductor element in which a depletion layer expands when a reverse bias is applied to the gate electrode, and InP or GaN is used. The same effect can be obtained even with a structure such as a MISFET (metal-insulating film-semiconductor structure FET) or a junction FET.

(One modification of the first embodiment)
A modification of the first embodiment will be described below with reference to the drawings. FIG. 2 shows a cross-sectional configuration of a semiconductor element according to this modification. In FIG. 2, the same components as those in FIG.

As shown in FIG. 2, in the MESFET of this modification, unlike the first embodiment, a BCN film 19 is formed on an insulating film 20 made of SiO ₂ . Thus, even when the BCN film 19 is formed on the insulating film 20, the electric field applied to the AlGaAs layer 13 can be made uniform, and the breakdown voltage can be improved. Further, since the BCN film 19 is not in direct contact with the AlGaAs layer 13, the value of the leakage current can be reduced.

  In order to make the electric field applied to the AlGaAs layer 13 uniform, the insulating film 20 is preferably as thin as possible and is preferably 50 nm or less. Moreover, in order to ensure the ease of film formation and uniformity of the insulating film 20, the lower limit of the film thickness is preferably about 10 nm.

In this modification, the insulating film 20 is made of SiO ₂ , but may be a nitride film or the like.

(Second Embodiment)
A semiconductor element according to the second embodiment of the present invention will be described below with reference to the drawings. FIG. 3 shows a cross-sectional configuration of the semiconductor element of this embodiment. As shown in FIG. 3, the semiconductor element of this embodiment is a MESFET having a semiconductor region formed by ion implantation into a semiconductor substrate. An element formation region 43 is formed in the vicinity of the surface of the semi-insulating GaAs substrate 31 having a thickness of 500 μm. The element formation region 43 includes a source region 34 and a drain region 35 which are high-concentration n-type regions formed at intervals, and an n-type region 32 formed between the source region 34 and the drain region 35. Become. A BCN film 39 having a thickness of 200 nm is formed on the GaAs substrate 31 including the element formation region 43.

  Gold (Au), germanium (Ge), and nickel (Ni), which respectively penetrate the BCN film 39 and are in contact with the source region 34 and the drain region 35, on the surface of the BCN film 39. A source electrode 36 and a drain electrode 37 are formed in which an alloy (AuGeNi) and gold are sequentially laminated from the bottom. A gate electrode 38 made of aluminum (Al) is formed between the source electrode 36 and the drain electrode 37 and penetrates the BCN film 39 and contacts the n-type region 32.

Below, the manufacturing method of the semiconductor element of this embodiment is demonstrated with reference to figures. FIG. 4 shows a cross-sectional configuration for each process in the method for manufacturing a semiconductor device of this embodiment. As shown in FIG. 4A, first, a first resist 41 having a thickness of 2 μm and having an opening is formed on a GaAs substrate 31 having a thickness of 500 μm by a photolithography process. Subsequently, silicon (Si) ions, which are n-type impurities, are applied to the GaAs substrate 31 under conditions of an acceleration voltage of 50 kV and an ion irradiation density of 2 × 10 ¹² cm ^{−2 using} the first resist 41 as a mask in the vacuum chamber. To form an n-type region 32 having a maximum depth of about 100 nm in the vicinity of the surface of the GaAs substrate 31.

Next, as shown in FIG. 4B, after removing the first resist 41, a region including both ends of the n-type region 32 is exposed, and a second resist 42 covering the central portion of the n-type region 32 is exposed. Are formed by a photolithography process. Subsequently, a high-concentration n-type region having a maximum depth of about 300 nm is implanted by implanting Si ions under the conditions of an acceleration voltage of 120 kV and an ion irradiation density of 5 × 10 ¹³ cm ⁻² using the second resist 42 as a mask. A source region 34 and a drain region 35 are formed.

Next, as shown in FIG. 4C, after removing the second resist, the GaAs substrate 31 is heat-treated in an arsine gas atmosphere at a temperature of 800 ° C. to activate Si ions. Subsequently, a BCN film 39 having a thickness of 200 nm and a resistivity of 1 × 10 ⁸ Ωcm is deposited on the GaAs substrate 31 by CVD, and then a photolithography process, tetrafluoromethane (CF ₄ ), O ₂ gas, The BCN film 39 is selectively etched by a dry etching process using, thereby forming two openings 39a exposing the source region 34 and the drain region 35, respectively.

The BCN film 39 is formed by, for example, boron trichloride (BCl ₃ ) as a boron source, methane (CH ₄ ) as a carbon source, and nitrogen (N ₂ ) gas as a nitrogen source at 1 ml / min (0 ° C., 1 atm), respectively. ) 1 ml / min (0 ° C., 1 atm) and 3 ml / min (0 ° C., 1 atm) are flowed into the chamber, the substrate temperature is 300 ° C., and the forming pressure is 133 Pa.

  Next, as shown in FIG. 4D, AuGeNi having a thickness of about 100 nm and Au having a thickness of about 300 nm are sequentially deposited by electron beam so as to fill two openings on the BCN film 39. Subsequently, lift-off is performed to remove unnecessary portions to form a source electrode 36 and a drain electrode 37 each having an electrode width of 10 μm, and then a heat treatment is performed at a temperature of 400 ° C. for 10 minutes. The drain electrode 37 is in ohmic contact with the source region 34 and the drain region 35, respectively.

  Next, after forming a resist pattern (not shown) having an opening in the region where the gate electrode is to be formed, the BCN film 39 is dry etched to form an opening 39b exposing the n-type region 32. Subsequently, Al having a thickness of 700 nm is deposited by electron beam so as to fill the opening, and then lift-off is performed to form a gate electrode 38 having a gate length of 200 nm. The distance between the center of the source electrode 36 and the center of the gate electrode 38 was 7 μm, and the distance between the center of the drain electrode 37 and the center of the gate electrode 38 was 10 μm.

  When the DC operating characteristics were actually examined for the MESFET obtained as described above, the breakdown voltage was 30V. On the other hand, when the BCN film 39 is not formed, the breakdown voltage is 12 V. By forming the BCN film 39, an electric field is uniformly applied to the element formation region 43, and the breakdown voltage of the semiconductor element is improved. Is clear.

  In the semiconductor element of the present embodiment, a thin insulating film may be formed between the BCN film and the semiconductor layer as in the modification of the first embodiment. Thereby, the value of leakage current can be reduced.

(Third embodiment)
A semiconductor element according to the third embodiment of the present invention will be described below with reference to the drawings. FIG. 5 shows a cross-sectional configuration of the semiconductor element of this embodiment. As shown in FIG. 5, the semiconductor element of this embodiment is a high electron mobility transistor (HEMT), and an element formation region 63 made of a semiconductor layer is formed on a substrate 51 made of sapphire having a thickness of 500 μm. Yes. The element formation region 63 includes a buffer layer 52 made of aluminum nitride (AlN) having a thickness of 500 nm, a channel layer 53 made of undoped GaN having a thickness of 2 μm formed on the buffer layer 52, and a channel layer 53 And an electron supply layer 54 made of undoped Al _0.25 Ga _0.75 N having a thickness of 25 nm. A high-concentration two-dimensional electron gas (2DEG) is formed near the interface between the channel layer 53 and the electron supply layer 54 by piezo polarization and spontaneous polarization.

A source electrode 56 and a drain electrode 57 in which titanium (Ti) having a thickness of 10 nm and aluminum (Al) having a thickness of 300 nm are laminated are formed on the electron supply layer 54 with a space therebetween. ing. Between the source electrode 56 and the drain electrode 57, a gate electrode 58 is formed in which Ni having a thickness of 50 nm and Au having a thickness of 400 nm are stacked. A semi-insulating BCN film 59 having a thickness of 200 nm and a resistivity of 1 × 10 ⁸ Ωcm is formed in a region not covered with the source electrode 56, the drain electrode 57, and the gate electrode 58 on the surface of the electron supply layer 54. Is formed.

  Below, the manufacturing method of the semiconductor element of this embodiment is demonstrated with reference to figures. FIG. 6 shows a cross-sectional configuration for each process in the method of manufacturing a semiconductor device of this embodiment. As shown in FIG. 6A, first, a cleaned substrate 51 made of sapphire is thermally cleaned in a crystal growth apparatus, and then an AlN buffer layer 52, a channel layer 53 and a substrate 53 are formed on the substrate 51 by metal organic vapor phase epitaxy. Crystals of the electron supply layer 54 are sequentially grown.

Subsequently, a BCN film 59 is formed on the electron supply layer 54 by chemical vapor deposition. The BCN film 59 is formed by, for example, boron trichloride (BCl ₃ ) as a boron source, methane (CH ₄ ) as a carbon source, and nitrogen (N ₂ ) gas as a nitrogen source at 1 ml / min (0 ° C., 1 atm), respectively. ) 1 ml / min (0 ° C., 1 atm) and 3 ml / min (0 ° C., 1 atm) are flowed into the chamber, the substrate temperature is 300 ° C., and the forming pressure is 133 Pa.

Next, as shown in FIG. 6B, after a first resist 61 having two openings is formed on the BCN film 59 by a photolithography process, CF ₄ and O ₂ are formed using the resist 61 as a mask. Then, the BCN film 59 is selectively dry-etched using two to form two openings 59a.

  Next, as shown in FIG. 6C, a metal layer (not shown) made of Ti and Al is formed by vacuum deposition so as to fill the opening 59a on the first resist 61, and then the substrate. The first resist 61 is removed by ultrasonic irradiation of 51 in acetone, and the metal layer formed on the first resist 61 is lifted off to form the source electrode 56 and the drain electrode 57. Subsequently, a heat treatment is performed at a temperature of 600 ° C. for 15 minutes to bring the source electrode 56 and the drain electrode 57 into ohmic contact with the electron supply layer 54.

  Next, as shown in FIG. 6D, a second resist 62 covering the source electrode 56 and the drain electrode 57 is formed on the BCN film 59, and then a pattern is formed by a photolithography process. Subsequently, the BCN film 59 is dry-etched using the second resist 62 as a mask to form an opening exposing the electron supply layer 54 between the source electrode 56 and the drain electrode 57. Further, a metal layer 58a made of Ni and Au is formed on the second resist 62 by vacuum deposition so as to fill the opening. Thereafter, the second resist 62 is removed by irradiating ultrasonic waves in acetone, and the metal layer 58a is lifted off to form the gate electrode 58.

  The electrode width of the source electrode 56 and the drain electrode 57 was 10 μm, and the gate length of the gate electrode 58 was 0.5 μm. The distance between the center of the source electrode 56 and the center of the gate electrode 58 was 7 μm, and the distance between the center of the drain electrode 57 and the center of the gate electrode 58 was 10 μm.

  The HEMT obtained as described above was actually examined for DC operating characteristics. As a result, the breakdown voltage was 200V. On the other hand, when the BCN film 59 is not formed, the breakdown voltage is 60 V. By forming the BCN film 59, an electric field is uniformly applied to the electron supply layer 54, and the breakdown voltage of the semiconductor element is improved. Is clear.

  In the semiconductor element of the present embodiment, a thin insulating film may be formed between the BCN film and the semiconductor layer as in the modification of the first embodiment. Thereby, the value of leakage current can be reduced.

  In the present embodiment, an example in which a HEMT is formed on a sapphire substrate has been described. However, the same effect can be obtained in a HEMT formed on a SiC substrate, a GaN substrate, or the like.

(Fourth embodiment)
The semiconductor element according to the fourth embodiment of the present invention will be described below with reference to the drawings. FIG. 7 shows a cross-sectional configuration of the semiconductor element according to the present embodiment. As shown in FIG. 7, the semiconductor element of this embodiment is a hetero-bipolar transistor (HBT), and an element formation region 83 made of a semiconductor layer is formed on a semi-insulating GaAs substrate 71. The element formation region 83 includes an n ⁺ -GaAs collector contact layer 72, an n ⁻ -GaAs collector layer 73 and p ⁺ -GaAs sequentially formed in a region excluding both ends on the upper surface of the collector contact layer 72. from the emitter contact layer 76. composed of an emitter layer 75 and n ⁺ -GaAs and n ⁺ -InGaAs consisting -InGaP - a base layer 74 made of, ⁿ which are sequentially formed in a region excluding both end portions of the upper surface of the base layer 74 Become.

  An emitter electrode 77 is formed on a part of the upper surface of the emitter contact layer 76, a base electrode 78 is formed on a part of the exposed region of the base layer 74, and the collector contact layer 72 is exposed. A collector electrode 79 is formed in a part of the region.

A BCN film 80 having a thickness of 200 nm and a resistivity of 1 × 10 ⁸ Ωcm is formed on the HBT element.

  In the high-power HBT, when a reverse bias is applied between the base electrode 78 and the collector electrode 79, a depletion layer spreads in a region near the side wall of the collector layer 73, so that a crystal is formed on the surface of the side wall of the collector layer 73. If there is a defect or the like, electric field concentration occurs and the withstand voltage decreases. However, in the HBT of this embodiment, the exposed portion of the collector layer 73 is covered with the BCN film 80, and the electric field is uniform on the surface of the side wall of the collector layer 73. The breakdown due to the electric field concentration does not occur up to near the breakdown voltage determined by the thickness of 73.

The base layer 74 has a thickness of 0.1 μm, the collector layer 73 has a thickness of 0.5 μm, the emitter electrode 77 has a rectangular shape, the thickness is 200 nm, and the resistivity is 1 × 10 ⁸ Ωcm. When 80 is formed, the resistance value between the base electrode 78 and the collector electrode 79 per unit emitter length is 1.5 × 10 ⁹ Ωmm. In this case, the value of the leakage current generated when a voltage of 50 V is applied between the base electrode 78 and the collector electrode 79 is 3.3 × 10 ⁻⁸ A / mm. Therefore, the leakage current value in an HBT having a typical emitter length of 2 mm is 66 nA, and this value is sufficiently smaller than 1 μA, which is a leakage current value that causes a problem in a high-power transistor, so that the BCN film 80 has a high value. The leakage current characteristics of the output transistor are not greatly affected.

The lower the volume resistivity of the BCN film 80, the greater the effect of making the electric field on the semiconductor surface uniform, but the leakage current increases. However, the leakage current between the base electrode and the collector electrode in a normal HBT is about 1 μA, and in the case of a normal HBT, if there is a volume resistivity of 1 × 10 ⁶ Ωcm or more, an increase in leakage current can be ignored. Further, if the volume resistivity is about 1 × 10 ¹⁰ Ωcm or less, which is the same as that of a high-resistance semiconductor substrate, the effect of making the electric field uniform and improving the breakdown voltage can be obtained.

Further, since the capacitance value between the base electrode 78 and the collector electrode 79 is about 2 pF / mm, the time constant obtained by the product with the resistance value of the BCN film 80 is about 3.0 × 10 ⁻³ seconds. . This is sufficiently longer than 1 × 10 ⁻⁹ seconds, which is the reciprocal of the 1 GHz frequency often used in mobile phones and the like, and the influence on the high frequency characteristics due to the provision of the BCN film 80 in this frequency band. There is almost no.

From the viewpoint of the time constant, if the resistivity of the BCN film 80 is reduced by about 5 digits to about 1 × 10 ³ Ωcm, the use at a frequency of 1 GHz will be affected. Note that the operating frequency of the HBT is about one third of the maximum oscillation frequency, and there is no problem in actual use as long as the high frequency characteristics are not affected at the maximum oscillation frequency. Therefore, if the time constant determined by the capacitance value between the base electrode 78 and the collector electrode 79 and the resistance value of the BCN film 80 is longer than the reciprocal of the maximum oscillation frequency, the influence of the BCN film 80 on the high-frequency characteristics of the HBT. Can be ignored.

  In the present embodiment, the BCN film 80 is also provided between the base electrode 78 and the emitter electrode 77. Normally, however, a high voltage is not applied between the base and emitter, and therefore the base electrode 78 and the emitter electrode 77 are not applied. The BCN film 80 may not be provided between the two, and the same effect can be obtained if at least the exposed portion of the collector layer 73 is covered with the BCN film 80.

  Also in the semiconductor element of this embodiment, a thin insulating film may be formed between the BCN film and the semiconductor layer, as in a modification of the first embodiment. Thereby, the value of leakage current can be reduced.

  In this embodiment, a GaAs-based HBT has been described as an example, but the same effect can be obtained even with an InP-based, GaN-based, or SiC-based HBT.

(Fifth embodiment)
A semiconductor element according to the fifth embodiment of the present invention will be described below with reference to the drawings. FIG. 8 shows a cross-sectional configuration of the semiconductor element according to the present embodiment. As shown in FIG. 8, the semiconductor element of this embodiment is a Schottky diode, and is formed on a semi-insulating GaAs substrate 91 adjacent to the low carrier concentration region 92 and the low carrier concentration region 92. An element formation region 94 is formed by the high carrier concentration region 93. A Schottky electrode 95 is formed on the low carrier concentration region 92, and an ohmic electrode 96 is formed on the high carrier concentration region 93. A semi-insulating BCN film 97 having a resistivity of 1 × 10 ⁸ Ωcm is formed on the low carrier concentration region 92 including the Schottky electrode 95 and the high carrier concentration region 93 including the ohmic electrode 96. Yes.

  When a reverse bias is applied to the Schottky electrode 95, a Schottky depletion layer 98 extending from the Schottky electrode 95 to the ohmic electrode 96 is formed in a region near the surface of the low carrier concentration region 92. At this time, if a crystal defect or the like exists in a region between the Schottky electrode 95 and the ohmic electrode 96 on the surface of the low carrier concentration region 92, the electric field is concentrated, so that the breakdown voltage of the Schottky diode is lowered. However, in the Schottky diode of this embodiment, since the semi-insulating BCN film 97 is formed on the surface of the semiconductor layer including the low carrier concentration region 92, the Schottky diode 95 is not provided between the Schottky electrode 95 and the ohmic electrode 96. Since the electric field on the surface of the semiconductor layer becomes uniform, the breakdown voltage of the Schottky diode does not decrease due to the concentration of the electric field.

In this embodiment, the resistivity of the BCN film 97 is 1 × 10 ⁸ Ωcm. However, if the resistivity is 1 × 10 ¹⁰ Ωcm or less, the electric field between the Schottky electrode and the ohmic electrode is made uniform. If an effect is obtained and the resistivity is 1 × 10 ⁶ Ωcm or more, an increase in leakage current can be ignored.

  Also in the semiconductor element of this embodiment, a thin insulating film may be formed between the BCN film and the semiconductor layer, as in a modification of the first embodiment. Thereby, the value of leakage current can be reduced.

  In each embodiment and modification, the BCN film is used as the semi-insulating film, but aluminum or gallium, which is the same group III element, may be used instead of boron. Alternatively, a film containing all or any two of boron, aluminum, and gallium may be used.

  The semiconductor element of the present invention has high uniformity of resistivity on the surface of the semiconductor layer, has an effect of preventing a decrease in breakdown voltage, and semiconductor elements such as field effect transistors, bipolar transistors, and diodes that require a high breakdown voltage Etc. are useful.

It is sectional drawing which shows the structure of the semiconductor element which concerns on the 1st Embodiment of this invention. It is sectional drawing which shows the structure of the semiconductor element which concerns on the modification of the 1st Embodiment of this invention. It is sectional drawing which shows the structure of the semiconductor element which concerns on the 2nd Embodiment of this invention. It is sectional drawing which shows the manufacturing process of the semiconductor element which concerns on the 2nd Embodiment of this invention in process order. It is sectional drawing which shows the structure of the semiconductor element which concerns on the 3rd Embodiment of this invention. It is sectional drawing which shows the manufacturing process of the semiconductor element which concerns on the 3rd Embodiment of this invention in process order. It is sectional drawing which shows the structure of the semiconductor element which concerns on the 4th Embodiment of this invention. It is sectional drawing which shows the structure of the semiconductor element which concerns on the 5th Embodiment of this invention. It is sectional drawing which shows the structure of the semiconductor element which concerns on a prior art example.

Explanation of symbols

11 substrate 12 channel layer 13 AlGaAs layer 14 source region 15 drain region 16 source electrode 17 drain electrode 18 gate electrode 19 BCN film 20 insulating film 23 element formation region 31 substrate 32 n-type region 34 source region 35 drain region 36 source electrode 37 drain Electrode 38 Gate electrode 39 BCN film 39a Opening 39b Opening 41 First resist 42 Second resist 43 Element formation region 51 Substrate 52 Buffer layer 53 Channel layer 54 Electron supply layer 56 Source electrode 57 Drain electrode 58 Gate electrode 58a Metal Layer 59 BCN film 59a Opening 61 First resist 62 Second resist 63 Element formation region 71 Substrate 72 Collector contact layer 73 Collector layer 74 Base layer 75 Emitter layer 76 Emitter contact layer 77 Emitter electrode 78 Base Electrode 79 collector electrode 80 BCN film 83 element formation region 91 substrate 92 low carrier concentration layer 93 a high carrier concentration layer 94 the element formation region 95 Schottky electrode 96 ohmic electrode 97 BCN film 98 depletion

Claims (15)

An element formation region including at least one semiconductor region formed on the substrate;
A first electrode and a second electrode formed on the element formation region at a distance from each other;
A portion between the first electrode and the second electrode on the surface of the element formation region, which is depleted when a reverse bias is applied between the first electrode and the second electrode. A semiconductor element comprising: a semi-insulating film covering a portion where the layer extends.   The semiconductor element according to claim 1, further comprising an insulating film provided between the semi-insulating film and the surface of the element formation region.   The semiconductor element according to claim 1, wherein the semi-insulating film is made of a compound containing at least one of boron, aluminum, and gallium, nitrogen, and carbon.   4. The semiconductor element according to claim 1, wherein the element formation region includes an epitaxial layer formed on the substrate. 5.   4. The semiconductor element according to claim 1, wherein the element formation region includes a diffusion layer formed by injecting an impurity into the substrate. 5. The element formation region includes a channel layer in which electrons travel,
The first electrode is a gate electrode;
The second electrode is a drain electrode;
A source electrode formed at a position opposite to the drain electrode across the gate electrode;
6. The device according to claim 1, wherein the device operates as a field effect transistor, and the semi-insulating film covers a portion between the gate electrode and the drain electrode on a surface of the element formation region. 2. The semiconductor element according to item 1.   The resistivity of the semi-insulating film is lower than the resistivity of silicon nitride, and the capacitance value between the drain electrode and the source electrode and the electric resistance value between the drain electrode and the source electrode 7. A resistivity in which a time constant that is a product of electrical resistance values of the semi-insulating film is longer than a time that is a reciprocal of a maximum oscillation frequency of the field effect transistor. Semiconductor element.   The resistivity of the semi-insulating film is lower than the resistivity of silicon nitride, and the capacitance value between the drain electrode and the gate electrode and the electric resistance value between the drain electrode and the gate electrode 7. A resistivity in which a time constant that is a product of electrical resistance values of the semi-insulating film is longer than a time that is a reciprocal of a maximum oscillation frequency of the field effect transistor. Semiconductor element. The semiconductor element according to claim 6, wherein the semi-insulating film has a resistivity of 1 × 10 ⁶ Ωcm or more and 1 × 10 ¹⁰ Ωcm or less. The element formation region includes a collector region, a base region, and an emitter region sequentially formed from the bottom,
The first electrode is a collector electrode formed in a predetermined portion on the collector region;
The second electrode is a base electrode formed in a predetermined portion on the base region,
An emitter electrode formed on a predetermined portion of the emitter region;
5. The device according to claim 1, wherein the device operates as a heterobipolar transistor, and the semi-insulating film covers a portion between the collector electrode and the base electrode on a surface of the element formation region. 2. The semiconductor element according to item 1.   The resistivity of the semi-insulating film is lower than the resistivity of silicon nitride, and a capacitance value between the collector electrode and the emitter electrode and an electric resistance value between the collector electrode and the emitter electrode 11. The resistivity according to claim 10, wherein a time constant that is a product of electrical resistance values of the semi-insulating film is longer than a time that is a reciprocal of a maximum oscillation frequency of the heterobipolar transistor. Semiconductor element.   The resistivity of the semi-insulating film is lower than the resistivity of silicon nitride, and the capacitance value between the collector electrode and the base electrode and the electric resistance value between the collector electrode and the base electrode 11. The resistivity according to claim 10, wherein a time constant that is a product of electrical resistance values of the semi-insulating film is longer than a time that is a reciprocal of a maximum oscillation frequency of the heterobipolar transistor. Semiconductor element. The semiconductor element according to claim 10, wherein a resistivity of the semi-insulating film is 1 × 10 ⁶ Ωcm or more and 1 × 10 ¹⁰ Ωcm or less. The element formation region includes a low carrier concentration region and a high carrier concentration region having an impurity concentration higher than the low carrier concentration region,
The first electrode is a Schottky electrode formed on the low carrier concentration region,
The second electrode is an ohmic electrode formed on the high carrier concentration region,
6. The device according to claim 1, wherein the device operates as a diode and the semi-insulating film covers a portion between the Schottky electrode and the ohmic electrode on a surface of the element formation region. 2. The semiconductor element according to item 1. The semiconductor element according to claim 14, wherein a resistivity of the semi-insulating film is 1 × 10 ⁶ Ωcm or more and 1 × 10 ¹⁰ Ωcm or less.

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