JP2005300956A - Driving method of plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a driving method of a plasma display panel which realizes higher luminance and higher gradations. <P>SOLUTION: Row electrodes are divided into a plurality of blocks of pluralities of row electrodes, and a one-field period is divided into a plurality of sub-field periods in each block; and each sub-field period has both a section wherein a setup operation and an address operation are performed separately from a sustaining operation so that the address operation overlaps a sustaining operation of another block and setup operations of blocks are performed while shifted in time and a section wherein a setup operation of one block and a setup operation of another block are performed overlapping each other. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for driving a plasma display panel that displays an image by controlling discharge.

A plasma display panel (PDP) is a display panel that can be enlarged and thinned using light emission associated with gas discharge and excitation light emission of a phosphor by ultraviolet rays, and extends in a row direction to form a plurality of rows. Surface discharge system having a so-called three-electrode discharge structure in which an electrode, a plurality of column electrodes arranged so as to intersect the row electrode, and a discharge cell serving as a light emitting unit at a position where the column electrode and the row electrode intersect are provided AC type is mainly used (see Non-Patent Document 1, for example).
Heki Uchiike and Shigeo Miko, “All about Plasma Displays”, Industrial Research Council, May 1, 1997, p79-p80, p153-154

  An object of the present invention is to realize a method for driving a plasma display panel capable of increasing brightness and gradation.

  In order to achieve the above object, a plasma display panel driving method according to the present invention includes a plurality of row electrodes extending in the row direction to form display lines, a plurality of column electrodes arranged to intersect the row electrodes, and a column electrode. In the method for driving a plasma display panel in which a discharge space for forming a light emitting unit is provided at a position where the row electrode intersects with the row electrode, the row electrode is divided into a plurality of block units. The field period is divided into a plurality of subfields. In the subfield period, the setup operation, the address operation, and the sustain operation are performed separately, and the address operation is performed so as to overlap the sustain operation of other blocks. An interval in which the setup operation and the setup operation of another block are executed with a time shift, and the block setup It is characterized in that it has both a section for executing overlapping the setup operation of the flop operation with other blocks.

  According to the driving method of the plasma display panel of the present invention, it is possible to increase the number of subfields, thereby increasing the luminance and the gradation.

  That is, the invention according to claim 1 of the present invention includes a plurality of row electrodes extending in the row direction to form display lines, a plurality of column electrodes arranged to intersect the row electrodes, a column electrode and a row electrode. In the method of driving a plasma display panel in which a discharge space for forming a light emitting unit is provided at a position where each intersects, a plurality of row electrodes are divided into a plurality of block units, and each block includes a plurality of one field period. In the subfield period, the setup operation, the address operation, and the sustain operation are executed separately, and the address operation is executed so as to overlap the sustain operation of other blocks. The interval for executing the set-up operation of the current block with a time shift, and the set-up operation of the block and the set of other blocks Tsu is a driving method of a plasma display panel characterized by having both a flop operation and the overlaid section to be run.

  According to the second aspect of the present invention, in the subfield in which the setup period in which the setup operation is performed is longer than the sustain period in which the maintenance operation is performed, the setup operation of the block and the setup operation of another block are overlapped. The method according to claim 1, wherein the plasma display panel driving method is performed.

  According to a third aspect of the present invention, there is provided the plasma display panel driving method according to the first aspect, wherein the sustain operation is started immediately after the end of the address period during which the address operation is performed.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is a cross-sectional perspective view showing a schematic configuration of a PDP driven by a PDP driving method according to an embodiment of the present invention.

  The front plate 2 of the PDP 1 is formed of a scan electrode 4 and a sustain electrode 5 formed on one main surface of a transparent and insulating substrate 3 such as glass on the front side, and extends in the row direction to form a display line. The structure includes an electrode 6, a dielectric layer 7 covering the row electrode 6, and a protective layer 8 made of, for example, MgO covering the dielectric layer 7. The scan electrode 4 and the sustain electrode 5 have a structure in which bus electrodes 4b and 5b made of a metal material are stacked on the transparent electrodes 4a and 5a for the purpose of reducing electric resistance.

  The back plate 9 includes an address electrode 11 that is a column electrode formed on one main surface of an insulating substrate 10 such as glass on the back side, a dielectric layer 12 that covers the address electrode 11, and a dielectric. A phosphor 13 including a red phosphor layer 14R, a green phosphor layer 14G, and a blue phosphor layer 14B between the barrier ribs 13 located between the address electrodes 11 on the body layer 12 and the barrier ribs 13. The structure has the layer 14.

  The front plate 2 and the back plate 9 are opposed to each other so that the row electrodes 6 and the address electrodes 11 are orthogonal to each other with the partition wall 13 interposed therebetween, and the periphery outside the image display area is sealed with a sealing member. The discharge space 15 formed between the front plate 2 and the back plate 9 is filled with, for example, Ne—Xe 5% discharge gas at a pressure of 66.5 kPa (500 Torr).

  Then, the intersection between the row electrode 6 and the address electrode 11 in the discharge space 15 operates as a discharge cell 16 which is a discharge space serving as a light emission unit.

  FIG. 2 is a cross-sectional view schematically showing a schematic configuration of the discharge cell 16.

  In the discharge cell 16, the scan electrode 4 and the sustain electrode 5 are formed in parallel on the substrate 3 of the front plate 2 to constitute a row electrode 6, and the row electrode 6 is composed of the dielectric layer 7. And a protective layer 8.

  An address electrode 11 as a column electrode is formed on the substrate 10 of the back plate 9 facing the substrate 3 with a partition wall 13 interposed therebetween so as to be orthogonal to the row electrode 6. A dielectric layer 12 is provided. Further, a phosphor layer 14 is applied on the dielectric layer 12.

  In the discharge cell 16, when a pulse voltage (writing pulse) higher than the discharge start voltage Vf is applied between the scan electrode 4 and the address electrode 11, discharge occurs. At that time, negative charges are accumulated on the surface of the phosphor layer 14 on the address electrode 11 to which a positive voltage is applied, and positive charges are accumulated on the surface in the vicinity of the protective layer 8 on the scan electrode 4 side to which the negative voltage is applied. Is accumulated. At the same time, negative charges are accumulated on the wall surface in the vicinity of the protective layer 8 on the side of the sustain electrode 5 to which a positive voltage is applied, as with the address electrode 11.

  Here, charges accumulated on the respective surfaces of the protective layer 8 and the phosphor layer 14 are referred to as wall charges, and a voltage induced by the wall charges is referred to as a wall voltage Vw. Generation of wall discharge by generating discharge by applying an address pulse is called address discharge, and a period of address discharge for a certain unit line is called an address period.

  When a pulsed high voltage Vi is applied between the scan electrode 4 and the sustain electrode 5 with positive charges accumulated on the scan electrode 4 side and negative charges accumulated on the sustain electrode 5 and address electrode 11 sides, the wall voltage Vw is applied. When the sum of the voltage Vi (= cell voltage Vc) exceeds the discharge start voltage Vf, discharge occurs. Once the discharge is started, wall charges having positive and negative polarities are always accumulated again with respect to the electrode at the time of the previous discharge, so that a periodic pulse voltage that alternately inverts continues to be applied to the scan electrode 4 and the sustain electrode 5. The inter-discharge is maintained. This discharge is called a sustain discharge, and the period during which the sustain discharge is performed is called a sustain period.

  The applied voltage Vi is set lower than the discharge start voltage Vf, and when there is no wall voltage (wall charge), the cell voltage Vc = Vw + Vi = Vi <Vf, so that no sustain discharge occurs. As described above, the selective discharge can be realized by determining the presence or absence of the subsequent sustain discharge based on the presence or absence of the wall voltage Vw generated by the address discharge.

  FIG. 3 is a block diagram showing a schematic configuration of a driving apparatus that performs a driving method of a PDP according to an embodiment of the present invention, and FIGS. 4 to 7 are diagrams for explaining block driving as the driving method. is there.

  As shown in FIG. 3, the driving device for driving the PDP 1 includes an address driver 102, two scan drivers 131 to 132, two sustain drivers 141 to 142, a discharge control timing generation circuit 105, an A / D converter (analog / digital). Converter) 106, scan number conversion unit 107, and subfield conversion unit 108. In FIG. 3, the upper half block is block A, and the lower half block is block B.

  The A / D converter 106 converts the video signal VD into digital image data, and supplies the image data to the scan number conversion unit 107. The scanning number conversion unit 107 converts the image data into image data having the number of lines corresponding to the number of pixels of the PDP 1, and provides the image data for each line to the subfield conversion unit 108. The image data for each line is composed of a plurality of pixel data respectively corresponding to a plurality of pixels of each line. The subfield conversion unit 108 divides each pixel data of the image data for each line into a plurality of bits corresponding to a plurality of subfields, and serially converts each bit of each pixel data to the address driver 102 for each subfield. Output.

  Discharge control timing generation circuit 105 generates discharge control timing signals SC1 to SC2 and discharge control timing signals SU1 to SU2 based on horizontal synchronization signal H and vertical synchronization signal V, and scan control timing signals SC1 to SC2 are scan drivers. The discharge control timing signals SU1 to SU2 are supplied to the sustain drivers 141 to 142, respectively.

  Next, each operation is sequentially performed in the block divided into two in this way.

  FIG. 4 is a timing chart showing the timing of the setup period ST in which the setup operation is performed, the address period AD in which the address operation is performed, and the sustain period SUS in which the sustain operation is performed in each block of the plasma display device of FIG. The vertical axis in FIG. 4 shows each block, the horizontal axis shows time, and corresponds to the division of the two areas of block A and block B shown in FIG.

  The discharge timing is controlled as follows. First, the setup period ST is started in the first subfield SF1 of the block A. After the setup period ST ends, the address period AD of the block A is started. After the address period AD of the block A ends, the sustain period SUS of the block A starts. Further, the sustain period SUS of the block A ends. After that, the setup period ST of the block A is started.

  Next, the operation of block B is started. At this time, the address period AD of the block A and the setup period ST of the block B cause erroneous light emission, and cannot be executed in an overlapping manner. For this reason, the setup period ST of the block B is started after the end of the address period AD of the block A.

  Subsequently, the address period AD of the block B is started, and after the address period AD of the block B ends, the sustain period SUS of the block B is started. First, driving is performed so that the address period AD and the setup period ST do not overlap in this way.

  Next, the final setup period of the first subfield of the block A can be started anytime after the address period AD ends so as not to overlap with the address period AD of the block B. As shown in the figure, after the address period AD of the block B is completed, the setup period ST of the block A is started.

  Further, the sustain period SUS of the first subfield can be all the period from the end of the address period of the first subfield to the start of the setup period ST. This is because each block has a scan electrode and a sustain electrode separately, so that the sustain operation can be performed without being affected even if other blocks are performing the setup and address operations. As a result, a long maintenance period can be secured.

  Further, in a subfield having a large number of sustain pulses, an interval until setup may be provided, and a section in which both blocks are simultaneously in the sustain period may be provided as in the first and second subfields.

  In other words, according to the block drive, the time other than the setup period ST and the address period AD of each subfield is maintained by driving the address period AD and setup period ST of a certain block with the sustain period SUS of another block. Can be used for a period. For this reason, a maintenance period can be lengthened and a brightness | luminance can be improved. FIG. 4 shows an example in which the number of subfields is eight.

  However, in this case, the normal block drive does not use the sustain period effectively, and therefore, it cannot cope with increasing the number of subfields.

  That is, FIG. 5 schematically shows only subfield 5, but as shown in FIG. 4, the weight of the number of pulses is reduced (the number of pulses is decreased) as the number of subfields increases. As an example, in subfield 5, the number of pulses is considerably reduced. Since the sustain period at this time is ensured only for the period that combines the setup period of other blocks and the address period, the sustain period includes the sustain pulse existence period in which sustain light emission actually occurs and the subsequent light emission. It is divided into no-pulse periods that have not occurred. In such a subfield with a small number of pulses, not all of the period reserved as the sustain period emits light, but a non-pulse period occurs and this period is a period that is not effectively used. . For this reason, in the latter half of the subfield, there is a problem that a considerable subfield has a non-pulse period and the sustain period is not used effectively. If this non-pulse period can be used effectively, the number of subfields can be further increased.

  FIG. 6 schematically shows each operation period in both blocks of the subfield 5. FIG. 6A shows both the blocks A and B extracted, and consider each operation constituting the subfield. The subfield period is the sum of the address period (AD), the sustain period (SUS), and the setup period (ST). At this time, the sustain period (SUS) is equal to the sum of the setup period and the address period of the block B. Therefore, the sum of the subfield periods is the sum of the address period (AD), the address period (AD), the setup period (ST), and the setup period (ST).

  On the other hand, FIG. 6B is a schematic diagram showing address maintenance separation driving which is normal driving, not block driving in which each operation is shifted in time for each block. This normal driving is a driving method in which the address operation is sequentially executed regardless of the block and the like, and thereafter, the sustain operation is performed for all the regions at once, and the setup operation is similarly started after the sustain period. . If the subfield period at this time is expressed by using each operation used in FIG. 6A, it is the sum of the address period (AD), the address period (AD), the sustain period (SUS), and the setup period (ST). .

  Here, the lengths of the subfield periods according to the driving methods shown in FIGS. 6A and 6B are compared. The difference between the two is that the setup period in FIG. 6A is replaced with the sustain period in FIG. 6B. That is, in the case of a subfield in which the sustain period is shorter than the setup period, the subfield period can be shortened in the normal driving that is not divided into blocks as shown in FIG. 6B. That is, if the sustain period (period in which the sustain pulse exists) is compared with the setup period and the block drive and the normal drive are switched according to the magnitude relationship, the time width of the subfield can be shortened. As a result, the number of subfields can be increased.

  FIG. 7 is a timing chart for explaining block driving in the PDP driving method according to the embodiment of the present invention. FIG. 5 is a timing chart showing the timing of a setup period ST, an address period AD, and a sustain period SUS in each block, as in FIG. 4.

  In the first half subfield in one field, since the number of pulses is large, the operations of the block A and the block B are executed while being shifted in time as in the block drive timing of FIG. It is assumed that the number of sustain pulses decreases as the number of subfields increases, and in subfield 5, the sustain pulse existence period in sustain period SUS is shorter than the subsequent setup period ST. At this time, in the subsequent sub-field (sub-field 6 and subsequent), normal driving that is not block driving, that is, driving in which the address operation, the sustain operation, and the setup operation are executed in a batch for all blocks is performed. In subfield 5, which is a drive timing change, the timing is adjusted after the address period of block A ends in order to match the start of the sustain period of block A and the start of the sustain period of block B.

  As described above, in the present invention, the driving method is switched between the block driving and the normal driving according to the time width of the sustain pulse existence period within the sustain period. Thereby, the time width of the subfield can be shortened.

  As a result, as compared with the driving method using only block driving shown in FIG. 4, it is possible to increase the number of subfields by just increasing the time of one setup period as shown in FIG. In other words, the number of subfields can be increased to increase the number of gradations that can be displayed, so that the gradation can be improved.

  Further, as a method of effectively using time, not only the number of subfields may be increased as described above, but also the luminance may be improved by increasing the number of sustain pulses. Further, instead of the number of subfields and sustain pulses, the address time may be increased to achieve stable operation.

  In the above description, the example in which the sustain driver and the scan driver are configured with the number of blocks being 2 is shown. However, the present invention is not limited to this, and the same driving can be performed in 4 divisions, 6 divisions, 8 divisions, or the like. it can. Further, although the number of subfields is 8 to 9, it is not limited to this.

(Embodiment 2)
FIG. 8 is a timing chart for explaining block driving in the PDP driving method according to the second embodiment which is an embodiment of the present invention. Here, the schematic configuration of the PDP is the same as that shown in FIG.

  The basic operation of the block drive is the same as that of the first embodiment, and the operation of switching the drive method between the block drive and the normal drive is performed according to the time width of the sustain pulse existence period within the sustain period. In the first half of the subfield, block driving is performed, and each operation is executed while being shifted in time. In the latter half of the subfield, addresses are sequentially executed as in normal driving, and setup is also executed in a block.

  The difference from the first embodiment is that the sustain operation is performed in block units even in the latter half of the subfield, and is executed with a time shift. Since the maintenance operation can be performed simultaneously with the address operation and the setup operation of other blocks, it is not necessary to perform the collective operation for all the blocks. For this reason, in the block A of FIG. 8, the maintenance operation is started immediately after the address operation is completed. According to this driving method, since the time from the address operation to the start of the sustain operation is shorter than when the operation is performed simultaneously with the sustain operation of block B, the sustain light emission can be performed stably.

  As described above, the number of subfields can be increased by performing the operation of switching the driving method between the block driving and the normal driving according to the time width of the sustain pulse existence period in the sustain period. Furthermore, by performing the sustain operation immediately after the end of the address operation, it is possible to stably perform the sustain light emission. As a result, stable operation can be realized in addition to high gradation.

  Further, as a method of effectively using time, not only the number of subfields may be increased as described above, but also the luminance may be improved by increasing the number of sustain pulses. Further, instead of the number of subfields and sustain pulses, the address time may be increased to achieve stable operation.

  In the above description, the example in which the sustain driver and the scan driver are configured with the number of blocks being 2 is shown. However, the present invention is not limited to this, and the same driving can be performed in 4 divisions, 6 divisions, 8 divisions, or the like. it can. Further, although the number of subfields is 8 to 9, it is not limited to this.

(Embodiment 3)
FIG. 9 is a timing chart for explaining block driving in the PDP driving method according to the third embodiment which is an embodiment of the present invention. Here, the schematic configuration of the PDP is the same as that shown in FIG.

  The basic operation of the block drive is the same as that of the first embodiment, and the operation of switching the drive method between the block drive and the normal drive is performed according to the time width of the sustain pulse existence period within the sustain period.

  In the first and second embodiments so far, with respect to the number of sustain pulses, a driving method is adopted in which the weight of the number of pulses is reduced (the number of pulses is reduced) as the number of subfields increases. In this embodiment, the case where the number of sustain pulses is increased as the number of subfields increases is described. Also in this case, the block driving method is the same, and normal driving is performed because the number of sustain pulses is small in the first subfield. Since the time width of the sustain pulse existence period becomes longer than the setup period after subfield 5, each operation is driven while being shifted in time between the blocks. That is, the driving method is such that the first half of the subfield is normal driving and the second half is block driving.

  In subfield 5, which is switching between normal driving and block driving, the respective operation timings are adjusted. Specifically, the sustain period of block A overlaps with the address period of block B. In the subfield 5, since the sustain pulse existence period of the block A is smaller than the address period, it is established because the sustain period is within the sustain period. Thereafter, a period during which a certain block performs the maintenance operation and the setup operation is assigned to the maintenance period of the other block. At this time, a total of 9 subfields can be driven.

  As described above, in the driving method in which the weight of the sustain pulse is increased (the number of sustain pulses is increased), the drive method is the block drive and the normal drive according to the duration of the sustain pulse existing period in the sustain period. It is possible to increase the number of subfields by performing the operation of switching to. As a result, the number of subfields can be increased, and the gradation can be improved.

  Further, as described in the second embodiment, the sustain operation may be executed immediately after the end of the address operation in the block A, instead of performing the sustain operation for each block in the first half of the normal driving period.

  As a method of effectively using time, not only the number of subfields may be increased as described above, but the luminance may be improved by increasing the number of sustain pulses, and the address time is increased for stable operation. May be.

  Further, as described in the second embodiment, in the block driving in the latter half of the subfield, the sustaining light emission can be stably performed by executing the sustaining operation immediately after the end of the addressing operation. In this case, stable operation can be realized in addition to high gradation.

  As described above, according to the driving method of the plasma display panel of the present invention, it is possible to provide a driving method of the plasma display panel that can increase the luminance and the gradation by increasing the number of subfields. It is.

1 is a cross-sectional perspective view showing a schematic configuration of a plasma display panel driven by a plasma display panel driving method according to an embodiment of the present invention. Sectional drawing which shows the schematic structure of the discharge cell in FIG. 1 typically The block diagram which shows schematic structure of the drive device which performs the drive method of the plasma display panel by one embodiment of this invention 1 is a timing chart for explaining a driving method of a plasma display panel according to an embodiment of the present invention. Similarly, a timing chart for explaining a method of driving a plasma display panel according to an embodiment of the present invention. Similarly, a timing chart for explaining a method of driving a plasma display panel according to an embodiment of the present invention. Similarly, a timing chart for explaining a method of driving a plasma display panel according to an embodiment of the present invention. Similarly, a timing chart for explaining a method of driving a plasma display panel according to an embodiment of the present invention. Similarly, a timing chart for explaining a method of driving a plasma display panel according to an embodiment of the present invention.

Explanation of symbols

1 Plasma display panel (PDP)
4 Scan electrode 5 Sustain electrode 6 Row electrode 11 Address electrode (column electrode)
16 discharge cells

Claims (3)

A plurality of row electrodes extending in the row direction to form display lines, a plurality of column electrodes arranged to intersect the row electrodes, and a discharge space forming a light emitting unit at a position where the column electrodes and the row electrodes intersect with each other In the method of driving a plasma display panel provided with a plurality of row electrodes, a plurality of row electrodes are divided into a plurality of block units. In each block, one field period is divided into a plurality of subfields. The address operation and the maintenance operation are executed separately, and the address operation is executed so as to overlap the maintenance operation of the other block, and the setup operation of the block and the setup operation of the other block are executed while being shifted in time. Both the section and the section in which the setup operation of the block and the setup operation of another block are overlapped The driving method of a plasma display panel, characterized by. The setup operation of a block and the setup operation of another block are overlapped and executed in a subfield in which the setup period in which the setup operation is being performed is longer than the sustain pulse existence period in which the sustain operation is being performed. Item 8. A driving method of a plasma display panel according to Item 1. 2. The method of driving a plasma display panel according to claim 1, wherein the sustain operation is started immediately after the end of the address period during which the address operation is performed.

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