JP2005295679A - Motor driving apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a motor driving apparatus for applying a driving voltage to a motor through a power supply line, capable of bidirectionally transmitting a signal related to an output from a sensor provided in the motor and a signal related to an input to a sensor section for controlling an operation of the sensor through the power supply line. <P>SOLUTION: A transmission circuit 5 detects a rise of the driving voltage V, generates a synchronization signal P1, modulates a transmitted bit sequence by a modulation circuit (54) in synchronization with the synchronization signal P1, and transmits it through the power supply line 3. The transmission circuit 8 detects a fall of the driving voltage V, generates a synchronization signal P3, modulates a transmitted bit sequence by a modulation circuit (84) in synchronization with the synchronization signal P3, and transmits it through the power supply line 3. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention provides a motor drive having a transmission circuit and a reception circuit for bidirectionally transmitting / receiving signals related to the input and output of a sensor unit provided in the motor to a power supply line for supplying power to the motor. Relates to the device.

  A brushless DC motor is used for a motor mounted on a vehicle. The brushless DC motor is connected via a three-phase power line to a motor drive circuit that converts a DC supplied from a battery mounted on a vehicle into a three-phase AC. The motor drive circuit includes a PWM inverter drive circuit that controls the output of the motor by controlling the length of the pulse width of the drive voltage for driving the motor.

  The transmission circuit provided in the motor drive device transmits a signal related to the rotation angle of the rotor of the motor to the reception circuit via the power line by a resolver or a hall element provided in the motor, and the motor drive device The provided receiving circuit receives the transmitted signal and outputs the received signal to the motor driving circuit. The brushless DC motor is driven by controlling the pulse width of the rectangular waveform driving voltage supplied from the motor driving circuit based on the signal.

  Further, a signal related to the abnormal temperature inside the electric motor detected by the temperature sensor is transmitted to the motor drive circuit to stop the electric motor.

In order to transmit a signal to the motor drive circuit, a signal line for transmitting the signal to the motor drive circuit is required separately from the power supply line. In addition to the power supply line, the signal line is connected to the motor and the motor drive circuit. If it is provided between the two, the number of harnesses increases and the weight of the vehicle cannot be reduced. Therefore, a signal is transmitted via the power line without using a signal line (see Patent Document 1).
JP 2003-174787 A

  However, in the configuration of Patent Document 1, when performing a diagnostic test for diagnosing whether or not the sensor provided in the motor operates normally, or if an abnormality of the sensor is detected, the backup In order to transmit a signal for controlling the sensor from the motor drive circuit to the sensor unit having the sensor when switching to the sensor, a signal line is required separately from the power line. In addition, since the drive voltage for driving the motor via the power supply line has a rectangular waveform with a steep rise and fall, the signal transmitted via the power supply line at the rise and fall of the drive voltage Noise greater than the voltage level may occur. For this reason, when the signal is transmitted through the power line, noise is superimposed on the signal, and the reception circuit may not be able to receive the transmitted signal separately from the noise.

  The present invention has been made in view of such circumstances, and bidirectionally transmits and receives signals related to the output of the sensor provided in the motor and the input of the sensor unit that controls the operation of the sensor via the power supply line. It is an object of the present invention to provide a motor drive device that can be used.

  Another object of the present invention is to provide a motor drive device capable of transmitting signals bidirectionally by transmitting and receiving signals transmitted and received in both directions via different power supply lines.

  Another object of the present invention is to provide a motor drive device capable of transmitting signals in both directions by conveying the signals transmitted and received in both directions to carrier waves having different frequencies and transmitting them. It is in.

  Another object of the present invention is to provide a motor driving device capable of transmitting signals bidirectionally by transmitting each signal transmitted and received bidirectionally in a time-sharing manner.

  Another object of the present invention is to provide a motor drive apparatus that can transmit a signal and a reception result of the signal bidirectionally by including a determination unit that determines whether there is an error in the received signal. There is.

  Another object of the present invention is to provide a motor drive device capable of bidirectionally transmitting a received signal and a retransmission request signal when there is an error in the received signal.

  Another object of the present invention is to provide a motor drive device capable of transmitting a received signal and a confirmation signal bidirectionally when there is no error in the received signal.

  A motor driving device according to a first aspect of the present invention transmits a motor driving circuit for applying a driving voltage to a motor via a plurality of power lines, and a signal related to an output of a sensor provided in the motor via the power lines. Controlling the operation of the sensor in a motor drive device comprising: a first transmission circuit; and a first reception circuit that receives the signal via the power line and outputs the received signal to the motor drive circuit. A sensor unit to which a signal to be input is input, a second transmission circuit that transmits a signal related to the input to the sensor unit via the power line, and a signal received via the power line to the sensor unit And a second receiving circuit for outputting.

  In the motor drive device of the second invention, the second transmission circuit and the second reception circuit are connected to a power line different from the power line to which the first transmission circuit and the first reception circuit are connected. It is characterized by being.

  In the motor drive device of the third invention, the first and second transmission circuits have a carrier circuit that generates a carrier wave that carries a signal, and the frequency of the carrier wave of the signal transmitted by the second transmission circuit is: The first transmission circuit is different in frequency from a carrier wave of a signal transmitted.

  In the motor drive device according to a fourth aspect of the invention, the motor drive circuit is adapted to apply a rectangular drive voltage, and the first and second transmission circuits are synchronized with the rise or fall of the drive voltage. The signal transmitted from the first transmission circuit and the signal transmitted from the second transmission circuit are to be transmitted in a time division manner.

  In the motor drive device of the fifth invention, the first transmission circuit includes a signal generation circuit that generates a signal including a code to be transmitted and an error detection code, and the first reception circuit is configured to receive the received signal. A determination unit configured to determine whether or not there is an error, wherein the second transmission circuit is configured to transmit a response signal to the second reception circuit via the power line in accordance with a determination result of the determination unit; It is characterized by being.

  In the motor drive device according to the sixth aspect of the present invention, when there is an error in the signal received by the first receiving circuit, the response signal is a retransmission request signal for retransmitting the signal transmitted by the first transmitting circuit. It is characterized by.

  In the motor drive device of the seventh invention, when there is no error in the signal received by the first receiving circuit, the response signal indicates that the signal transmitted by the first transmitting circuit has been normally received. It is a confirmation signal.

  In the first invention, the second transmission circuit transmits a signal related to the input of the sensor unit that controls the operation of the sensor provided in the motor via the power supply line, and the second reception circuit The transmitted signal is received, and the received signal is output to the sensor unit.

  In the second invention, the first transmission circuit transmits a signal related to the output of the sensor via one power supply line, and the first reception circuit receives the transmitted signal. The second transmission circuit transmits a signal related to the input of the sensor unit via another power supply line, and the second reception circuit receives a signal transmitted via the other power supply line.

  In the third invention, the first transmission circuit transmits a signal using a carrier wave having one frequency, and the first reception circuit receives the carrier wave including the transmitted signal and demodulates the signal. And receive. The second transmission circuit transmits a signal using a carrier wave having a frequency different from the one frequency, and the second reception circuit receives a carrier wave including the transmitted signal and demodulates and receives the signal. .

  In the fourth aspect of the invention, the rising or falling of the driving voltage having a rectangular waveform that fluctuates at a predetermined frequency is detected, and the first and second transmission circuits transmit signals in synchronization with the fluctuation of the driving voltage. The signal is transmitted in both directions by separating the period to be time-divided.

  In the fifth invention, the first transmission circuit transmits a signal including a code to be transmitted and an error detection code via the power supply line, and the first reception circuit receives the transmitted signal, An error of the received signal is determined based on an error detection code included in the received signal, and the determination result is output to the second transmission circuit. The second transmission circuit transmits a response signal to the second reception circuit via a power line in accordance with the determination result. The second reception circuit outputs the received response signal to the first transmission circuit.

  In the sixth invention, when the signal received by the first receiving circuit has an error, the first transmitting circuit is requested to retransmit the signal.

  In the seventh invention, when there is no error in the signal received by the first receiving circuit, a confirmation signal indicating that the signal has been normally received is transmitted to the first transmitting circuit.

  In the first invention, a signal related to the output of the sensor and a signal related to the input of the sensor unit for controlling the operation of the sensor can be transmitted bidirectionally via the power line.

  In the second invention, signals can be transmitted in both directions using carrier waves having the same frequency by transmitting signals to be transmitted in both directions via different power supply lines.

  In the third aspect of the invention, the signal can be transmitted in both directions even when the signal is transmitted through the same power line.

  In the fourth invention, even when a signal is transmitted through the same power line, the signal can be transmitted bidirectionally using a carrier wave having the same frequency.

  In the fifth invention, the transmitted signal and the reception result can be transmitted in both directions, and the transmission circuit that has transmitted the signal can confirm the transmission result.

  In the sixth aspect of the invention, when a signal is transmitted through a power line, noise is superimposed on the signal, and even when the transmitted signal cannot be received separately from the noise, the signal is transmitted again. Can be received.

  In the seventh invention, when the signal is transmitted through the power supply line, it can be confirmed that the signal is normally received.

Embodiment 1
FIG. 1 is a block diagram showing a schematic configuration of a motor driving apparatus using a PWM inverter system of the present invention. In the figure, reference numeral 1 denotes a motor drive circuit that converts direct current into three-phase alternating current. In the motor drive circuit 1, the emitters of the transistors T1, T2, and T3 are connected to the positive terminal of the battery 11, the collectors of the transistors T1, T2, and T3 are connected to the collectors of the transistors T4, T5, and T6, respectively. The emitters of T5 and T6 have a configuration connected to the negative terminal of the battery 11.

  Each of the collectors of the transistors T1, T2, and T3 is connected to one end of each power line 3 for three-phase alternating current, and the other end of each power line 3 is connected to each three-phase terminal U, V, and W of the motor 2. Yes.

  The motor 2 has a stator in which armature windings connected to the three-phase terminals U, V, and W are arranged, and has a field winding inside the stator and rotates around the motor shaft. With a rotor. A sensor unit 4 is connected to the motor 2, and the sensor unit 4 includes resolvers 41 and 41 that detect the rotation angle of the rotor. The resolver 41 outputs a voltage signal having a phase corresponding to the rotation angle of the rotor to the sensor unit 4.

  In the sensor unit 4, the phase difference calculation unit 42 calculates the phase difference between the phase of the voltage signal input from the resolver 41 and the reference signal determined by the angle formed by the rotor and the stator. A pulse signal having a frequency corresponding to is output to the counter 43.

  The counter 43 generates a digital signal corresponding to the position of the rotor by counting the pulse signal input from the phase difference calculation unit 42 and outputs the digital signal to the transmission circuit 5.

  The diagnosis unit 44 outputs a signal for diagnosis of the resolver 41 to the resolver 41 in accordance with a digital signal input from the receiving circuit 9 described later, acquires the signal output from the resolver 41, and the resolver 41 Check if it works properly.

  Based on the result of the diagnosis performed by the diagnosis unit 44, the selection unit 45 disconnects the resolver 41 in which the failure has occurred and switches to the backup resolver 41 when the failure occurs in the resolver 41.

  FIG. 2 is a block diagram showing the configuration of the transmission circuit 5 and the reception circuit 6. In the figure, the buffer 51 temporarily holds the digital signal input from the sensor unit 4 and outputs the held digital signal to the communication control circuit 52.

  The synchronization circuit 53 is connected to the motor side of the power line 3. The drive voltage V is output to the synchronization circuit 53 via the power line 3. The drive voltage V transitions between Ed, which is the voltage of the battery 11, and zero, which is the ground level, according to the on / off states of the transistors T1, T2, T3, T4, T5, and T6 in the motor drive circuit 1. It becomes a square wave. The frequency of the driving voltage V is 10 kHz.

  The synchronization circuit 53 detects the rising time of the input drive voltage V, generates a synchronization signal P1, and outputs it to the communication control circuit 52. Accordingly, the synchronization signal P1 is repeatedly output to the communication control circuit 52 in synchronization with the rise of the drive voltage V.

  The communication control circuit 52 adds a parity bit to the data bit string of the digital signal read from the buffer 51, adds a start bit and a stop bit before and after the data bit, and generates a signal that forms a frame as one transmission unit. Each time a synchronization signal P1 input from the synchronization circuit 53 is detected, one bit constituting the frame is output to the modulation circuit 54.

  The carrier circuit 55 generates a carrier B having a frequency of 1 MHz and outputs it to the modulation circuit 54.

  The modulation circuit 54 outputs a signal obtained by ASK modulating the carrier wave B input from the carrier wave circuit 55 to the amplifier circuit 56 in accordance with the data for each bit input from the communication control circuit 52. That is, when the bit data input from the communication control circuit 52 has a logical value “1”, the modulation circuit 54 outputs the carrier wave B to the amplifier 56 as it is, and the bit data input from the communication control circuit 52 is logically output. When the value is “0”, the carrier wave B is not output to the amplifier circuit 56, and a signal subjected to ASK modulation according to the bit data is output to the amplifier circuit 56.

  The amplifier circuit 56 is connected to the power supply line 3, amplifies the signal input from the modulation circuit 54, and sends it to the power supply line 3. The receiving circuit 6 is connected to the power line 3 and receives a signal transmitted through the power line 3.

  The synchronization circuit 61 is connected to the motor drive circuit side of the power line 3. The drive voltage V is output to the synchronization circuit 61 via the power line 3. The synchronization circuit 61 generates a synchronization signal P <b> 2 that detects the rising time of the input drive voltage V and outputs it to the demodulation circuit 62. Thus, the synchronization signal P2 is repeatedly output to the demodulation circuit 62 in synchronization with the rise of the drive voltage V.

  The demodulation circuit 62 is connected to the power supply line 3 and receives a signal transmitted via the power supply line 3. Every time the synchronization signal P <b> 2 is input from the synchronization circuit 61, an envelope of the received ASK-modulated signal is received. Detection is performed, and an original digital signal that is a bit string signal is extracted from the modulated signal and demodulated, and the demodulated digital signal is output to the communication control circuit 63.

  The communication control circuit 63 determines whether or not data can be received from the input bit string in units of frames without error. First, start bits and stop bits constituting a frame are extracted, whether or not predetermined start bits and stop bits are received, and whether or not there is a frame error indicating whether or not data has been received in units of frames. judge. Further, the presence or absence of a parity error is determined by determining the parity bit added to the data bit. The communication control circuit 63 outputs the determination result to the transmission circuit 8 described later.

  If the communication control circuit 63 determines that there is no error in the received bit string, the communication control circuit 63 outputs a digital signal composed of data bits to the buffer 64.

  The buffer 64 temporarily holds the digital signal input from the communication control circuit 63 and outputs the held digital signal to the control circuit 7.

  The control circuit 7 includes a position calculation unit 71, a pulse drive unit 72, and a sensor control unit 73. The position calculation unit 71 calculates the position of the rotor of the motor 2 by comparing the digital signal read from the receiving circuit 6 with a predetermined reference value, and pulse-drives the input signal corresponding to the calculated position. To the unit 72.

  The pulse driving unit 72 compares the amplitude of the input signal and the carrier signal with a comparator (modulator) based on the input signal input from the position calculating unit 71 and the carrier signal generated in the pulse driving unit 72. Then, a pulse signal for determining which transistor T 1, T 2, T 3, T 4, T 5, or T 6 in the motor drive circuit 1 is turned on or off is output to the motor drive circuit 1 depending on the magnitude. Accordingly, the armature winding is configured to generate a magnetic field for rotationally driving the rotor in accordance with the magnetic field of the rotor that changes corresponding to the position of the rotor input from the position calculation unit 71. Apply motor drive current. That is, depending on the position of the rotor, the transistors T1, T2, T3, T4, T5, and T5 of the motor drive circuit 1 are configured to pass a motor drive current through the armature winding in order to apply torque to the rotor. Alternatively, by controlling on / off of T6, torque is continuously applied to the rotor and the motor 2 is rotated.

  The sensor control unit 73 outputs a digital signal including information such as parameter information for diagnosis and commands used by the diagnosis unit 44 in the sensor unit 4 to the transmission circuit 8.

  FIG. 3 is a block diagram showing the configuration of the transmission circuit 8 and the reception circuit 9. The transmission circuit 8 has the same configuration as the transmission circuit 5, and the operations of the buffer 81, the communication control circuit 82, the synchronization circuit 83, the modulation circuit 84, the carrier wave circuit 85, and the amplification circuit 86 are the buffer 51 and the communication control circuit 52. The operations of the synchronization circuit 53, the modulation circuit 54, the carrier circuit 55, and the amplification circuit 56 are the same.

  The buffer 81 temporarily holds the digital signal input from the control circuit 7 and outputs the held digital signal to the communication control circuit 82.

  The synchronization circuit 83 is connected to the motor drive circuit side of the power line 3. The drive voltage V is output to the synchronization circuit 83 via the power line 3. The synchronization circuit 83 generates a synchronization signal P3 that is detected when the input drive voltage V falls, and outputs the synchronization signal P3 to the communication control circuit 82. Accordingly, the synchronization signal P3 is repeatedly output to the communication control circuit 82 in synchronization with the fall of the drive voltage V.

  The communication control circuit 82 adds a parity bit to the data bit string of the digital signal read from the buffer 81, and further adds a start bit and a stop bit before and after the data bit to generate a frame that is one transmission unit. Each time the synchronization signal P3 input from the synchronization circuit 83 is detected, one bit constituting the frame is output to the modulation circuit 84.

  Further, the communication control circuit 82 receives a determination result indicating the presence / absence of a frame error and a parity error determined by the communication control circuit 63 in the reception circuit 6, generates a response signal corresponding to the determination result as a digital signal, and modulates the modulation circuit 84. Output to. For example, when there is no frame error or parity error, the bit string “10” is used as a confirmation signal. When a frame error or parity error is detected, the same signal as the transmitted signal is used as a retransmission request signal for requesting transmission again. , The bit string “11” is output.

  The carrier circuit 85 generates a carrier wave B having a frequency of 1 MHz and outputs it to the modulation circuit 84.

  The modulation circuit 84 outputs to the amplifier circuit 86 a signal obtained by ASK-modulating the carrier wave B input from the carrier wave circuit 85 in accordance with the data for each bit input from the communication control circuit 82. The amplifier circuit 86 is connected to the power supply line 3, amplifies the signal input from the modulation circuit 84, and sends it to the power supply line 3. The receiving circuit 9 is connected to the power line 3 and receives a signal transmitted via the power line 3.

  The receiving circuit 9 has the same configuration as the receiving circuit 6, and the operations of the synchronizing circuit 91, the demodulating circuit 92, the communication control circuit 93, and the buffer 94 are the synchronizing circuit 61, the demodulating circuit 62, the communication control circuit 63, and the buffer. This is the same as the operation 64.

  The synchronization circuit 91 is connected to the motor side of the power line 3. The drive voltage V is output to the synchronization circuit 91 through the power line 3. The synchronization circuit 91 generates a synchronization signal P4 that is detected when the input drive voltage V falls, and outputs the synchronization signal P4 to the demodulation circuit 92. Thus, the synchronization signal P4 is repeatedly output to the demodulation circuit 92 in synchronization with the fall of the drive voltage V.

  The demodulation circuit 92 is connected to the power supply line 3 and receives a signal transmitted via the power supply line 3, and each time the synchronization signal P4 is input from the synchronization circuit 91, an envelope of the received ASK-modulated signal Detection is performed, and an original digital signal that is a bit string signal is extracted from the modulated signal and demodulated, and the demodulated digital signal is output to the communication control circuit 93.

  The communication control circuit 93 determines whether or not data can be received from the input bit string in units of frames without error. First, a start bit and a stop bit constituting a frame are extracted, and it is determined whether or not there is a frame error indicating whether data is received in units of frames. Further, the presence or absence of a parity error is determined by determining the parity bit added to the data bit. The communication control circuit 93 outputs the determination result to the transmission circuit 5.

  If the communication control circuit 93 determines that there is no error in the received bit string, the communication control circuit 93 outputs a digital signal composed of data bits to the buffer 94.

  When the received signal is a retransmission request signal transmitted by the transmission circuit 8, the communication control circuit 93 outputs the retransmission request signal to the transmission circuit 5. Thereby, the transmission circuit 5 transmits the same signal as the transmitted signal again in units of frames. Further, when the received signal is a confirmation signal transmitted by the transmission circuit 8, the communication control circuit 93 outputs the confirmation signal to the transmission circuit 5.

  The buffer 94 temporarily holds the digital signal input from the communication control circuit 93 and outputs the held digital signal to the sensor unit 4.

  Next, the operation of the motor drive device will be described. FIG. 4 is an explanatory diagram showing an example of a transmission operation for transmitting a signal bidirectionally. As shown in the figure, by turning on and off the transistor in the motor drive circuit 1, a rectangular wave that transitions between the voltage Ed of the battery 11 and the ground level zero is generated on the power line 3. A drive voltage V is generated.

  In the transmission circuit 5, the synchronization circuit 53 detects the rising time of the drive voltage V and outputs a synchronization signal P 1 to the communication control circuit 52. Since the frequency of the driving voltage V is 10 kHz, the synchronization signal P1 is output every 0.1 milliseconds. When the period during which the driving voltage V is the voltage Ed and the period during which the driving voltage V is at the ground level are equal, the driving voltage V is The time for the voltage Ed is 0.05 milliseconds.

  When the synchronization signal P1 is input, the communication control circuit 52 outputs 1 bit constituting the frame to the modulation circuit 54. The bit length to be transmitted is set to a value shorter than the time during which the drive voltage V is the voltage Ed. As a result, the transmission circuit 5 can transmit a 1-bit signal during a period in which the drive voltage V is the voltage Ed.

  The modulation circuit 54 outputs to the amplifier circuit 56 a signal obtained by ASK modulating the carrier wave B input from the carrier wave circuit 55 in accordance with the data for each bit input from the communication control circuit 52.

  The amplifier circuit 56 amplifies the signal input from the modulation circuit 54 and sends it to the power supply line 3. As a result, the signal S1 transmitted from the transmission circuit 5 is transmitted via the power supply line 3 while being superimposed on the drive voltage V in a period in which the drive voltage V is the voltage Ed.

  In the reception circuit 6, the synchronization circuit 61 detects the rising time of the drive voltage V and outputs the synchronization signal P <b> 2 to the demodulation circuit 62.

  Each time the synchronization signal P2 is input from the synchronization circuit 61, the demodulation circuit 62 performs envelope detection of the received ASK modulated signal, and extracts the original digital signal that is a bit string signal from the modulated signal. The demodulated digital signal is output to the communication control circuit 63.

  The communication control circuit 63 determines whether or not data can be received from the input bit string in units of frames without error. Further, the presence or absence of a parity error is determined by determining the parity bit added to the data bit. The communication control circuit 63 outputs the determination result to the transmission circuit 8. If the communication control circuit 63 determines that there is no error in the received bit string, the communication control circuit 63 outputs a digital signal composed of data bits to the buffer 64.

  The buffer 64 temporarily holds the digital signal input from the communication control circuit 63 and outputs the held digital signal to the control circuit 7.

  On the other hand, in the transmission circuit 8, the synchronization circuit 83 detects the fall of the drive voltage V and outputs a synchronization signal P 3 to the communication control circuit 82. Since the frequency of the driving voltage V is 10 kHz, the synchronization signal P3 is output every 0.1 milliseconds. When the period during which the driving voltage V is the voltage Ed and the period during which the driving voltage V is at the ground level are equal, the driving voltage V is The time at the ground level is 0.05 milliseconds.

  When the synchronization signal P3 is input, the communication control circuit 82 outputs one bit constituting the frame to the modulation circuit 84. The bit length to be transmitted is set to a value shorter than the time during which the drive voltage V is at the ground level. As a result, the transmission circuit 8 can transmit a 1-bit signal during the period when the drive voltage V is at the ground level.

  The modulation circuit 84 outputs a signal obtained by ASK-modulating the carrier wave B input from the carrier wave circuit 85 to the amplifier circuit 86 in accordance with the data for each bit input from the communication control circuit 82.

  The amplifier circuit 86 amplifies the signal input from the modulation circuit 84 and sends it to the power supply line 3. Accordingly, the signal S2 transmitted from the transmission circuit 8 is transmitted via the power supply line 3 while being superimposed on the drive voltage V during a period in which the drive voltage V is at the ground level.

  In the receiving circuit 9, the synchronizing circuit 91 detects when the driving voltage V falls, and outputs a synchronizing signal P 4 to the demodulating circuit 92.

  Each time the synchronization signal P4 is input from the synchronization circuit 91, the demodulation circuit 92 performs envelope detection of the received ASK-modulated signal, and extracts the original digital signal that is a bit string signal from the modulated signal. The demodulated digital signal is output to the communication control circuit 93.

  The communication control circuit 93 determines whether or not data can be received from the input bit string in units of frames without error. Further, the presence or absence of a parity error is determined by determining the parity bit added to the data bit. The communication control circuit 93 outputs the determination result to the transmission circuit 5. If the communication control circuit 93 determines that there is no error in the received bit string, the communication control circuit 93 outputs a digital signal composed of data bits to the buffer 94.

  When the received signal is a retransmission request signal transmitted by the transmission circuit 8, the communication control circuit 93 outputs the retransmission request signal to the transmission circuit 5. Thereby, the transmission circuit 5 transmits the same signal as the transmitted signal again in units of frames. Further, when the received signal is a confirmation signal transmitted by the transmission circuit 8, the communication control circuit 93 outputs the confirmation signal to the transmission circuit 5. Thereby, the transmission circuit 5 performs the process of transmitting again because the confirmation signal cannot be received. Considering the case where the confirmation signal is lost due to the noise of the motor power line due to motor drive, etc., it is preferable to transmit again because the confirmation signal cannot be received. is there.

  The buffer 94 temporarily holds the digital signal input from the communication control circuit 93 and outputs the held digital signal to the sensor unit 4.

  As described above, the transmission circuit 5 and the transmission circuit 8 generate a synchronization signal corresponding to the rise or fall of the drive voltage V, and the transmission circuit 5 transmits the signal S1 during the period in which the drive voltage V is the voltage Ed. The transmission circuit 8 can transmit the signal in a time-sharing manner in response to the rise or fall of the drive voltage V by transmitting the signal S2 while the drive voltage V is at the ground level.

  In the first embodiment, the digital signal for one bit is transmitted between the rising time and the falling time of the driving voltage V or between the falling time and the rising time. However, the present invention is not limited to this, and a plurality of bits are transmitted. The structure to do is sufficient. In this case, the bit rate and data bit length of the signal to be transmitted can be set corresponding to the frequency of the drive voltage V.

Embodiment 2
In the first embodiment, the signal is transmitted bidirectionally using the period of the voltage Ed level and the ground level of the drive voltage V. However, the period of the ground level of the drive voltage V is time-divided, It is also possible to transmit signals in both directions. FIG. 5 is an explanatory diagram showing a transmission operation for transmitting a signal bidirectionally.

  Since the configurations of the transmission circuits 5 and 8 and the reception circuits 6 and 9 are the same as those in the first embodiment, description thereof will be omitted and the transmission operation will be described. As shown in FIG. 5, by turning on and off the transistor in the motor drive circuit 1, a rectangular wave that transitions between Ed, which is the voltage of the battery 11, and zero, which is the ground level, on the power line 3. Drive voltage V is generated.

  In the transmission circuit 5, the synchronization circuit 53 detects the rising time of the drive voltage V and outputs a synchronization signal P <b> 11 to the communication control circuit 52. Further, when the driving voltage V falls, the synchronization signal P12 is output to the communication control circuit 52.

  When the synchronization signal P <b> 11 is input, the communication control circuit 52 outputs a bit string (for example, “11”) that constitutes a frame signal indicating the start of transmission of a frame unit signal to the modulation circuit 54. The 1-bit length to be transmitted is set to a value shorter than the time during which the drive voltage V is the voltage Ed, as in the first embodiment.

  The modulation circuit 54 performs ASK modulation on the frame signal input from the communication control circuit 52 and outputs the result to the amplification circuit 56. The amplifier circuit 56 amplifies the frame signal input from the modulation circuit 54 and sends it to the power supply line 3.

  After outputting the frame signal to the modulation circuit 54, the communication control circuit 52 outputs 1-bit data to the modulation circuit 54 every time the synchronization signal P12 is input, and a total of 3 bits of data to the modulation circuit 54. Output.

  The modulation circuit 54 performs ASK modulation according to the data for each bit input from the communication control circuit 52 and outputs the result to the amplification circuit 56. The amplification circuit 56 amplifies the signal input from the modulation circuit 54 and sends the transmission signal S10 to the power supply line 3. Thereby, the frame signal from the transmission circuit 5 is transmitted while being superimposed on the drive voltage V during the period when the drive voltage V is the voltage Ed, and the transmission signal S10 is transmitted during the period when the drive voltage V is at the ground level. Is transmitted superimposed on.

  In the reception circuit 6, the synchronization circuit 63 detects the rise of the drive voltage V and outputs a synchronization signal P 21 to the demodulation circuit 62. Further, when the driving voltage V falls, the synchronization signal P22 is output to the demodulation circuit 62. Thereby, the demodulation circuit 62 demodulates the frame signal and the transmission signal S10 according to the synchronization signals P21 and P22, and outputs the demodulated signal to the communication control circuit 63.

  When the communication control circuit 63 confirms that there is no frame error and acquires 3 bits of data from the transmission signal S10, the communication control circuit 63 outputs a reception confirmation signal indicating that the transmission signal S10 has been received to the transmission circuit 8.

  The synchronization circuit 83 generates a synchronization signal P31 that is detected when the input drive voltage V falls, and outputs it to the communication control circuit 82. Thereby, the synchronization signal P31 is repeatedly output to the communication control circuit 82 in synchronization with the fall of the drive voltage V.

  When receiving the reception confirmation signal from the reception circuit 6, the communication control circuit 82 reads out data for 3 bits from the buffer 81, and outputs data for each bit to the modulation circuit 84 every time the synchronization signal P <b> 31 is input.

  The modulation circuit 84 outputs a signal obtained by ASK-modulating the carrier wave B input from the carrier wave circuit 85 to the amplification circuit 86 in accordance with the data for each bit input from the communication control circuit 82. The amplification circuit 86 The signal input from the circuit 84 is amplified and the transmission signal S20 is sent to the power supply line 3.

  As described above, the transmission circuit 5 transmits a frame signal indicating the start of signal transmission during a period in which the drive voltage V is the voltage Ed, and then transmits a 3-bit data in a period in which the drive voltage V is at the ground level. S10 is transmitted. On the other hand, after the transmission signal S10 is transmitted, the transmission circuit 8 transmits a transmission signal S20 having 3-bit data during a period in which the drive voltage V is at the ground level. Thereby, the transmission circuit 5 and the transmission circuit 8 can transmit the signal in a time-sharing manner in response to the rise or fall of the drive voltage V.

  In the second embodiment, the number of bits of data to be transmitted is three bits. However, the number of bits is not limited to this and may be any number of bits. In addition, the number of bits of data transmitted in both directions does not have to be the same and may be different.

  In the first and second embodiments, the transmission circuit 5, the reception circuit 6, the transmission circuit 8, and the reception circuit 9 are connected to the same power line among the plurality of power lines 3. However, the transmission circuit 5 and the reception circuit 6 may be connected to one power line of the power line 3, and the transmission circuit 8 and the reception circuit 9 may be connected to another power line different from the one power line. In this case, since the signals transmitted to both sides are transmitted via different power lines, the signals transmitted in both directions are time-divisionally transmitted compared to the case where signals are transmitted via the same power line. Therefore, the configuration of the synchronization circuits 53, 61, 83, 91 and the like is not necessary, and the configurations of the transmission circuits 5, 8 and the reception circuits 6, 9 can be simplified.

  In the first and second embodiments, the modulation circuits 54 and 84 use the carrier wave B of 1 MHz. However, the present invention is not limited to this. For example, the modulation circuit 84 may modulate using a carrier wave of 5 MHz. Good. In this case, even when signals are transmitted bidirectionally via the same power line, the above-described configurations of the synchronization circuits 53, 61, 83, 91, etc. are not required, and the transmission circuits 5, 8 and the reception circuit 6, The configuration of 9 can be simplified.

  The signals transmitted and received in both directions via the power line are not limited, and any signal can be transmitted and received as long as it is a signal related to the operation of the motor.

It is a block diagram which shows schematic structure of the motor drive device using the PWM inverter system of this invention. It is a block diagram which shows the structure of a transmission circuit and a receiving circuit. It is a block diagram which shows the structure of a transmission circuit and a receiving circuit. It is explanatory drawing which shows an example of the transmission operation | movement which transmits a signal bidirectionally. It is explanatory drawing which shows an example of the transmission operation | movement which transmits a signal bidirectionally.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Motor drive circuit 2 Motor 3 Power supply line 4 Sensor part 5, 8 Transmission circuit 6, 9 Reception circuit 7 Control circuit 51, 64, 81, 94 Buffer 52, 63, 82, 93 Communication control circuit 53, 61, 83, 91 Synchronous circuit 54, 84 Modulator circuit 55, 85 Carrier circuit 56, 86 Amplifier 62, 92 Demodulator circuit

Claims (7)

A motor driving circuit for applying a driving voltage to the motor via a plurality of power supply lines; a first transmission circuit for transmitting a signal related to an output of a sensor provided in the motor via the power supply line; A motor driving device comprising: a first receiving circuit that receives the signal via a line and outputs the received signal to the motor driving circuit;
A sensor unit to which a signal for controlling the operation of the sensor is input;
A second transmission circuit for transmitting a signal related to an input to the sensor unit via the power line;
And a second receiving circuit that outputs a signal received via the power line to the sensor unit.   2. The second transmission circuit and the second reception circuit are connected to a power line different from a power line to which the first transmission circuit and the first reception circuit are connected. The motor drive device described in 1.   The first and second transmission circuits include a carrier circuit that generates a carrier wave that carries a signal, and the first transmission circuit transmits the frequency of the carrier wave of the signal transmitted by the second transmission circuit. The motor driving apparatus according to claim 1, wherein the motor driving apparatus is different from a frequency of a carrier wave of the signal. The motor driving circuit is adapted to apply a rectangular driving voltage,
The first and second transmission circuits should perform time-division transmission of a signal transmitted by the first transmission circuit and a signal transmitted by the second transmission circuit in synchronization with a rise or fall of the drive voltage. The motor driving apparatus according to claim 1, wherein the motor driving apparatus is provided. The first transmission circuit includes a signal generation circuit that generates a signal including a code to be transmitted and an error detection code,
The first receiving circuit includes a determination unit that determines whether there is an error in the received signal,
The second transmission circuit is configured to transmit a response signal to the second reception circuit via the power line in accordance with a determination result of the determination unit. Item 5. The motor driving device according to any one of Items 4 to 5.   6. The retransmission request signal for retransmitting the signal transmitted by the first transmission circuit when the signal received by the first reception circuit has an error. Motor drive device. When there is no error in the signal received by the first receiving circuit, the response signal is a confirmation signal indicating that the signal transmitted by the first transmitting circuit has been normally received. The motor drive device according to claim 5 or 6.

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