JP2005294534A - Through electrode structure, semiconductor substrate lamination module and through electrode forming method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a through electrode structure, a semiconductor substrate lamination module and a through electrode forming method which are capable of preventing the reflection of an electric signal or the disturbance of waveform of the electric signal, capable of eliminating unnecessary radiation, and capable of miniaturizing and highly increasing the density of a semiconductor device. <P>SOLUTION: The through electrode structure is provided with a semiconductor substrate 1 having a main surface 1a on which an element is to be mounted. A through hole 2 penetrating from the main surface 1a to a rear surface 1b is formed on the semiconductor substrate 1. A conductor 4 and a part of dielectric layers 7, 8 are entered into the through hole 2. A convex curved surface 2a is formed at one part of an opening at the main surface 1a side of the through hole 2, and a substantially right-angled part 2d is formed at the other part of the opening at the main surface 1a side of the through hole 2. Conductors 4, 5, 6 and dielectric layers 7, 8, 9 are formed on the semiconductor substrate 1 while the conductor 4 and one part of the dielectric layers 7, 8 are entered into the through hole 2. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a through electrode structure used in, for example, a semiconductor device having an operating frequency of several GHz to several tens of GHz.

  In recent years, the operating frequency has increased as the degree of integration of LSI (Large Scale Integrated Circuit) has improved. The clock frequency of the general-purpose processor exceeds 2 GHz.

  With the demand for downsizing and weight reduction of electronic devices and devices typified by mobile phones and portable information devices, downsizing and higher density of semiconductor devices are being promoted. A method for reducing the size and increasing the density of a semiconductor device is disclosed in, for example, Japanese Patent Application Laid-Open No. 10-223833 (Patent Document 1). In the above publication, a stacked structure in which a plurality of semiconductor substrates are stacked vertically is used for a semiconductor device. In the semiconductor device, the distance between adjacent semiconductor substrates in the vertical direction is as short as several tens to several hundreds of μm.

  By the way, when the operating frequency of the semiconductor device is increased, special consideration is required for the propagation of electrical signals in the circuit. That is, the electric signal has a strong wave property and needs to be handled as an electromagnetic wave. Like DC circuits and low-frequency AC circuits, conductors are not simply connected, but impedance matching is necessary to correctly propagate electrical signals, and wiring is performed without changing the path environment. There is a need to continue to.

  However, since the semiconductor device disclosed in Patent Document 1 has a structure in which the planar wiring portion on the semiconductor substrate and the through electrode penetrating the semiconductor substrate intersect at right angles, the electrical connection is made at the connection portion between the planar wiring portion and the through electrode. There arises a problem that the waveform of the signal is disturbed or an electric signal is reflected at the connection portion. Furthermore, the connection part causes a problem that part of the energy of the electric signal is radiated to the surroundings as unnecessary radiation.

  Further, in the semiconductor device of Patent Document 1, since the distance between a certain planar wiring portion and the planar wiring portion adjacent to the planar wiring portion in the vertical direction is close, the planar wiring and the through electrode intersect at a right angle. The structure causes malfunction of the circuit inside the device as an electromagnetic interference.

  Needless to say, the above problem occurs not only in a semiconductor device having a stacked structure having a plurality of semiconductor substrates but also in a semiconductor device having a single semiconductor substrate having through electrodes, and adversely affects other circuits inside the electronic device. .

  As a technique that can solve the above problem, for example, there is one disclosed in Japanese Patent Application Laid-Open No. 62-106629 (Patent Document 2). This publication describes a method of forming a through hole penetrating a semiconductor substrate.

  Hereinafter, the case where a through-hole is formed in a semiconductor substrate using the said formation method is demonstrated.

  First, as shown in FIG. 11A, a photoresist film 102 is formed on the surface of the semiconductor substrate 101.

  Next, as shown in FIG. 11B, an opening 111 for forming a through hole is formed in the photoresist film 102.

Next, isotropic etching is performed on the semiconductor substrate 101 by dry etching. When the semiconductor substrate 101 is made of Si, for example, plasma is generated using SF ₆ (sulfur hexafluoride) gas, and the semiconductor substrate 101 shown in FIG. 11B is exposed to the plasma. Then, side etching proceeds in the semiconductor substrate 101, and a hole 112 having a width wider than the opening 111 is formed in the semiconductor substrate 101 as shown in FIG.

Next, the semiconductor substrate 101 is subjected to anisotropic etching by dry etching. When the semiconductor substrate 101 is made of Si, plasma is generated using, for example, CCl ₄ (carbon tetrachloride) gas, and the semiconductor substrate 101 shown in FIG. Etching in the vertical direction is performed. As a result, a hole 113 shown in FIG. 11D is formed in the semiconductor substrate 101. The hole 113 includes a wide upper portion and a narrow lower portion continuous with the upper portion.

  Next, after removing the photoresist film 102, the back surface of the semiconductor substrate 101 is polished to obtain a through hole 114 shown in FIG.

  FIG. 12 is a schematic cross-sectional view of a semiconductor device using the through hole 114.

  In the semiconductor device, the bump electrode 140, the conductor 150, and the dielectric layers 170, 171, and 172 are formed on the semiconductor substrate 101. As a result, a part of the conductor 150 and the dielectric layer 170 enters the through hole 114 to form a through electrode. Since the inclined portion 112 is formed in the upper opening portion of the through hole 114 in the drawing, it seems that there is no portion bent at a right angle in the conductor 150.

  However, since the surface of the inclined portion 112 is curved in a concave shape, the conductor 150 has a portion bent at an angle close to a right angle, and the above problem cannot be solved (FIGS. 11C to 11). (See (e).)

  The surface of the inclined portion 112 is curved in a concave shape because the isotropic property of dry etching is used, so that etching proceeds at an equal distance from the opening end of the photoresist film in the depth direction and in the lateral direction. Because.

Further, when isotropic etching is performed to form the inclined portion 112, the etching proceeds isotropically, and a useless region 115 is generated on the semiconductor substrate 101. Since no semiconductor element or wiring can be formed in this region 115, the presence of the region 115 is not suitable for the purpose of downsizing and increasing the density of the semiconductor device, and such a region 115 is desired to be excluded. It is rare. In addition, when such a wiring straddling the region 115 is formed, a cross-sectional shape of the wiring is bent, and the wiring is not preferable in terms of electrical characteristics.
JP-A-10-223833 JP-A 62-106629

  Therefore, the object of the present invention is to prevent electrical signal reflection and electrical signal waveform from being disturbed, to eliminate unnecessary radiation, and to further reduce the size and increase the density of semiconductor devices. An electrode structure, a semiconductor substrate laminated module, and a through electrode forming method are provided.

In order to solve the above problem, the through electrode structure of the first invention is:
A semiconductor substrate having a main surface on which the element is to be mounted;
A through hole penetrating from the main surface to the back surface of the semiconductor substrate;
A through electrode formed in the through hole and including at least a conductor; and
And wiring connected to the through electrode,
An inclined surface that is inclined with respect to the main surface is formed in a part of at least one opening on the main surface side or the back surface side of the through hole,
A substantially right angle portion is formed in the other part of the opening,
A part of the wiring is formed on the inclined surface.

  According to the through electrode structure having the above configuration, since the inclined surface that is inclined with respect to the main surface of the semiconductor substrate is formed in a part of the opening, the connecting portion between the through electrode and the wiring has a concave shape. Can be prevented. That is, the connection portion can be prevented from being recessed on the semiconductor substrate side. Therefore, it is possible to prevent the electric signal from being reflected at the connecting portion and the waveform of the electric signal from being disturbed at the connecting portion, and unnecessary radiation generated from the connecting portion can be eliminated.

  In addition, since a substantially right angle portion is formed in the other part of the opening, a useless area on the semiconductor substrate can be reduced. Therefore, since there are few useless areas on the semiconductor substrate, many elements and wirings can be formed on the main surface of the semiconductor substrate. That is, the density of the elements and wirings can be increased.

  In addition, by using the through electrode structure for a semiconductor device in an electronic device, electromagnetic interference in the electronic device can be eliminated.

  In the through electrode structure of one embodiment, the inclined surface is a convex curved surface.

  According to the through electrode structure of the embodiment, the through electrode and the wiring can be smoothly connected by forming the inclined surface into a convex curved surface. Therefore, the effect of preventing the electrical signal from being reflected at the connection portion between the through electrode and the wiring or from disturbing the waveform of the electrical signal at the connection portion is enhanced.

  In the through electrode structure of one embodiment, the shape of the edge of the opening is a polygonal shape.

  In the through electrode structure according to one embodiment, the wiring is connected to one side of the edge of the opening.

A semiconductor substrate laminate module of a second invention comprises a plurality of semiconductor substrates on which the through electrode structure of the first invention is formed,
The plurality of semiconductor substrates are stacked.

  According to the semiconductor substrate laminated module having the above configuration, by stacking a plurality of semiconductor substrates on which the through electrode structure is formed, unnecessary radiation and electromagnetic interference between vertically adjacent circuits can be prevented in the same module. Therefore, stable operation can be realized.

The through electrode forming method of the third invention is:
A through electrode forming method for forming a through electrode including at least a conductor in a through hole penetrating from the main surface to the back surface of the semiconductor substrate using a semiconductor substrate having a main surface on which an element is to be mounted,
A first step of forming a metal film on the semiconductor substrate;
A second step of forming a metal mask having a first opening by etching away a part of the metal film;
A third step of applying a photosensitive resin to the semiconductor substrate and the metal film;
A fourth step of forming a resin mask having a second opening partly overlapping a part of the first opening by patterning the photosensitive resin;
A fifth step of removing the metal mask exposed from the second opening;
A sixth step of forming a hole having a side surface substantially perpendicular to the main surface in the semiconductor substrate;
And a seventh step of etching and removing a part of the semiconductor substrate and the resin mask using etching means capable of etching both the semiconductor substrate and the resin mask.

  According to the through electrode forming method of the above configuration, first, after forming a metal film on the semiconductor substrate, a part of the metal film is removed by etching to form a metal mask having a first opening.

  Next, after applying a photosensitive resin to the semiconductor substrate and the metal film, the photosensitive resin is patterned to form a resin mask having a second opening partly overlapping a part of the first opening. To do. Then, a part of the resin mask contacts the semiconductor substrate, and the remaining part of the second opening of the resin mask contacts the metal mask. The wall surface of the second opening of the resin mask is not completely perpendicular to the surface of the semiconductor substrate, but is inclined with respect to the surface. That is, an inclined surface that is inclined with respect to the surface of the semiconductor substrate is formed at the edge of the second opening of the resin mask.

  Next, the metal mask exposed from the second opening is removed.

  Next, a hole having a side surface substantially perpendicular to the main surface is formed in the semiconductor substrate. For the formation of the hole, for example, it is desirable to select an etching method that can etch the semiconductor substrate and minimize the etching of the resin mask. Thereby, the hole can be deepened.

  Next, a part of the semiconductor substrate and the resin mask is removed by etching using etching means capable of etching both the semiconductor substrate and the resin mask.

  As a result, the inclined surface of the edge of the second opening of the resin mask is transferred to the semiconductor substrate at the location where the semiconductor substrate and the resin mask are in contact with each other. An inclined surface that is inclined with respect to the main surface is formed, and a substantially right angle portion is formed in the other part of the opening of the hole.

  Therefore, by polishing the semiconductor substrate, a through hole in which an inclined surface is formed in a part of the opening and a substantially right-angled part is formed in the other part of the opening is obtained.

  As described above, since an inclined surface can be formed in a part of the opening of the through hole, even if a wiring is connected to the through electrode, for example, the connection portion between the through electrode and the wiring becomes a concave shape. Can be prevented. That is, the connection portion can be prevented from being recessed on the semiconductor substrate side. Therefore, it is possible to prevent the electric signal from being reflected at the connecting portion and the waveform of the electric signal from being disturbed at the connecting portion, and unnecessary radiation generated from the connecting portion can be eliminated.

  In addition, since a substantially right angle portion can be formed in the other part of the opening in the through hole, a useless area on the semiconductor substrate can be reduced. Therefore, since there are few useless areas on the semiconductor substrate, many elements and wirings can be formed on the main surface of the semiconductor substrate. That is, the density of the elements and wirings can be increased.

  Further, by using the semiconductor substrate on which the through electrode is formed in a semiconductor device in an electronic device, electromagnetic interference in the electronic device can be eliminated.

  Further, when the semiconductor substrate and a part of the resin mask are removed by the etching means, even if the resin mask is reduced, the metal mask is not etched by the etching means, so that the opening shape of the hole is prevented from changing during the etching. be able to. That is, the opening shape of the hole can be maintained during the etching. Therefore, it is possible to form a deep hole perpendicular to the surface of the semiconductor substrate without depending on the etching time and, for example, the state in the process chamber. That is, it is possible to obtain a deeply digging hole perpendicular to the surface of the semiconductor substrate.

  In addition, since the metal mask exposed from the second opening of the resin mask is removed, there is no problem of misalignment assumed when the resin mask and the metal mask are separately manufactured, and the second resin mask is formed. The shape of the opening can be reliably transferred to the semiconductor substrate. That is, a hole having an opening having substantially the same shape as the second opening of the resin mask can be reliably formed in the semiconductor substrate.

  Further, when dry etching is used as an example of the etching means in the seventh step, it is possible to easily and reliably control the shape of the inclined surface formed in a part of the opening of the hole. The inclined surface can be easily formed. Therefore, the productivity of the through electrode can be improved.

  Moreover, the inclined surface formed in the edge part of the 2nd opening part of the said resin mask is by selecting the material of photosensitive resin. It can be convex upward. That is, the inclined surface can be a convex curved surface.

  As described above, the sixth step may be performed before the seventh step is performed, or may be performed after the seventh step is performed.

  When the sixth step is performed after the seventh step, the seventh step is performed after the inclined surface formed in the seventh step is covered with, for example, a protective layer. At this time, the etching means used in the seventh step does not substantially etch the protective layer.

  In one embodiment of the through electrode forming method, after the resin mask is formed, the resin mask is subjected to heat treatment at 100 ° C. or higher and 200 ° C. or lower.

  According to the through electrode forming method of the above embodiment, after the resin mask is formed, the resin mask is subjected to a heat treatment of 100 ° C. or more and 200 ° C. or less, thereby providing a larger curvature at the edge of the second opening. The convex curved surface can be easily formed.

  In the through electrode forming method of one embodiment, after the resin mask is formed, the resin mask is exposed to vapor of an organic solvent.

  According to the through electrode forming method of the embodiment, after forming the resin mask, the resin mask is exposed to the vapor of the organic solvent, thereby easily forming a convex curved surface having a larger curvature at the edge of the second opening. Can be formed.

  In one embodiment, the metal film contains at least one of Cr, Al, Au, Fe, In, and Ni.

  According to the through electrode forming method of the above embodiment, since the metal film includes at least one of Cr, Al, Au, Fe, In, and Ni, etching means that can etch both the semiconductor substrate and the resin mask. Will not be attacked. Therefore, the hole to be the through hole can be surely made deeper and perpendicular to the surface of the semiconductor substrate.

  Further, since the metal film contains at least one of Cr, Al, Au, Fe, In, and Ni, an inclined surface or a convex curved surface is formed in a portion other than a part of the opening portion of the hole to be a through hole. Can be prevented more reliably. That is, it is possible to more suitably protect a portion where the shape of the second opening of the resin mask should not be transferred.

  Further, since the metal film contains at least one of Cr, Al, Au, Fe, In, and Ni, the metal film can be etched by other etching means that are easily available.

  In the through electrode forming method of one embodiment, the etching means in the seventh step is a fast atom beam.

  According to the through electrode forming method of the above embodiment, the etching means in the seventh step is a high-speed atomic beam, so that the etching with a selectivity between the semiconductor substrate and the resin mask close to 1 can be easily performed. Therefore, the shape of the second opening of the resin mask can be faithfully transferred to the semiconductor substrate.

  Further, in the case where the semiconductor substrate is accommodated in the chamber, it is possible to perform the etching by slightly shifting the selection ratio between the semiconductor substrate and the resin mask by changing the gas type introduced into the chamber. is there. Therefore, it is possible to finely control the shape of the convex curved surface formed in a part of the opening of the hole to be the through hole.

  In the through electrode structure of the semiconductor substrate according to the first aspect of the present invention, a through surface is formed by forming an inclined surface that is inclined with respect to the main surface in a part of at least one opening on the main surface side or the back surface side of the through hole. Since the connection part between the electrode and the wiring can be prevented from becoming a concave shape, it is possible to prevent the electrical signal from being reflected at the connection part and the electrical signal waveform from being disturbed at the connection part. Unnecessary radiation generated from can be eliminated.

  In addition, since a substantially right-angled portion is formed in the other part of the opening, it is possible to reduce a useless region on the semiconductor substrate, so that many elements and wirings are provided on the main surface of the semiconductor substrate. Can be formed. That is, the density of the elements and wirings can be increased.

  The semiconductor substrate laminated module of the second invention is formed by stacking a plurality of semiconductor substrates on which the through electrode structure of the first invention is formed, so that unnecessary radiation and electromagnetic waves between circuits adjacent in the vertical direction in the same module are stacked. Since the failure can be prevented, malfunction can be prevented.

  According to a third aspect of the present invention, there is provided a through electrode forming method using an etching means capable of etching both a semiconductor substrate and a resin mask under the condition that a metal mask and a resin mask are formed on the semiconductor substrate. Since part of the resin mask is removed by etching, an inclined surface is formed in a part of the opening, and a hole in which a substantially right angle part is formed in the other part of the opening is formed in the semiconductor substrate. Can do.

  Therefore, by polishing the semiconductor substrate, it is possible to obtain a through hole in which an inclined surface is formed in a part of the opening and a substantially right angle part is formed in the other part of the opening.

  As described above, since an inclined surface can be formed in a part of the opening of the through hole, even if a wiring is connected to the through electrode, for example, the connection portion between the through electrode and the wiring becomes a concave shape. Can be prevented. Therefore, it is possible to prevent the electric signal from being reflected at the connecting portion and the waveform of the electric signal from being disturbed at the connecting portion, and unnecessary radiation generated from the connecting portion can be eliminated.

  In addition, since a substantially right-angled portion can be formed in another part of the opening, a useless area on the semiconductor substrate can be reduced. Therefore, since there are few useless areas on the semiconductor substrate, many elements and wirings can be formed on the main surface of the semiconductor substrate. That is, the density of the elements and wirings can be increased.

  Hereinafter, a through electrode structure of a semiconductor substrate according to the present invention will be described in detail with reference to embodiments shown in the drawings.

(First embodiment)
FIG. 1 is a schematic cross-sectional view of a semiconductor substrate 1 on which a through electrode structure of a semiconductor substrate according to a first embodiment of the present invention is formed.

  The through electrode structure includes a semiconductor substrate 1 made of Si, and an element (not shown) is mounted on the main surface 1 a of the semiconductor substrate 1. The semiconductor substrate 1 is formed with a substantially square cylindrical through hole 2 penetrating from the main surface 1a to the back surface 1b. Further, conductors 4, 5, 6, 10, dielectric layers 7, 8, 9, 11 and bump electrodes 12, 13, 14 are formed on the semiconductor substrate 1. The semiconductor substrate 1 has an island portion 1c formed in an island shape. The portions of the conductors 4, 5, 6 on the semiconductor substrate 1 and the portions of the dielectric layers 7, 8, 9 on the semiconductor substrate 1 constitute an example of wiring. An example of this wiring has a coaxial wiring structure. Moreover, the part in the through-hole 2 of the said conductor 4 and the part in the through-hole 2 of the dielectric material layers 7 and 8 comprise an example of a through-electrode.

  The portions 4 a and 4 b of the conductor 4 fill a gap between the dielectric 7 and the outer peripheral wall surface 2 b of the through hole 2. Further, the portions 4 a and 4 b of the conductor 4 are formed substantially equal to the outer peripheral wall surface 2 b of the through hole 2. The portions 4a and 4b of the conductor 4 have substantially the same thickness. The portion 4 a of the conductor 4 is in contact with the inner peripheral wall surface (side surface of the island portion 1 c) 2 c of the through hole 2, while the portion 4 b of the conductor 4 is in contact with the outer peripheral wall surface 2 b of the through hole 2. That is, the portion 4 a of the conductor 4 fills the inner portion of the space in the through hole 2, while the portion 4 b of the conductor 4 fills the outer portion of the space in the through hole 2. The other portions 4 c, 4 d, 4 e of the conductor 4 are formed on the main surface 1 a of the semiconductor substrate 1. The other parts 4c and 4e of the conductor 4 are part of the ground wiring, and the other part 4d of the conductor 4 is part of the signal line.

  A convex curved surface 2a is formed at a portion having one side of the opening edge of the through hole 2 on the main surface 1a side. In addition, a substantially right angle portion 2d is formed in each portion having the other side of the opening edge (see FIG. 2). That is, at the other side of the opening edge, the main surface 1a intersects the outer peripheral wall surface 2b at a substantially right angle. The opening edge is a line that defines the through hole 2 in the main surface 1 a of the semiconductor substrate 1.

  A portion in the vicinity of the convex curved surface 2a of the conductor 4 (a portion facing the convex curved surface 2a) and a portion in the vicinity of the convex curved surface 2a of the dielectric layer 7 (a portion facing the convex curved surface 2a) are along the convex curved surface 2a. It gently curves and extends to the element.

  FIG. 2 shows a schematic view of the semiconductor substrate 1 as viewed obliquely from above. In FIG. 2, the components other than the semiconductor substrate 1 are not shown. Note that FIG. 1 is a schematic cross-sectional view taken along line II in FIG.

  The shape of the opening edge on the main surface 1a side of the through hole 2 is substantially rectangular. A convex curved surface 2a is formed on the opening edge on the side in which the wiring is drawn out. In FIG. 2, A is an arrow indicating the direction in which the wiring is drawn out. That is, the conductors 4, 5, 6 and the dielectric layers 7, 8, 9 extend in the direction indicated by the arrow A.

  According to the through electrode structure having the above configuration, by forming the convex curved surface 2 a connected to one side of the opening edge on the main surface 1 a side of the through hole 2, a part of the conductor 4 and the dielectric layer 7 is also formed of the through hole 2. It can be gently curved along the convex curved surface 2a. As a result, the signal propagating using the conductor 4 and the dielectric layer 7 is not reflected in the vicinity of the convex curved surface 2a, the waveform of the signal is not disturbed in the vicinity of the convex curved surface 2a, and the opening on the main surface 1a side of the through hole 2 Unwanted radiation near the edge can be eliminated.

  Further, since the convex curved surface 2 a is formed only on one side of the opening edge of the through hole 2 on the main surface 1 a side, a useless region as shown in FIG. 10 does not occur on the semiconductor substrate 1. Therefore, the semiconductor device can be densified by using the semiconductor substrate 1 for a semiconductor device.

  Hereinafter, the formation method of the said through-hole 2 is demonstrated using FIGS.

  First, as shown in FIG. 3A, a metal film 22 is formed on a semiconductor substrate 21 to be the semiconductor substrate 1. The metal film 22 may be formed by metal vapor deposition or sputtering. In the present embodiment, a Cr (chromium) metal film having a thickness of 200 nm is formed as the metal film 22 using an RF (radio frequency) sputtering method.

As the material of the metal film 22, in addition to Cr, there are Al (aluminum), Au (gold), Fe (iron), In (indium), Ni (nickel), and materials containing these. Not limited. That is, a material resistant to an etching gas or an etching solution for etching the semiconductor substrate 1 can be used as the material of the metal film 22. In this embodiment, since the semiconductor substrate 1 is etched with SF ₆ , any of the above-described materials may be used. From the viewpoint of the price of the material itself, the ease of film formation, the ease of etching removal of the film itself, and the like. Cr or Al is desirable.

  Next, after applying and patterning a photoresist film on the metal film 22, etching is performed to form a metal film 32 having an opening 23 as shown in FIG. In the present embodiment, the metal film 32 is formed by wet etching using a solution obtained by dissolving ceric ammonium nitrate and perchloric acid in distilled water. The metal film 32 is an example of a metal mask, and the opening 23 is an example of a first opening.

  FIG. 6 shows a schematic view of the semiconductor substrate 1 of FIG. A two-dot chain line L1 in FIG. 6 indicates the inner peripheral wall surface 2c of the through hole 2 to be formed later. 6 indicates the outer peripheral wall surface 2b of the through hole 2.

  As can be seen from FIG. 6, a part of the opening 22 and a part of the region where the through hole 2 is formed overlap. Although the overlap amount B may be 0, in practice, the patterning film that defines the formation position of the through-hole 2 is formed later, so that an alignment error during the formation of the patterning film is allowed. It is desirable to set the overlap amount B to the above amount. In the present embodiment, the opening 22 is formed using a mask in which the overlap amount B is 4 μm.

  Further, the width C in FIG. 6 is set in consideration of the curvature of the end of the patterning film to be formed later and the alignment error similar to the above. In the present embodiment, the width C is set to 15 μm. Moreover, the shape which looked at the said opening part 23 from upper direction is a rectangle. The length of the long side of the rectangle is a rectangle formed by two-dot chain lines L1 and L2, and the direction orthogonal to the II line is the long side. The long side of the rectangle may be longer than the long side of the rectangle formed by the two-dot chain line L1. More preferably, it is good to match the length of the long side of the rectangle formed by the two-dot chain line L2. If the long side of the rectangle formed by L2 is made coincident, one side of the through hole 2 can be made into the convex curved surface 2 completely.

  Next, as shown in FIG. 3C, the photosensitive resin 24 is applied to the surfaces of the semiconductor substrate 21 and the metal film 32, and then exposed and developed, as shown in FIG. Then, a patterning film 34 having openings 25 and 26 is formed. The patterning film 34 is for defining the formation position of the through hole 2. That is, the shape of the openings 25 and 26 viewed from above coincides with the shape formed by the two-dot chain lines L1 and L2. In the present embodiment, the thickness of the patterning film 34 is set to about 7 μm. Further, in the process of exposure and development of the photosensitive resin 24, since there may be a thin resist residue in the openings 25 and 26, the treatment is performed for several minutes using a carbonization apparatus using oxygen plasma. . The patterning film 34 is an example of a resin mask, and the opening 26 is an example of a second opening.

  Next, the patterning film 34 is heated at a temperature equal to or higher than the glass transition temperature so that the corners of the patterning film 34 are removed. That is, as shown in FIG. 4B, a patterning film 44 having a rounded end is formed. Since the patterning film 34 is made of resin, heating the patterning film 34 at a temperature equal to or higher than the glass transition temperature forms a certain roundness at the end of the patterning film 34. In the present embodiment, the patterning film 34 is left in an oven set at 145 ° C. for about 10 minutes, thereby obtaining a roundness in which the distance D in FIG. 4B is about 10 μm. The heat treatment for obtaining the patterning film 44 is preferably performed within a range of 100 ° C. to 200 ° C.

  Next, the metal film 32 is etched using the patterning film 44 as a mask. Thereby, the metal film 32 not covered with the patterning film 44 is removed, and the metal film 42 shown in FIG. 4C is formed. As an etching method for forming the metal film 42, the same process as that for changing from the state of FIG. 3A to the state of FIG. 3B is sufficient. That is, the metal film 42 is obtained by wet etching using a solution obtained by dissolving ceric ammonium nitrate and perchloric acid in distilled water. Here, since the metal film 32 is etched using the patterning film 44 for determining the formation position of the through hole 2, an effect of preventing the positional deviation of the alignment can be obtained. In addition, since the metal film 42 is not affected by the etching material of the semiconductor substrate 21, it functions sufficiently as an etching mask even if the patterning film 44 is reduced in the deepening process of the semiconductor substrate 21 performed later. Vertical deep drilling can be realized. Further, the opening 33 of the metal film 42 is formed to have substantially the same size as the opening edge on the main surface 1 a side of the through hole 2 except for the portion covered with the patterning film 44. Thereby, also in the simultaneous etching process of the semiconductor substrate 21 and the patterning film 44 to be performed later, only the roundness at the end of the patterning film 44 that is in direct contact with the semiconductor substrate 21 is allowed while allowing the etching only in a specific direction. Is transferred to the semiconductor substrate 21, the convex curved surface 2 a can be formed by the patterning film 44.

Next, a deepening process for forming deep holes in the semiconductor substrate 21 is performed. In this deep-drilling process, a time modulation method is used in which SF ₆ gas and C ₄ F ₈ gas are temporally switched to generate plasma, and etching and film formation are alternately repeated to drill holes. By performing such a deep-drilling process on the semiconductor substrate 21, as shown in FIG. 5A, a semiconductor substrate 31 in which a square cylindrical hole 27 is formed can be obtained. In the deepening step, even if a part of the patterning film 44 is removed by etching, the metal film 42 is not removed by etching with SF ₆ gas. Therefore, the hole 27 may be deepened perpendicularly to the main surface of the semiconductor substrate 31. it can. The time modulation method is an example of etching means.

Next, when both the semiconductor substrate 31 and the patterning film 44 are etched, the semiconductor substrate 31 and the patterning film 44 become the semiconductor substrate 41 and the patterning film 54 shown in FIG. In the semiconductor substrate 41, a hole 37 having a convex curved surface 2a is formed. Further, as an etching method for obtaining the semiconductor substrate 41, there is an etching method using a mixed gas in which SF ₆ gas and oxygen gas are mixed at an appropriate ratio in the RIE (reactive ion etching) method. By using such a gas mixture, the semiconductor substrate 31 can be etched while removing the patterning film 44 little by little.

In this embodiment, the semiconductor substrate 41 is obtained by etching using FAB (fast atom beam). Since the fast atom beam is not as reactive as the ions in the RIE method, it is easy to etch in a state where the etching ratio between the patterning film 44 and the semiconductor substrate 31 is close to 1. In the etching using the FAB, radicals having reactivity with the object are also irradiated, so that the selection ratio can be finely adjusted by adjusting the introduced gas. That is, the etching rate of Si can be improved by introducing SF ₆ gas, and the etching rate of the organic patterning film can be improved by introducing oxygen gas. In the present embodiment, roundness in which the distance E shown in FIG. 5B is about 5 to 10 μm is obtained by introducing 100% SF ₆ gas to generate a fast atom beam.

  Next, when the metal film 42 and the patterning film 44 are removed, a state shown in FIG.

  Finally, when the thickness of the semiconductor substrate 41 is reduced by polishing the back side of the semiconductor substrate 41, the through holes 2 and 3 shown in FIG. 1 are obtained.

  When the conductors 4, 5, 6, 10, the dielectric layers 7, 8, 9, 11 and the bump electrodes 12, 13, 14 are formed on the semiconductor substrate 1 in which the through holes 2 and 3 are formed, as shown in FIG. Such a through electrode structure can be obtained.

  FIG. 7 is a schematic view of a semiconductor substrate laminated module having the through electrode structure as viewed obliquely from above.

  The semiconductor substrate laminated module includes a module substrate 60 and semiconductor substrates 61 to 64 stacked on the module substrate 60. The through electrode structure is formed in each of the semiconductor substrates 61 to 64.

  According to the semiconductor substrate laminated module having the above configuration, since the through electrode structure is formed in each of the conductor substrates 61 to 64, the through electrode is curved along the convex curved surface and connected to the planar wiring portion. As the electrical signal speed increases, the signal is not reflected at the connection part between the through electrode and the planar wiring, the signal waveform is not disturbed at the connection part, and unnecessary radiation from the connection part is prevented. It can be lost.

  Further, in the above semiconductor substrate laminated module, the distance between the semiconductor substrates 61 to 64 is as short as several tens to several hundreds μm, and there is a concern about interference between signals as the signal speed increases, but unnecessary radiation is generated. Therefore, there is no malfunction due to electromagnetic interference. Therefore, the semiconductor substrate laminated module can be densified and can stably operate with respect to high-speed signals.

  That is, by stacking a plurality of semiconductor substrates on which the through electrode structure of the present invention is formed, it is possible to realize an LSI module that has a high density and that ensures a stable operation of the circuit.

  In the first embodiment, the convex curved surface connected to only one side of the opening edge on the main surface side of the through hole is formed, but the convex curved surface connected to only one side of the opening edge on the back surface side of the through hole is formed. May be. Alternatively, a convex curved surface connected to only one side of the opening edge on the main surface side of the through hole may be formed, and a convex curved surface connected to only one side of the opening edge on the back surface side of the through hole may be formed.

  In the first embodiment, the shape of the opening edge on the main surface 1a side of the through hole 2 is a square shape, but it may be a circular shape, a triangular shape, or a polygonal shape that is a pentagon or more. That is, the shape of the opening edge is not limited to a square shape, and may be another shape.

  In the first embodiment, the through electrode is formed of the conductor and the dielectric, but the through electrode may be formed of only the conductor.

  In the first embodiment, the substantially square cylindrical through hole 2 is formed. However, another through hole, for example, a cylindrical through hole may be formed.

  In the first embodiment, the bump electrode is directly connected to the through electrode. However, the bump electrode may be connected to the through electrode via the back surface wiring. In this case, a convex curved surface 50 a similar to the convex curved surface 2 a may be formed at the opening edge on the back surface side of the through hole 2.

  In the said 1st Embodiment, the convex curve 2a is formed in the part which has one side in the opening edge by the side of the main surface 1a of the through-hole 2, and it has the other side in the opening edge by the side of the main surface 1a of the through-hole 2 Although the substantially right-angled part 2d was formed in the part, the inclined surface of the substantially planar shape which inclines with respect to the main surface 1a is formed in the part which has one side in the opening edge by the side of the main surface 1a of the through-hole 2, and it penetrates You may form the substantially right-angled part 2d in the part which has the other side in the opening edge by the side of the main surface 1a of the hole 2. FIG.

  In the first embodiment, a part of the opening 22 and a part of the region where the through hole 2 is formed are overlapped. However, a part of the opening 22 and the region where the through hole 2 is formed are overlapped. A part may be connected.

  In the first embodiment, the end of the patterning film 34 is rounded by heat-treating the patterning film 34. However, the end of the patterning film 34 is exposed by exposing the patterning film 34 to an organic solvent. You may form roundness. The organic solvent is preferably contained in a photosensitive resin, and acetates such as ethyl cellosolve acetate and propylene glycol monomethyl ether acetate are desirable. In the sealed system, the patterning film 34 is heated and left together with these organic solvents, and the patterning film 34 is exposed to the atmosphere in the sealed system for several minutes to 10 minutes, whereby the distance D in FIG. It can be enlarged and a roundness with a smooth curvature can be obtained.

  In the first embodiment, after performing the deepening process of the semiconductor substrate, the process of etching and removing both the semiconductor substrate and the patterning film is performed. However, the process of etching and removing both the semiconductor substrate and the patterning film is performed. Then, a deepening process of the semiconductor substrate may be performed.

  After performing a step of etching and removing both the semiconductor substrate and the patterning film, when performing a deepening step of the semiconductor substrate, after covering the convex curved surface formed in the step of removing the etching with a protective layer, The process is performed. At this time, the etching means used in the step of deepening the semiconductor substrate does not etch the protective layer so much.

  In addition, a heat treatment or an organic solvent treatment for forming a convex curved surface at the edge of the opening 26 of the patterning film 34 may be omitted, but a convex curved surface having a larger curvature at the edge of the opening 26 of the patterning film 34 may be omitted. From the viewpoint of formation, it is desirable that the patterning film 34 is subjected to a heat treatment at 100 ° C. or more and 200 ° C. or less, or the patterning film 34 is exposed to vapor of an organic solvent.

  In the first embodiment, the semiconductor substrates 61 to 64 have the same size, but may be different. When different semiconductor substrates are stacked in this way, the electrode positions are matched between the semiconductor substrates adjacent in the vertical direction. The outer shape of the semiconductor substrate is not particularly limited as long as the electrode positions match.

  The module substrate 20 may be an interposer having only wiring, may be another semiconductor chip, or may be a normal printed wiring board.

(Second Embodiment)
FIG. 8 is a schematic view of the semiconductor substrate 51 on which the through electrode structure according to the second embodiment of the present invention is formed as viewed obliquely from above. In FIG. 8, illustration of components other than the semiconductor substrate 51 is omitted.

  The through electrode structure of this embodiment is for connecting two signal lines to one through hole. That is, the through electrode structure is used when connecting a wiring having a two-core coaxial wiring structure and one through hole. The wiring has a ground line and two signal lines at the center of the ground line.

  The through electrode structure includes a semiconductor substrate 51 having two island portions 51c and 51d formed in an island shape. The semiconductor substrate 51 is formed with a through hole 50 penetrating from the main surface 51a to the back surface 51b. When viewed from the main surface 51 a side of the semiconductor substrate 51, the through hole 50 has a substantially Japanese character shape. The shape of the opening edge of the through hole 50 on the main surface 51a side is formed in a substantially square shape, for example, a 25 μm square shape. A convex curved surface 50a similar to the convex curved surface 2a is formed on a portion of one side of the opening edge. In addition, a substantially right angle portion 50d is formed in a portion having the other three sides of the opening edge. That is, on the other three sides of the opening edge, the main surface 51 a of the semiconductor memory device 51 intersects the outer peripheral wall surface of the through hole 50 at a substantially right angle. In FIG. 8, A is an arrow indicating the direction in which the wiring is drawn.

  Although not shown, a through electrode made of a conductor and a dielectric or a through electrode made only of a conductor is formed in the through hole 50. When a through electrode made of a conductor and a dielectric is formed in the through hole 50 as in FIG. 1, the conductor that contacts the outer peripheral wall surface of the through hole 50 is connected to the ground line, and the inner peripheral wall surface of the through hole 50 A conductor in contact with (the side surfaces of the island portions 51c and 51d) is connected to the signal line.

  The through electrode structure having the above configuration has the same effect as the through electrode structure of the first embodiment.

  The through electrode structure of the second embodiment may be used for a semiconductor substrate laminated module as in the first embodiment.

  Needless to say, the through electrode structure of the second embodiment can also be formed by the same method as that of the first embodiment.

(Third embodiment)
FIG. 9 is a schematic cross-sectional view of a semiconductor substrate 71 on which a through electrode structure of a semiconductor substrate according to a third embodiment of the present invention is formed.

  The through electrode structure includes a semiconductor substrate 71 made of Si, and an element (not shown) is mounted on the main surface 71 a of the semiconductor substrate 71. The semiconductor substrate 71 is formed with a substantially quadrangular prism-shaped through hole 2 penetrating from the main surface 1a to the back surface 1b. In addition, a conductor 73, an insulating film 74, covering insulating films 75 and 76, and a bump electrode 77 are formed on the semiconductor substrate 71. A portion in the through hole 72 of the conductor 73 constitutes an example of the through electrode. A portion of the conductor 73 on the semiconductor substrate 71 constitutes an example of wiring.

  An inclined surface 72 a that is inclined within a predetermined angle range with respect to the main surface 71 a of the semiconductor substrate 71 is formed in a portion having one side of the opening edge on the main surface 71 a side of the through hole 72. The inclined surface 72a is a substantially flat plane. In addition, a substantially right angle portion 72d is formed in each portion having the other side of the opening edge (see FIG. 10). That is, on the other side of the opening edge, the main surface 71 a intersects the wall surface 72 b of the through hole 72 at a substantially right angle.

  The insulating film 74 covers the main surface 71 a of the semiconductor substrate 71 and the wall surface 72 b of the through hole 72, and the covering insulating film 76 covers the back surface 71 b of the semiconductor substrate 71.

  FIG. 10 shows a schematic view of the semiconductor substrate 71 as viewed obliquely from above. In FIG. 10, illustration of components other than the semiconductor substrate 71 is omitted. Note that FIG. 9 is a schematic sectional view taken along line IX-IX in FIG.

  The shape of the opening edge on the main surface 71a side of the through hole 72 is substantially rectangular. An inclined surface 72a is formed on the opening edge on the side in which the wiring is drawn out. Further, no island portion is formed in the through hole 72. That is, the semiconductor substrate 71 does not have an island portion as described in the first and second embodiments. In FIG. 10, A is an arrow indicating the direction in which the wiring is drawn out. That is, the conductor 73 extends in the direction indicated by the arrow A.

  According to the through electrode structure having the above configuration, by forming the inclined surface 72a connected to one side of the opening edge on the main surface 71a side of the through hole 72, a part of the conductor 74 is bent at a substantially right angle, or the semiconductor substrate It is possible to prevent the concave portion from being depressed toward the 71 side. As a result, the signal propagated using the conductor 74 is not reflected in the vicinity of the inclined surface 72a, the waveform of the signal is not disturbed in the vicinity of the inclined surface 72a, and unnecessary radiation near the opening edge of the through hole 72 on the main surface 71a side. Can be eliminated.

  Needless to say, the through electrode structure of the third embodiment can also be formed by the same method as that of the first embodiment.

  When the inclined surface 72a is formed by a method similar to the formation method of the first embodiment, for example, in FIG. 4, if the patterning film 34 is held at a temperature equal to or higher than the glass transition point for a long time, the distance D becomes a very large value. An inclined surface can be formed on a part of the opening 23 of the metal film 32. This inclined surface is a substantially flat plane inclined obliquely with respect to the main surface of the semiconductor substrate 21. A part of the cross-sectional shape of the opening 23 of the metal film 32 includes a substantially linear portion. In this way, the angle between the inclined surface of the patterning film 44 and the main surface of the semiconductor substrate 21 is reduced, but the semiconductor substrate is etched more quickly with the selectivity between the patterning film and the semiconductor substrate during etching. By setting to, a slope of about 45 ° can be obtained.

  The present invention is not limited to the first to third embodiments, and there are various embodiments. The present invention may be a combination of the first to third embodiments as appropriate.

  In the through electrode structure of the present invention, the through electrode and the wiring connected to the through electrode may be formed of the same material or different materials.

  In the through electrode structure of the present invention, the through electrode and the wiring connected to the through electrode may be integrated or separated.

FIG. 1 is a schematic cross-sectional view of a semiconductor substrate on which a through electrode structure according to a first embodiment of the present invention is formed. FIG. 2 is a schematic view of the semiconductor substrate of the first embodiment as viewed obliquely from above. FIGS. 3A to 3C are schematic cross-sectional views for explaining a method for forming a through hole of the through electrode structure of the first embodiment. 4A to 4C are schematic cross-sectional views for explaining the through hole forming method of the first embodiment. 5A to 5C are schematic cross-sectional views for explaining the through hole forming method of the first embodiment. FIG. 6 is a schematic top view of the semiconductor substrate in one step of the through hole forming method of the first embodiment. FIG. 7 is a schematic view of the semiconductor substrate laminated module provided with the through electrode structure of the first embodiment as viewed obliquely from above. FIG. 8 is a schematic view of the semiconductor substrate on which the through electrode structure according to the second embodiment of the present invention is formed as viewed obliquely from above. FIG. 9 is a schematic cross-sectional view of a semiconductor substrate on which a through electrode structure according to a third embodiment of the present invention is formed. FIG. 10 is a schematic view of the semiconductor substrate of the third embodiment as viewed obliquely from above. 11A to 11E are schematic cross-sectional views for explaining a conventional method for forming a through hole. FIG. 12 is a schematic cross-sectional view of a semiconductor device using the inside of the through hole.

Explanation of symbols

1, 21, 31, 41, 51, 61,..., 64, 71 Semiconductor substrate 1 a, 51 a, 71 a Main surface 1 b, 51 b, 71 b Back surface 2 d, 50 d, 72 d Substantially right angle part 2, 50, 72 Through hole 2 a, 50 a Convex surface 72a Inclined surface 4, 5, 6, 10, 73 Conductor 7, 8, 9, 11 Dielectric layer 12, 13, 14, 77 Bump electrode 23, 25, 26, 33 Opening 22, 32, 42 Metal film 24 photosensitive resin 27, 37, 28 hole 34, 44, 54 patterning film 73 conductor 74 insulating film 75, 76 covering insulating film

Claims (10)

A semiconductor substrate having a main surface on which the element is to be mounted;
A through hole penetrating from the main surface to the back surface of the semiconductor substrate;
A through electrode formed in the through hole and including at least a conductor; and
And wiring connected to the through electrode,
An inclined surface that is inclined with respect to the main surface is formed in a part of at least one opening on the main surface side or the back surface side of the through hole,
A substantially right angle portion is formed in the other part of the opening,
A through electrode structure, wherein a part of the wiring is formed on the inclined surface. The through electrode structure according to claim 1,
The through electrode structure, wherein the inclined surface is a convex curved surface. 2. The through electrode structure according to claim 1, wherein an edge of the opening has a polygonal shape. In the through electrode structure according to claim 3,
A through electrode structure, wherein the wiring is connected to one side of the edge of the opening. A plurality of semiconductor substrates on which the through electrode structure according to claim 1 is formed,
A semiconductor substrate stacking module, wherein the plurality of semiconductor substrates are stacked. A through electrode forming method for forming a through electrode including at least a conductor in a through hole penetrating from the main surface to the back surface of the semiconductor substrate using a semiconductor substrate having a main surface on which an element is to be mounted,
A first step of forming a metal film on the semiconductor substrate;
A second step of forming a metal mask having a first opening by etching away a part of the metal film;
A third step of applying a photosensitive resin to the semiconductor substrate and the metal film;
A fourth step of forming a resin mask having a second opening partly overlapping a part of the first opening by patterning the photosensitive resin;
A fifth step of removing the metal mask exposed from the second opening;
A sixth step of forming a hole having a side surface substantially perpendicular to the main surface in the semiconductor substrate;
Through-electrode formation, comprising: a seventh step of etching and removing a part of the semiconductor substrate and the resin mask using an etching means capable of etching both the semiconductor substrate and the resin mask. Method. In the penetration electrode formation method according to claim 6,
After forming the said resin mask, the heat processing of 100 degreeC or more and 200 degrees C or less are performed to the said resin mask, The penetration electrode formation method characterized by the above-mentioned. In the penetration electrode formation method according to claim 6,
After forming the said resin mask, the said convex mask is formed in the edge of the said 2nd opening part by exposing the said resin mask to the vapor | steam of an organic solvent, The penetration electrode formation method characterized by the above-mentioned. In the penetration electrode formation method according to claim 6,
The metal film includes at least one of Cr, Al, Au, Fe, In and Ni. In the penetration electrode formation method according to claim 6,
The through electrode forming method, wherein the etching means in the seventh step is a fast atom beam.

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