JP2005287142A - Power supply voltage conversion circuit and display device using same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power supply voltage conversion circuit which can stabilize and raise an output voltage to a predetermined voltage value while compensating a self-output voltage when applying an external power supply. <P>SOLUTION: When applying the external power supply VCC, since a level shifting circuit 203 cannot be operated, between the gate of a p-type MOS transistor M1 and a signal route applied by an xRST pulse are connected by an n-type MOS transistor M4. Then, the potential of the gate electrode of the p-type MOS transistor M1 is connected to a GND level during a period T1 when applying the external power supply VCC, the p-type MOS transistor M1 is turned on, and the output voltage of a converter is raised by the external voltage VCC. While the n-type MOS transistor M4 is turned off and the gate electrode of the p-type MOS transistor M1 is opened during a period T2, the p-type MOS transistor M1 is controlled through a level shifting circuit 203. When applying the external voltage VCC, the output voltage is raised to the predetermined voltage value while the converter output voltage is compensated. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a power supply voltage conversion circuit that stabilizes rising of an output voltage and a display device that uses the power supply voltage conversion circuit.

In a conventional DC-DC converter in a liquid crystal display device formed on an insulating substrate, a DC-DC converter using a charge pump circuit is used in order to realize low power consumption and miniaturization.
As such a power supply voltage conversion circuit, a charge pump having a switch element at the output unit is used, a control pulse voltage for the switch element is diode-clamped at start-up, and based on a voltage output through the switch element at the end of the start-up process. There is one in which a control pulse voltage is clamped to a circuit power supply potential so that a stable DC-DC conversion operation can be performed (for example, see Patent Document 1).
JP 2002-176664 A

  A power supply voltage conversion circuit using such a conventional charge pump circuit, particularly a DC-DC converter in a liquid crystal display device formed on an insulating substrate, has a configuration in which a self-output voltage is used as a drive power supply, and the self-output voltage is Until reaching a predetermined output voltage, it is necessary to start operation by an external power supply. When the external power supply is turned on, the DC-DC converter output voltage, that is, while compensating for the self-output voltage that has not yet risen, that is, There has been a problem that the self-output voltage needs to be stably raised to a predetermined voltage value.

  The present invention has been made in view of such circumstances. When an external power supply is turned on, the output voltage is stably raised to a predetermined voltage value while compensating for a self-output voltage that has not yet risen. An object of the present invention is to provide a power supply voltage conversion circuit capable of performing the above and a display device using the power supply voltage conversion circuit.

  In order to achieve the above-described object, a power supply voltage conversion circuit according to the present invention includes a capacitor and a transistor pair that charges and discharges the capacitor, and the first power supply voltage is higher than the power supply voltage. A charge pump circuit that converts the voltage into a voltage, outputs an amplitude conversion circuit that converts the amplitude of a control pulse that drives the transistor pair using the output of the charge pump circuit as a power source, and a reset circuit that controls the activation of the charge pump circuit; A first switching element that connects and opens a power supply line of the first power supply voltage and an output side of the charge pump circuit, and the first switching element. In the first period when the power supply voltage is turned on, the control terminal of the first switch element is connected to a predetermined potential based on the start control signal, and the first The switch element is controlled, the power supply line of the first power supply voltage is connected to the output side of the charge pump circuit by the first switch element, and the first power supply voltage is supplied to the output side of the charge pump circuit. A second switch element that opens the control terminal of the first switch element based on the start control signal for a second period after the first period has elapsed; During this period, the start control signal is amplitude-converted using the output of the charge pump circuit as a power source, and the start control signal subjected to the amplitude conversion is supplied to the control terminal of the first switch element. And a control circuit that opens the output side of the charge pump circuit from the power supply line of the first power supply voltage.

  In order to achieve the above object, a display device according to the present invention is a display device including a display area unit in which pixels including electro-optical elements are two-dimensionally arranged in a matrix and a power supply voltage conversion circuit. The power supply voltage conversion circuit includes a capacitor and a transistor pair that drives charging and discharging the capacitor, and converts the first power supply voltage into a second power supply voltage higher than the power supply voltage and outputs the second power supply voltage; An amplitude conversion circuit that converts an amplitude of a control pulse for driving the transistor pair using an output of the charge pump circuit as a power source, and a reset circuit that controls activation of the charge pump circuit, and the reset circuit includes: A first switch element for connecting and opening a power supply line of one power supply voltage and the output side of the charge pump circuit; and During the first period of time, based on the start control signal, the control terminal of the first switch element is connected to a predetermined potential, the first switch element is controlled, and the power supply of the first power supply voltage A line and an output side of the charge pump circuit are connected by the first switch element, the first power supply voltage is supplied to the output side of the charge pump circuit, and a second after the first period has elapsed. Based on the start control signal for a period, the second switch element that opens the control terminal of the first switch element, and the start using the output of the charge pump circuit for the second period as a power source The control signal for amplitude is converted, the start control signal subjected to amplitude conversion is applied to the control terminal of the first switch element, the first switch element is controlled, and the output side of the charge pump circuit is connected to the first switch element. 1 power supply Characterized by comprising a control circuit for opening the power line.

  In the power supply voltage conversion circuit according to the present invention, the reset circuit connects and opens the power supply line of the first power supply voltage and the output side of the charge pump circuit, and when the first power supply voltage is turned on During the first period of time, based on the start control signal, the control terminal of the first switch element is connected to a predetermined potential, the first switch element is controlled, and the power line of the first power supply voltage And the output side of the charge pump circuit are connected by the first switch element, the first power supply voltage is supplied to the output side of the charge pump circuit, and the second period after the elapse of the first period. Based on the start control signal, the second switch element that opens the control terminal of the first switch element, and the start signal using the output of the charge pump circuit during the second period as a power source Wave control signal The control signal for starting which has been converted and amplitude-converted is supplied to the control terminal of the first switch element, the first switch element is controlled, and the output side of the charge pump circuit is connected to the first power supply voltage. And a control circuit that is opened from the power supply line. Therefore, it is possible to reduce the influence of the second switch element on the control of the first switch element performed by the control circuit. In the second period, it is possible to stably start up to a predetermined voltage value while compensating for the self-output voltage of the charge pump circuit that has not yet started up.

  A display device according to the present invention includes a first switch element that connects and opens a power supply line of a first power supply voltage and an output side of the charge pump circuit, a first period when the first power supply voltage is turned on, Based on the start control signal, the control terminal of the first switch element is connected to a predetermined potential, the first switch element is controlled, the power supply line of the first power supply voltage and the charge pump circuit An output side connected by the first switch element, the first power supply voltage is supplied to the output side of the charge pump circuit, and the start control signal is supplied for a second period after the first period has elapsed. Based on the above, the second switch element that opens the control terminal of the first switch element, and the amplitude of the start control signal is converted from the output of the charge pump circuit as a power source during the second period. The amplitude converted A control circuit that applies the starting control signal to the control terminal of the first switch element, controls the first switch element, and opens the output side of the charge pump circuit from the power supply line of the first power supply voltage Since the power supply voltage conversion circuit is provided with the reset circuit having the above, it is possible to reduce the influence of the second switch element on the control of the first switch element performed by the control circuit. Thus, in the second period, there is an effect that the power supply voltage necessary for display can be stably raised to a predetermined voltage value while compensating for the self-output voltage of the charge pump circuit that has not yet risen.

  An object of the present invention is to provide a power supply voltage conversion circuit capable of stably starting up an output voltage to a predetermined voltage value while compensating for a self-output voltage that has not yet started up when an external power supply is turned on. During the first period when the voltage is turned on, based on the start control signal, the control terminal of the first switch element is connected to a predetermined potential by the second switch element, the first switch element is controlled, A power line of a first power supply voltage and an output side of the charge pump circuit are connected by the first switch element, the first power supply voltage is supplied to the output side of the charge pump circuit, and the first period In a second period after the lapse of time, the control terminal of the first switch element is opened by the second switch element based on the start control signal, and the control terminal of the first switch element is In the second period in which the second switch element is open, the control circuit amplitude-converts the start-up control signal using the output of the charge pump circuit as a power source, and the amplitude-converted start-up control A reset circuit that applies a signal to the control terminal of the first switch element, controls the first switch element, and releases the output side of the charge pump circuit from the power supply line of the first power supply voltage; It was realized.

  An object of the present invention is to provide a display device using a power supply voltage conversion circuit capable of stably raising an output voltage to a predetermined voltage value while compensating for a self-output voltage that has not yet risen when an external power supply is turned on. In the first period when the first power supply voltage is turned on, based on the start control signal, the control terminal of the first switch element is connected to a predetermined potential by the second switch element, and the first switch element The power supply line of the first power supply voltage and the output side of the charge pump circuit are connected by the first switch element, and the first power supply voltage is supplied to the output side of the charge pump circuit, In the second period after the first period, the control terminal of the first switch element is opened by the second switch element based on the start control signal, and the first switch During the second period when the control terminal of the child is opened by the second switch element, the control circuit performs amplitude conversion of the start control signal using the output of the charge pump circuit as a power source, and the amplitude conversion Reset the control signal for starting applied to the control terminal of the first switch element to control the first switch element and to release the output side of the charge pump circuit from the power supply line of the first power supply voltage The circuit was realized by the power supply voltage conversion circuit.

FIG. 1 is a block diagram illustrating a configuration of a liquid crystal display device 100 in which the power supply voltage conversion circuit according to the first embodiment is used. The liquid crystal display device 100 includes a charge pump type DC / DC converter circuit that is a power supply voltage conversion circuit 1, a vertical drive circuit 2 and a horizontal drive circuit 3, and a display area unit 4.
FIG. 2 is an arrangement configuration diagram showing an outline of an arrangement configuration of each circuit element of a flat panel display device represented by a liquid crystal display device in which pixels using liquid crystal cells as electro-optical elements are two-dimensionally arranged in a matrix. It is. Note that an active matrix liquid crystal display device will be described as an example of the liquid crystal display device.
As shown in FIG. 2, the liquid crystal display device 100 has a pair of upper and lower horizontal lines together with a display area unit 4 in which a large number of pixels including liquid crystal cells are arranged two-dimensionally on a transparent insulating substrate, for example, a glass substrate 131. Drive circuits 133U and 133D and a vertical drive circuit 134 are mounted, and further, a charge pump type DC / DC converter circuit which is the power supply voltage conversion circuit 1 is mounted.
The power supply voltage conversion circuit 1 may be located anywhere on the transparent insulating substrate, but is preferably disposed in the vicinity of the signal connection terminal with the outside.

  The glass substrate 131 includes a first substrate on which a large number of pixel circuits including active elements (for example, transistors) are arranged in a matrix, and a second substrate arranged to face the first substrate with a predetermined interval. And a substrate. A liquid crystal panel is formed by sealing liquid crystal between the first substrate and the second substrate.

  FIG. 3 is a circuit diagram showing a specific configuration of the display area unit 4. Here, a case of a pixel array of 3 rows and 4 columns is shown as an example. In the figure, the display area 4 includes a matrix of vertical scanning lines..., 136n-1, 136n, 136n + 1,..., Data lines (signal lines), 137m-2, 137m-1, 137m, 137m + 1,. The unit pixels 138 are arranged at the intersections thereof. The unit pixel 138 includes a thin film transistor TFT, which is a pixel transistor, a liquid crystal cell LC, and a storage capacitor Cs. Here, the liquid crystal cell LC means a capacitance generated between a pixel electrode formed of a thin film transistor TFT and a counter electrode formed opposite thereto.

  The thin film transistor TFT has a gate electrode connected to the vertical scanning lines..., 136n-1, 136n, 136n + 1,..., And a source electrode connected to the data lines. . In the liquid crystal cell LC, the pixel electrode is connected to the drain electrode of the thin film transistor TFT, and the counter electrode is connected to the common line 139. The storage capacitor Cs is connected between the drain electrode of the thin film transistor TFT and the common line 139. A predetermined DC voltage is applied to the common line 139 as a common voltage Vcom.

  One end of each of the vertical scanning lines... 136n-1, 136n, 136n + 1,... Is connected to each output end of the corresponding row of the vertical drive circuit 134 shown in FIG. The vertical drive circuit 134 is constituted by, for example, a shift register, and sequentially generates vertical selection pulses in synchronization with a vertical transfer clock VCK (not shown) and supplies them to the vertical scanning lines..., 136n−1, 136n, 136n + 1,. Thus, vertical scanning is performed. On the other hand, in the display area portion 4, for example, odd-numbered data lines..., 137m-1, 137m + 1,... Are connected to the output terminals of the corresponding columns of the horizontal drive circuit 133U shown in FIG. The other ends of the lines..., 137m-2, 137m,... Are connected to the output ends of the corresponding columns of the horizontal drive circuit 133D shown in FIG.

Next, the power supply voltage conversion circuit 1 of the liquid crystal display device described above will be described. FIG. 4 is a circuit diagram showing a main configuration of a charge pump type DC / DC converter circuit which is the power supply voltage conversion circuit 1.
This power supply voltage conversion circuit 1 uses a negative power supply VSS3 (in this embodiment 1) in addition to the externally applied voltage VCC (2.75 Vdc in the first embodiment, the first power supply voltage) as a power supply and control signal that require input to the converter. -2.3Vdc), timing pulse DCO necessary for the boosting operation, control pulses OSET, VSET, and pulses (starting control signals) RST, xRST for controlling the timing of the reset circuit 301. These pulses OSET and VSET are output by level shift circuits (amplitude conversion circuits) 201 and 202 in the converter, and pulses RST and xRST are output by the level shift circuit 203 in the converter by the externally applied voltage VCC level (2.75 V). ) To the internal power supply voltage VDD (second power supply voltage) level (5.1 V) and then used for the boosting operation.
The converter output VDDout is connected to a power supply line such as a horizontal / vertical drive circuit, and at the same time, is connected to a VDD power supply line of each inverter in the level shift circuits 201, 202, 203 and reset circuit 301 in the converter (in the figure). , Described as VDD).

  In the power supply voltage conversion circuit 1, a control pulse OSET is supplied to the level shift circuit 201. The output terminal of the level shift circuit 201 is connected to one terminal of the capacitor C13. The other terminal of the capacitor C13 is connected to the cathode terminal of the diode D12 and the anode terminal of the diode D22, and is further connected to the gate electrode of the P-type MOS transistor Qp12. The anode terminal of the diode D12 is connected to a reference potential line VSS that provides a ground reference potential. The cathode terminal of the diode D22 is connected to VDD.

  A control pulse VSET is supplied to the level shift circuit 202. The output terminal of the level shift circuit 202 is connected to one terminal of the capacitor C12. The other terminal of the capacitor C12 is connected to the cathode terminal of the diode D11 and the anode terminal of the diode D21, and is further connected to the gate electrode of the N-type MOS transistor Qn12. The anode terminal of the diode D11 is connected to a VCC external application voltage power supply line that provides a VCC level of the external application power supply. The cathode terminal of the diode D21 is connected to VDD.

  The timing pulse DCO is supplied to one terminal of the capacitor C11. The other terminal of the capacitor C11 is connected to the source electrode of the P-type MOS transistor Qp12 and the source electrode of the N-type MOS transistor Qn12. The drain electrode of the N-type MOS transistor Qn12 is connected to the externally applied voltage power supply line VCC.

  A capacitor C14 is connected between the drain electrode of the P-type MOS transistor Qp12 and the reference potential line VSS. A P-type MOS transistor (first switch element) M1 is connected between the drain electrode of the P-type MOS transistor Qp12 and the VCC externally applied voltage power supply line. Converter output VDDout and VDD level are taken out from node A which is a connection point between the drain electrode of P-type MOS transistor Qp12 and capacitor C14.

  Capacitor C11, capacitor C14, N-type MOS transistor Qn12, and P-type MOS transistor Qp12 constitute a charge pump circuit, and N-type MOS transistor Qn12 and P-type MOS transistor Qp12 correspond to a transistor pair of the charge pump circuit. The level shift circuits 201 and 202, capacitors C12 and C13, and diodes D11, D12, D21, and D22 are circuits for controlling the on / off timings of the N-type MOS transistor Qn12 and the P-type MOS transistor Qp12 of the charge pump circuit. Is configured. By this charge pump circuit, the voltage level VCC of the VCC externally applied voltage power supply line is boosted to 2VCC, and the terminal voltage of the capacitor C14 is output as the voltage of the converter outputs VDDout and VDD.

The reset circuit 301 is a circuit for controlling the starting operation of the charge pump circuit. The reset circuit 301 includes a level shift circuit 203, an inverter circuit 204, an inverter circuit composed of a P-type MOS transistor M2 and an N-type MOS transistor M3. , An N-type MOS transistor (second switch element) M4, and a P-type MOS transistor (first switch element) M1 for connecting and releasing the externally applied power supply VCC and the output side (node A) of the converter. ing. The level shift circuit 203 is supplied with pulses RST and xRST. The output terminal of the level shift circuit 203 is connected to the input terminal of the inverter circuit 204. The output terminal of the inverter circuit 204 is connected to the commonly connected gate electrodes of the P-type MOS transistor M2 and the N-type MOS transistor M3. The P-type MOS transistor M2 and the N-type MOS transistor M3 constitute an inverter circuit, the source electrode of the P-type MOS transistor M2 is connected to VDD, and the source electrode of the N-type MOS transistor M3 is connected to the ground. The drain electrode of the P-type MOS transistor M2 and the drain electrode of the N-type MOS transistor M3 are connected and connected to the gate electrode of the P-type MOS transistor M1. Further, between a signal line that supplies the pulse xRST to the level shift circuit 203 and a connection point (shown as a node B in the figure) between the drain electrode of the P-type MOS transistor M2 and the drain electrode of the N-type MOS transistor M3. Is connected to an N-type MOS transistor M4. That is, the signal line that supplies the pulse xRST to the level shift circuit 203 is connected to the gate electrode of the N-type MOS transistor M4, and the drain electrode of the N-type MOS transistor M4 is connected to the node B. The source electrode of the N-type MOS transistor M4 is connected to the ground.
Note that the level shift circuit 203, the inverter circuit 204, and the inverter circuit composed of the P-type MOS transistor M2 and the N-type MOS transistor M3 have the amplitudes of the pulses RST and xRST using the converter output VDDout as a power source for a period T2 described later. Control, applying the amplitude-converted pulses RST and xRST to the gate electrode of the P-type MOS transistor M1, controlling the P-type MOS transistor M1, and releasing the node A from the power supply line of the externally applied power supply VCC The circuit is configured.

Next, the operation will be described.
At the time when the externally applied power supply VCC is applied (when the externally applied power supply VCC is turned on), the converter output VDDout (the potential of the node A) is at the GND level. For this reason, it is necessary to raise the converter output voltage (the potential of the node A) to the minimum necessary potential at which the horizontal / vertical drive circuit and the converter itself can start operation. The voltage of the externally applied power supply VCC corresponds to this minimum necessary voltage. In the first embodiment, the threshold voltage (Vth) of the transistor used in the liquid crystal display device 100 is approximately 1.2 Vdc, and VCC is 2. In order to raise the potential of the node A to the VCC level, the potential of the GND level is applied to the gate (node B) of the P-type MOS transistor M1 to turn on the P-type MOS transistor M1.

  However, when the externally applied power supply VCC is turned on, the level of VDD, which is the drive voltage of the reset circuit 301, that is, the converter output VDDout is at the GND level, so the reset circuit 301 cannot operate. Therefore, in the power supply voltage conversion circuit 1 of the first embodiment, as a configuration of the reset circuit 301, an N-type connection is provided between the gate (node B) of the P-type MOS transistor M1 and a signal path to which an xRST pulse is applied from the outside. They are connected by a MOS transistor M4.

5 shows the voltage waveform of the externally applied power supply VCC, the negative power supply VSS3, the converter output VDDout and the VDD of each circuit in the converter, and the timing pulse DCO when the externally applied power supply VCC is turned on in the power supply voltage conversion circuit 1 shown in FIG. 5 is a timing chart showing signal waveforms of pulses RST and xRST for controlling timings of, OSET, VSET, and reset circuit. As shown in the timing chart of FIG. 5, the pulse xRST is at the “High” level from when the externally applied power supply VCC is turned on until the pulse RST becomes the “High” level. During this period, the N-type MOS transistor M4 Turn on. Thereby, in the period T1 in which the pulse xRST is at the “High” level, the potential of the gate electrode of the P-type MOS transistor M1, that is, the potential of the node B can be reliably connected to the GND level and can be fixed to the GND level.
Therefore, the P-type MOS transistor M1 is turned on, and the externally applied voltage VCC and the node A are connected in the period T1, and the externally applied voltage VCC is supplied to the node A, so that the converter itself can start operation. The voltage of the converter output VDDout (the potential of the node A) is raised to the potential of.

Further, in the period T2 in which the pulse xRST after the elapse of the period T1 is at the “Low” level, the pulse xRST supplied to the gate electrode of the N-type MOS transistor M4 is at the “Low” level. The transistor M4 is turned off, and the gate electrode of the P-type MOS transistor M1 is disconnected from the GND level and opened. On the other hand, in the period T2, the P-type MOS transistor M2 of the inverter circuit is turned on and the N-type MOS transistor M3 is turned off, and applied to the potential of the node B, that is, the gate electrode of the P-type MOS transistor M1 at the start of the period T2. The applied potential becomes the VDD level (= VCC). At this time, the potential of the node A is also VCC, so that the P-type MOS transistor M1 is turned off.
As described above, in the period T2, the N-type MOS transistor M4 is turned off, and the level shift circuit 203 and the inverter circuit are connected with the gate electrode of the P-type MOS transistor M1 disconnected from the GND level and opened. Therefore, even if the N-type MOS transistor M4 is connected to the gate electrode of the P-type MOS transistor M1, that is, the node B, the influence can be eliminated. As a result, even if the P-type MOS transistor and the N-type MOS transistor are shifted to depletion characteristics and enhancement characteristics due to process variations, the P-type MOS transistor M1 is surely turned off in the period T2, and the node A is externally connected. There is almost no occurrence of leakage current to the applied voltage VCC side. As a result, the potential of the node A, that is, the converter output VDDout, rises as the charge pump circuit starts operating during the period T2 in which the pulse xRST becomes LOW, and becomes a predetermined voltage value. Therefore, in the period T2, the voltage level of the node A can reach a predetermined VDD voltage value without being pulled by the externally applied power source VCC. That is, when the externally applied power supply VCC is turned on, the output voltage of the converter output VDDout can be stably raised to a predetermined voltage value while compensating for the voltage of the converter output VDDout that has not yet risen. In addition, since current can be prevented from flowing out from the node B, a circuit configuration that matches a liquid crystal display device that requires low power consumption can be obtained.

  As described above, according to the first embodiment, it is possible to avoid the influence due to the variation in the semiconductor process such as the case where the P-type MOS transistor and the N-type MOS transistor are shifted to the depletion characteristic and the enhancement characteristic, respectively. A power supply voltage conversion circuit capable of stably starting up the output voltage of the converter output VDDout to a predetermined voltage value while compensating for a self-output voltage that has not yet risen at the time of turning on, and the power supply voltage conversion circuit It is possible to provide a display device.

  In addition, the charge pump type DC / DC converter circuit can obtain a large current capacity with a small circuit scale, and is particularly effective when a transistor having a large threshold Vth, such as a thin film transistor, is used. Since it is extremely large, the DC-DC converter is integrally formed on the same substrate as the display area unit 4 as the power supply voltage conversion circuit 1, thereby reducing the cost of the set including the liquid crystal display device and further reducing the thickness. There is an effect that it is possible to provide a power supply voltage conversion circuit that can greatly contribute to downsizing and a display device using the power supply voltage conversion circuit.

  Further, the present invention is not limited to application to a liquid crystal display device, and can be similarly applied to other active matrix display devices such as an EL display device using an electroluminescence (EL) element as an electro-optical element of each pixel.

  In place of the N-type MOS transistor M4 shown in FIG. 4, a signal line for supplying a pulse RST to the level shift circuit 203, a drain electrode of the P-type MOS transistor M2, and a drain electrode of the N-type MOS transistor M3 A similar effect can be obtained by connecting a resistor R to a connection point (node B in the figure). In this case, the P-type MOS transistor M1 is turned on by inputting the “Low” level of the RST pulse shown in the timing chart of FIG. 5 to the gate electrode of the P-type MOS transistor M1 through the resistor R of about 100 KΩ, and the converter output VDDout (node A potential) is raised to the VCC level. In this way, the VDD voltage can be supplied to the power supply lines of the reset circuit and the level shift circuit, and these circuits can start operation. When the VDD voltage is applied to the power supply line of the reset circuit and the level shift circuit, the RST pulse becomes “High” level, so that the potential of the node B becomes “High” level and the P-type MOS transistor M1 is turned off. To do. As a result, after node A is disconnected from the VCC externally applied voltage power supply line, converter output voltage VDDout rises due to the operation of the converter itself, and reaches a prescribed VDD voltage value.

  FIG. 6A shows the result of simulating the leakage current (current flowing through the node B) and the voltage value of the converter output VDDout for the reset circuit of the second embodiment using the resistor R and the reset circuit of the first embodiment. It is explanatory drawing which shows. When the resistor R of Example 2 is used, approximately 100 μA flows. On the other hand, when the N-type MOS transistor M4 of the first embodiment is used, it is shown that the leakage current need not be considered. This also contributes to reduction of current consumption. In the case of the second embodiment, the output voltage of the converter output VDDout is lower than 4.9 Vdc even when the output is established, but in the case of the second embodiment, the output voltage is improved to around 5 Vdc.

  FIG. 6B shows the leakage current and converter when the P-type MOS transistors M1 and M2 and the N-type MOS transistors M3 and M4 in the converter circuit are biased toward depletion characteristics and enhancement characteristics, respectively, due to variations in semiconductor processes. It is explanatory drawing which shows the result of having simulated the output voltage of output VDDout (here, the shift amount of transistor threshold voltage Vth was assumed to be +/- 1V). The leakage current value and the output voltage of the converter output VDDout are better in the first embodiment than in the second embodiment. Note that the leakage current in the first embodiment is mainly due to the depletion characteristics of the transistor M1.

It is a block diagram which shows the structure of the liquid crystal display device in which the power supply voltage converter circuit of Example 1 of this invention is used. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an arrangement configuration diagram showing an outline of an arrangement configuration of circuit elements of a flat panel display device using a power supply voltage conversion circuit according to a first embodiment of the present invention. It is a circuit diagram which shows the specific structure of the display area part of the liquid crystal display device of Example 1 of this invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram illustrating a main configuration of a charge pump type DC / DC converter circuit that is a power supply voltage conversion circuit according to a first embodiment of the present invention. It is a timing chart which shows the power supply voltage waveform and various signal waveforms at the time of external application power supply VCC input in the power supply voltage conversion circuit 1 of Example 1 of this invention. It is explanatory drawing which shows the result of having simulated the leakage current in the power supply voltage conversion circuit of Example 1 and Example 2 of this invention, and the output voltage of converter output VDDout.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Power supply voltage conversion circuit, 4 ... Display area, 100 ... Liquid crystal display device, 201, 202 ... Level shift circuit (amplitude conversion circuit), 203 ... Level shift circuit (control circuit), 204 ... Inverter Circuit (control circuit), M2 ... P-type MOS transistor (control circuit), M3 ... N-type MOS transistor (control circuit), 301 ... Reset circuit, M1 ... P-type MOS transistor (first switch element) , M4... N-type MOS transistor (second switch element), C11, C14... Capacitor, VCC... Externally applied power supply (first power supply voltage), VDD... Internal power supply voltage (second power supply voltage) .

Claims (4)

A charge pump circuit that includes a capacitor and a transistor pair that charges and discharges the capacitor, converts a first power supply voltage to a second power supply voltage that is higher than the power supply voltage, and outputs the second power supply voltage;
An amplitude conversion circuit that converts an amplitude of a control pulse for driving the transistor pair using an output of the charge pump circuit as a power source;
A power supply voltage conversion circuit comprising a reset circuit for controlling the activation of the charge pump circuit,
The reset circuit is
A first switch element for connecting and opening a power supply line of the first power supply voltage and an output side of the charge pump circuit;
In a first period when the first power supply voltage is turned on, based on a start control signal, the control terminal of the first switch element is connected to a predetermined potential, the first switch element is controlled, A power supply line of a first power supply voltage and an output side of the charge pump circuit are connected by the first switch element, the first power supply voltage is supplied to the output side of the charge pump circuit, and the first power supply voltage is supplied. A second switch element that opens a control terminal of the first switch element based on the start control signal in a second period after the period has elapsed;
In the second period, the start control signal is amplitude-converted using the output of the charge pump circuit as a power source, and the amplitude-converted start control signal is applied to the control terminal of the first switch element, A control circuit for controlling the switching element of the first power supply voltage and opening the output side of the charge pump circuit from the power supply line of the first power supply voltage,
A power supply voltage conversion circuit characterized by that.   2. The power supply voltage conversion circuit according to claim 1, wherein the first period and the second period are defined based on the start control signal.   2. The power supply voltage conversion circuit according to claim 1, wherein the second switch element and the control circuit are connected in parallel to the first switch element. A display device including a display area unit in which pixels including electro-optic elements are two-dimensionally arranged in a matrix, and a power supply voltage conversion circuit,
The power supply voltage conversion circuit is:
A charge pump circuit that includes a capacitor and a transistor pair that charges and discharges the capacitor, converts a first power supply voltage to a second power supply voltage that is higher than the power supply voltage, and outputs the second power supply voltage;
An amplitude conversion circuit that converts an amplitude of a control pulse for driving the transistor pair, using an output of the charge pump circuit as a power source;
A reset circuit for controlling the activation of the charge pump circuit;
With
The reset circuit is
A first switch element for connecting and opening a power supply line of the first power supply voltage and an output side of the charge pump circuit;
In a first period when the first power supply voltage is turned on, based on a start control signal, the control terminal of the first switch element is connected to a predetermined potential, the first switch element is controlled, A power supply line of a first power supply voltage and an output side of the charge pump circuit are connected by the first switch element, the first power supply voltage is supplied to the output side of the charge pump circuit, and the first power supply voltage is supplied. A second switch element that opens a control terminal of the first switch element based on the start control signal in a second period after the period has elapsed;
In the second period, the start control signal is amplitude-converted using the output of the charge pump circuit as a power source, and the amplitude-converted start control signal is applied to the control terminal of the first switch element, A control circuit for controlling the switching element of the first power supply voltage and opening the output side of the charge pump circuit from the power supply line of the first power supply voltage,
A display device characterized by that.

Images