JP2005276892A - Wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board capable of coping with an environmental problem in which a wiring layer is covered with a gold plated layer including a small amount of lead and thallium. <P>SOLUTION: The wiring board 9 is provided with an insulating base material 1 in which a wiring layer 2 is formed on the surface thereof, and a non-electrolytic gold plated layer 3 covering the wiring layer 2. The non-electrolytic gold plated layer 3 includes lead and thallium in the amount of 5 ppm or less. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a wiring board for mounting an electronic component such as a semiconductor element or a capacitive element, and in particular, a wiring in which a wiring layer is formed on the surface of an insulating substrate and the wiring layer is covered with a gold plating layer. It relates to a substrate.

  Semiconductor integrated circuit elements such as IC and LSI, LD (semiconductor laser), LED (light emitting diode), PD (photodiode), CCD, line sensor, optical semiconductor element such as image sensor, piezoelectric vibrator, crystal vibrator, etc. Wiring boards on which vibrators and other various electronic components are mounted are generally an insulating substrate made of an electrically insulating material such as a ceramic sintered body or an organic resin, and a metal material such as tungsten, molybdenum, copper, silver, or palladium. And a wiring layer formed on the surface of the insulating substrate.

  An electronic component is mounted on the main surface or the like of the insulating base, and an electrode of the electronic component is electrically connected to the wiring layer via a conductive connecting material such as a bonding wire or solder. In addition, a part of the wiring layer where the electrode of the electronic component is not connected is connected to an external electric circuit via solder or the like, so that the electrode of the electronic component is electrically connected to the external electric circuit via the wiring layer. Connected to.

  The wiring layer of such a wiring board is generally covered with a gold plating layer in order to improve the bonding wire bonding property and solder wettability.

  In addition, as a method for forming a gold plating layer, an electroless plating method that does not require a plating current to be supplied to a wiring layer has been frequently used.

  Formation of a gold plating layer by an electroless plating method includes a gold compound such as a cyanide gold compound as a gold supply source, and includes lead (Pb) or thallium (Tl) compound such as lead chloride and thallium sulfate. The wiring layer is immersed for a predetermined time in an electroless gold plating solution made of a mixture of a crystal adjusting agent and an additive such as a pH adjusting agent, a complexing agent, and a reducing agent. Is reduced and deposited to form a plating layer.

  Lead and thallium are first adsorbed on the surface of the wiring layer, which is the portion to be plated, so that the gold plating layer is deposited and formed smoothly.

That is, first, lead and thallium are adsorbed on the surface of the wiring layer, so that catalytic activity is imparted to gold deposition at the site where the lead and thallium are adsorbed. The deposition starts smoothly and continues to deposit and deposit sequentially.
WO02 / 016668 JP 1997-143749 A Japanese Patent Laid-Open No. 1996-60379

  However, in the conventional wiring board, lead and thallium are contained in the electroless gold plating solution for forming the gold plating layer, and this lead and thallium co-deposit when the gold plating layer is deposited and formed. There is a problem that about 10 ppm to 400 ppm of lead or thallium is contained in the gold plating layer.

  In recent years, with increasing interest in the environment, there has been an increasing trend to limit the use of toxic metals such as lead and thallium, and there has been a move to prohibit the use of these harmful metals.

  The present invention has been devised in view of the above-described conventional problems, and the object thereof is to cope with environmental problems in which a wiring layer is coated with a gold plating layer having a low content of lead and thallium. And providing a simple wiring board.

  In this case, since lead and thallium function as a crystal conditioner in the electroless gold plating solution as described above, simply adding lead and thallium to the plating solution will lead to lead and thallium. Since the function of imparting catalytic activity is lost, there is a possibility that the gold plating layer cannot be uniformly and firmly applied to the surface of the wiring layer without unevenness. An object of the present invention is to solve the above problems while preventing the induction of such problems.

  The wiring board of the present invention comprises an insulating substrate having a wiring layer formed on the surface thereof, and an electroless gold plating layer covering the wiring layer, and the electroless gold plating layer contains lead and thallium. Are each 5 ppm or less.

  In the wiring board of the present invention, preferably, the insulating base is made of an aluminum oxide sintered body, and the wiring layer is made of a metallized layer formed by simultaneous firing with the insulating base. At least one of a nickel plating layer and a copper plating layer is interposed between the electroless gold plating layer.

  The wiring board of the present invention is preferably characterized in that the nickel plating layer and the copper plating layer each have a lead content of 5 ppm or less and a thallium content of 5 ppm or less.

  According to the wiring board of the present invention, since the electroless gold plating layer has a lead and thallium content of 5 ppm or less, the gold plating layer is uniformly and firmly deposited on the surface of the wiring layer without unevenness. In addition, it is possible to provide a wiring board with a low content of lead and thallium in response to environmental problems.

  In the wiring board of the present invention, preferably, the insulating base is made of an aluminum oxide sintered body, and the wiring layer is made of a metallized layer formed by simultaneous firing with the insulating base. Since at least one of the nickel plating layer and the copper plating layer is interposed between the plating layer and the mechanical strength of the insulating base and the reliability of hermetic sealing of the electronic component can be ensured satisfactorily. The gold plating layer can be firmly attached to the surface of the wiring layer made of the metallized layer through a nickel plating layer or a copper plating layer, thereby providing a more reliable coating, and airtight sealing and electrical connection of electronic components It is possible to provide a wiring board that is more excellent in reliability.

  In the wiring board of the present invention, preferably, the nickel plating layer and the copper plating layer each have a lead content of 5 ppm or less and a thallium content of 5 ppm or less, so that the content of lead or thallium is small. Therefore, it is possible to more reliably provide a wiring board corresponding to environmental problems.

  Next, the wiring board of the present invention will be described in detail with reference to the accompanying drawings.

  FIG. 1 is a sectional view showing an example of an embodiment of a wiring board according to the present invention.

  In FIG. 1, 1 is an insulating substrate and 2 is a wiring layer. The insulating substrate 1 and the wiring layer 2 mainly constitute a wiring board 9. As shown in FIG. 2, the wiring layer 2 is covered with an electroless gold plating layer 3. FIG. 2 is an enlarged cross-sectional view of the main part of FIG. 1, and in FIG. 2, the same parts as those in FIG.

  The insulating substrate 1 is made of organic materials such as ceramic materials such as aluminum oxide sintered bodies, glass ceramic sintered bodies, aluminum nitride sintered bodies, mullite sintered bodies, organic resins such as epoxy resins and polyimide resins, and ceramic fillers. It is formed of a ceramic composite material or the like dispersed in a resin.

  If the insulating substrate 1 is made of, for example, an aluminum oxide sintered body, raw powders such as aluminum oxide and silicon oxide are formed into a sheet shape together with an organic solvent and a binder to obtain a plurality of green sheets. Appropriate drilling is performed and the layers are stacked one above the other and fired at about 1300 to 1600 ° C.

This insulating substrate 1 is a semiconductor integrated circuit element such as an IC or LSI, an LD (semiconductor laser), an LED (light emitting diode), a PD (photodiode), an optical semiconductor element such as a CCD, a line sensor, or an image sensor, or a piezoelectric vibrator. , Function as a base for mounting and supporting a vibrator such as a quartz vibrator and other various electronic components.

  The insulating base 1 has, for example, a rectangular plate shape or a rectangular parallelepiped shape having a recess for storing electronic components on the upper surface, and an electronic component (not shown) is mounted on the main surface or the like.

  A wiring layer 2 is formed on the surface of the insulating substrate 1.

  The wiring layer 2 functions as a conductive path for connecting an electrode (not shown) of an electronic component mounted on the insulating base 1 to an external electric circuit (not shown).

  An electronic component is mounted on the main surface of the insulating substrate 1 and the electrodes of the electronic component are electrically connected to the wiring layer 2 via a conductive connecting material (not shown) such as a bonding wire or solder. An electronic device is formed, and an electrode of the electronic component is connected to the wiring layer 2 by connecting a part of the wiring layer 2 where the electrode of the electronic component is not connected to an external electric circuit via solder (not shown). It is electrically connected to an external electric circuit via

  As described above, the electroless gold plating layer 3 covering the surface of the wiring layer 2 is used when connecting an electrode of an electronic component to the wiring layer 2 or connecting the wiring layer 2 to an external electric circuit. The function of improving the bonding property of the bonding wire, the wettability of the solder, and the like is achieved, whereby the wiring layer 2 and the electrodes of the electronic component, the external electric circuit, and the like are firmly connected.

  The electroless gold plating layer 3 is formed by an electroless plating method that does not require a plating current to be supplied to the wiring layer 2.

  According to the wiring board 9 of the present invention, since the electroless gold plating layer 3 has a lead and thallium content of 5 ppm or less, the wiring board 9 has a low lead and thallium content in response to environmental problems. Can be provided.

  In this case, if the content of lead or thallium exceeds 5 ppm, it cannot be manufactured and used as a wiring board 9 for mounting electronic components corresponding to recent environmental problems.

  Since lead and thallium are actually contained in trace amounts as impurities in the components of electroless gold plating solutions such as potassium gold cyanide, lead compounds and thallium compounds are intentionally added to the plating solution. Even if not, there is a possibility that it may be contained in the electroless gold plating layer 3, and it cannot be asserted that the content becomes 0, and there is a possibility that a very small amount (5 ppm or less) is contained.

  In addition, what is necessary is just to adjust the thickness of the electroless gold plating layer 3 suitably according to the site | part and connection means to be connected. For example, if it is a part to which a bonding wire is connected, about 0.3 to 0.6 μm is preferable to ensure connectivity, and if it is a part to which solder is connected, it is brittle between gold and solder components. In order to prevent the formation of an intermetallic compound and improve bonding reliability, etc., about 0.05 to 0.5 μm is preferable.

  Such an electroless gold plating layer 3 having a lead and thallium content of 5 ppm or less can be formed as follows, for example.

  First, an insulating substrate 1 made of an aluminum oxide sintered body or the like and having a wiring layer 2 formed on its surface is manufactured, and nickel plating and gold plating are sequentially applied thereto, and as shown in FIG. A nickel plating layer 4 and an electroless gold plating layer 3 are sequentially deposited on the surface. Applying nickel plating before gold plating is a preferred condition of the present invention, and details will be described later. In this case, since the electroless gold plating layer 3 is formed by the electroless gold plating layer method, the nickel plating layer 4 is preferably a nickel-phosphorous electroless plating layer in consideration of workability and the like. .

  When the electroless gold plating layer 3 is deposited on the nickel-phosphorus-based nickel plating layer 4, a thin substitution gold plating layer (so-called flash plating) is first formed by a conventionally known substitutional electroless plating method. It is preferable to deposit the electroless gold plating layer 3 of the present invention after the formation.

  On this displacement gold plating layer, the electroless gold plating layer 3 of the present invention is deposited and formed with a lead and thallium content of 5 ppm or less, respectively. The electroless gold plating layer 3 contains, for example, a gold compound such as a cyan gold compound as a gold supply source, and is a non-electrolytic gold plating layer 3 made of a solution in which additives such as a pH adjuster, a complexing agent, and a reducing agent are mixed. The electrolytic gold plating solution is adjusted to working conditions such as a predetermined temperature and pH, and the wiring layer 2 (wiring substrate 9) is immersed in the solution for a predetermined time.

  Since lead and thallium are not added to the gold plating solution, the lead and thallium contents of the electroless gold plating layer 3 can be 5 ppm or less, respectively.

  In this case, the gold plating solution does not contain lead or thallium, which functions as a crystal adjusting agent and smoothly deposits gold. Therefore, the electroless gold plating layer 3 has plating unevenness, chipping, thickness variation, There is a risk of causing problems such as poor adhesion strength. In the present invention, in order to prevent the induction of such problems, the concentration of the reducing agent in the plating solution is increased, the amount of complexing agent in the solution is reduced, the concentration of gold in the solution is optimized, etc. It is necessary to use a technique capable of improving the speed and obtaining uniform crystals.

  Alternatively, after plating with a gold plating solution containing lead or thallium, heat treatment is performed at about 300 ° C. to 700 ° C. in a reducing atmosphere, and the lead or thallium contained in the electroless gold plating layer 3 is immersed in sulfuric acid or hydrochloric acid. As a result, a plating film containing no lead or thallium (electroless gold plating layer 3) can be obtained.

  In this case, simply by not adding lead and thallium to the electroless gold plating solution, the function of imparting catalytic activity by lead or thallium is lost, so the surface of the wiring layer 2 cannot be uniformly plated, and It becomes a plating crystal with many defects. As a result, heat discoloration is likely to occur, wire bonding performance is degraded, and solder wettability is degraded. In addition, since the plating speed is significantly slowed down, the time required for plating becomes longer and the cost is increased.

  Therefore, as in the present invention, it is necessary to form an electroless gold plating layer having a lead content and a thallium content of 5 ppm or less by the above-described means.

  In the wiring substrate 9 of the present invention, the insulating base 1 is made of an aluminum oxide sintered body, and the wiring layer 2 is made of a metallized layer formed by simultaneous firing with the insulating base 1. It is preferable that at least one of the nickel plating layer and the copper plating layer 4 is interposed between the electrolytic gold plating layer 3.

  With this configuration, the mechanical strength of the insulating substrate 1 and the reliability of hermetic sealing of electronic components can be ensured well, and the nickel plating layer or the copper plating layer 4 is formed on the surface of the wiring layer 2 made of a metallized layer. By providing the electroless gold-plated layer 3 firmly through the wiring, the wiring board 9 can be more reliably coated, and the wiring substrate 9 is further excellent in hermetic sealing and reliability of electrical connection of electronic components. be able to.

  When the insulating base 1 is formed of an aluminum oxide sintered body, the wiring layer 2 can be formed by simultaneous firing with the insulating base 1, so that a high melting point metal such as tungsten, molybdenum, manganese, or the like It consists of a melting point metal powder dispersed in a copper matrix. Since the nickel plating layer and the copper plating layer 4 have excellent adhesion and can be strongly bonded to both the wiring layer 2 and the electroless gold plating layer 3 formed of such a material, as described above. It functions as a base plating layer that firmly adheres the electroless gold plating layer 3 to the wiring layer 2 having a different structure.

  In this case, the nickel plating layer and the copper plating layer 4 are also preferably formed by an electroless plating method.

  The formation of the nickel plating layer or the copper plating layer 4 by the electroless plating method is, for example, in the case of a nickel plating layer, a nickel or copper supply source such as nickel sulfate, sodium hypophosphite, etc. It is formed by immersing the wiring layer 2 in an electroless nickel plating solution obtained by adding and mixing a complexing agent, a pH adjuster, a stabilizer and the like.

  2 shows an example in which only one layer of nickel or copper is formed, a two-layer structure such as nickel-copper or copper-nickel may be used. In addition, the nickel plating layer and the copper plating layer 4 are plated in a plurality of times with the heat treatment process interposed, or are plated in a plurality of times with plating solutions having different eutectoid components (phosphorus, boron, cobalt, etc.), etc. It is good also as what consists of a several layer by the means of.

  In the wiring board 9 of the present invention, the nickel plating layer and the copper plating layer 4 preferably each have a lead content of 5 ppm or less and a thallium content of 5 ppm or less.

  With this configuration, it is possible to provide the wiring board 9 with less lead and thallium content and corresponding to environmental problems more reliably.

  The nickel plating layer or the copper plating layer 4 having a lead content of 5 ppm or less and a thallium content of 5 ppm or less, for example, in the case of electroless plating, does not add lead or thallium to the plating solution. It is necessary to add a compound that can serve as a stabilizer, such as a sulfur compound or a bismuth compound.

  Similarly, in the case of copper plating, stabilization measures such as addition of a bismuth compound and reinforcement of air bubbling for stirring the plating solution are required without adding lead or thallium.

  In this case, simply not adding lead and thallium to the electroless nickel plating solution or the electroless copper plating solution may cause problems such as plating spread, short circuit, or decomposition of the plating solution.

  Therefore, as in the present invention, in order to set the lead content of each of the nickel plating layer and the copper plating layer 4 to 5 ppm or less and the thallium content to 5 ppm or less, the above-described means should be used. preferable.

  Note that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. For example, the plating layer (gold plating, nickel plating, or copper plating layer) that covers the wiring layer 2 is configured to be different between a portion that is connected to an external electric circuit and solder (not shown), and other portions. Also good.

  A flat insulating substrate 1 having an outer dimension of 1 cm × 1 cm is formed from an aluminum oxide sintered body, and a wiring layer 2 is formed on the surface of the insulating substrate 1 in a circuit pattern (polygonal line) having a width of 0.5 mm. A wiring board 9 was prepared.

  Thereafter, a nickel-phosphorous plating layer 4 was deposited on the exposed surface of the wiring layer 2 to a thickness of 2 to 4 μm, and then an electroless gold plating layer 3 was formed to a thickness of 1 μm.

  The electroless gold plating solution contains potassium gold cyanide as a gold source, sodium borohydride as a reducing agent, potassium hydroxide as a pH adjuster, potassium citrate, EDTA, and potassium cyanide as complexing agents. The concentration of the reducing agent was increased from the usual 20 to 30 g / L (liter) to 40 to 60 g / L, more than twice. The operating temperature was raised from the usual 60 ° C. to 65 ° C. for use. Furthermore, the content of potassium gold cyanide was optimized from 4 g / L to 2.5 g / L.

A plating bath with the above plating speed increased was used.

  As a comparative example, the electroless gold plating layer 3 is coated on the wiring layer 2 using a conventional electroless gold plating solution containing potassium gold cyanide as a gold supply source and lead chloride as a crystal modifier. Using the plating solution obtained by simply removing lead and thallium components from the conventional electroless gold plating solution, the electroless gold plating layer 3 was applied to the wiring layer 2 in the same manner. .

About the wiring board 9 for these tests, the content of lead and thallium in the electroless gold plating layer 3 was measured by an atomic absorption method. (Number of samples = 1) Further, the adhesion strength of the electroless gold plating layer 3 was measured by a well-known tape peeling test. (Number of samples = 10)
As a result, the lead and thallium contents of the present invention were both 5 ppm or less, whereas the conventional electroless gold plating solution contained about 100 ppm of lead. .

  Further, in the wiring board 9 of the present invention, there was no case where the electroless gold plating layer 3 was peeled off by the tape peeling test, but a solution obtained by simply removing lead and thallium from the conventional electroless gold plating solution was used. As for the wiring board 9 produced in this way, peeling of the electroless gold plating layer 3 was observed so that it could be visually confirmed in all 10 samples.

It is sectional drawing which shows an example of embodiment of the wiring board of this invention. It is a principal part expanded sectional view of the wiring board shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Insulating substrate 2 ... Wiring layer 3 ... Electroless gold plating layer 4 ... Nickel plating layer or copper plating layer

Claims (3)

It has an insulating base having a wiring layer formed on the surface and an electroless gold plating layer covering the wiring layer, and the electroless gold plating layer has a lead and thallium content of 5 ppm or less, respectively. A wiring board characterized by. The insulating base is made of an aluminum oxide sintered body, and the wiring layer is made of a metallized layer formed by co-firing with the insulating base, and the nickel is interposed between the wiring layer and the electroless gold plating layer. The wiring board according to claim 1, wherein at least one of a plating layer and a copper plating layer is interposed. 3. The wiring board according to claim 2, wherein the nickel plating layer and the copper plating layer each have a lead content of 5 ppm or less and a thallium content of 5 ppm or less.

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