JP2005267335A - Program execution processor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an execution processor capable of ensuring the scan time of a program block needing high-speed processing. <P>SOLUTION: This processor comprises a general scan system composed of a mechanism for repeating successive execution of program blocks and I/O data update processing of updating the data processed in the program blocks concerned, and the general scan system includes a background scan executing background programs in a background of a fixed time while executing the general scan system. The background program blocks are successively executed in the order of registration only for the fixed time, the program execution processing is interrupted at that stage when the fixed time comes, and the residual processing at arrival of the next background scan. This processor further comprises a background scan system composed of a mechanism for repeating background I/O data update processing of performing, in case that all the background program blocks are executed, update processing of the data executed. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a program execution processing device, and more particularly to a program execution processing device of a CPU module of a programmable controller of a stored program repetitive calculation method.

  As shown in FIG. 5, the programmable controller in the prior art includes a CPU module 111 that performs program execution processing and IO data update processing, and an IO module that has an IO channel that performs input and output with the outside (or a high function with an arithmetic function). IO modules 113a and 113b) 112a and 112b are connected via a bus 114.

FIG. 6 shows the operation of the CPU module 111 of the programmable controller, and has a mechanism for repeating the stored program execution 115 and the IO data update 116. This repeated one time is called one scan.
Stored programs are divided into processing units. The divided program is called a program block. This program block can make a start request and a stop request from the program. Execution / non-execution control of the program block is performed by the program execution processing device.

FIG. 7A shows the execution / non-execution control of the program block, and is composed of a program block A (115) that requires a high-speed response and an I / O data update process 116. In this way, in the case of only the program block A (115) having only the high-speed response, only the program block A (115) has to be executed, and the input / output response becomes faster.
FIG. 7B shows that the entire program includes a program block A that requires a fast input / output response time, a program block B that performs a file access process that requires a long processing time, and an I / O data update process. It is configured.
In such a configuration, since the program block A (115) is a program block that requires a high-speed response, the program block A (115) is executed at a high speed. The overall time will be longer.
Therefore, when the program block B (117) is activated at a certain timing, the scan time generally increases greatly. As the scan time increases, the time interval of the I / O data update processing 116 becomes longer, and the input / output response time increases. As a result, the program block A (115) that requires high-speed input / output response time cannot perform the high-speed response that is originally required due to the increase in input / output response time. Since the high-speed response cannot be performed, there is a possibility that the performance of the control of the device itself controlled by the programmable controller is insufficient.

FIG. 8 shows the scan time when the number of program blocks activated for each process varies from 5 to 3 depending on the transition state of the device controlled by the programmable controller.
As shown in FIG. 8 (A), if the program blocks 1 to 5 are executed, the time required for each processing is naturally required, so that the scan time becomes longer.
Further, as shown in FIG. 8B, when the program blocks 1 to 3 are executed, the scan time is shorter than when the program blocks 1 to 5 are executed.
As described above, when the program blocks 1 to 5 have the maximum number of activations and the program blocks 1 to 3 have the minimum number of activations, the scan time varies between the maximum number of activations and the minimum number of activations. . Due to variations in scan time, the input / output response time may vary, and the control of the device itself controlled by the programmable controller may become unstable.
Japanese Patent Laid-Open No. 2000-311008 (Page 2, Fig. 1)

  However, in the programmable controller described in the related art, since program blocks that require low-speed response are mixed in program blocks that require high-speed response, the activation of the program block affects the input / output response time of other program blocks. There is a problem of giving.

  In addition, if a program block that requires a high-speed response and a program block that requires a low-speed response are mixed and processed, the scan time becomes unstable.

  Therefore, there is a problem that must be solved in a program execution processing device in which activation of a program block does not affect the input / output response time of other program blocks and the scan time is stabilized.

In order to solve the above problems, the program execution processing device of the present invention is configured as follows.
(1) The program execution processing device includes a mechanism that sequentially executes a single or a plurality of registered program blocks and repeats an I / O data update process for updating data processed by the program blocks. A normal scan system and a background scan for executing a single or a plurality of background program blocks to be executed in the background for a predetermined time while executing the single or a plurality of program blocks are provided in the normal scan system, The single or plural background program blocks executed in the predetermined time are sequentially executed in the order registered for the predetermined time, and when the predetermined time is reached, the program execution process is interrupted at that stage, and the next Register to run and continue when a background scan arrives And a background scan system comprising a mechanism that repeats the background I / O data update process for updating the executed data when all the plurality of background program blocks are executed. Become.
(2) The program execution processing device according to (1), wherein a plurality of background scans provided in the normal scan system are provided.

(3) The program execution processing device includes a mechanism that sequentially executes a registered single or plural program blocks and repeats I / O data update processing for updating data processed by the program blocks. A normal scan system and a background scan for executing a single or a plurality of background program blocks to be executed in the background for a predetermined time while executing the single or a plurality of program blocks are provided in the normal scan system, The single or plural background program blocks to be executed at the predetermined time are divided equally by the single or plural background program blocks, and the single or plural background program blocks are equally divided by the constant time. The background program block is switched and executed. Ryo and a background scan system consisting mechanism repeating the background I / O data updating process for updating the execution data for each background program blocks, consisting comprise.
(4) The program execution processing device according to (3), wherein a plurality of background scans provided in the normal scan system are provided.

  The program execution processing device of the present invention uses a program block that requires a high-speed response as a normal scan system and allocates only a fixed time to a background scan, so that the execution time of a program block that requires a high-speed response can be extended. Since the time allotted to the background scan is only a fixed time, that time only affects program blocks that require high-speed response, which is within the allowable range of program blocks that require high-speed response. If a fixed time for the ground scan is set, the performance of the entire apparatus can be maintained without deterioration.

  Also, by registering program blocks that do not operate for each scan of the normal scan system or that do not require a stable response in the background scan system, the scan in the normal scan system can be stabilized. The device control is stable.

  The program execution processing apparatus of the present invention will be described in detail below with reference to the drawings.

As shown in FIG. 1, the program execution processing apparatus according to the first embodiment of the present invention includes a normal scan system 11 that performs a program execution process for executing a program block by performing a normal scan, and the normal scan system 11. In addition, it is composed of a background scan system 21 that performs a program execution process called background scan.
The normal scan system 11 is composed of program blocks 12 that require a high-speed response. The program blocks 12 are executed by performing a normal scan. For so-called ladder block execution, a program block 12 in which a program is blocked, the embodiment , The program blocks BLOCKA to BLOCKH (12) are executed, and then there is a background scan 13 for accessing the background scan system 21 assigned for a certain period of time, and the last I / O data performed in the normal scan There is a normal scan I / O data update process 14 for processing.
The program blocks BLOCKA to BLOCKH (12) executed in the normal scan system 11 can arbitrarily change the registration of the program blocks to be executed in each scan, and the program blocks BLOCKA to BLOCKH (12) registered for each scan. Will be executed. Further, the execution times of the program blocks BLOCKA to BLOCKH (12) are not all the same, and the execution times are different for each program block.
The background scan 13 is part of a normal scan and is assigned a fixed time T, and this fixed time T can be set arbitrarily.
The background scan system 21 is a program block 22 which may have a relatively low-speed response, and is composed of program blocks BLOCKI to BLOCKO (22) executed in the background, and these program blocks BLOCKI to BLOCKO (22) are followed by a backdrop. The process comprises a background scan I / O data update process 23 for updating the I / O data performed in the ground scan.

  The program blocks BLOCKI to BLOCKO (22) to be executed in the background can be arbitrarily registered in advance, and the execution time of each of the program blocks BLOCKI to BLOCKO (22) is not the same. Execution time is different for each block.

  In such a configuration, the program blocks BLOCKI to BLOCKO (22) registered in the background scan system 21 are executed at a predetermined time T assigned to the background scan 13 of the normal scan system 11. When the predetermined time T is reached, the process is temporarily interrupted even in the middle of the program block, and the remaining process is left to the background scan 13 of the next scan of the normal scan system 11.

  The program operation within a predetermined time T performed in the background scan 13 is registered as a sequential execution pattern in which the program blocks BLOCKI to BLOCKO (22) executed in the registered background are sequentially executed for a predetermined time T. The program blocks BLOCKI to BLOCKO (22) to be executed in the background are equally allocated at a predetermined time T, and only the allocated time T1 is assigned to the TSS pattern for executing each of the program blocks BLOCKI to BLOCKO (22). There is.

As shown in FIG. 2, the sequential execution pattern executes program blocks BLOCKI to O (22) that are executed in the background in the registered order. When a predetermined time T is reached, the program execution processing is interrupted at that stage. The continuation is executed in the background scan 13 next to the normal scan system 11.
When execution of all the program blocks BLOCKI to BLOCKO (22) registered in the background scan system 21 is completed, I / O data update processing handled by the registered program blocks BLOCKI to BLOCKO (22) is performed. The program block 22 is executed again in the order of registration, and this operation is repeated.

As shown in FIG. 3, the TSS execution pattern includes program blocks BLOCKI to BLOCKO (22) for executing a predetermined time T in the background scan 13 in the normal scan system 11 in the background registered in the background scan system 21. The program blocks BLOCKI to BLOCKO (22) are switched and executed at regular time intervals T1 that are equally allocated.
Then, the background scan 13 of the normal scan system 11 is repeated, and the program block executed to the end is repeatedly executed from the beginning through the I / O update process, and this operation is repeated.
In this way, even in the case of a program block that is processed in the background, in the case of a program block that requires a certain degree of high speed, there is no need to change the registration order, and high speed can be achieved. It is.

  As described above, even in a sequential execution pattern or a TSS execution pattern, a program block that requires a high-speed response is assigned to the normal scan system 11 and only a predetermined time is assigned to the background scan 13 so that the program block 12 that requires a high-speed response. Even if the execution time is extended, the time allocated to the background scan 13 is only the fixed time T, so that only that time affects the program block 12 that requires a high-speed response. That is, if the fixed time T of the background scan 13 is set within the allowable range of execution of the program block 12 that requires a high-speed response, the overall performance of the apparatus will not deteriorate.

  Furthermore, in the program block 12, those that do not operate every scan of the normal scan system 11 or those that do not require a stable response are registered in the background scan system 21, thereby stabilizing the scan in the normal scan system 11. This stabilizes the control of the device.

  In this way, in the programmable controller using the present invention, it is possible to control the apparatus itself even with a cheaper and slower programmable controller than before, and it is not necessary to perform processing distribution programming, thereby reducing development man-hours. It can be done.

  Next, a program execution processing apparatus according to a second embodiment of the present invention will be described with reference to the drawings.

As shown in FIG. 4, the program execution processing apparatus according to the second embodiment is configured such that a plurality of background scans exist in the normal scan system 11 so that the priority order can be changed variously. A normal scan system 11 that performs a program execution process for executing a program block 12 by performing a normal scan, and a background scan system 21 that performs a program execution process called a background scan separately from the normal scan system 11 It consists of and.
The normal scan system 11 is composed of program blocks 12 that require a high-speed response. The program blocks are executed by performing a normal scan. For so-called ladder block execution, a program block obtained by blocking a program, in the embodiment, a program block. There are a plurality of background scans (1) 13A and background scans (2) 13B that execute blocks BLOCKA to BLOCKH (12) and then access the background scan system 21 assigned for a certain period of time. In addition, there is a normal scan I / O data update process 14 for processing the I / O data performed in the normal scan.
The program blocks BLOCKA to BLOCKH (12) executed in the normal scan system 11 can arbitrarily change the registration of the program blocks desired to be executed in each scan, and the program blocks BLOCKA to BLOCKH (12) registered for each scan. Will be executed. Further, the execution times of the program blocks BLOCKA to BLOCKH (12) are not all the same, and the execution times are different for each program block.
The background scan (1) 13A and the background scan (2) 13B are part of a normal scan and are assigned a fixed time (1) T and a fixed time (2) T. The fixed time T is arbitrarily set. It is possible.
The background scan system 21 is a program block that may have a relatively low speed response, and is composed of program blocks BLOCKI to BLOCKO (22A) executed by the background scan (1) 13A, and these program blocks BLOCKI to BLOCKO (22A). Next, a background scan (1) I / O data update process 23A for updating the I / O data performed in the background scan (1) 13A, and a program block BLOCKP executed in the background scan (2) 13B ~ BLOCKS (22B), and after these program blocks BLOCKP ~ BLOCKS (22B), background scan (2) background scan (2) I / O update processing performed in 13B There is a data update process 23B.

  The program blocks BLOCKI to BLOCKO (22A) and BLOCKP to BLOCKS (22B) executed in the background can be arbitrarily registered in advance, and each of the program blocks BLOCKI to BLOCKO (22A) and BLOCKP to BLOCKS (22B) Are not the same, and the execution time differs for each program block.

  In such a configuration, the background scan system 21 has a fixed time (1) T and a fixed time (2) T allocated to the background scan (1) 13A and the background scan (2) 13B of the normal scan system 11. , Registered program blocks BLOCKI to BLOCKO (22A) and BLOCKP to BLOCKS (22B) are executed. When the predetermined time T is reached, the processing is temporarily interrupted even in the middle of the program block, and the remaining scans are processed in the background scans (1) and (2) 13A and 13B of the next scan of the normal scan system 11. Entrust.

  The program operation within a predetermined time T performed in the background scan (1) 13A and the background scan (2) 13B is performed by program blocks BLOCKI to BLOCKO (22A), BLOCKP to BLOCKS ( 22B) is sequentially allocated for a predetermined time T, and program blocks BLOCKI to BLOCKO (22A) and BLOCKP to BLOCKS (22B) to be executed in the registered background are equally allocated at a predetermined time T. There are TSS patterns for executing each of the program blocks BLOCKI to BLOCKO (22A) and BLOCKP to BLOCKS (22B) only for the equally allocated time T1. Since this sequential execution pattern has been described above with reference to FIG. 2, its description is omitted. Since the TSS pattern is also described above with reference to FIG. 3, the description thereof is omitted.

  As described above, the normal scan system 11 sets a plurality of background scans during the normal scan, and changes the background constant time (constant time (1), constant time (2)), respectively. The priority of program execution can be changed without affecting time.

  Even if the execution time of a program block that requires high-speed response is extended by assigning a program block that requires high-speed response to the normal scan system and allocating only a certain time to the background scan, the time allocated to the background scan is constant. Because it is only time, only that time will affect program blocks that require fast response, and this is done by setting a fixed time for background scanning within the allowable range of program blocks that require fast response. If this is the case, a program execution processing apparatus that can maintain the performance of the entire apparatus without deteriorating is provided.

It is a block diagram of the program execution processing apparatus of 1st Example of this invention. It is a block diagram of a sequential execution pattern. It is a block diagram of a TSS pattern. It is a block diagram of the program execution processing apparatus of 2nd Example of this invention. It is explanatory drawing which showed the structure of the programmable controller in a prior art. It is the block diagram which showed operation | movement of CPU module which comprises a programmable controller. It is a block diagram when the program execution time (scan time) by program starting is increased. It is a block diagram when the program execution time (scan time) by program starting is increased.

Explanation of symbols

11 Normal Scan System 12 Program Block 13 Background Scan 13A Background Scan (1)
13B Background scan (2)
14 Normal Scan I / O Data Update Processing 21 Background Scan System 22 Program Block 22A Program Block 22B Program Block 23 Background Scan I / O Data Update Processing 23A Background Scan (1) I / O Data Update Processing 23B Background Scan (2) I / O data update processing.

Claims (4)

A normal scan system comprising a mechanism that sequentially executes a registered program block or a plurality of program blocks and repeats an I / O data update process for updating data processed in the program block;
The normal scan system is provided with a background scan for executing a single or a plurality of background program blocks that are executed in the background for a fixed time during the execution of the single or a plurality of program blocks,
The single or plural background program blocks executed in the predetermined time are sequentially executed in the order registered for the predetermined time, and when the predetermined time is reached, the program execution process is interrupted at that stage, and the next When the background scan arrives, the continuation is executed, and when all the registered plurality of background program blocks are executed, the background I / I for updating the executed data is executed. A background scan system comprising a mechanism for repeating the O data update process;
A program execution processing apparatus comprising:   2. The program execution processing apparatus according to claim 1, wherein a plurality of background scans provided in the normal scan system are provided. A normal scan system comprising a mechanism that sequentially executes a registered program block or a plurality of program blocks and repeats an I / O data update process for updating data processed in the program block;
The normal scan system is provided with a background scan for executing a single or a plurality of background program blocks that are executed in the background for a fixed time during the execution of the single or a plurality of program blocks,
The single or plural background program blocks to be executed at the predetermined time are divided equally by the single or plural background program blocks, and the single or plural background program blocks are equally divided by the constant time. A background scan system comprising a mechanism that repeats the background I / O data update process for performing the update process of the executed data for each background program block that has been executed, while switching the background program blocks of ,
A program execution processing apparatus comprising: 4. The program execution processing apparatus according to claim 3, wherein a plurality of background scans provided in the normal scan system are provided.

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