JP2005244204A5 - - Google Patents
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- JP2005244204A5 JP2005244204A5 JP2005018883A JP2005018883A JP2005244204A5 JP 2005244204 A5 JP2005244204 A5 JP 2005244204A5 JP 2005018883 A JP2005018883 A JP 2005018883A JP 2005018883 A JP2005018883 A JP 2005018883A JP 2005244204 A5 JP2005244204 A5 JP 2005244204A5
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- conductive film
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- 239000004065 semiconductor Substances 0.000 claims 45
- 238000000034 method Methods 0.000 claims 23
- 239000000463 material Substances 0.000 claims 17
- 238000004519 manufacturing process Methods 0.000 claims 15
- 239000000758 substrate Substances 0.000 claims 15
- 230000001678 irradiating effect Effects 0.000 claims 5
- 230000015572 biosynthetic process Effects 0.000 claims 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims 2
- 238000007599 discharging Methods 0.000 claims 2
- 238000005530 etching Methods 0.000 claims 2
- 229910052739 hydrogen Inorganic materials 0.000 claims 2
- 239000001257 hydrogen Substances 0.000 claims 2
- 239000012535 impurity Substances 0.000 claims 2
- 238000009413 insulation Methods 0.000 claims 2
- 150000002894 organic compounds Chemical class 0.000 claims 2
- 235000003392 Curcuma domestica Nutrition 0.000 claims 1
- 244000008991 Curcuma longa Species 0.000 claims 1
- 229910052782 aluminium Inorganic materials 0.000 claims 1
- 125000005501 benzalkonium group Chemical group 0.000 claims 1
- 150000001875 compounds Chemical class 0.000 claims 1
- 229910052802 copper Inorganic materials 0.000 claims 1
- 239000013078 crystal Substances 0.000 claims 1
- 235000003373 curcuma longa Nutrition 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 229910052736 halogen Inorganic materials 0.000 claims 1
- 150000002367 halogens Chemical class 0.000 claims 1
- 239000004973 liquid crystal related substance Substances 0.000 claims 1
- 229910052759 nickel Inorganic materials 0.000 claims 1
- 229910052697 platinum Inorganic materials 0.000 claims 1
- 229910052709 silver Inorganic materials 0.000 claims 1
- 239000000126 substance Substances 0.000 claims 1
- 235000013976 turmeric Nutrition 0.000 claims 1
Claims (24)
前記第1の導電膜パターンに対してレーザー光を選択的に照射して露光し、 Exposing the first conductive film pattern by selectively irradiating a laser beam;
露光された前記第1の導電膜パターンを現像することによって、前記第1の導電膜パターンのうち前記レーザー光を照射していない部分を除去して、第2の導電膜パターンを形成することを特徴とする半導体装置の作製方法。 Developing the exposed first conductive film pattern to remove a portion of the first conductive film pattern that has not been irradiated with the laser light to form a second conductive film pattern; A method for manufacturing a semiconductor device.
前記第1の導電膜パターンに対してレーザー光を選択的に照射して露光し、
露光された前記第1の導電膜パターンを現像して前記第1の導電膜パターンよりも幅の狭い第2の導電膜パターンを形成し、
前記第2の導電膜パターンを覆う絶縁膜を形成し、
前記絶縁膜上に半導体膜を形成することを特徴とする半導体装置の作製方法。 On a substrate having an insulating surface, a conductive film material including a photosensitive material to form a first conductive film pattern by discharging a droplet discharge method,
And it was selectively irradiated for exposure with laser light to the first conductive film pattern,
Developing the exposed first conductive layer pattern to form a narrower second conductive layer pattern width than the first conductive film pattern,
Forming a insulation Enmaku covering the second conductive film pattern,
The method for manufacturing a semiconductor device comprising the Turkey to form a semiconductor layer on the insulation film.
前記感光性材料は、ネガ型であることを特徴とする半導体装置の作製方法。 In 請 Motomeko 2,
The method for manufacturing a semiconductor device, wherein the photosensitive material is a negative type.
前記感光性材料は、ポジ型であることを特徴とする半導体装置の作製方法。 In 請 Motomeko 2,
The method for manufacturing a semiconductor device, wherein the photosensitive material is a positive type.
前記半導体膜上にポジ型の感光性材料を含む導電膜材料を液滴吐出法で吐出して導電膜パターンを形成し、 A conductive film pattern containing a positive photosensitive material is discharged onto the semiconductor film by a droplet discharge method to form a conductive film pattern,
前記導電膜パターンに対してレーザー光を選択的に照射して露光し、 The conductive film pattern is selectively irradiated with a laser beam for exposure,
露光された前記導電膜パターンを現像してソース配線およびドレイン配線を形成することを特徴とする半導体装置の作製方法。 A method for manufacturing a semiconductor device, comprising developing the exposed conductive film pattern to form a source wiring and a drain wiring.
前記ゲート電極を覆うゲート絶縁膜を形成し、 Forming a gate insulating film covering the gate electrode;
前記ゲート絶縁膜上に半導体膜を形成し、 Forming a semiconductor film on the gate insulating film;
前記半導体膜上にポジ型の感光性材料を含む導電膜材料を液滴吐出法で吐出して導電膜パターンを形成し、 A conductive film pattern containing a positive photosensitive material is discharged onto the semiconductor film by a droplet discharge method to form a conductive film pattern,
前記導電膜パターンに対してレーザー光を選択的に照射して露光し、 The conductive film pattern is selectively irradiated with a laser beam for exposure,
露光された前記導電膜パターンを現像してソース配線およびドレイン配線を形成することを特徴とする半導体装置の作製方法。 A method for manufacturing a semiconductor device, comprising developing the exposed conductive film pattern to form a source wiring and a drain wiring.
前記ソース配線および前記ドレイン配線をマスクとして、前記半導体膜の上層部のエッチングを行うことを特徴とする半導体装置の作製方法。 An upper layer portion of the semiconductor film is etched using the source wiring and the drain wiring as a mask.
前記ゲート電極を覆うゲート絶縁膜を形成し、
前記ゲート絶縁膜上に第1の半導体膜を形成し、
前記第1の半導体膜上にn型またはp型を付与する不純物元素を含む第2の半導体膜を形成し、
前記第2の半導体膜上にポジ型の感光性材料を含む導電膜材料を液滴吐出法で吐出して導電膜パターンを形成し、
前記導電膜パターンに対してレーザー光を選択的に照射して露光し、
露光された前記導電膜パターンを現像してソース配線およびドレイン配線を形成し、
前記ソース配線および前記ドレイン配線をマスクとして、前記第1の半導体膜の上層部および前記第2の半導体膜のエッチングを行うことを特徴とする半導体装置の作製方法。 The gate electrode is formed on a base plate having an insulating surface,
Forming a gate insulating film covering the gate electrode;
A first semiconductor film is formed on the gate insulating film,
A second semiconductor film containing an impurity element imparting n-type or p-type is formed on the first semiconductor film,
A conductive film pattern containing a positive photosensitive material is discharged onto the second semiconductor film by a droplet discharge method to form a conductive film pattern.
And it was selectively irradiated for exposure with Les Za light to the conductive film pattern,
Developing the exposed the conductive pattern to form a source wiring and the drain wiring,
Said source wiring and the drain wiring as a mask, a method for manufacturing a semiconductor device comprising the TURMERIC line etching of the upper layer portion and the second semiconductor layer of the first semiconductor film.
前記基板の表面側から前記レーザー光を照射することを特徴とする半導体装置の作製方法。 A method for manufacturing a semiconductor device, wherein the laser light is irradiated from a surface side of the substrate.
前記ゲート電極上にネガ型の感光性材料を含む導電膜材料を液滴吐出法で吐出して第1の導電膜パターンを形成し、 A conductive film material containing a negative photosensitive material is discharged on the gate electrode by a droplet discharge method to form a first conductive film pattern,
前記第1の導電膜パターンに対して、前記基板の裏面側から前記ゲート電極をマスクとしてレーザー光を照射して露光し、 The first conductive film pattern is exposed by irradiating a laser beam from the back side of the substrate with the gate electrode as a mask,
露光された前記第1の導電膜パターンを現像して第2の導電膜パターンを形成することを特徴とする半導体装置の作製方法。 The method for manufacturing a semiconductor device, wherein the exposed first conductive film pattern is developed to form a second conductive film pattern.
前記第2の導電膜パターンによってソース配線およびドレイン配線を形成することを特徴とする半導体装置の作製方法。 A method for manufacturing a semiconductor device, wherein a source wiring and a drain wiring are formed using the second conductive film pattern.
前記ゲート電極を覆うゲート絶縁膜を形成し、 Forming a gate insulating film covering the gate electrode;
前記ゲート絶縁膜上に半導体膜を形成し、 Forming a semiconductor film on the gate insulating film;
前記半導体膜上にネガ型の感光性材料を含む導電膜材料を液滴吐出法で吐出して導電膜パターンを形成し、 A conductive film pattern including a negative photosensitive material is discharged on the semiconductor film by a droplet discharge method to form a conductive film pattern,
前記導電膜パターンに対して、前記基板の裏面側から前記ゲート電極をマスクとしてレーザー光を照射して露光し、 The conductive film pattern is exposed by irradiating a laser beam from the back side of the substrate with the gate electrode as a mask,
露光された前記導電膜パターンを現像してソース配線およびドレイン配線を形成することを特徴とする半導体装置の作製方法。 A method for manufacturing a semiconductor device, comprising developing the exposed conductive film pattern to form a source wiring and a drain wiring.
前記ソース配線および前記ドレイン配線をマスクとして、前記半導体膜の上層部のエッチングを行うことを特徴とする半導体装置の作製方法。 An upper layer portion of the semiconductor film is etched using the source wiring and the drain wiring as a mask.
前記ゲート電極を覆うゲート絶縁膜を形成し、
前記ゲート絶縁膜上に第1の半導体膜を形成し、
前記第1の半導体膜上にn型またはp型を付与する不純物元素を含む第2の半導体膜を形成し、
前記第2の半導体膜上にネガ型の感光性材料を含む導電膜材料を液滴吐出法で吐出して導電膜パターンを形成し、
前記導電膜パターンに対して、前記基板の裏面側から前記ゲート電極をマスクとしてレーザー光を照射して露光し、
露光された前記導電膜パターンを現像してソース配線およびドレイン配線を形成することを特徴とする半導体装置の作製方法。 Forming a Gate electrode on a base plate having an insulating surface,
Forming a gate insulating film covering the gate electrode;
A first semiconductor film is formed on the gate insulating film,
A second semiconductor film containing an impurity element imparting n-type or p-type is formed on the first semiconductor film,
Forming a conductive film pattern by discharging a conductive film material containing a negative photosensitive material on the second semiconductor film by a droplet discharge method;
The conductive film pattern is exposed by irradiating a laser beam from the back side of the substrate with the gate electrode as a mask,
The method for manufacturing a semiconductor device comprising a benzalkonium form a source over scan wiring and a drain wiring by developing the exposed said conductive pattern.
前記ソース配線および前記ドレイン配線をマスクとして、前記第1の半導体膜および前記第2の半導体膜の上層部のエッチングを行うことを特徴とする半導体装置の作製方法。 A method for manufacturing a semiconductor device, comprising etching the upper layers of the first semiconductor film and the second semiconductor film using the source wiring and the drain wiring as a mask.
前記ソース配線および前記ドレイン配線は、前記ゲート電極をマスクとして前記レーザー光を照射して露光することによって、自己整合的に形成されることを特徴とする半導体装置の作製方法。 The method for manufacturing a semiconductor device, wherein the source wiring and the drain wiring are formed in a self-aligned manner by irradiating the laser beam with the gate electrode as a mask for exposure.
前記感光性材料を含む導電膜材料は、Ag、Au、Cu、Ni、Al、Ptの化合物あるいは単体のいずれかが含まれていることを特徴とする半導体装置の作製方法。 In any one of Claims 1 thru | or 16 ,
The method for manufacturing a semiconductor device, wherein the conductive film material containing the photosensitive material contains a compound of Ag, Au, Cu, Ni, Al, Pt or a simple substance.
前記ゲート電極上にゲート絶縁膜と、
前記ゲート絶縁膜上にチャネル形成領域を含む半導体膜と、
前記半導体膜上にソース配線およびドレイン配線と、を有し、
前記チャネル形成領域のチャネル長は前記ゲート電極の幅と等しく、且つ、前記ソース配線と前記ドレイン配線との間隔と等しいことを特徴とする半導体装置。 A Gate electrode on a first substrate having an insulating surface,
And Gate insulating film before Kige over gate electrode on,
A semiconductor film including a channel formation region on the gate insulating film;
Anda source over scan line and a wiring on said semiconductor film,
The channel length of the channel formation region is equal to the width of the gate electrode, and, wherein a is equal to the distance between the source wiring and the drain wiring.
前記ソース配線または前記ドレイン配線上に画素電極を有することを特徴とする半導体装置。 A semiconductor device having a pixel electrode over the source wiring or the drain wiring.
前記チャネル形成領域を含む半導体膜は、水素またはハロゲン水素が添加された非単結晶半導体膜、または多結晶半導体膜であることを特徴とする半導体装置。 In claim 18 or claim 19 ,
Said semiconductor film including a channel formation region, wherein a hydrogen or halogen hydrogen is a non single crystal semiconductor film is added or a polycrystalline semiconductor film.
前記チャネル形成領域を含む半導体膜は、非晶質半導体膜またはセミアモルファス半導体膜であることを特徴とする半導体装置。 The semiconductor device including the channel formation region is an amorphous semiconductor film or a semi-amorphous semiconductor film.
前記ソース配線および前記ドレイン配線は、感光性材料を含むことを特徴とする半導体装置。 In any one of Claims 18 to 21 ,
It said source wiring and the drain wiring, wherein a light-sensitive material including it.
前記第1の基板と対向する第2の基板と、
前記第1の基板と前記第2の基板の間に保持された液晶と、を有することを特徴とする半導体装置。 According to any one of claims 18 through claim 22,
A second substrate facing the first substrate;
Wherein a Rukoto to have a, and liquid crystal held between the first substrate and the second substrate.
前記ソース配線または前記ドレイン配線と電気的に接続された第1の電極と、前記第1の電極上の有機化合物を含む層と、前記有機化合物を含む層上の第2の電極とで構成される発光素子を有することを特徴とする半導体装置。 According to any one of claims 18 through claim 22,
A first electrode electrically connected to the source wiring or the drain wiring; a layer containing an organic compound on the first electrode; and a second electrode on the layer containing the organic compound. wherein a to have a that the light emitting element.
Priority Applications (1)
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JP2005018883A JP2005244204A (en) | 2004-01-26 | 2005-01-26 | Electronic device, semiconductor device and its manufacturing method |
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JP2004017608 | 2004-01-26 | ||
JP2004017583 | 2004-01-26 | ||
JP2005018883A JP2005244204A (en) | 2004-01-26 | 2005-01-26 | Electronic device, semiconductor device and its manufacturing method |
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JP2011138469A Division JP5386547B2 (en) | 2004-01-26 | 2011-06-22 | Method for manufacturing semiconductor device |
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JP2005244204A JP2005244204A (en) | 2005-09-08 |
JP2005244204A5 true JP2005244204A5 (en) | 2008-03-06 |
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Families Citing this family (16)
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JP4754848B2 (en) * | 2004-03-03 | 2011-08-24 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
JP2007129007A (en) * | 2005-11-02 | 2007-05-24 | Hitachi Ltd | Method of manufacturing semiconductor device having organic semiconductor film |
JP5230597B2 (en) * | 2006-03-29 | 2013-07-10 | プラスティック ロジック リミテッド | Electronic device with self-aligned electrodes |
KR101246718B1 (en) * | 2006-05-12 | 2013-03-25 | 엘지디스플레이 주식회사 | Method of fabricating the array substrate for liquid crystal display device using the photo sensitive metal paste |
TWI752316B (en) | 2006-05-16 | 2022-01-11 | 日商半導體能源研究所股份有限公司 | Liquid crystal display device |
CN100444009C (en) * | 2006-07-25 | 2008-12-17 | 友达光电股份有限公司 | Method for forming array substrate |
JP2008177253A (en) * | 2007-01-16 | 2008-07-31 | Sharp Corp | Manufacturing method for electronic device, resist pattern forming system, electronic device, and thin-film transistor |
CN100464404C (en) * | 2007-01-30 | 2009-02-25 | 友达光电股份有限公司 | Making method of pixel structure |
EP2308093B1 (en) * | 2008-08-04 | 2020-04-15 | The Trustees of Princeton University | Hybrid dielectric material for thin film transistors |
US7977151B2 (en) * | 2009-04-21 | 2011-07-12 | Cbrite Inc. | Double self-aligned metal oxide TFT |
JP2012023285A (en) * | 2010-07-16 | 2012-02-02 | Seiko Instruments Inc | Method of manufacturing tft using photosensitive application-type electrode material |
CN102185575A (en) * | 2010-12-31 | 2011-09-14 | 苏州普锐晶科技有限公司 | Method for removing frequency chip protective glass |
JP5960430B2 (en) * | 2011-12-23 | 2016-08-02 | 株式会社半導体エネルギー研究所 | Method for manufacturing semiconductor device |
JP2013236068A (en) * | 2012-04-12 | 2013-11-21 | Semiconductor Energy Lab Co Ltd | Semiconductor device and manufacturing method therefor |
CN103395307B (en) * | 2013-07-29 | 2015-09-09 | 电子科技大学 | A kind of preparation method of internal electrode of chip-type electronic component |
JP6073825B2 (en) * | 2014-02-24 | 2017-02-01 | 日本電信電話株式会社 | Semiconductor device and manufacturing method thereof |
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JPH0661257A (en) * | 1992-08-05 | 1994-03-04 | Dainippon Printing Co Ltd | Thin film transistor and its manufacture |
JP2000258921A (en) * | 1999-03-10 | 2000-09-22 | Canon Inc | Pattern forming method and its formed pattern |
JP4250345B2 (en) * | 2000-02-08 | 2009-04-08 | キヤノン株式会社 | Conductive film forming composition, conductive film forming method, and image forming apparatus manufacturing method |
JP2002118118A (en) * | 2000-07-10 | 2002-04-19 | Semiconductor Energy Lab Co Ltd | Manufacturing method of semiconductor device |
JP2003058077A (en) * | 2001-08-08 | 2003-02-28 | Fuji Photo Film Co Ltd | Substrate for microfabrication, fabrication method therefor and image-like thin-film forming method |
KR100878236B1 (en) * | 2002-06-12 | 2009-01-13 | 삼성전자주식회사 | A method of forming a metal pattern and a method of fabricating TFT array panel by using the same |
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