JP2005236215A - Method for manufacturing wiring board - Google Patents

Method for manufacturing wiring board Download PDF

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JP2005236215A
JP2005236215A JP2004046663A JP2004046663A JP2005236215A JP 2005236215 A JP2005236215 A JP 2005236215A JP 2004046663 A JP2004046663 A JP 2004046663A JP 2004046663 A JP2004046663 A JP 2004046663A JP 2005236215 A JP2005236215 A JP 2005236215A
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photosensitive resin
resin layer
exposed
solder resist
insulating substrate
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Ryuji Maruyama
龍二 丸山
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Kyocera Corp
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Kyocera Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board having fewer defective parts wherein insulating foundation substrate is exposed to a solder resist layer and having excellent electrical insulation reliability of the solder resist layer. <P>SOLUTION: This method for manufacturing the wiring board comprises the steps of forming a first photosensitive resin layer 3a all over the upper surface of the insulating substrate 1 having a mounting region A in the central part of the upper surface wherein a plurality of connection pads 2a are formed, then so exposing that the part of the first photosensitive resin layer 3a located at the mounting region A is left as a non-exposed part N1, then forming a second photosensitive resin layer 3b all over the first photosensitive resin layer 3a, then so exposing that the parts of the first and the second photosensitive resin layers 3a, 3b located at the central part of the connection pads 2a are left as non-exposed parts N3, then so developing the first and the second photosensitive resin layers 3a, 3b that the non-exposed parts N3 on the connection pads 2a are removed, and then curing them to form a solder resist layer 3. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、上面に半導体集積回路素子等の電子部品の電極が半田バンプを介して接続される接続パッドが形成された絶縁基板上に前記接続パッドの中央部を露出させる開口部を有するソルダーレジスト層を被着させて成る配線基板の製造方法に関するものである。   The present invention provides a solder resist having an opening for exposing a central portion of the connection pad on an insulating substrate having a connection pad to which an electrode of an electronic component such as a semiconductor integrated circuit element is connected via a solder bump on the upper surface. The present invention relates to a method of manufacturing a wiring board formed by depositing layers.

従来、半導体集積回路素子等の電子部品を搭載するための配線基板は、上面から下面にかけて配線導体が形成された絶縁基板の上面の中央部に、電子部品の電極が半田バンプを介して接続される電子部品接続用の複数の接続パッドが形成された実装領域を有しているとともに、その上に電子部品接続用の接続パッドの中央部を露出させる開口部を有するソルダーレジスト層が被着形成されている。そして、この配線基板によれば、ソルダーレジスト層から露出した電子部品接続用の接続パッドに半田バンプを溶着させた後、その半田バンプに電子部品の電極を当接させて半田バンプを溶融させることにより電子部品の電極が電子部品接続用の接続パッドに半田バンプを介して電気的に接続されるとともに電子部品が実装領域に搭載され、しかる後、電子部品と実装領域との間にアンダーフィルと呼ばれる保護樹脂が充填されることにより電子装置となる。   Conventionally, wiring boards for mounting electronic components such as semiconductor integrated circuit elements have electrodes of electronic components connected via solder bumps to the center of the upper surface of an insulating substrate on which wiring conductors are formed from the upper surface to the lower surface. A solder resist layer having a mounting area on which a plurality of connection pads for connecting electronic components are formed and having an opening exposing the central portion of the connection pads for connecting electronic components is formed thereon Has been. According to this wiring board, after solder bumps are welded to the connection pads for connecting electronic components exposed from the solder resist layer, the electrodes of the electronic components are brought into contact with the solder bumps to melt the solder bumps. Thus, the electrode of the electronic component is electrically connected to the connection pad for connecting the electronic component via the solder bump, and the electronic component is mounted on the mounting area. An electronic device is obtained by filling a so-called protective resin.

このような配線基板におけるソルダーレジスト層は、絶縁基板上面の配線導体や接続パッドの間の電気的な絶縁を良好に保つためのものであり、接続パッドが形成された絶縁基板の上面の全面にソルダーレジスト用の感光性樹脂ペーストを印刷塗布し、それを乾燥させて感光性樹脂層を形成した後、その感光性樹脂層における接続パッドの中央部上に位置する部位が未感光部として残るように露光し、次に感光性樹脂層を接続パッド上に位置する未感光部が除去されるように現像した後、残った感光性樹脂層を紫外線硬化および熱硬化させることによって形成される。なお、絶縁基板上に形成されたソルダーレジス用の感光性樹脂層を露光するには、絶縁基板上に形成されたソルダーレジスト用の感光性樹脂層の上に樹脂フィルムやガラス板から成る露光マスクを載置し、その上から露光する方法が採用されている。
特開平6−188544号公報
The solder resist layer in such a wiring board is for maintaining good electrical insulation between the wiring conductors and connection pads on the upper surface of the insulating substrate, and is provided on the entire upper surface of the insulating substrate on which the connection pads are formed. After the photosensitive resin paste for solder resist is printed and applied and dried to form a photosensitive resin layer, the portion located on the center of the connection pad in the photosensitive resin layer remains as an unexposed portion. Then, the photosensitive resin layer is developed so that the unexposed portion located on the connection pad is removed, and then the remaining photosensitive resin layer is formed by ultraviolet curing and heat curing. In addition, in order to expose the photosensitive resin layer for solder resist formed on the insulating substrate, an exposure mask made of a resin film or a glass plate on the photosensitive resin layer for solder resist formed on the insulating substrate. Is used, and a method of exposing from above is employed.
JP-A-6-188544

しかしながら、このような配線基板においては、絶縁基板の上面にソルダーレジスト層用の感光性樹脂層を形成した後、その上に露光マスクを載置して露光する際に、通常はクリーンルーム内で作業が行なわれるものの、クリーンルーム内に僅かに残存するダスト等に起因して感光性樹脂層や露光マスクに大きさが数十μm程度の異物が付着することがある。そして、そのような異物が付着した状態で露光した場合、異物に対応する部位の感光性樹脂層が十分に露光されずに露光後に未露光部として残り、それを現像すると異物に対応する部位の未露光部が除去されてソルダーレジスト層に下地の絶縁基板が露出する欠損部が形成されてしまい、その結果、その欠損部によりソルダーレジスト層の電気的な絶縁信頼性が損なわれてしまうことがあるという問題があった。   However, in such a wiring board, a photosensitive resin layer for a solder resist layer is formed on the upper surface of an insulating substrate, and then an exposure mask is placed on the photosensitive substrate layer for exposure, usually in a clean room. However, foreign matter having a size of about several tens of μm may adhere to the photosensitive resin layer or the exposure mask due to dust remaining slightly in the clean room. And when exposed with such foreign matter attached, the photosensitive resin layer of the part corresponding to the foreign substance is not sufficiently exposed and remains as an unexposed part after exposure, and when it is developed, the part of the part corresponding to the foreign substance is developed. The unexposed part is removed, and a defect part is formed in the solder resist layer where the underlying insulating substrate is exposed. As a result, the electrical insulation reliability of the solder resist layer may be impaired by the defect part. There was a problem that there was.

本発明は、かかる従来の問題点に鑑み案出されたものであり、その目的は、ソルダーレジスト層に下地の絶縁基板が露出するような欠損部が形成されることが殆どなく、ソルダーレジスト層の電気的な絶縁信頼性に優れる配線基板を提供することにある。   The present invention has been devised in view of such conventional problems, and the purpose thereof is that the solder resist layer is hardly formed with a defective portion that exposes the underlying insulating substrate. An object of the present invention is to provide a wiring board having excellent electrical insulation reliability.

本発明の配線基板の製造方法は、上面の中央部に電子部品の電極が半田バンプを介して接続される複数の接続パッドが形成された実装領域を有するとともに、上面から下面にかけて前記接続パッドに電気的に接続された配線導体が形成された絶縁基板の前記上面の全面に第1の感光性樹脂層を形成する工程と、前記第1の感光性樹脂層における前記実装領域上に位置する部位が未感光部として残るように露光する工程と、前記第1の感光性樹脂層の露出表面の全面に第2の感光性樹脂層を形成する工程と、前記第1および第2の感光性樹脂層における前記接続パッドの中央部上に位置する部位が未感光部として残るように露光する工程と、前記第1および第2の感光性樹脂層を前記接続パッド上の未感光部が除去されるように現像した後に硬化させて、前記接続パッドを露出させる開口部を有する前記第1および第2の感光性樹脂層の硬化体から成るソルダーレジスト層を形成する工程とを具備することを特徴とするものである。   The method for manufacturing a wiring board according to the present invention has a mounting region in which a plurality of connection pads to which electrodes of electronic components are connected via solder bumps are formed at the center of the upper surface, and the connection pads are formed from the upper surface to the lower surface. Forming a first photosensitive resin layer on the entire upper surface of the insulating substrate on which the electrically connected wiring conductor is formed, and a portion located on the mounting region in the first photosensitive resin layer; Exposing so as to remain as an unexposed portion, forming a second photosensitive resin layer on the entire exposed surface of the first photosensitive resin layer, and the first and second photosensitive resins Exposing so that a portion of the layer located on the central portion of the connection pad remains as an unexposed portion, and removing the unexposed portion on the connection pad from the first and second photosensitive resin layers Hard after developing By and is characterized by comprising the steps of forming a solder resist layer made of a cured product of said first and second photosensitive resin layer having an opening exposing the connection pads.

本発明の配線基板の製造方法は、複数の接続パッドが形成された実装領域を有する絶縁基板の上面の全面に第1の感光性樹脂層を形成した後、その第1の感光性樹脂層における実装領域上に位置する部位が未感光部として残るように露光し、次に露光された第1の感光性樹脂層の露出表面の全面に第2の感光性樹脂層を形成した後、第1および第2の感光性樹脂層における接続パッドの中央部上に位置する部位が未感光部として残るように感光し、次に、第1および第2の感光性樹脂層を接続パッド上の未感光部が除去されるように現像した後、硬化させてソルダーレジスト層を形成することから、絶縁基板の実装領域以外の領域上に位置するソルダーレジスト層においては、第1の感光性樹脂層または第2の感光性樹脂層のいずれか一方の感光性樹脂層に異物による未感光部があったとしても、その未感光部に対応する部位の他方の感光性樹脂層が感光されているかぎり、ソルダーレジスト層に下地の絶縁基板が露出するような欠損部が形成されるようなことはない。なお、第1および第2の感光性樹脂層の両方に互いに重なる未露光部があった場合には、その部位のソルダーレジスト層に下地の絶縁基板が露出する欠損部が形成されることになるが、異物は大きくても数十μm程度であり、そのような異物が付着する割合も多くても数%程度であるので、絶縁基板の実装領域以外の領域上において第1および第2の感光性樹脂層の両方に互いに重なる未露光部が異物により形成される確率は数十兆分の1程度となり、無視することができる。また、絶縁基板の実装領域上に位置するソルダーレジスト層においては、例え第1および第2の感光性樹脂層の接続パッド上以外の部位に異物による未露光部があって、その部位に下地の絶縁基板が露出するような欠損があったとしても、絶縁基板の実装領域においては、半導体集積回路素子等の電子部品の搭載後に実装領域と電子部品との間に充填される保護樹脂により欠損部が充填されるので、ソルダーレジスト層の電気的な絶縁性に問題が発生するようなことはない。したがって、本発明の配線基板の製造方法によれば、ソルダーレジスト層における電気的な絶縁信頼性に優れる配線基板を提供することができる。   In the method for manufacturing a wiring board according to the present invention, after a first photosensitive resin layer is formed on the entire upper surface of an insulating substrate having a mounting region in which a plurality of connection pads are formed, the first photosensitive resin layer After exposing so that the site | part located on a mounting area | region remains as an unexposed part, after forming the 2nd photosensitive resin layer on the whole exposed surface of the 1st photosensitive resin layer exposed next, 1st The second photosensitive resin layer is exposed so that the portion located on the center portion of the connection pad remains as an unexposed portion, and then the first and second photosensitive resin layers are exposed to the unexposed portion on the connection pad. Since the solder resist layer is formed after being developed so that the portion is removed and then cured, in the solder resist layer located on the region other than the mounting region of the insulating substrate, the first photosensitive resin layer or the first One of the two photosensitive resin layers Even if there is an unexposed portion due to foreign matter in the photosensitive resin layer, as long as the other photosensitive resin layer corresponding to the unexposed portion is exposed, the underlying insulating substrate is exposed to the solder resist layer. No defective part is formed. When there are unexposed portions that overlap each other in both the first and second photosensitive resin layers, a defective portion that exposes the underlying insulating substrate is formed in the solder resist layer at that portion. However, since the foreign matter is about several tens of μm at most and the ratio of such foreign matter is at most several percent, the first and second photosensitive elements are formed on the region other than the mounting region of the insulating substrate. The probability that the unexposed portions that overlap each other on both of the conductive resin layers is formed by foreign matters is about 1 / hundred trillion, and can be ignored. Further, in the solder resist layer located on the mounting area of the insulating substrate, there is an unexposed portion due to foreign matter in a portion other than on the connection pad of the first and second photosensitive resin layers, and the base is formed in that portion. Even if there is a defect that exposes the insulating substrate, in the mounting region of the insulating substrate, the defective part is protected by a protective resin filled between the mounting region and the electronic component after mounting the electronic component such as a semiconductor integrated circuit element. Therefore, there is no problem with the electrical insulation of the solder resist layer. Therefore, according to the method for manufacturing a wiring board of the present invention, it is possible to provide a wiring board having excellent electrical insulation reliability in the solder resist layer.

次に、本発明の配線基板の製造方法を添付の図面に基づいて詳細に説明する。図1は、本発明の製造方法により製造される配線基板の一例を示す断面図である。この図において1は絶縁基板、2は配線導体、3はソルダーレジスト層であり、主にこれらで半導体集積回路素子等の電子部品4を搭載するための配線基板が構成される。   Next, a method for manufacturing a wiring board according to the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing an example of a wiring board manufactured by the manufacturing method of the present invention. In this figure, 1 is an insulating substrate, 2 is a wiring conductor, and 3 is a solder resist layer, and these mainly constitute a wiring substrate for mounting an electronic component 4 such as a semiconductor integrated circuit element.

絶縁基板1は、例えばガラス−エポキシ樹脂等の有機系材料から成り、配線導体2およびソルダーレジスト層3の支持体として機能し、その上面中央部に半導体集積回路素子等の電子部品4を搭載するための実装領域を有している。このような絶縁基板1は、ガラスクロスに未硬化の熱硬化性樹脂を含浸させて成る未硬化シートを必要に応じて複数枚積層し、それを熱硬化させることによって製作される。   The insulating substrate 1 is made of, for example, an organic material such as glass-epoxy resin, functions as a support for the wiring conductor 2 and the solder resist layer 3, and an electronic component 4 such as a semiconductor integrated circuit element is mounted on the center of the upper surface thereof. Has a mounting area. Such an insulating substrate 1 is manufactured by laminating a plurality of uncured sheets obtained by impregnating a glass cloth with an uncured thermosetting resin, and thermally curing them.

また、絶縁基板1には、その上面から下面にかけて貫通孔5が形成されているとともに、その上下面および貫通孔5の内面には、銅箔や銅めっき層から成る複数の配線導体2が被着形成されている。さらに貫通孔5内にはエポキシ樹脂等の熱硬化性樹脂から成る孔埋め樹脂6が充填されている。   The insulating substrate 1 has through holes 5 from the upper surface to the lower surface, and a plurality of wiring conductors 2 made of copper foil or a copper plating layer are covered on the upper and lower surfaces and the inner surface of the through holes 5. It is formed. Further, the through hole 5 is filled with a hole filling resin 6 made of a thermosetting resin such as an epoxy resin.

絶縁基板1に被着形成された配線導体2は、配線基板に搭載される電子部品4の電極を外部電気回路に接続するための導電路として機能し、絶縁基板1の上面に形成された配線導体2の一部は実装領域に露出して電子部品接続用の接続パッド2aを形成しており、下面に形成された配線導体2の一部は外部接続用の接続パッド2bを形成している。   The wiring conductor 2 deposited on the insulating substrate 1 functions as a conductive path for connecting the electrode of the electronic component 4 mounted on the wiring substrate to an external electric circuit, and the wiring formed on the upper surface of the insulating substrate 1. A part of the conductor 2 is exposed to the mounting region to form a connection pad 2a for connecting an electronic component, and a part of the wiring conductor 2 formed on the lower surface forms a connection pad 2b for external connection. .

また、絶縁基板1の上面には、電子部品接続用の接続パッド2aの中央部を露出させる開口部を有するソルダーレジスト層3が被着形成されている。   In addition, a solder resist layer 3 having an opening that exposes the central portion of the connection pad 2a for connecting electronic components is deposited on the upper surface of the insulating substrate 1.

ソルダーレジスト層3は、アクリル変性エポキシ樹脂等の耐熱樹脂から成り、絶縁基板1を半田接合時の熱から保護するとともに絶縁基板1の上面に形成された配線導体2同士の電気的な絶縁を良好に保つ作用を為し、後述する方法により形成される。   The solder resist layer 3 is made of a heat-resistant resin such as an acrylic-modified epoxy resin, and protects the insulating substrate 1 from heat at the time of soldering and provides good electrical insulation between the wiring conductors 2 formed on the upper surface of the insulating substrate 1. It is formed by the method described later.

そして、この配線基板によれば、電子部品4の電極を電子部品接続用の接続パッド2aに半田バンプ7を介して接続することによって電子部品4の電極と配線導体2とが電気的に接続されるとともに電子部品4が実装領域に搭載され、しかる後、電子部品4と実装領域との間にアンダーフィルと呼ばれる保護樹脂8を充填することによって電子部品4が配線基板に実装される。   According to this wiring board, the electrode of the electronic component 4 and the wiring conductor 2 are electrically connected by connecting the electrode of the electronic component 4 to the connection pad 2a for connecting the electronic component via the solder bump 7. At the same time, the electronic component 4 is mounted in the mounting region, and then the electronic component 4 is mounted on the wiring board by filling a protective resin 8 called underfill between the electronic component 4 and the mounting region.

次に、上述した配線基板におけるソルダーレジスト層3を本発明の製造方法にしたがって形成する方法を説明する。まず、図2(a)に断面図で示すように、電子部品接続用の接続パッド2aが形成された絶縁基板1の上面の全面に第1の感光性樹脂層3aを形成する。第1の感光性樹脂層3aは、感光性を有するアクリル変性エポキシ樹脂を含有する樹脂ペーストをスクリーン印刷法を採用して絶縁基板1の上面に塗布した後、温風乾燥法や赤外線乾燥法により乾燥させることにより形成される。   Next, a method for forming the solder resist layer 3 on the wiring board described above according to the manufacturing method of the present invention will be described. First, as shown in a sectional view of FIG. 2A, a first photosensitive resin layer 3a is formed on the entire upper surface of the insulating substrate 1 on which connection pads 2a for connecting electronic components are formed. The first photosensitive resin layer 3a is formed by applying a resin paste containing an acrylic modified epoxy resin having photosensitivity on the upper surface of the insulating substrate 1 using a screen printing method, and then performing a hot air drying method or an infrared drying method. It is formed by drying.

次に図2(b)に示すように、第1の感光性樹脂層3aの上に絶縁基板1の実装領域Aに対応する部位を遮光する第1の露光マスク(不図示)を載置し、その上から紫外線を照射することにより、第1の感光性樹脂層3aにおける実装領域A上に位置する部位が未感光部N1として残るように露光する。このとき、第1の感光性樹脂層3a上または第1の露光マスク上に異物が付着していると、異物が付着した部位に対応する第1の感光性樹脂層3aに未露光部N2が形成される。   Next, as shown in FIG. 2B, a first exposure mask (not shown) that shields a portion corresponding to the mounting area A of the insulating substrate 1 is placed on the first photosensitive resin layer 3a. Then, by irradiating with ultraviolet rays from above, exposure is performed so that the portion located on the mounting region A in the first photosensitive resin layer 3a remains as the unexposed portion N1. At this time, if foreign matter adheres on the first photosensitive resin layer 3a or the first exposure mask, the unexposed portion N2 is formed on the first photosensitive resin layer 3a corresponding to the portion where the foreign matter has adhered. It is formed.

次に図2(c)に示すように、第1の感光性樹脂層3a上の全面に第2の感光性樹脂層3bを形成する。第2の感光性樹脂層3bは、感光性を有するアクリル変性エポキシ樹脂を含有する樹脂ペーストをスクリーン印刷法を採用して第1の感光性樹脂層3aの上に塗布した後、温風乾燥法や赤外線乾燥法により乾燥させることにより形成される。   Next, as shown in FIG. 2C, a second photosensitive resin layer 3b is formed on the entire surface of the first photosensitive resin layer 3a. The second photosensitive resin layer 3b is formed by applying a resin paste containing an acrylic modified epoxy resin having photosensitivity on the first photosensitive resin layer 3a using a screen printing method, followed by a hot air drying method. Or by drying by infrared drying.

次に図2(d)に示すように、第2の感光性樹脂層3bの上に電子部品接続用の接続パッド2aの中央部に対応する部位を遮光する第2の露光マスク(不図示)を載置し、その上から紫外線を照射することにより、第2の感光性樹脂層3aにおける電子部品接続用の接続パッド2aの中央部上に形成された部位が未感光部N3として残るように露光する。このとき、第2の感光性樹脂層3b上または第2の露光マスク上に異物が付着していると、異物が付着した部位に対応する第2の感光性樹脂層3bに未露光部N4が形成される。なお、第1の感光性樹脂層3aに異物に起因する未感光部N2が形成されるとともに第2の感光性樹脂層3bにも異物に起因する未感光部N4が形成されたとしても、異物は大きさが数十μm程度と小さく、かつ異物が付着する割合が数%程度であることから第1の感光性樹脂層3aに形成された未感光部N2と第2の感光性樹脂層3bに形成された未感光部N4とが互いに上下に重なり合う確率は数十兆分の1程度と極めて低い。また、第1の感光性樹脂層3aの未感光部N2が第1の露光マスク上に付着した異物に起因するものであれば、第2の感光性樹脂層3bを露光する際に未感光部N2も同時に感光されるので、未感光部N2はなくなる。したがって第1の感光性樹脂層3aに形成された未感光部N2と第2の感光性樹脂層3bに形成された未感光部N4とが上下に重なり合って繋がることは殆どない。   Next, as shown in FIG. 2D, a second exposure mask (not shown) that shields light from a portion corresponding to the central portion of the connection pad 2a for connecting electronic components on the second photosensitive resin layer 3b. And the portion formed on the central portion of the connection pad 2a for connecting the electronic component in the second photosensitive resin layer 3a remains as an unexposed portion N3. Exposure. At this time, if foreign matter is adhered on the second photosensitive resin layer 3b or the second exposure mask, the unexposed portion N4 is formed on the second photosensitive resin layer 3b corresponding to the portion where the foreign matter is adhered. It is formed. Even if the unexposed portion N2 caused by the foreign matter is formed in the first photosensitive resin layer 3a and the unexposed portion N4 caused by the foreign matter is also formed in the second photosensitive resin layer 3b, the foreign matter is not detected. Has a small size of about several tens of μm and a foreign matter adherence ratio of about several percent, so that the unexposed portion N2 and the second photosensitive resin layer 3b formed on the first photosensitive resin layer 3a. The probability that the unexposed portions N4 formed in the upper and lower portions overlap each other is extremely low, about 1 / hundred trillion. Further, if the unexposed portion N2 of the first photosensitive resin layer 3a is caused by a foreign matter adhering to the first exposure mask, the unexposed portion is exposed when the second photosensitive resin layer 3b is exposed. Since N2 is also exposed at the same time, there is no unexposed portion N2. Therefore, the unexposed portion N2 formed on the first photosensitive resin layer 3a and the unexposed portion N4 formed on the second photosensitive resin layer 3b are hardly overlapped with each other.

次に図2(e)に示すように、第1および第2の感光性樹脂層3a、3bを電子部品接続用の接続パッド2a上の未露光部N3が除去されるように現像した後、紫外線硬化および熱硬化させる。このとき、第1の感光性樹脂層3aに異物に起因する未感光部N2が形成されていたとしても、未感光部N2の上には第2の感光性樹脂層3bが存在するので現像により未感光部N2が除去されることはない。また、第2の感光性樹脂層3bに異物に起因する未感光部N4が形成されていたとしても、未感光部N4の下には感光された第1の感光性樹脂層3aが存在するので現像により未感光部N4が除去されたとしても下地の絶縁基板1が露出するような欠損部が形成されるようなことはない。   Next, as shown in FIG. 2 (e), the first and second photosensitive resin layers 3a and 3b are developed so that the unexposed portions N3 on the connection pads 2a for connecting electronic components are removed, UV cure and heat cure. At this time, even if the unexposed portion N2 due to the foreign matter is formed on the first photosensitive resin layer 3a, the second photosensitive resin layer 3b is present on the unexposed portion N2, so that development is performed. The unexposed portion N2 is not removed. Even if the unexposed portion N4 due to the foreign matter is formed on the second photosensitive resin layer 3b, the exposed first photosensitive resin layer 3a exists under the unexposed portion N4. Even if the unexposed portion N4 is removed by development, a defective portion that exposes the underlying insulating substrate 1 is not formed.

かくして、本発明の製造方法によれば、絶縁基板1の実装領域A以外の領域上に位置するソルダーレジスト層3に下地の絶縁基板1が露出するような欠損部が形成されることは殆どない。したがって、本発明により製造される配線基板の電子部品接続用の接続パッド2aに電子部品4の電極を半田バンプ7を介して接続した後、電子部品4と実装領域Aとの間に保護樹脂8を充填することによって電子部品4を配線基板に実装した場合に、ソルダーレジスト層3における電気的な絶縁信頼性に極めて優れる配線基板を提供することができる。   Thus, according to the manufacturing method of the present invention, there is almost no defect that exposes the underlying insulating substrate 1 in the solder resist layer 3 located on the region other than the mounting region A of the insulating substrate 1. . Therefore, after the electrodes of the electronic component 4 are connected via the solder bumps 7 to the connection pads 2a for connecting the electronic components of the wiring board manufactured according to the present invention, the protective resin 8 is provided between the electronic component 4 and the mounting area A. When the electronic component 4 is mounted on the wiring board by filling the wiring board, it is possible to provide a wiring board that is extremely excellent in electrical insulation reliability in the solder resist layer 3.

なお、本発明は上記の実施の形態例に限定されるものではなく、例えば、配線基板として絶縁基体上に配線導体層と絶縁層とを交互に積層したビルドアップ基板を用いても良い。   The present invention is not limited to the above-described embodiment, and for example, a build-up substrate in which wiring conductor layers and insulating layers are alternately stacked on an insulating base may be used as the wiring substrate.

本発明の製造方法により製造される配線基板の実施の形態例を示す断面図である。It is sectional drawing which shows the embodiment of the wiring board manufactured by the manufacturing method of this invention. 本発明の配線基板の製造方法の実施の形態例を説明するための工程毎の断面図である。It is sectional drawing for every process for demonstrating the embodiment of the manufacturing method of the wiring board of this invention.

符号の説明Explanation of symbols

1:絶縁基板
2:配線導体
2a:電子部品の電極が接続される接続パッド
3:ソルダーレジスト層
3a:第1の感光性樹脂層
3b:第2の感光性樹脂層
4:電子部品としての半導体素子
7:半田バンプ
A:実装領域
N1,N3:未感光部
1: Insulating substrate 2: Wiring conductor 2a: Connection pad to which electrode of electronic component is connected 3: Solder resist layer 3a: First photosensitive resin layer 3b: Second photosensitive resin layer 4: Semiconductor as electronic component Element 7: Solder bump A: Mounting area N1, N3: Unexposed area

Claims (1)

上面の中央部に電子部品の電極が半田バンプを介して接続される複数の接続パッドが形成された実装領域を有するとともに、上面から下面にかけて前記接続パッドに電気的に接続された配線導体が形成された絶縁基板の前記上面の全面に第1の感光性樹脂層を形成する工程と、前記第1の感光性樹脂層における前記実装領域上に位置する部位が未感光部として残るように露光する工程と、前記第1の感光性樹脂層の露出表面の全面に第2の感光性樹脂層を形成する工程と、前記第1および第2の感光性樹脂層における前記接続パッドの中央部上に位置する部位が未感光部として残るように露光する工程と、前記第1および第2の感光性樹脂層を前記接続パッド上の未感光部が除去されるように現像した後に硬化させて、前記接続パッドを露出させる開口部を有する前記第1および第2の感光性樹脂層の硬化体から成るソルダーレジスト層を形成する工程とを具備することを特徴とする配線基板の製造方法。 A wiring region electrically connected to the connection pad is formed from the upper surface to the lower surface, as well as having a mounting area in which a plurality of connection pads to which the electrodes of the electronic component are connected via solder bumps are formed at the center of the upper surface Forming a first photosensitive resin layer on the entire upper surface of the insulating substrate, and exposing the first photosensitive resin layer so that a portion located on the mounting region remains as an unexposed portion. A step of forming a second photosensitive resin layer on the entire exposed surface of the first photosensitive resin layer; and on a central portion of the connection pad in the first and second photosensitive resin layers. Exposing the first and second photosensitive resin layers so that the unexposed portions on the connection pads are removed, and exposing the exposed portion so as to leave the position as an unexposed portion; Exposed connection pad Wherein the first and second method for manufacturing a wiring substrate, characterized by comprising the steps of forming a solder resist layer made of a cured product of the photosensitive resin layer having openings for.
JP2004046663A 2004-02-23 2004-02-23 Method for manufacturing wiring board Pending JP2005236215A (en)

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JP2004046663A JP2005236215A (en) 2004-02-23 2004-02-23 Method for manufacturing wiring board

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