JP2005236127A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the generation of flash burr by suppressing the rise of costs for a semiconductor device. <P>SOLUTION: The semiconductor device is composed of a seal 3 having a front surface 3a and a rear surface 3b, a semiconductor chip 2 having a semiconductor element and a plurality of pads 2a and arranged with its main surface 2b facing the rear side 3b of the seal 3, a tab 1b having an exposed part 1h exposed to the front surface 3a of the seal 3 and a level difference part 1i arranged surrounding the exposed part 1h, a plurality of leads 1a whose respective surfaces 1g to be mounted are exposed to the periphry part of the rear side 3b of the seal 3, and a plurality of wires 4 for connecting the pads 2a of the semiconductor chip 2 and the leads 1a. The step 1i of the tab 1b is arranged at a position in a direction of being separated from the exposed part 1h toward the side of the rear side 3b of the seal 3, and the step 1i has a recess 1j along or surrounding the exposed part 1h. Thus, when sealing with resin, sealing resin is put into the recess 1j to be hardened, thereby the climb-up of the sealing resin to the exposed part 1h is suppressed. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a technique effective when applied to a resin-sealed semiconductor device in which a chip mounting portion is exposed on the upper surface side.

  In a resin-encapsulated semiconductor device in which a conventional die pad (chip mounting portion) is exposed on the upper surface side, a semiconductor chip, a conductive adhesive, a die pad, an inner lead, a connection electrode and a hanging pin formed on the chip main surface, For example, it is sealed with a resin sealing body made of an epoxy resin or the like. The external connection terminal is exposed from the resin sealing body and forms the same plane as the bottom surface. Moreover, the back surface of the die pad is exposed from the upper surface of the resin sealing body (see, for example, Patent Document 1).

  Alternatively, the outer portion of the signal connection lead is exposed from the sealing resin and functions as an external electrode, and the upper surface of the die pad is exposed on the upper surface side of the sealing resin. Further, half etching or the like is performed on the upper surface side of the die pad to form a convex portion and a surrounding flange portion (see, for example, Patent Document 2).

Alternatively, the semiconductor chip is attached to the bottom surface of the pad (chip mounting portion). The pad and the lead are subjected to predetermined processing by half etching and plated with a noble metal such as silver or palladium. The leads and the electrodes of the semiconductor chip are interconnected by bonding wires. The pad, the lead, and the semiconductor chip are covered with a resin capsule (encapsulant), the upper surface of the pad is exposed on the upper surface of the encapsulant, and the bottom surface of the lead is exposed on the bottom surface of the encapsulant (for example, Patent Documents). 3).
Japanese Patent Laid-Open No. 11-312706 (FIG. 8) Japanese Patent Laid-Open No. 11-260990 (FIG. 1) JP 2002-134676 A (FIG. 7)

  In a non-lead type semiconductor device such as QFN (Quad Flat Non-leaded Package), a structure is known in which the back surface (exposed portion) of the chip mounting portion is exposed on the top surface (front surface) side of the resin encapsulant to improve heat dissipation. It has been.

  In such assembly of QFN, flash burrs are easily formed on the exposed portion of the chip mounting portion, but flash burrs have been removed by removing burrs by water pressure or the like.

  However, due to the demand for further downsizing of the QFN, the chip mounting portion becomes smaller, and the area of the exposed portion of the chip mounting portion is further reduced accordingly. In the assembly of such QFN, at the time of resin sealing, not only flash burrs are formed by the resin on the exposed portion of the chip mounting portion, but there is a high possibility that the flash burrs are connected from both ends on the exposed portion. Become. If flash burrs are connected on the exposed portion of the chip mounting portion, there arises a problem that flash burrs cannot be removed even if burrs are removed by water pressure or the like in the burrs removal process after resin sealing.

  In addition, if the flash burrs cannot be removed, insufficient plating wetting will occur in the plating process for forming the exterior plating on the leads, and the heat dissipation effect when the heat sink is connected to the exposed part of the die pad will be problematic. Become.

  In addition, when flash burrs remaining on the exposed parts fall off after plating, the copper surface of the die pad is exposed, and there is a problem that the reliability of the die pad due to oxidation / contamination may be deteriorated during long-term use on the user side. .

  In addition, as a method of reducing the formation of flash burrs on the upper surface or the back surface of the resin sealing body and exposing the external terminals and the die pad, a sealing sheet is applied to the mold surface of the resin sealing mold in the resin sealing process. There is known a method in which resin molding is performed by placing a sealing sheet between an external terminal or a die pad and a mold surface. 11-260990).

  However, the resin molding using the sealing sheet increases the cost for using the sealing sheet, and the structure of the mold becomes complicated, so that the total cost required for the resin sealing process becomes very high. That is a problem.

  Therefore, the present inventor uses a sealing sheet on both the front and back sides to suppress the occurrence of flash burrs by taking measures against the structure of the chip mounting portion (die pad) without using a sealing sheet on the front side. A semiconductor device and a method for manufacturing the semiconductor device that reduce costs compared with the time have been studied.

  In Patent Document 2 (Japanese Patent Laid-Open No. 11-260990) and Patent Document 3 (Japanese Patent Laid-Open No. 2002-134676), as a countermeasure for preventing the die pad from coming off from the resin sealing body, the periphery of the exposed portion of the die pad is disclosed. However, if the resin molding is performed without using a sealing sheet in these die pad structures, the resin crawls up on the exposed portion of the die pad before the sealing resin is cured. As a result, there is a problem that flash burrs are formed over a wide area on the exposed portion and cannot be easily removed.

  An object of the present invention is to provide a semiconductor device and a method for manufacturing the same that can reduce the occurrence of flash burrs while suppressing an increase in cost.

  Another object of the present invention is to provide a semiconductor device capable of improving reliability and a method for manufacturing the same.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in this application, the outline of typical ones will be briefly described as follows.

  That is, the present invention has a front surface and a back surface facing the front surface, a sealing body formed of a sealing resin, a main surface, a back surface facing the main surface, and the main surface. A semiconductor chip and a plurality of electrodes formed on the semiconductor chip, wherein the main surface faces the back side of the sealing body and is disposed in the sealing body, and the surface of the sealing body A chip mounting portion that is connected to the semiconductor chip, and a part of each is provided on the peripheral portion of the back surface of the sealing body. A plurality of leads that are arranged to be exposed and are each bent from the back surface to the front surface of the sealing body, the plurality of electrodes of the semiconductor chip, and the plurality of leads corresponding thereto. Each having a plurality of wires connected thereto, The step portion of the chip mounting portion is arranged at a position in a direction away from the exposed portion from the front surface side to the back surface side of the sealing body, and along the exposed portion along the step portion. A recess is formed, and a connecting portion connected to a suspension lead is formed at a corner of the chip mounting portion, and the connecting portion has the same surface connected to the exposed portion.

  The present invention also has a front surface and a back surface facing the front surface, a sealing body formed of a sealing resin, a main surface, a back surface facing the main surface, and the main surface. A semiconductor chip and a plurality of electrodes formed on the semiconductor chip, wherein the main surface faces the back side of the sealing body and is disposed in the sealing body, and the surface of the sealing body A chip mounting portion connected to the semiconductor chip, and a part of each of the exposed portion exposed to the periphery of the back surface of the sealing body. A plurality of leads that are arranged to be exposed and are each bent from the back surface to the front surface of the sealing body, the plurality of electrodes of the semiconductor chip, and the plurality of leads corresponding thereto. Each having a plurality of wires connected thereto, The projecting portion of the top mounting portion has a first surface (inclined surface) continuous in a direction away from the exposed portion from the front surface side to the back surface side of the sealing body, and the exposed portion The chip mounting portion is formed to have a thickness that gradually decreases from the projecting portion toward the end portion, and a connecting portion that is connected to a suspension lead is formed at a corner portion of the chip mounting portion. Has the same surface connected to the exposed portion.

  Furthermore, the present invention has a chip mounting portion and a plurality of leads disposed around the chip mounting portion, and the chip mounting portion is disposed around the exposed portion exposed on the surface of the sealing body and the exposed portion. Further, the step portion is disposed at a position in a direction away from the exposed portion from the front surface side to the back surface side of the sealing body, and the exposed portion is disposed on the step portion. A step of preparing a lead frame formed with a recess along the surface, a step of mounting a semiconductor chip on a surface of the chip mounting portion opposite to the exposed portion, an electrode of the semiconductor chip, and the lead corresponding thereto The lead frame is disposed on the mold surface of the resin mold so that the main surface of the semiconductor chip faces the mold surface, and then the resin mold In the cavity of the A sealing resin is poured into a space surrounded by the surface of the chip mounting portion that contacts the exposed portion and the stepped portion and the concave portion of the chip mounting portion, and a part of each of the plurality of leads is sealed. Forming the sealing body by resin-sealing the semiconductor chip and the wire so as to be exposed on the back surface of the stationary body, and separating the plurality of leads from the lead frame to separate them. I have it.

  In addition, the present invention includes a chip mounting portion and a plurality of leads arranged around the chip mounting portion, and the chip mounting portion is disposed around the exposed portion exposed on the surface of the sealing body and the exposed portion. And the protrusion has a first surface (inclined surface) continuous in a direction away from the exposed portion from the front surface side to the back surface side of the sealing body. A step of preparing a lead frame in which the thickness of the chip mounting portion is gradually reduced from the exposed portion toward the end of the projecting portion; and a side of the chip mounting portion opposite to the exposed portion. A step of mounting a semiconductor chip on the surface, a step of connecting the electrode of the semiconductor chip and the corresponding lead by a wire, and a mold surface of a resin mold, and the semiconductor chip on the mold surface Arrange the lead frame so that the main surfaces of Then, the sealing resin is caused to flow into a space surrounded by the surface of the cavity of the resin molding die that contacts the exposed portion of the chip mounting portion and the protruding portion of the chip mounting portion. Forming the sealing body by resin-sealing the semiconductor chip and the wire so that a part of each of the plurality of leads is exposed on the back surface of the sealing body; and the plurality of leads from the lead frame. And separating into individual pieces.

  The present invention has a chip mounting portion and a plurality of leads disposed around the chip mounting portion, and the chip mounting portion is disposed around the exposed portion exposed on the surface of the sealing body and the exposed portion. And the protrusion has a first surface (inclined surface) continuous in a direction away from the exposed portion from the front surface side to the back surface side of the sealing body, The first surface has an inclined surface connected to the exposed portion, and a lead frame in which the thickness of the chip mounting portion is formed to be gradually reduced from the exposed portion toward the end of the protruding portion. A step of preparing, a step of mounting a semiconductor chip on the surface of the chip mounting portion opposite to the exposed portion, a step of connecting the electrode of the semiconductor chip and the corresponding lead with a wire, and resin molding On the mold surface of the mold, the mold surface The lead frame is arranged so that the main surfaces of the conductor chip face each other, and then, the surface of the cavity of the resin molding die that contacts the exposed portion of the chip mounting portion, and the protruding portion of the chip mounting portion. A resin for sealing is poured into the space surrounded by the inclined surface, and the semiconductor chip and the wire are sealed with resin so that a part of each of the plurality of leads is exposed on the back surface of the sealing body. The method includes a step of forming the sealing body and a step of separating the plurality of leads from the lead frame into individual pieces.

  In addition, the present invention includes a chip mounting portion and a plurality of leads arranged around the chip mounting portion, and the chip mounting portion is disposed around the exposed portion exposed on the surface of the sealing body and the exposed portion. And the protrusion has a first surface that continues in a stepped manner in a direction away from the exposed portion from the front surface side to the back surface side of the sealing body. A step of preparing a lead frame in which the thickness of the chip mounting portion is gradually reduced from the exposed portion toward the end of the protruding portion; and a surface of the chip mounting portion opposite to the exposed portion Mounting the semiconductor chip on the semiconductor chip, connecting the electrode of the semiconductor chip and the corresponding lead with a wire, and on the mold surface of the resin mold, Arrange the lead frame so that the main surfaces face each other Thereafter, the sealing resin is caused to flow into a space surrounded by a surface of the cavity of the resin molding die that contacts the exposed portion of the chip mounting portion and the stepped protrusion of the chip mounting portion. Forming the sealing body by resin-sealing the semiconductor chip and the wire so that a part of each of the plurality of leads is exposed on the back surface of the sealing body; And separating the leads into individual pieces.

  Of the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  A stepped portion is formed around the exposed portion of the chip mounting portion, and a concave portion is formed along the exposed portion in the stepped portion, so that the gap between the bottom surface of the cavity and the stepped portion is formed during resin molding. The sealing resin that has entered the space is cured before entering the concave portion that becomes a resin reservoir before reaching the exposed portion and scooping up to the exposed portion. As a result, the formation of flash burrs of the sealing resin on the exposed portions of the chip mounting portion can be suppressed, and as a result, the formation of flash burrs can be reduced without using a sealing sheet on the surface side. Therefore, it is possible to suppress the increase in cost and reduce the occurrence of flash burrs.

  In the following embodiments, the description of the same or similar parts will not be repeated in principle unless particularly necessary.

  Further, in the following embodiment, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments, but they are not irrelevant to each other unless otherwise specified. The other part or all of the modifications, details, supplementary explanations, and the like are related.

  Also, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), particularly when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and it may be more or less than the specific number.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof will be omitted.

(Embodiment 1)
1 is a plan view showing an example of the structure of the semiconductor device according to the first embodiment of the present invention, FIG. 2 is a back view showing an example of the structure of the semiconductor device shown in FIG. 1, and FIG. 3 is an AA shown in FIG. 4 is a cross-sectional view showing an example of the structure of the semiconductor device cut along the line, FIG. 4 is a cross-sectional view showing an example of the structure of the semiconductor device cut along the line BB shown in FIG. 1, and FIG. FIG. 6 is a plan view showing an example of the structure of the exposed portion side of the main part of the lead frame used for assembling the semiconductor device shown in FIG. 1, and FIG. FIG. 8 is a plan view showing an example of the structure on the chip mounting side of the main part of the lead frame shown in FIG. 6, and FIG. 9 is a plan view showing the structure of the cross section taken along the line CC shown in FIG. Contact with the chip mounting portion in the upper mold during resin sealing in the method for manufacturing the semiconductor device shown in FIG. FIG. 10 and FIG. 11 are examples of how the sealing resin flows in the cavity in the resin sealing step of the semiconductor device manufacturing method shown in FIG. FIG. 12 is a cross-sectional view showing an example of a filling state of the sealing resin in the cavity in the resin sealing step of the semiconductor device manufacturing method shown in FIG.

  The semiconductor device according to the first embodiment shown in FIGS. 1 to 4 is a small non-lead type in which a part of each of the plurality of leads 1a is exposed and arranged at the peripheral edge of the back surface 3b of the sealing body 3. In the first embodiment, QFN 5 will be described as an example of the semiconductor device.

  Further, as shown in FIG. 1, the QFN 5 has a structure in which a surface opposite to the surface on the chip support side of the tab 1b as the chip mounting portion is exposed on the surface 3a of the sealing body 3.

  The detailed structure of the QFN 5 will be described. The sealing body 3 having the front surface 3a, the back surface 3b, and the side surface 3c, and formed by curing the sealing resin 8 shown in FIG. 10, the main surface 2b, and the back surface 2c, having a semiconductor element formed on the main surface 2b and a plurality of pads (electrodes) 2a, and sealing the main surface 2b facing the back surface 3b side (substrate mounting surface side) of the sealing body 3 The semiconductor chip 2 disposed in the body 3, the exposed portion 1 h exposed on the surface 3 a of the sealing body 3, and the stepped portion 1 i disposed around the exposed portion 1 h, and through the die bond material 6 The tab 1b, which is a chip mounting portion connected to the semiconductor chip 2, and the respective mounting surfaces (parts) 1g are disposed so as to be exposed at the peripheral edge of the back surface 3b of the sealing body 3 (see FIG. 2). And each one part located in the opposite side to the side surface 3c of the sealing body 3 is A plurality of leads 1a bent from the back surface 3b of the stationary body 3 toward the front surface 3a (surface direction), a plurality of pads 2a of the semiconductor chip 2, and a plurality of leads 1a corresponding thereto are electrically connected to each other. The step portion 1i of the tab 1b is arranged at a position away from the exposed portion 1h from the front surface 3a side to the back surface 3b side of the sealing body 3, A groove-like recess 1j is formed around the stepped portion 1i along the exposed portion 1h, and a connecting portion 1f that connects to the suspension lead 1e shown in FIG. 6 is formed at the corner of the tab 1b. The connecting portion 1f has the same surface connected to the exposed portion 1h.

  That is, in the QFN 5 of the first embodiment, the semiconductor chip 2 is disposed downward, and the main surface 2b of the semiconductor chip 2 and the back surface 3b of the sealing body 3 face each other. Furthermore, an exposed portion 1 h that is a part of the back side (upper side) of the tab 1 b connected to the semiconductor chip 2 is exposed on the surface 3 a of the sealing body 3.

  Further, a stepped portion 1i at a position lower than the exposed portion 1h is formed around the exposed portion 1h. Further, the stepped portion 1i has a groove-shaped recess 1j around the exposed portion 1h. Is formed.

  That is, on the back side of the tab 1b, a portion corresponding to the periphery of the exposed portion 1h is removed by etching or pressing to form a thin stepped portion 1i. Further, the exposed portion 1h of the stepped portion 1i is formed. A groove-like recess 1j is similarly formed by etching, pressing, or the like at a location along the line. Accordingly, as shown in FIG. 11 in the resin sealing step, a part of the sealing body 3 is formed in the stepped portion 1i and the recessed portion 1j.

  Moreover, in the tab 1b, the connection part 1f connected with the suspension lead 1e in the four corners is formed in the same thickness as the exposed part 1h. Thereby, the connection part 1f is provided with the surface of the same height as the exposed part 1h of the tab 1b, and as shown in FIG. 1, the surface of the same height connected with the exposed part 1h of the connection part 1f is a sealing body. 3 is exposed on the surface 3a.

  Since the tab 1b is disposed on the front surface side of the sealing body 3, the suspension lead 1e that supports the tab 1b is also bent from the back surface 3b side to the front surface 3a side. That is, the suspension lead 1e is subjected to bending processing (upset processing) for tab-up processing. Further, the suspension lead 1e is stressed by the bending process. For this reason, in order to ensure the strength of the suspension lead 1e, processing for reducing the thickness such as half etching is not performed.

  Further, in the QFN 5 of the first embodiment, as shown in FIG. 3, the area of the main surface 1c that is the surface on the chip mounting side of the tab 1b is formed smaller than the area of the main surface 2b of the semiconductor chip 2, The QFN 5 has a so-called small tab structure.

  Each of the plurality of leads 1a has two bent portions: a first bent portion 1m facing upward and a second bent portion 1n in the horizontal direction approaching the semiconductor chip 2, and the semiconductor chip 2 pads 2a and each lead 1a are electrically connected by a wire 4 such as a gold wire.

  Further, exterior plating 7 such as palladium plating or solder plating is formed on the mounting surface 1g exposed on the back surface 3b of the sealing body 3 of each lead 1a and the exposed portion 1h of the tab 1b exposed on the front surface 3a. Yes.

  Each lead 1a and tab 1b have a thickness of about 0.2 mm, for example, and are made of, for example, a copper alloy. When the thickness of each lead 1a is 0.2 mm, for example, the exposed portion 1h and the connecting portion 1f of the tab 1b are also 0.2 mm thick, but the stepped portion 1i around the exposed portion 1h The thickness is about ½, and the recess 1j is formed thinner. However, each thickness is not limited to these numerical values, and can be variously changed.

  Moreover, the sealing body 3 is formed by thermosetting an epoxy resin (sealing resin 8), for example.

  Further, the semiconductor chip 2 is fixed to the main surface 1c of the tab 1b by a die bond material 6 such as a paste material (for example, silver paste).

  As described above, in the QFN 5 of the first embodiment, as shown in FIG. 4, in the tab 1b that is the chip mounting portion, the thickness of the connecting portion 1f with the suspension lead 1e at the corner is the exposed portion 1h. Since the connecting portion 1f has a surface that is the same as the thickness and is connected at the same height from the exposed portion 1h, the connecting portion 1f is exposed on the surface 3a of the sealing body 3 in addition to the exposed portion 1h. be able to. Thereby, the area of the part exposed to the surface 3a of the sealing body 3 in the tab 1b can be increased, and the heat dissipation of QFN5 (semiconductor device) can be improved.

  Further, on the back surface side of the tab 1b, a stepped portion 1i having a height lower than that of the exposed portion 1h is formed around the exposed portion 1h, and a groove-like concave portion along the exposed portion 1h is formed in the stepped portion 1i. By forming 1j, as shown in FIG. 11, when the resin is molded, the sealing that has entered the space between the bottom surface 9e of the cavity 9c of the upper mold 9a of the resin mold 9 and the step portion 1i The resin 8 enters the recess 1j that becomes a resin reservoir before reaching the exposed portion 1h, and the curing of the sealing resin 8 is promoted before creeping up to the exposed portion 1h.

  As a result, the formation of flash burrs of the sealing resin 8 on the exposed portion 1h of the tab 1b can be suppressed.

  Therefore, in the resin sealing process, the formation of flash burrs can be reduced without using the sealing sheet 11 on the front surface side (upper surface side). Is possible.

  Further, since the suspension lead 1e of the QFN 5 is not subjected to a process of reducing the thickness such as half etching, it is possible to ensure the stability of the process in the tab raising process of the suspension lead 1e.

  Next, a method for manufacturing QFN 5 (semiconductor device) according to the first embodiment will be described with reference to an assembly flowchart shown in FIG.

  First, a tab 1b on which a semiconductor chip 2 can be mounted, a plurality of leads 1a arranged around the tab 1b, and a suspension lead 1e that supports the tab 1b at its four corners are shown in FIGS. A lead frame 1 is prepared.

  The tab 1b of the lead frame 1 is disposed on the back surface opposite to the main surface connected to the semiconductor chip 2 on the back surface 1a exposed on the surface 3a of the sealing body 3 and around the exposed portion 1h. 6 has a step portion 1i (shaded portion), and the step portion 1i is arranged at a position away from the exposed portion 1h from the front surface side to the back surface side of the sealing body 3. In addition, a groove-shaped recess 1j as shown in FIG. 7 is formed along the exposed portion 1h in the step portion 1i.

  Further, the tab 1b shown in FIGS. 6 to 8 can be applied to a semiconductor device having a small tab structure, and the size of the main surface 1c of the tab 1b is larger than that of the main surface 2b of the semiconductor chip 2 to be mounted. In this embodiment, the case of a small tab structure will be described.

  Therefore, as shown in FIG. 7, the size of the tab 1b in the lead frame 1 is such that the main surface 1c is, for example, a substantially square of (L) 2.0 mm × (L) 2.0 mm, 1h is a substantially square of (M) 1.5 mm × (M) 1.5 mm.

  The exposed portion 1h of the tab 1b of the lead frame 1 and each lead 1a are thin plate frame members made of, for example, a copper alloy, and the thickness thereof is, for example, 0.2 mm. However, the thickness of the lead frame 1 and the size of the tab 1b are not limited to the above numerical values and can be variously changed.

  Further, the stepped portion 1i and the recessed portion 1j are formed by half-etching or press working around the exposed portion 1h on the back surface side of the tab 1b.

  Thereafter, die bonding is performed as shown in step S1 of FIG. Here, a die bond material 6 such as a paste material is applied to the main surface 1c (surface opposite to the exposed portion 1h) of the tab 1b which is a chip mounting portion of the lead frame 1, and the semiconductor chip 2 is interposed via the die bond material 6. To fix.

  Thereafter, wire bonding (W / B) shown in step S2 is performed. Here, the pads 2a of the semiconductor chip 2 and the corresponding leads 1a are connected by wires 4 which are fine metal wires such as gold wires.

  At this time, the lead frame 1 is arranged so that the main surface 2b of the semiconductor chip 2 faces upward, and wire bonding is performed in this state, and each pad 2a and the corresponding lead 1a are electrically connected by the wire 4. Connect to.

  Thereafter, an appearance inspection shown in step S3 is performed.

  Then, resin sealing (resin molding) which is sealing shown in step S4 is performed. In this case, first, as shown in FIG. 9, the main surface of the semiconductor chip 2 is placed on the mold surface 9d on the sealing sheet 11 disposed on the mold surface 9d of the lower mold 9b of the resin mold 9. The lead frame 1 is arranged so that the surface 2b faces each other.

  That is, the lead frame 1 is disposed on the mold surface 9d of the lower mold 9b so that the semiconductor chip 2 faces downward and through the sealing sheet 11.

  Thereafter, the mold is clamped so that the bottom surface 9e of the cavity 9c of the resin mold 9 and the exposed portion 1h of the tab 1b come into contact with each other. In this state, as shown in FIG. The filling of the sealing resin 8 is started. In addition, as shown in the enlarged view of FIG. 9, irregularities 9 f are formed on the bottom surface 9 e, which is a surface that contacts the exposed portion 1 h of the tab 1 b in the cavity 9 c of the resin molding die 9.

  The unevenness 9f has, for example, an unevenness difference of about 10 μm and is intended to improve the releasability of the sealing resin 8 and to mark the sealing body 3 with ink.

  When the filling of the sealing resin 8 into the cavity 9c is started as shown in FIG. 10, the sealing resin 8 is separated from the lower surface of the main surface 2b of the semiconductor chip 2 and the back surface 2c (by the resin flow 10). It flows separately on the tab 1b side on the upper side.

  Further, as the filling progresses, the sealing resin 8 is formed on the upper side of the semiconductor chip 2 as shown in FIG. 11, the bottom surface 9e contacting the exposed portion 1h of the tab 1b in the cavity 9c, the stepped portion 1i of the tab 1b, It flows into the space surrounded by the recess 1j.

  That is, first, the sealing resin 8 flows into the space between the stepped portion 1i and the bottom surface 9e of the cavity 9c, and further flows into the concave portion 1j after passing over the stepped portion 1i.

  As a result, the sealing resin 8 is cured before entering the recess 1j that becomes a resin pool before reaching the exposed portion 1h of the tab 1b and scooping up the exposed portion 1h. Therefore, as shown in FIG. 12, it is possible to suppress the flash burr of the sealing resin 8 from being formed on the exposed portion 1h of the tab 1b.

  As a result, it is possible to reduce the formation of flash burrs without using the sealing sheet 11 on the front surface side, and thus it is possible to suppress the occurrence of flash burrs while suppressing an increase in the cost of assembling the semiconductor device. Become.

  Further, since the formation of flash burrs can be reduced, the flash burrs can be easily removed even if deburring is performed by a deflash method using water pressure or the like in the deburring process after sealing. Therefore, insufficient plating wetness of the exterior plating 7 on the exposed portion 1h of the tab 1b is resolved. As a result, it is possible to ensure the mountability of the exposed portion 1h of the tab 1b on the user side, and also eliminate the concern about the decrease in reliability due to oxidation and contamination of the tab 1b during long-term use. As a result, QFN5 (semiconductor device) ) Can be improved.

  Even when the unevenness 9f is formed on the bottom surface 9e of the cavity 9c in the resin molding die 9 by the matte finish, the recess 1j is formed around the exposed portion 1h of the tab 1b. The creeping of the sealing resin 8 onto the exposed portion 1h can be reduced.

  In this way, the resin sealing is performed, and the semiconductor chip 2 and the plurality of wires 4 are sealed, and the mounting surface (part) 1g of each of the plurality of leads 1a is the peripheral portion of the back surface 3b of the sealing body 3 The sealing body 3 is formed so as to be exposed to the surface.

  Thereafter, the exterior plating 7 is formed on the exposed portion 1h of each lead 1a and tab 1b by plating shown in step S5 of FIG.

  Subsequently, a laser mark in step S6 is performed to mark the product on the surface 3a of the sealing body 3. When the bottom surface 9e of the cavity 9c of the resin molding die 9 is subjected to a satin finish, it is possible to perform marking with ink marks.

  After that, by cutting in step S7, each of the leads 1a is cut and separated from the lead frame 1 and separated into individual pieces. After cutting, an electrical test such as an open / short test is performed by DC in step S8. Remove defective products.

  Further, the appearance inspection in step S9 is performed and the non-defective product is shipped.

(Embodiment 2)
FIG. 13 is a cross-sectional view showing an example of the structure of the semiconductor device according to the second embodiment of the present invention, and FIG. 14 shows an example of the structure on the exposed portion side of the main part of the lead frame used for assembling the semiconductor device shown in FIG. FIG. 15 is a cross-sectional view showing the structure of a cross section cut along the line DD shown in FIG. 14, and FIG. 16 is a lead of a modification used for assembling the semiconductor device according to the second embodiment of the present invention. FIG. 17 is a cross-sectional view showing a cross-sectional structure cut along the line EE shown in FIG. 16, and FIG. 18 is a modified example of the lead frame shown in FIG. FIG. 19 is a cross-sectional view showing the structure of a cross section taken along the line FF shown in FIG. 18.

  The semiconductor device of the second embodiment shown in FIG. 13 is a small non-lead type QFN 12 similar to that of the first embodiment. The difference from the QFN 5 of the first embodiment is that it is exposed on the back side of the tab 1b. That is, the thickness of the tab 1b is gradually reduced from the portion 1h toward the end of the protruding portion 1d. At that time, in the QFN 12 shown in FIG. It has the 1st surface 1p which continues in the direction away from the exposed part 1h toward the back surface 3b side, and also this 1st surface 1p has the inclined surface 1k which continues to the exposed part 1h.

  The lead frame 1 shown in FIG. 14 is used when assembling the QFN 12, and FIG. 15 shows an enlarged cross-sectional shape of the tab 1b. The hatched portion shown in FIG. It is. As shown in FIG. 15, the inclined surface 1k of the first surface 1p in the protrusion 1d is formed from a gently curved surface.

  That is, the lead frame 1 shown in FIGS. 14 and 15 is formed by etching.

  In the QFN 12 according to the second embodiment, the tab 1b is formed to have a thickness that is gradually reduced from the exposed portion 1h toward the end of the protruding portion 1d. When the sealing resin 8 is injected into the sealing resin 8, the sealing resin 8 that wraps around the back surface side (upper surface side) of the tab 1b enters the space between the bottom surface 9e of the cavity 9c and the protruding portion 1d. The sealing resin 8 that has entered the space passes through a gradually narrow space on the inclined surface 1k toward the exposed portion 1h.

  At that time, as the flow path becomes narrower on the inclined surface 1k, the amount of heat supplied to the sealing resin 8 increases, and as a result, the curing of the sealing resin 8 can be promoted. As a result, most of the sealing resin 8 is cured before creeping up on the exposed portion 1h of the tab 1b, and a flash burr of the sealing resin 8 is prevented from being formed on the exposed portion 1h of the tab 1b. it can.

  Therefore, as in the first embodiment, the formation of flash burrs can be reduced without using the sealing sheet 11 on the surface side (upper side) of the resin molding die 9, and as a result, the increase in cost can be suppressed. This makes it possible to reduce the occurrence of flash burrs.

  Further, since the formation of flash burrs can be reduced, the flash burrs can be removed by a deflash method using water pressure or the like in the deburring process after sealing, as in the first embodiment, and the tab 1b is exposed. Insufficient plating wetting of the exterior plating 7 on the portion 1h is resolved. As a result, it is possible to secure the mountability of the exposed portion 1h of the tab 1b on the user side, and the concern about the decrease in reliability due to oxidation / contamination of the tab 1b during long-term use is eliminated. As a result, the QFN 12 (semiconductor device) ) Can be improved.

  Further, as shown in FIG. 15, the size of the tab 1b in the lead frame 1 is such that the main surface 1c is, for example, a substantially square of (Q) 2.0 mm × (Q) 2.0 mm. 1h is, for example, a substantially rectangular shape of (P) 1.5 mm × (P) 1.5 mm. Accordingly, the width of the protruding portion 1d in this case is 0.5 mm / 2 = 0.25 mm in the extending direction of the lead 1a.

  For example, when the width of the protrusion 1d is defined, for example, when the width is about 0.1 mm, the distance for promoting the curing of the sealing resin 8 is too short. For example, if the width is about 0.4 mm too long, the resin may not be filled in the vicinity of the exposed portion 1h, and the inclined surface 1k of the chip mounting portion 1b is exposed, so that the chip mounting portion 1b is exposed. There is a concern that reliability may be reduced due to oxidation and contamination. For this reason, it is preferable that the width of the protrusion 1d with respect to the extending direction of the lead 1a is about 0.2 to 0.3 mm. The thickness of the protruding portion 1d from the exposed portion 1h in the direction of the main surface 1c of the tab 1b is, for example, about thickness = 0.1 mm. When the width of the protrusion 1d is r1, and the thickness of the protrusion 1d is r2, r1 is preferably larger than r2.

  In the case where a thin portion corresponding to the protruding portion 1d is simply formed to prevent the tab 1b from coming off from the sealing body 3, the width is about 0.1 mm, and the protruding portion 1d of the QFN 12 of the second embodiment. Further, the step portion 1i of the QFN 5 of the first embodiment is different from the thin portion for preventing the removal.

  Since the other structure and manufacturing method of QFN 12 of the second embodiment and other effects obtained by them are the same as those of QFN 5 of the first embodiment, the redundant description thereof is omitted.

  Next, in the lead frame 1 of the modification shown in FIGS. 16 and 17, the thickness of the tab 1b is gradually reduced from the exposed portion 1h toward the end of the protruding portion 1d on the back surface side of the tab 1b. In this case, the first surface 1p of the projecting portion 1d has a first step 1d, and the first surface 1p has a first stepped portion 1r and a surface 3a of the sealing body 3 that are stepped more than the first stepped portion 1r. A second step portion 1q located on the side is formed. That is, a step-like protruding portion 1d is formed around the exposed portion 1h, and when viewed from the surface 3a of the sealing body 3, the shape is such that the stairs are lowered as the distance from the exposed portion 1h increases. For example, as shown in FIGS. 16 and 17, the staircase shape is composed of a first step portion 1r and a second step portion 1q. However, when viewed from the surface 3a of the sealing body 3, the staircase formation is not limited to two steps as long as it has a shape that goes down from the exposed portion 1h toward the protruding portion 1d. In this case, it can be realized by processing the lead frame 1 by press working.

  Thus, even when the protruding portion 1d is formed in a step shape, it is possible to obtain the same effect as the QFN 12 of the second embodiment.

  Further, the lead frame 1 of the modification shown in FIGS. 18 and 19 has an inclined surface 1k on the first surface 1p of the protruding portion 1d around the exposed portion 1h, similarly to the lead frame 1 shown in FIG. However, since the lead frame 1 is formed by pressing, the inclined surface 1k is not a curved surface but a flat surface.

  Thus, even when the first surface 1p of the protruding portion 1d is a flat inclined surface 1k, the same effect as the QFN 12 of the second embodiment can be obtained.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiments of the invention. However, the present invention is not limited to the embodiments of the invention, and various modifications can be made without departing from the scope of the invention. It goes without saying that it is possible.

  For example, in the first and second embodiments, the QFNs 5 and 12 are described as an example of the semiconductor device. However, the semiconductor device has a structure in which the back surface side of the tab 1b is exposed on the front surface 3a side of the sealing body 3. As long as it is a device, it may be a semiconductor device other than QFN.

  The present invention is suitable for electronic devices and semiconductor manufacturing techniques.

It is a top view which shows an example of the structure of the semiconductor device of Embodiment 1 of this invention. FIG. 2 is a back view showing an example of the structure of the semiconductor device shown in FIG. 1. It is sectional drawing which shows an example of the structure of the semiconductor device cut | disconnected along the AA line shown in FIG. It is sectional drawing which shows an example of the structure of the semiconductor device cut | disconnected along the BB line shown in FIG. FIG. 2 is an assembly flow diagram illustrating an example of a manufacturing method of the semiconductor device illustrated in FIG. 1. FIG. 2 is a plan view showing an example of a structure on an exposed portion side of a main part of a lead frame used for assembling the semiconductor device shown in FIG. 1. It is sectional drawing which shows the structure of the cross section cut | disconnected along CC line shown in FIG. FIG. 7 is a plan view showing an example of the structure on the chip mounting side of the main part of the lead frame shown in FIG. 6. It is sectional drawing and an expanded fragmentary sectional view which show an example of a contact state with the chip mounting part in the upper metal mold | die at the time of resin sealing of the manufacturing method of the semiconductor device shown in FIG. It is sectional drawing which shows an example of how the sealing resin flows in the cavity in the resin sealing process of the manufacturing method of the semiconductor device shown in FIG. It is sectional drawing which shows an example of how the sealing resin flows in the cavity in the resin sealing process of the manufacturing method of the semiconductor device shown in FIG. It is sectional drawing which shows an example of the filling state of resin for sealing in the cavity in the resin sealing process of the manufacturing method of the semiconductor device shown in FIG. It is sectional drawing which shows an example of the structure of the semiconductor device of Embodiment 2 of this invention. FIG. 14 is a plan view illustrating an example of a structure on an exposed portion side of a main part of a lead frame used for assembling the semiconductor device illustrated in FIG. 13. It is sectional drawing which shows the structure of the cross section cut | disconnected along the DD line | wire shown in FIG. It is a top view which shows the structure by the side of the exposed part of the principal part of the lead frame of the modification used for the assembly of the semiconductor device of Embodiment 2 of this invention. It is sectional drawing which shows the structure of the cross section cut | disconnected along the EE line shown in FIG. FIG. 15 is a plan view showing a structure of an exposed part side of a main part of a lead frame of a modification of the lead frame of FIG. It is sectional drawing which shows the structure of the cross section cut | disconnected along the FF line shown in FIG.

Explanation of symbols

1 Lead frame 1a Lead 1b Tab (chip mounting part)
1c Main surface 1d Protruding part 1e Hanging lead 1f Connecting part 1g Mounted surface (part)
1h Exposed portion 1i Stepped portion 1j Recessed portion 1k Inclined surface 1m First bent portion 1n Second bent portion 1p First surface 1q Second stepped portion 1r First stepped portion 2 Semiconductor chip 2a Pad (electrode)
2b Main surface 2c Back surface 3 Sealed body 3a Front surface 3b Back surface 3c Side surface 4 Wire 5 QFN (semiconductor device)
6 Die bond material 7 Exterior plating 8 Sealing resin 9 Resin molding die 9a Upper die 9b Lower die 9c Cavity 9d Mold surface 9e Bottom surface 9f Unevenness 10 Flow of resin 11 Sealing sheet 12 QFN (semiconductor device)
r1 Width of protrusion r2 Thickness of protrusion

Claims (20)

A sealing body having a front surface, a back surface and a side surface facing the surface, and formed of a sealing resin;
A main surface, a back surface facing the main surface, a semiconductor element formed on the main surface and a plurality of electrodes, wherein the main surface faces the back surface side of the sealing body and the sealing is performed. A semiconductor chip arranged in a stationary body;
A chip mounting portion that has an exposed portion exposed on the surface of the sealing body and a step portion disposed around the exposed portion, and is connected to the semiconductor chip;
Each part is exposed and arranged at the peripheral edge of the back surface of the sealing body, and each part located on the side opposite to the side surface of the sealing body is the part of the sealing body. A plurality of leads bent from the back surface toward the front surface;
A plurality of wires for connecting the plurality of electrodes of the semiconductor chip and the plurality of leads, respectively;
The step portion of the chip mounting portion is disposed at a position in a direction away from the exposed portion from the front surface side to the back surface side of the sealing body, and along the exposed portion in the step portion. A recess is formed,
The semiconductor device according to claim 1, wherein a connecting portion connected to a suspension lead is formed at a corner portion of the chip mounting portion, and the connecting portion has the same surface connected to the exposed portion. A sealing body having a front surface, a back surface and a side surface facing the surface, and formed of a sealing resin;
A main surface, a back surface facing the main surface, a semiconductor element formed on the main surface and a plurality of electrodes, wherein the main surface faces the back surface side of the sealing body and the sealing is performed. A semiconductor chip arranged in a stationary body;
A chip mounting portion that has an exposed portion exposed on the surface of the sealing body and a protrusion disposed around the exposed portion, and is connected to the semiconductor chip;
Each part is exposed and arranged at the peripheral edge of the back surface of the sealing body, and each part located on the side opposite to the side surface of the sealing body is the part of the sealing body. A plurality of leads bent from the back surface toward the front surface;
A plurality of wires for connecting the plurality of electrodes of the semiconductor chip and the plurality of leads, respectively;
The protruding portion of the chip mounting portion has a first surface that continues in a direction away from the exposed portion toward the back surface side of the sealing body, and the end of the protruding portion from the exposed portion. The thickness of the chip mounting part is gradually reduced toward the part,
The semiconductor device according to claim 1, wherein a connecting portion connected to a suspension lead is formed at a corner portion of the chip mounting portion, and the connecting portion has the same surface connected to the exposed portion.   3. The semiconductor device according to claim 2, wherein the first surface has an inclined surface that continues to the exposed portion.   3. The semiconductor device according to claim 2, wherein the first surface is formed in a step shape.   3. The semiconductor device according to claim 2, wherein a size of a surface of the chip mounting portion opposite to the exposed portion is smaller than a main surface of the semiconductor chip.   3. The semiconductor device according to claim 2, wherein a width of the protruding portion of the chip mounting portion in a direction in which the lead extends is 0.2 to 0.3 mm. (A) It has a chip mounting portion and a plurality of leads arranged around the chip mounting portion, and the chip mounting portion is exposed at the surface of the sealing body and a step disposed around the exposed portion. And the stepped portion is disposed at a position away from the exposed portion toward the back side of the sealing body, and a recess is formed in the stepped portion along the exposed portion. Preparing a prepared lead frame;
(B) mounting a semiconductor chip on a surface opposite to the exposed portion of the chip mounting portion;
(C) connecting the electrode of the semiconductor chip and the lead with a wire;
(D) The lead frame is disposed on the mold surface of the resin mold so that the main surface of the semiconductor chip faces the mold surface, and then the chip is mounted in the cavity of the resin mold. A sealing resin is caused to flow into a space surrounded by the surface of the portion that contacts the exposed portion and the stepped portion and the concave portion of the chip mounting portion, and a part of each of the plurality of leads is the sealing body Forming the sealing body by resin-sealing the semiconductor chip and the wire so as to be exposed on the back surface of
(E) separating the plurality of leads from the lead frame and dividing them into individual pieces.   8. The method of manufacturing a semiconductor device according to claim 7, wherein a size of a surface of the chip mounting portion opposite to the exposed portion is smaller than a main surface of the semiconductor chip.   8. The method of manufacturing a semiconductor device according to claim 7, wherein a plurality of irregularities are formed on a surface of the cavity of the resin molding die that contacts the exposed portion of the chip mounting portion. Device manufacturing method.   8. The method of manufacturing a semiconductor device according to claim 7, wherein a width of the stepped portion of the chip mounting portion in the extending direction of the leads is 0.2 to 0.3 mm. . (A) It has a chip mounting portion and a plurality of leads arranged around the chip mounting portion, and the chip mounting portion is exposed on the surface of the sealing body and the protrusion arranged around the exposed portion And the protrusion has a first surface that continues in a direction away from the exposed portion toward the back surface side of the sealing body, and extends from the exposed portion to the end of the protruded portion. Preparing a lead frame in which the thickness of the chip mounting portion is gradually reduced toward the portion;
(B) mounting a semiconductor chip on a surface opposite to the exposed portion of the chip mounting portion;
(C) connecting the electrode of the semiconductor chip and the lead with a wire;
(D) The lead frame is disposed on the mold surface of the resin mold so that the main surface of the semiconductor chip faces the mold surface, and then the chip is mounted in the cavity of the resin mold. The sealing resin is poured into a space surrounded by the surface of the portion that contacts the exposed portion and the protruding portion of the chip mounting portion, and a part of each of the plurality of leads is on the back surface of the sealing body Forming the sealing body by resin sealing the semiconductor chip and the wire so as to be exposed;
(E) separating the plurality of leads from the lead frame and dividing them into individual pieces. (A) It has a chip mounting portion and a plurality of leads arranged around the chip mounting portion, and the chip mounting portion is exposed on the surface of the sealing body and the protrusion arranged around the exposed portion And the projecting portion has a first surface continuous in a direction away from the exposed portion toward the back surface side of the sealing body, and the first surface is the exposed portion. A step of preparing a lead frame in which the thickness of the chip mounting portion is gradually reduced from the exposed portion toward the end of the protruding portion;
(B) mounting a semiconductor chip on a surface opposite to the exposed portion of the chip mounting portion;
(C) connecting the electrode of the semiconductor chip and the lead with a wire;
(D) The lead frame is disposed on the mold surface of the resin mold so that the main surface of the semiconductor chip faces the mold surface, and then the chip is mounted in the cavity of the resin mold. A sealing resin is poured into a space surrounded by the surface of the portion that contacts the exposed portion and the inclined surface of the protruding portion of the chip mounting portion, and a part of each of the plurality of leads is sealed Forming the sealing body by resin sealing the semiconductor chip and the wire so as to be exposed on the back surface of the body;
(E) separating the plurality of leads from the lead frame and dividing them into individual pieces.   13. The method of manufacturing a semiconductor device according to claim 12, wherein a size of a surface of the chip mounting portion opposite to the exposed portion is smaller than a main surface of the semiconductor chip.   13. The semiconductor device manufacturing method according to claim 12, wherein a plurality of irregularities are formed on a surface of the cavity of the resin molding die that contacts the exposed portion of the chip mounting portion. Device manufacturing method.   13. The method of manufacturing a semiconductor device according to claim 12, wherein a width of the protruding portion of the chip mounting portion in the extending direction of the leads is 0.2 to 0.3 mm. . (A) It has a chip mounting portion and a plurality of leads arranged around the chip mounting portion, and the chip mounting portion is exposed on the surface of the sealing body and the protrusion arranged around the exposed portion And the protrusion has a first surface that is continuous in a stepwise direction away from the exposed portion toward the back side of the sealing body, and the protrusion protrudes from the exposed portion. Preparing a lead frame in which the thickness of the chip mounting portion is gradually reduced toward the end of the portion;
(B) mounting a semiconductor chip on a surface opposite to the exposed portion of the chip mounting portion;
(C) connecting the electrode of the semiconductor chip and the lead with a wire;
(D) The lead frame is disposed on the mold surface of the resin mold so that the main surface of the semiconductor chip faces the mold surface, and then the chip is mounted in the cavity of the resin mold. A sealing resin is allowed to flow into a space surrounded by the surface of the portion that contacts the exposed portion and the step-like protruding portion of the chip mounting portion, and a part of each of the plurality of leads is the sealing body Forming the sealing body by resin-sealing the semiconductor chip and the wire so as to be exposed on the back surface of
(E) separating the plurality of leads from the lead frame and dividing them into individual pieces.   17. The method of manufacturing a semiconductor device according to claim 16, wherein a size of a surface of the chip mounting portion opposite to the exposed portion is smaller than a main surface of the semiconductor chip.   17. The method of manufacturing a semiconductor device according to claim 16, wherein a surface of the cavity of the resin molding die that comes into contact with the exposed portion of the chip mounting portion is formed with a textured finish. A method for manufacturing a semiconductor device.   17. The method of manufacturing a semiconductor device according to claim 16, wherein a width of the projecting portion of the chip mounting portion in the extending direction of the leads is 0.2 to 0.3 mm. .   17. The semiconductor device manufacturing method according to claim 16, wherein in the step (d), a part of a suspension lead connected to a corner portion of the chip mounting portion is exposed on a back surface of the sealing body. Device manufacturing method.

Images