JP2005229098A5 - - Google Patents

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Publication number
JP2005229098A5
JP2005229098A5 JP2004345436A JP2004345436A JP2005229098A5 JP 2005229098 A5 JP2005229098 A5 JP 2005229098A5 JP 2004345436 A JP2004345436 A JP 2004345436A JP 2004345436 A JP2004345436 A JP 2004345436A JP 2005229098 A5 JP2005229098 A5 JP 2005229098A5
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JP
Japan
Prior art keywords
antenna
substrate
thin film
integrated circuit
film integrated
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Application number
JP2004345436A
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Japanese (ja)
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JP2005229098A (en
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Priority to JP2004345436A priority Critical patent/JP2005229098A/en
Priority claimed from JP2004345436A external-priority patent/JP2005229098A/en
Publication of JP2005229098A publication Critical patent/JP2005229098A/en
Publication of JP2005229098A5 publication Critical patent/JP2005229098A5/ja
Withdrawn legal-status Critical Current

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Claims (10)

薄膜トランジスタを用いた薄膜集積回路と、アンテナと、可撓性を有する基板とを有し、
前記アンテナは前記基板上に形成されており、
前記薄膜集積回路は、前記アンテナと電気的に接続するように、前記基板に貼り合わされており、
前記基板は、前記薄膜集積回路を間に挟むように折り畳まれていることを特徴とする半導体装置。
A thin film integrated circuit using a thin film transistor, an antenna, and a flexible substrate;
The antenna is formed on the substrate;
The thin film integrated circuit is bonded to the substrate so as to be electrically connected to the antenna,
The semiconductor device, wherein the substrate is folded so as to sandwich the thin film integrated circuit therebetween.
薄膜トランジスタを用いた薄膜集積回路と、アンテナと、可撓性を有する袋状の基板とを有し、
前記アンテナは前記袋状の基板の内部に形成されており、
前記薄膜集積回路は、前記アンテナと電気的に接続するように、前記袋状の基板の内部に貼り合わされていることを特徴とする半導体装置。
A thin film integrated circuit using a thin film transistor, an antenna, and a flexible bag-shaped substrate;
The antenna is formed inside the bag-shaped substrate,
The thin film integrated circuit is bonded to the inside of the bag-shaped substrate so as to be electrically connected to the antenna.
請求項1または請求項において、
前記アンテナは液滴吐出法を用いて形成されており、なおかつAg、AuまたはCuを用いていることを特徴とする半導体装置
In claim 1 or claim 2 ,
The semiconductor device is characterized in that the antenna is formed by a droplet discharge method and Ag, Au, or Cu is used .
請求項1乃至請求項3のいずれか一において、In any one of Claims 1 to 3,
前記基板は、折目と、前記折目に沿って設けられた窪みとを有することを特徴とする半導体装置。The substrate has a fold and a recess provided along the fold.
請求項1乃至請求項3のいずれか一において、In any one of Claims 1 to 3,
前記基板は折目を有しており、前記基板の折目が設けられた領域において、前記アンテナの一部は並列に接続された複数の配線であることを特徴とする半導体装置。2. The semiconductor device according to claim 1, wherein the substrate has a fold, and a part of the antenna is a plurality of wirings connected in parallel in a region where the fold of the substrate is provided.
請求項1乃至請求項3のいずれか一において、In any one of Claims 1 to 3,
前記基板は折目を有しており、前記基板の折目が設けられた領域において、前記アンテナの一部は他の領域よりも幅が太いことを特徴とする半導体装置。The semiconductor device according to claim 1, wherein the substrate has a fold, and in the region where the fold is formed in the substrate, a part of the antenna is wider than another region.
請求項1乃至請求項6のいずれか一において、
前記薄膜集積回路は、前記アンテナによって前記薄膜集積回路が有する接続端子に入力された交流の信号から直流の電源電圧を生成する整流回路と、前記交流の信号を復調して第1の信号を形成する復調回路と、前記第1の信号に従って演算処理を行ない、第2の信号を生成するマイクロプロセッサと、前記第2の信号を変調する変調回路と、前記変調された第2の信号に従って、前記アンテナにかかる負荷を変調するスイッチとを有することを特徴とする半導体装置。
In any one of Claims 1 thru | or 6,
The thin film integrated circuit is formed a rectifier circuit for generating a DC supply voltage, a first signal by demodulating the signal of the AC from the AC signal input to the connection terminals of said thin film integrated circuit by the antenna A demodulating circuit that performs arithmetic processing according to the first signal, generates a second signal, a modulation circuit that modulates the second signal, and the modulated second signal, And a switch for modulating a load applied to the antenna.
薄膜トランジスタを用いた薄膜集積回路と、第1及び第2のアンテナと、可撓性を有する第1及び第2の基板とを有し、
前記第1のアンテナは前記第1の基板上に形成されており、
前記第2のアンテナは前記第2の基板上に形成されており、
前記薄膜集積回路は、前記第1のアンテナと電気的に接続するように、前記第1の基板に貼り合わされており、
前記第2の基板は、前記第1のアンテナと前記第2のアンテナとが電気的に接続されるように、なおかつ前記第1のアンテナと、前記第2のアンテナと、前記薄膜集積回路とを間に挟むように、前記第1の基板と重なっていることを特徴とする半導体装置。
A thin film integrated circuit using a thin film transistor, first and second antennas, and flexible first and second substrates,
The first antenna is formed on the first substrate;
The second antenna is formed on the second substrate;
The thin film integrated circuit is bonded to the first substrate so as to be electrically connected to the first antenna,
The second substrate includes the first antenna, the second antenna, and the thin film integrated circuit so that the first antenna and the second antenna are electrically connected to each other. A semiconductor device which overlaps with the first substrate so as to be sandwiched therebetween.
請求項において、
前記第1のアンテナまたは前記第2のアンテナは、液滴吐出法を用いて形成されており、なおかつAg、AuまたはCuを用いていることを特徴とする半導体装置
In claim 8 ,
The semiconductor device, wherein the first antenna or the second antenna is formed by a droplet discharge method, and Ag, Au, or Cu is used .
請求項1乃至9のいずれか一において、前記薄膜集積回路は半導体膜を有し、前記半導体膜は微結晶半導体膜であることを特徴とする半導体装置。10. The semiconductor device according to claim 1, wherein the thin film integrated circuit includes a semiconductor film, and the semiconductor film is a microcrystalline semiconductor film.
JP2004345436A 2003-12-12 2004-11-30 Semiconductor device and manufacturing method thereof Withdrawn JP2005229098A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004345436A JP2005229098A (en) 2003-12-12 2004-11-30 Semiconductor device and manufacturing method thereof

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2003414848 2003-12-12
JP2004009529 2004-01-16
JP2004345436A JP2005229098A (en) 2003-12-12 2004-11-30 Semiconductor device and manufacturing method thereof

Related Child Applications (1)

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JP2012125846A Division JP2012212893A (en) 2003-12-12 2012-06-01 Semiconductor device and wireless tag

Publications (2)

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JP2005229098A JP2005229098A (en) 2005-08-25
JP2005229098A5 true JP2005229098A5 (en) 2007-12-06

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US7768405B2 (en) * 2003-12-12 2010-08-03 Semiconductor Energy Laboratory Co., Ltd Semiconductor device and manufacturing method thereof
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WO2007063786A1 (en) 2005-11-29 2007-06-07 Semiconductor Energy Laboratory Co., Ltd. Antenna and manufacturing method thereof, semiconductor device including antenna and manufacturing method thereof, and radio communication system
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JP5132135B2 (en) * 2005-12-02 2013-01-30 株式会社半導体エネルギー研究所 Method for manufacturing semiconductor device
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JP5023640B2 (en) * 2006-09-27 2012-09-12 富士ゼロックス株式会社 Connection structure, image display device and image display system
EP1970951A3 (en) * 2007-03-13 2009-05-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
EP2019425A1 (en) 2007-07-27 2009-01-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
JP5248240B2 (en) 2007-08-30 2013-07-31 株式会社半導体エネルギー研究所 Semiconductor device
WO2010044312A1 (en) * 2008-10-17 2010-04-22 コニカミノルタエムジー株式会社 Array-type ultrasonic vibrator
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