JP2005229015A - Storage device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a storage device which can hold written data stably and can carry out writing of data or the like by a small current. <P>SOLUTION: An electrode-to-electrode substance layer 13 is held between an electrode 11 and an electrode 12. A transfer barrier layer 14 of electron or the like having a pin hole 14A is formed in an interface between the electrode and the substance layer 13. When a writing voltage is applied, an active species is ionized and eluted from the electrode 11 side containing redox active species and moves to the electrode 12 direction. Thereafter, it receives electron from the electrode 12 side and is deposited on receiving electron from the electrode 12 side, and a conduction path 16 is formed between the electrode 11 and the electrode 12. The conduction path 16 is formed in a narrow region corresponding to the pin hole 14A, and the density of the redox active species deposited in an inside becomes higher when compared to a conventional structure wherein the transfer barrier layer 14 of electron or the like does not exist, thus keeping almost a fixed resistance value regardless of the passage of time after writing. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a storage device that writes data (information) by changing the electrical characteristics of an interelectrode material layer between two electrodes.

  Conventionally, a microelectronic programmable element as shown in FIGS. 6A and 6B is known as a memory element that can be easily formed with a simple structure (Patent Document 1). This element ionizes silver (Ag) contained in the interelectrode material layer 103 between the two electrodes 101 and 102 by applying a predetermined voltage, and moves this to move the conduction path (path) 104. Data is written by changing the electrical resistance between the electrodes 101 and 102.

In this element, for the sake of convenience, the state in which the resistance between the two electrodes 101 and 102 before application of the voltage is high is stored in the data “0” state, and the voltage is applied to diffuse the metal ions toward the opposing electrode. As a result, the state in which the resistance between the two electrodes 101 and 102 is low is the storage state of the data “1”, and the operation of changing the element from the high resistance state to the low resistance state is the writing operation, and the low resistance state to the high resistance state. The operation to return to is called the erasing operation.
Special Publication 2002-536840

  However, the conventional memory element having this structure has a problem in element characteristics that the resistance value changes with time and the written data cannot be stably held. That is, A in FIG. 7 shows the fluctuation state of the resistance value over time after writing when writing is performed so that the resistance value is 1 KΩ in the low resistance state in the above-described conventional memory element. As described above, in the conventional memory element, the written data, that is, the resistance value of the memory element changed from the high resistance state to the low resistance state is changed to the high resistance side as time passes after writing. There was a problem of transition, that is, approaching the state before writing.

  The present invention has been made in view of such a problem, and an object of the present invention is to provide a storage device capable of stably holding written data and writing or erasing data with a small current, and its manufacture. It is to provide a method.

  The memory device according to the present invention includes a first electrode, a second electrode disposed opposite to the first electrode, and an interelectrode substance capable of conducting electrons or ions provided between the first electrode and the second electrode. And a voltage applying means for applying a predetermined voltage between the first electrode and the second electrode, and oxidizing the inside of the first electrode, the second electrode, or the inter-electrode material layer or on the surface thereof. It includes a reduction reaction active substance, and electrical characteristics between the first electrode and the second electrode are changed by voltage application to the first electrode and the second electrode, and information is recorded. Then, in the interface region between the second electrode and the interelectrode material layer, a first region in which the conductivity of electrons or ions is smaller than that of the interelectrode material layer, and the conductivity of electrons or ions in the first region And a second region where electrons or ions can be exchanged And it has a structure having an electron or the like transfer barrier layer.

  In the method for manufacturing a memory device according to the present invention, a voltage is applied between the first electrode and the second electrode, and the conductivity of electrons or ions is applied to the entire interface between the second electrode and the interelectrode material layer. A step of growing a material smaller than the intermetallic layer to form an electron exchange barrier layer, an electron exchange barrier layer having an electron or ion conductivity smaller than that of the interelectrode material layer, an electron; Or a step of forming a second region in which the conductivity of ions is larger than that of the first region and electrons or ions can be exchanged.

  In the memory device according to the present invention, when a predetermined voltage is applied to the first electrode and the second electrode at the time of writing or erasing data, the interelectrode material layer containing the redox active substance or the first electrode (eluting electrode) side is used. The active species are ionized and eluted, move in the direction of the second electrode (counter electrode), and then receive and deposit electrons from the second electrode side. As a result, the gap between the first electrode and the second electrode A low resistance conduction path is formed in the material layer. This conduction path is formed in a narrow region corresponding to the second region (pinhole) provided in the electron transfer barrier layer, and in the inside of the conduction path compared to the conventional structure in which no electron transfer barrier layer exists. The deposition concentration of the redox active substance is increased, and a substantially constant resistance value is maintained regardless of the elapsed time after writing.

  In the method for manufacturing a memory device according to the present invention, an electron transfer barrier layer is formed at the interface between the second electrode and the interelectrode material layer according to the voltage application state to the first electrode and the second electrode. A region (second region) where electrons or ions can be transferred is formed in the electron transfer barrier layer.

  According to the memory device of the present invention, an electron transfer barrier layer is provided in the interface region between the second electrode and the interelectrode material layer, and a region where electrons or ions can be transferred locally to the electron transfer barrier layer. Since the (second region) is provided, an interelectrode substance between the first electrode and the second electrode is applied by applying a predetermined voltage to the first electrode and the second electrode when writing or erasing data. A low resistance conduction path in which the density of the deposited metal is high and which is chemically stable is formed in a narrow region corresponding to the second region provided in the electron transfer barrier layer. Therefore, a substantially constant resistance value can be held regardless of the passage of time after voltage application, and data can be stably held for a long time. Further, since the area of the conduction path can be reduced, the power consumption is also gradually reduced.

  In addition, according to the method for manufacturing a memory device of the present invention, a voltage is applied between the first electrode and the second electrode, and the conductivity of electrons or ions at the interface between the second electrode and the interelectrode material layer. In addition to forming an electron transfer barrier layer by forming a small material, a second region capable of transferring electrons or ions is formed in the electron transfer barrier layer. Can be easily manufactured.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[First Embodiment]
FIG. 1 shows a main configuration of a storage device according to the first embodiment of the present invention. Although not shown, this storage device is composed of a plurality of storage elements arranged in a matrix, for example. One memory element has a structure in which an interelectrode material layer 13 is sandwiched between a pair of electrodes 11 (first electrode) and an electrode 12 (second electrode) arranged on the substrate 10 so as to face each other. A voltage applying means (not shown) for applying a predetermined voltage to the electrode 11 and the electrode 12 is provided. Between the electrode 11 and the electrode 12, the periphery of the interelectrode material layer 13 is surrounded by an interlayer insulating film (not shown). Each of the plurality of storage elements is provided with an active element (transistor) (not shown) for controlling electrical access to each element, thereby constituting one memory cell. ing.

  At one interface, for example, an interface between the electrode 12 and the interelectrode material layer 13, an electron transfer barrier layer 14 is formed. The electron transfer barrier layer 14 is formed of, for example, an oxide of the interelectrode material layer 13 or an electrode reaction inhibitor such as nickel oxide (NiOx), titanium oxide (TiOx), or silicon oxide (SiOx). 11 and ions generated between the first electrode 11 and the second electrode 12 in the inside of the first electrode 11 or on the surface thereof or in the vicinity thereof, regardless of whether or not a voltage is applied to the electrode 12 and the electrode 12. Alternatively, it has a function of restricting or blocking the exchange of electrons (hereinafter referred to as electrons). That is, even if this electron transfer barrier layer 14 provides the electrode 11 with a potential (positive potential) that causes a reaction in which silver contained in the interelectrode material layer 13 or the electrode 11 is cationized and eluted, It is a layer that prevents the reaction (precipitation reaction) in which ionized silver receives electrons from the opposing electrode 12 and precipitates.

  However, a pinhole (opening) 14a is locally provided in the electron transfer barrier layer 14, and the material constituting the interelectrode material layer 13 is filled in the pinhole 14a. That is, in the pinhole 14a, exchange of electrons and the like is restricted in other regions, but exchange of electrons and the like between the first electrode 11 and the second electrode 12 is possible. Hereinafter, on the surface along the interface between the electrode 12 and the interelectrode material layer 13, the region occupied by the pinhole 14 a in the electron transfer barrier layer 14 (the region where electrons can be transferred) can be defined as the second region, An area occupied by a portion excluding the area 2 (area where transfer of electrons or the like is restricted) is referred to as a first area. Note that the first region may not be a region where the exchange of electrons or the like is completely blocked, and may be any region as long as the exchange of electrons and the like is relatively restricted as compared to the first region.

  In the electron transfer barrier layer 14, the area of the second region occupied by the pinhole 14a is as narrow as possible from the viewpoint of data retention described later, and is preferably at least smaller than the area of the first region. Specifically, the pinhole 14a has, for example, a circular shape with a diameter of 100 nm or a shape with an area equivalent to the circular shape.

  The electrode 11 and the electrode 12 are made of, for example, a titanium tungsten (TiW) layer having a thickness of 100 nm. In addition, the electrodes 11 and 12 may be made of silver (Ag) or copper (Cu), or may include an oxidation / reduction species in an electrode base material such as aluminum (Al). Good. Each film thickness of the electrode 11 and the electrode 12 may be a film thickness that can be used for a general semiconductor device. Here, for example, the electrode 11 has a film thickness of 100 nm and the electrode 12 has a film thickness of 100 nm.

  The interelectrode material layer 13 is a layer between the electrode 11 and the electrode 12 and having ion conductivity or electron conductivity. For example, oxygen (O), sulfur (S), selenium (Se), tellurium (Te), etc. It is formed of a material based on an amorphous thin film including a chalcogenide material and at least one selected from the group consisting of germanium (Ge), silicon (Si), antimony (Sb), and indium (In), such as GeSbTeGd. . The film thickness is 70 nm, for example. The interelectrode material layer 13 is formed by vapor deposition, for example.

  The interelectrode material layer 13 contains an oxidation-reduction reaction active substance (redox active species) 15, and this oxidation-reduction reaction active substance 15 has a voltage applied to the electrodes 11 and 12 when data is written (or erased). Oxidation or reduction is performed according to the applied state, and as a result, an electron or ion conduction path 16 is formed or disappears between the electrode 11 and the electrode 12 as will be described later. In this embodiment, the conduction path 16 is formed in a narrow region corresponding to the pinhole 14a in the electron transfer barrier layer 14.

The redox reaction active material 15 is, for example, silver (Ag), copper (Cu), nickel (Ni), cobalt (Co), chromium (Cr), titanium (Ti), tantalum (Ta), iron (Fe), Examples thereof include metals such as aluminum (Al) and vanadium (V), and semiconductors such as silicon (Si) and germanium (Ge). Further, a reductant of tungsten oxide (WO3) (HxWO3) and an oxide of vanadium (V) have the same function, and these may be used as the redox reaction active material 15. Hereinafter, the substance 15 that has been oxidized to become a cation is referred to as an eluted ion. In the case of silver, the cation (eluted ion) is monovalent Ag ⁺ .

  The storage device can be manufactured as follows.

 That is, after the interelectrode material layer 13 is formed on the electrode 11 with, for example, GeSbTeGd, heat treatment is performed at a temperature of, for example, 400 ° C. in a mixed atmosphere of nitrogen and oxygen, and the oxide of the material contained in the interelectrode material layer An electron transfer barrier layer 14 is formed. As another embodiment, after the interelectrode material layer 13 is formed by vapor deposition, for example, an oxidizable material such as nickel (Ni), titanium (Ti), or silicon (Si) for forming the electron transfer barrier layer 14 is formed. ) Is formed, for example, by vapor deposition, and thereafter, heat treatment is performed, for example, in a mixed atmosphere of nitrogen and oxygen to form the electron transfer barrier layer 14. As another embodiment, after the interelectrode material layer 13 is formed by vapor deposition, for example, an electron transfer barrier layer 14 such as nickel oxide (NiOx), titanium oxide (TiOx), or silicon oxide (SiOx) is formed, for example. It is formed by vapor deposition. Thereafter, an electrode 12 is formed on the electron exchange barrier layer 14 by, for example, vapor deposition, and then a predetermined voltage is applied between the electrode 11 and the electrode 12 to apply, for example, 500 μA to the electron exchange barrier layer 14. By passing an electric current, the electron transfer barrier layer 14 is locally destroyed, and a pinhole 14a for enabling transfer of electrons and the like on the surface of the electrode 12 is formed.

  In the memory device of this embodiment, by applying a predetermined voltage to the electrode 11 and the electrode 12, as shown in FIG. 3, the pin of the electron transfer barrier layer 14 between the electrode 11 and the electrode 12. Data is written (or erased) by forming a conduction path 16 in a narrow region corresponding to the size of the hole 14A. The detailed description of the function and effect will be described later together with that of the second embodiment.

[Second Embodiment]
FIG. 2 shows the configuration of the second embodiment of the present invention. In the first embodiment, the redox reaction active material 15 such as silver (Ag) is included in the interelectrode material layer 13 between the electrodes 11 and 12, but in this embodiment, oxidation The reduction reaction active substance 15 is dissolved or dispersed in the electrode 11. Other configurations and operational effects are the same as those of the first embodiment.

  Using the memory device of the first embodiment, a writing process for forming a resistance of about 1.0 KΩ is performed as in the evaluation in FIG. 7 (that is, a low resistance is provided between the electrode 11 and the electrode 12). And the rate of change of the resistance value over time after writing was measured. FIG. 4B shows the evaluation result together with the evaluation result (A in FIG. 7) in the case of the storage device having the conventional structure shown in FIG. As described above, in the case of the memory device having the conventional structure, the resistance value in the conduction path 104 formed so as to be in the low resistance state has changed in the high resistance value direction with the lapse of time after writing. On the other hand, in the memory device of the first embodiment, the resistance value of the conduction path 16 hardly changed with the passage of time after writing. The same applies to the storage device of the second embodiment. The cause can be inferred as follows.

  That is, in the case of the memory device having the structure of the first and second embodiments, active species are ionized and eluted from the interelectrode substance layer 13 containing the redox reaction active substance 15 or the eluting electrode (electrode 11) side. After moving in the direction of the counter electrode (electrode 12), the electron is received from the electrode 12 side and deposited again, or from the electrode 12 side, the electrode is in a high resistance state between the two electrodes 11 and 12 Recombination with the electrons flowing through the interstitial material layer 13 is deposited. As a result, a conduction path 16 through which electrons or ions are conducted from the electrode 12 side to the electrode 11 side is formed. The same applies to the conventional storage device.

  Here, in the memory device having the conventional structure, ions that have been eluted from the elution electrode (electrode 101) side and moved in the direction of the counter electrode (electrode 102) can cause electrons to be emitted from the electrode 102 at any location on the entire surface of the electrode 102. Received and deposited. In the memory device having the conventional structure, the flow of electrons flowing from the electrode 101 side to the electrode 102 side through the inter-electrode material layer 103 in the high resistance state is generated on almost the entire surface of the electrode 102. Therefore, although the region where the above ions recombine with the electrons flowing from the electrode 102 side, that is, the conduction path 104 is also drawn relatively narrow in FIG. 6B, actually, the entire cross-sectional area of the element is shown. Yes. For this reason, when elution and deposition of ions are performed by flowing a constant current within a certain time, for example, a voltage of 1 V is applied between the electrode 101 and the electrode 102, and a current of 1 mA is applied between the two electrodes. When the conduction path 104 having a resistance value of 1 KΩ is formed by flowing a current, the deposited redox reaction active material is distributed over a relatively wide portion inside the device, and as a result, active species per unit volume The density is low. That is, a conduction path 104 having a low concentration of the redox active species deposited inside the conduction path 104 and a large cross-sectional area is formed.

  In the memory device having the conventional structure, the phenomenon that the resistance value increases with the lapse of time after writing is explained based on the formation mechanism of the conduction path 104 described above. That is, the low concentration of the redox active species deposited inside the conduction path 104 means that the distance between each atom of the active species inside the conduction path 104 is large. The connection between them is considered weak. As a result, the phenomenon that the active species in the conduction path 104 diffuses to the outside of the path occurs with the passage of time after writing, and it can be explained that the electrical resistance has increased.

  FIG. 8 shows a change state of the resistance value when the application time of the voltage applied for writing in the memory device having the conventional structure is changed. As the writing time became shorter, the resistance value immediately after writing became higher than the above-mentioned 1.0 KΩ. This phenomenon is explained by the formation mechanism of the conduction path 104 described above. That is, when the voltage application time for writing is short, the resistance of the conduction path 104 is not sufficiently low because the concentration of the redox active species deposited inside the conduction path 104 is particularly low. As the voltage application time for writing is increased, the amount of ions that are deposited by receiving electrons inside the electron conduction path 104 increases, so that the concentration of the active species deposited inside the conduction path 104 increases. As a result, it can be explained that the conduction path 104 is in a low resistance state.

  Further, in a memory device having a conventional structure, the rate of change in resistance value due to the change in time after writing is larger as the writing time is shorter and the resistance value immediately after writing is higher. This phenomenon can also be explained by the mechanism described above. That is, the higher the resistance value immediately after writing, the lower the concentration of active species in the conduction path 104, that is, the greater the distance between each atom of the active species. For this reason, the higher the resistance value immediately after writing, the weaker the bond between the active species atoms, and the more the active species in the conduction path 104 diffuse to the outside of the path over time after writing. However, the electrical resistance has changed more greatly.

  On the other hand, in the memory device in the first and second embodiments, electrons and the like are not exchanged in most areas at the interface between the counter electrode (electrode 12) and the interelectrode material layer 13. Thus, the electron transfer barrier layer 14 is formed. Then, ions that have moved from the interelectrode material layer 13 or the eluting electrode (electrode 11) can receive electrons and deposit only in the region of the pinhole 14A, which is probably less than 100 nm. Further, the flow of electrons from the electrode 12 side through the interelectrode material layer 13 toward the electrode 11 side is also generated only from the region of the pinhole 14A. Therefore, both the precipitation of ions upon receiving electrons from the electrode 12 side and the precipitation of ions due to recombination with the electron current from the electrode 12 side are narrow from the region of the pinhole 14A on the electrode 12 toward the electrode 11. It is thought to occur in the area. For this reason, in the case where ions are eluted and deposited by flowing a constant current within a certain time, for example, a voltage of 1 V is applied between the electrode 11 and the electrode 12 like the conventional memory element, When an electron conduction path 16 having a resistance value of 1 KΩ is formed by flowing a current of 1 mA between the two electrodes, the deposited redox active species are inside a narrow path from the pinhole 14 A to the electrode 11. As a result, the active species density per unit volume in the conduction path 16 becomes high. That is, it is considered that the conduction path 16 having a high concentration of precipitated redox active species in the inside and a small cross-sectional area was formed.

  Also in the memory device of this embodiment, the phenomenon of maintaining a substantially constant resistance value regardless of the passage of time after writing can be explained based on the formation mechanism of the conduction path 16 described above. That is, the high concentration of the redox active species deposited inside the conduction path 16 means that the distance between each atom of the active species in the conduction path 16 is small. There seems to be a strong connection between them. As a result, the phenomenon that the active species in the conduction path 16 diffuses to the outside of the path hardly occurs with the lapse of time after writing, and it is considered that a substantially constant resistance value was maintained.

  FIG. 5B shows the change in resistance value when the write voltage application time is changed in this embodiment, together with the data (A in FIG. 7) of the memory device having the conventional structure shown in FIG. However, in this embodiment, even when the application time of the write voltage is changed, the resistance value in the conduction path 16 is almost constant. This phenomenon is also explained by the formation mechanism of the conduction path 16 described above. That is, the place where the redox active species eluted from the electrode 11 is deposited is limited to the inside of a narrow path from the pinhole 14A to the electrode 11, so that it does not contribute to electron conduction, that is, outside the conduction path 16. The amount of active species deposited on the surface is small. Therefore, even if the application time of the write voltage is short, the above-described high-concentration conduction path 16 is formed with a small amount of active species. In this manner, in this embodiment, a storage device that can stably hold write data for a long period of time can be realized.

  In the above embodiment, the formation of the conduction path 16 has been described as a data writing operation. However, it goes without saying that the formation of the conduction path 16 may be a data erasing operation.

  The storage device of the present invention is effective for a device such as a portable computer that is driven by a battery and requires low power consumption, and can be used particularly for a nonvolatile programmable device.

It is sectional drawing showing the structure of the memory | storage device which concerns on the 1st Embodiment of this invention. It is sectional drawing showing the structure of the memory | storage device which concerns on 2nd Embodiment. It is sectional drawing showing the state after the data writing of a memory | storage device. It is a characteristic view showing the data retention characteristic of the memory | storage device of this invention in the comparison with the conventional memory | storage device. It is a characteristic view showing the relationship between the writing time and the resistance value after writing in the memory device of the present invention in comparison with the conventional memory device. It is sectional drawing showing the structure of the conventional memory | storage device. It is a figure showing the data retention characteristic of the conventional memory | storage device. It is a characteristic view showing the relationship between the writing time and the resistance value after writing in the conventional memory | storage device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Electrode (1st electrode), 12 ... Electrode (2nd electrode), 13 ... Interelectrode substance layer, 14 ... Electron transfer barrier layer, 14A ... Pinhole, 15 ... Redox reaction active substance, 16 ... Conduction path

Claims (14)

A first electrode; a second electrode disposed opposite to the first electrode; an interelectrode material layer capable of conducting electrons or ions provided between the first electrode and the second electrode; A voltage applying means for applying a predetermined voltage between one electrode and the second electrode, and an oxidation-reduction reaction active substance in or on the surface of the first electrode, the second electrode, or the interelectrode substance layer A storage device that records information by changing electrical characteristics between the first electrode and the second electrode by applying a voltage to the first electrode and the second electrode. And
In the interface region between the second electrode and the interelectrode material layer, the first region in which the conductivity of electrons or ions is smaller than that of the interelectrode material layer and the conductivity of electrons or ions in the first electrode A storage device comprising an electron transfer barrier layer having a second region larger than the region and capable of transferring electrons or ions. 2. The storage device according to claim 1, wherein an area of the second region in the electron transfer barrier layer is smaller than an area of the first region. The area of the second region is determined by forming the electron transfer barrier layer over the entire interface region between the second electrode and the interelectrode material layer, and then forming the first electrode and the second electrode. 2. The memory according to claim 1, having a size equivalent to a conduction path of electrons or ions formed by breaking the electron transfer barrier layer when a predetermined voltage is applied between apparatus. The storage device according to claim 1, wherein the second region has a circular shape with a diameter of 100 nm or less or a shape with an area equivalent to the circular shape. The said 2nd area | region is a pinhole which penetrates the said electron transfer barrier layer, and the said pinhole is filled with the substance which comprises the said interelectrode substance layer. Storage device. The interelectrode material layer includes at least one of oxygen (O), sulfur (S), selenium (Se), and tellurium (Te) (chalcogenide material), germanium (Ge), silicon (Si), antimony ( The storage device according to claim 1, wherein an amorphous thin film containing at least one of Sb) and indium (In) is used as a base material. A part of the electron transfer barrier layer is formed of an oxide of a material contained in the interelectrode material layer, nickel oxide (NiOx), titanium oxide (TiOx), or silicon oxide (SiOx). The storage device according to claim 1. The storage device according to claim 1, wherein the oxidation-reduction reaction active substance is contained in the interelectrode substance layer. The storage device according to claim 8, wherein the oxidation-reduction reaction active substance is silver (Ag) or copper (Cu). The storage device according to claim 1, wherein the oxidation-reduction reaction active substance is contained in the first electrode. By applying a predetermined voltage to the first electrode and the second electrode, the conduction of electrons or ions between the first electrode and the second electrode corresponding to the second region in the electron transfer barrier layer. The storage device according to claim 1, wherein a path is formed. A first electrode; a second electrode disposed opposite to the first electrode; and an interelectrode material layer provided between the first electrode and the second electrode; and the first electrode or the first electrode Two electrodes or a redox reaction active substance in or on the surface of the interelectrode substance layer, and by applying a voltage to the first electrode and the second electrode, the first electrode and the second electrode A method of manufacturing a storage device in which electrical characteristics are changed and information is recorded,
A voltage is applied between the first electrode and the second electrode, and a material having electron or ion conductivity smaller than that of the interelectrode substance layer is grown on the interface between the second electrode and the interelectrode substance layer. Forming an electron transfer barrier layer,
A first region in which the conductivity of electrons or ions is smaller than that of the interelectrode material layer, and a conductivity of electrons or ions is larger than that in the first region, and the electrons or ions are transferred to and from the electron transfer barrier layer. Forming a possible second region. A method for manufacturing a memory device, comprising: After the electron exchange barrier layer is formed over the entire interface between the second electrode and the interelectrode material layer, a voltage is applied to the first electrode and the second electrode to locally dispose the electron exchange barrier layer. 13. The memory device manufacturing method according to claim 12, wherein the second region is formed by mechanical destruction or by changing the conductivity of electrons or ions to be larger than that of other regions. Method. 14. The storage device according to claim 13, wherein a pinhole penetrating the electron exchange barrier layer is formed as the second region by locally destroying and removing the electron exchange barrier layer. 14. Manufacturing method.

Images