JP2005228857A - High frequency oscillation device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that a device becomes expensive when a winding type is used for a tuning inductance. <P>SOLUTION: The high frequency oscillation device is provided with a differential amplification circuit 2 which is formed in an integrated circuit 1 and in which the integrated circuit 1 is loaded on a substrate 53 and a tuning circuit 3 which is connected to the differential amplification circuit 2 and is loaded on the substrate 53. The tuning circuit 3 is provided with a serial connection object in which capacitors 16 and 17 connected between a terminal for tuning circuit 12 and a terminal for tuning circuit 15 are connected in series, a chip inductor 25 connected between the terminal for tuning circuit 12 and ground, and a chip inductor 26 connected between the terminal for tuning circuit 15 and ground. The chip inductors 25 and 26 have inductor devices 57 and 60 formed of conductor patterns arranged in parallel to the substrate 53. Edges far from the substrate 53 in the inductor devices 57 and 60 are connected to the terminals for tuning circuit 12 and 15, and edges near the substrate are connected to ground. Thus, the inexpensive high frequency oscillation device can be realized. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a small-sized high-frequency oscillator used for transmission / reception of a cellular phone.

  A conventional small-sized high-frequency oscillator will be described with reference to FIG. This high-frequency oscillation device comprises a differential amplifier circuit 2 composed of an integrated circuit 1 mounted on a substrate, and a tuning circuit 3. The differential amplifier circuit 2 includes a differential amplifier composed of transistors 4 and 5, a constant current source 6 to which the emitters of the transistors 4 and 5 are connected, and collectors of the transistors 4 and 5 via respective resistors 7 and 8, respectively. The power supply terminal 9 to be connected is connected to the base of the transistor 4 via the capacitor 10, the tuning circuit terminal 12 to which the collector of the transistor 5 is connected via the capacitor 11, and the collector of the transistor 4 is the capacitor 13. The tuning circuit terminal 15 is connected to the base of the transistor 5 via the capacitor 14.

  The tuning circuit unit 3 is connected between a series connection body of variable capacitance capacitors 16 and 17 having cathodes connected between the tuning circuit terminals 12 and 15 and between the tuning circuit terminal 12 and the ground. Winding-type chip inductor 18, winding-type chip inductor 19 connected between tuning circuit terminal 15 and ground, connection point of capacitors 16, 17 with variable capacitance, and loop filter provided in integrated circuit 1 The resistor 21 is connected between the output terminals 20.

  With the above configuration, in this high-frequency oscillation device, the oscillation frequency is determined by the tuning circuit 3 including the capacitors 16 and 17 with variable capacitance and the chip inductors 18 and 19 of the winding type. The control voltage output from the loop filter output terminal 20 is supplied to the capacitors 16 and 17 via the resistor 21, whereby the capacitance of the capacitors 16 and 17 is varied and the oscillation frequency is controlled. .

  FIG. 9 is an arrangement diagram in which the winding type is used for the chip inductors 18 and 19 of the tuning circuit 3. In FIG. 9, chip inductors 18 and 19 of a winding type are mounted on a substrate 30. The chip inductor 18 is formed by winding a wire rod 36 around an alumina bobbin 35 having electrodes 33 and 34 and sealing the resin. Similarly, the chip inductor 19 is also formed by winding a wire 40 around an alumina bobbin 39 having electrodes 37 and 38 and sealing with resin.

  For example, a case will be described in which the oscillation frequency of the high-frequency oscillation device is 200 MHz and the laminated type having an inductance value of 39 nH is used for the chip inductors 18 and 19 of the tuning circuit 3.

  A single chip inductor has a high Q value of 30 at a frequency of 200 MHz. The self-resonant frequency is 3 GHz or more. For this reason, since the loss of the tuning circuit 3 can be reduced, the high-frequency oscillation device can oscillate stably at, for example, 200 MHz.

As prior art document information related to the invention of this application, for example, Patent Document 1 is known.
JP-A-6-291548

  By the way, a winding type small chip inductor having a high Q has been used as a chip inductor used in the tuning circuit of such a conventional small size high frequency oscillator. However, this winding type small chip inductor is obtained by winding a wire around an alumina bobbin and encapsulating it with resin, and is expensive in terms of material and assembly.

  On the other hand, the multilayer type small chip inductor is obtained by laminating patterned low dielectric constant materials, and can be manufactured at low cost in terms of material and assembly. In addition, since the multilayer type small chip inductor is formed by laminating patterned dielectric materials, it can be further reduced in size.

  However, as the multilayer type small chip inductor becomes smaller, the line width of the pattern constituting the inductor becomes narrower and the resistance increases. As a result, the Q of the multilayer type small chip inductor is about half that of the winding type chip inductor. Further, when the substrate is mounted, a stray capacitance entering in parallel between the electrodes of the chip inductor is generated, and the self-resonant frequency is lowered, so that the Q at the oscillation frequency is further lowered. As a result, as a high-frequency oscillation device, the oscillation decreased or the oscillation operation became unstable.

  SUMMARY OF THE INVENTION The present invention solves this problem and aims to provide a low-cost high-frequency oscillation device without reducing the Q of a chip inductor.

  In order to achieve this object, a multilayer type chip inductor used in the high-frequency oscillation device of the present invention has an inductor portion formed by a conductor pattern provided in parallel to a substrate to be mounted, and this inductor portion The end far from the substrate is connected to the tuning circuit terminal, and the end close to the substrate is connected to the ground.

  As a result, a low-frequency high-frequency oscillation device can be realized without reducing the Q of the chip inductor.

  According to the first aspect of the present invention, there is provided a differential amplifier circuit formed on an integrated circuit and mounted on the substrate, and a tuning circuit connected to the differential amplifier circuit and mounted on the substrate. In the high-frequency oscillation device comprising a circuit, the differential amplifier circuit comprises a differential amplifier comprising first and second transistors, and a coupling capacitor from the base of the first transistor and the collector of the second transistor. And a second tuning circuit terminal connected from the collector of the first transistor and the base of the second transistor via respective coupling capacitors. The tuning circuit includes a first and second capacitors connected in series between the first tuning circuit terminal and the second tuning circuit terminal. A first chip inductor of a multilayer type connected between the first tuning circuit terminal and the ground, and a second of the multilayer type connected between the second tuning circuit terminal and the ground. The first chip inductor is provided in parallel with the substrate, and is connected to a first inductor portion formed of a conductor pattern and an end of the first inductor portion that is far from the substrate. The first electrode comprises a second electrode to which the end of the first inductor portion close to the substrate is connected. The second chip inductor is provided in parallel with the substrate and is formed of a conductor pattern. The second inductor portion, the third electrode connected to the end of the second inductor portion far from the substrate, and the end of the second chip inductor close to the substrate are connected. The first and second inductor portions are in the same winding direction, and the first and third electrodes are connected to the first and second tuning circuit terminals, respectively. In addition, the second and fourth electrodes are each a high-frequency oscillation device connected to the ground.

  Thereby, each inductor part far from the board | substrate of a 1st, 2nd chip inductor can have distance between grounds, and can reduce stray capacitance.

  That is, although the multilayer type small chip inductor is used, the Q is hardly lowered and the operation of the oscillation circuit can be guaranteed. Therefore, it is possible to provide a low-frequency high-frequency oscillation device.

  The invention according to claim 2 is the high-frequency oscillation device according to claim 1, wherein the second and fourth electrodes are placed close to each other and face each other.

  As a result, since the respective inductance portions close to the substrates of the first and second chip inductors are both connected to the ground, the first and second chip inductors are connected to each other even if they are close to each other. No stray capacitance is generated between the electrodes. Therefore, since the first and second chip inductors can be arranged closer to each other, a small-sized high-frequency oscillation device can be realized.

  According to a third aspect of the present invention, the first and second inductor portions have different winding directions, and the second and fourth electrodes are placed close to each other and faced to each other. It is an oscillation device.

  As a result, the second electrode constituting the first chip inductor and the fourth electrode constituting the second chip inductor are connected to the ground, so that the second and fourth electrodes are brought close to each other. Even if they are arranged on the substrate, no stray capacitance is generated between the second and fourth electrodes. Therefore, a small-sized high frequency oscillation device can be realized.

  Further, since the first and second chip inductors can be arranged in plane symmetry with each other when mounted on a substrate, the tuning circuit can be designed in a balanced manner. Therefore, an oscillation signal with less distortion can be output as a high-frequency oscillation device.

  According to a fourth aspect of the present invention, a multilayer substrate is used as a substrate, and first and second chip inductors are mounted on a first conductor pattern provided on the upper surface of the multilayer substrate, and the first conductor pattern A ground plane facing at least the first and second chip inductors in the second conductor pattern provided in the lower layer of the semiconductor layer or the third conductor pattern provided in the lower layer of the second conductor pattern. The high-frequency oscillation device according to claim 1 formed.

  In this way, the first and second conductor patterns are provided by grounding the second conductor pattern or the third conductor pattern provided below the first conductor pattern on which the first and second chip inductors are mounted. The distance between the chip inductor and the underlying conductor pattern can be set arbitrarily. Thereby, the unnecessary radiation of the oscillation component from the first and second chip inductors can be suppressed. At the same time, since the stray capacitance generated between the respective electrodes of the first and second chip inductors and the ground can be reduced, even if a multilayer type small chip inductor is used, the Q is not lowered, and the operation of the high-frequency oscillation device can be performed. It can be guaranteed.

  According to a fifth aspect of the present invention, a shield case is provided on the upper surfaces of the first and second chip inductors with a first gap therebetween, and the first gap is between the first and second chip inductors and the first chip inductor. 5. The high-frequency oscillation device according to claim 4, wherein the high-frequency oscillation device is larger than a second interval formed between the two substrate layers.

  As described above, the shield case is provided on the upper surfaces of the first and second chip inductors with the first gap therebetween, and the first gap is provided between the first and second chip inductors and the second conductor pattern or the third conductor pattern. Since the stray capacitance generated between the first electrode of the first and second chip inductors and the shield case can be minimized, the multi-layer type is small. Even if a chip inductor is used, the Q does not decrease and a stable oscillation operation can be achieved.

  According to a sixth aspect of the present invention, the third substrate layer provided in the lower layer of the second substrate layer has first, second, and second chip inductors corresponding to positions where the first and second chip inductors are mounted. 5. The high-frequency oscillation device according to claim 4, wherein a routing pattern of PLL control data for changing the capacity of the second capacitor is provided.

  Accordingly, the third conductor pattern provided in the lower layer of the second conductor pattern has the capacitances of the first and second capacitors corresponding to at least the positions where the first and second chip inductors are mounted. Since a routing pattern for the PLL control data to be controlled is provided, even if a harmonic component of the PLL control data is radiated, it does not jump into the first and second chip inductors. Therefore, it is possible to realize a small-sized high-frequency oscillator having good C / N characteristics.

  As described above, according to the present invention, the high-frequency oscillation device of the present invention is formed of an integrated circuit, and the integrated circuit is connected to the differential amplifier circuit, and the differential amplifier circuit mounted on the substrate. In the high-frequency oscillation device comprising a tuning circuit mounted on a substrate, the tuning circuit includes first and second capacitors connected between the first tuning circuit terminal and the second tuning circuit terminal. Connected in series, a multilayer type first chip inductor connected between the first tuning circuit terminal and the ground, and connected between the second tuning circuit terminal and the ground. A multilayer chip type second chip inductor, wherein the first and second chip inductors have an inductor portion formed by a conductor pattern provided in parallel with the substrate, First the end furthest from the plate, respectively, while connected to the second tuning circuit terminals, which are connected end closer to the substrate to ground.

  Thereby, each inductor part far from the substrate of the first and second chip inductors has a distance from the ground, and the stray capacitance is reduced. That is, although the multilayer type small chip inductor is used, the Q is hardly lowered and the operation of the oscillation circuit can be guaranteed. Therefore, it is possible to provide a low-frequency high-frequency oscillation device.

(Embodiment 1)
Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram of a high-frequency oscillation device according to Embodiment 1 of the present invention. In FIG. 1, the high-frequency oscillation device includes a differential amplifier circuit 2 composed of an integrated circuit 1 mounted on a substrate, and a tuning circuit 3 connected to the differential amplifier circuit 2. The differential amplifier circuit 2 includes a differential amplifier composed of transistors 4 and 5, a constant current source 6 connected between the emitters of the transistors 4 and 5, and a collector of the transistors 4 and 5, respectively. 8 is connected to the power supply terminal 9 via the capacitor 10, the base of the transistor 4 is connected via the capacitor 10, and the tuning circuit terminal 12 is connected to the collector of the transistor 5 via the capacitor 11. A collector is connected via a capacitor 13, and a base of the transistor 5 is composed of a tuning circuit terminal 15 connected via a capacitor 14.

  The tuning circuit unit 3 is connected between the tuning circuit terminals 12 and 15 and is connected in series with a variable capacity capacitor 16 and 17 having cathodes connected to each other, and the tuning circuit terminal 12 and the ground. A laminated type chip inductor 25 connected between them, a laminated type chip inductor 26 connected between the tuning circuit terminal 15 and the ground, a connection point of the capacitors 16 and 17 with variable capacitance, and a loop filter of the integrated circuit 1 The resistor 21 is connected between the output terminals 20.

  In the high-frequency oscillation device configured as described above, the oscillation frequency is determined by the tuning circuit 3 including the capacitors 16 and 17 with variable capacitance and the chip inductors 25 and 26. In addition, the control voltage output from the loop filter output terminal 20 is supplied to the connection point of the capacitors 16 and 17 via the resistor 21 so that the oscillation frequency is controlled.

  FIG. 2 is an equivalent circuit diagram of the chip inductors 25 and 26 in the first embodiment of the present invention. Since the chip inductors 25 and 26 are the same, the chip inductor 25 will be described as a representative. In FIG. 2, 30 and 31 are electrodes of the chip inductor 25. An equivalent circuit of the chip inductor 25 connected to the electrodes 30 and 31 is represented as a parallel circuit in which an inductor 32, a stray capacitance 33, and a resistor 34 are connected in parallel. Here, the resistor 34 is due to the resistance component of the conductor pattern which is the winding portion. The inductor 32 is an inductance component due to a conductor pattern that is a winding portion. The stray capacitance 33 represents the total value of stray capacitance generated in the chip inductor 25 and stray capacitance generated between the external ground and peripheral components.

  FIG. 3 is a characteristic diagram of frequency vs. Q of the chip inductor 25. In FIG. 3, 41 represents a frequency, and 42 represents Q. For example, a case will be described in which the oscillation frequency of the high-frequency oscillation device is 200 MHz, and the chip inductors 25 and 26 of the tuning circuit 3 are each a laminated type having an inductance value of 39 nH.

  The Q of each of the chip inductors 25 and 26 is represented by a characteristic 43. At a frequency 46 of 200 MHz at this time, Q is around 15. The self-resonant frequency 45 represents 1.5 GHz.

  Further, Q when the chip inductors 25 and 26 are mounted on the substrate is represented by a characteristic 44. That is, when the chip inductors 25 and 26 are mounted on the substrate, the self-resonant frequency 45 is lowered because the stray capacitance 33 is generated between the internal conductor pattern and the electrodes 30 and 31 and the ground. As a result, the Q of the chip inductors 25 and 26 when mounted on the substrate is further reduced at the oscillation frequency 46, and the high-frequency oscillation device becomes unstable in oscillation. As described above, when the multilayer type is used for the chip inductors 25 and 26, it is necessary to arrange the chip inductors 25 and 26 so as not to generate the stray capacitance 33 when the substrate is mounted.

  On the other hand, in the single type of winding type chip inductors 18 and 19 used in the conventional example, Q is around 30 at a frequency of 200 MHz, and the self-resonant frequency is 3 GHz. That is, in the single chip inductors 25 and 26 of the multilayer type, both the Q and the self-resonance frequency are reduced to about 1/2 with respect to the wound type chip inductors 18 and 19, and therefore, the multilayer chip inductors 25 and 26 are laminated in comparison with the winding type. In the type, it is important to dispose the stray capacitance 33 particularly when the substrate is mounted.

  FIG. 4 is a mounting diagram of the multilayer type small chip inductors 25 and 26 on the substrate according to the first embodiment. In addition, about the component used in FIG. 1, the same number is attached | subjected about the same thing as FIG. 4, and description is simplified. The chip inductors 25 and 26 used in FIG. 1 correspond to the chip inductors 51 and 52 in FIG. 4, respectively.

  A conductive pattern 54 is disposed on the upper surface of the substrate 53, a conductive pattern 55 is embedded in the lower layer in parallel with the conductive pattern 54, and a conductive pattern 56 is embedded in the lower surface in parallel with the conductive pattern 55. It is represented as a three-layer substrate. The conductor patterns 55 and 56 are used for wiring as a ground, a signal line, and a power supply line.

  The chip inductor 51 includes an inductor portion 57 made of a conductor pattern and electrodes 58 and 59 to which the inductor portion 57 is connected. The electrode 58 connected to the end of the inductor portion 57a far from the substrate 53 constituting the inductor portion 57 is connected to the tuning circuit terminal 12, and the end of the inductor portion 57b adjacent to the substrate 53 constituting the inductor portion 57 is connected. The electrode 59 to be connected is connected to the ground.

  Similarly, the chip inductor 52 includes an inductor portion 60 made of a conductor pattern and electrodes 61 and 62 to which the inductor portion 60 is connected. The electrode 61 to which the end of the inductor portion 60a far from the substrate 53 constituting the inductor portion 60 is connected is connected to the tuning circuit terminal 15, and the end of the inductor portion 60b adjacent to the substrate 53 constituting the inductor portion 60 is connected. The connected electrode 62 is connected to the ground.

  The conductor patterns of the inductor portions 57 and 60 are both clockwise, and the direction of the magnetic flux is substantially perpendicular to the substrate 53.

  With the above configuration, the inductor portions 57a and 60a far from the substrate of the chip inductors 51 and 52 can secure a sufficient distance from the ground or peripheral components, so that the stray capacitance when the substrate is mounted can be reduced. Therefore, even if the multilayer type small chip inductors 51 and 52 are used, the Q is not lowered and the operation of the oscillation circuit can be guaranteed. Thereby, a low-cost high-frequency oscillation device can be provided.

  Although the conductor patterns of the inductor portions 57 and 60 are both clockwise, the same effect can be obtained even when both are counterclockwise.

  2 and 3 used in the first embodiment are also applicable to the second, third, and fourth embodiments.

  Next, the relationship between the chip inductors 51 and 52 and the conductor patterns 55 and 56 of the substrate 53 will be described with reference to FIG. In a small-sized high-frequency oscillation device, the constituent parts, power supply pattern routing, and PLL control data pattern routing are close to each other. In particular, since the PLL control data is a pulse signal and has a high harmonic component, for example, the PLL control data easily jumps into the chip inductors 51 and 52 forming the tuning circuit 3, thereby causing deterioration of C / N as a high-frequency oscillation device.

  In order to improve this, a routing pattern of PLL control data is arranged in the conductor pattern 56 corresponding to or close to the mounting position of the chip inductors 51 and 52 on the substrate, and the conductor between the conductor pattern 54 and the conductor pattern 56 is arranged. The pattern 55 is a ground connection. Thereby, since the routing patterns of the chip inductors 51 and 52 and the PLL control data can be separated at high frequency, C / N as a high frequency oscillation device can be secured.

  At this time, when the positions of the chip inductors 51 and 52 and the routing pattern of the PLL control data are separated from each other, the components constituting the high-frequency oscillation device and the high-frequency separation by the conductor pattern 55 used as a ground for routing the power supply pattern Is insufficient.

  Therefore, the pulse signal from the PLL control data is likely to jump into the chip inductors 51 and 52, and the C / N as the high-frequency oscillation device is deteriorated.

(Embodiment 2)
Hereinafter, Embodiment 2 of the present invention will be described with reference to the drawings. FIG. 5 is a mounting diagram of the multilayer type small chip inductor according to the second embodiment on a substrate. In addition, about the component used in FIG. 5, the same number is attached | subjected about the same thing as FIG. 4, and description is simplified. The chip inductors 25 and 26 used in FIG. 1 correspond to the chip inductors 71 and 72 in FIG. Further, the second embodiment is different from the first embodiment in that the electrodes connected to the grounds of the chip inductors 71 and 72 are opposed to each other.

  In FIG. 5, the chip inductor 71 includes an inductor portion 73 made of a conductor pattern and electrodes 74 and 75 to which the inductor portion 73 is connected. The electrode 74 connected to the end of the inductor portion 73a far from the substrate 53 constituting the inductor portion 73 is connected to the tuning circuit terminal 12, and the end of the inductor portion 73b adjacent to the substrate 53 constituting the inductor portion 73 is connected. The electrode 75 to be connected is connected to the ground.

  Similarly, the chip inductor 72 includes an inductor portion 76 made of a conductor pattern and electrodes 77 and 78 to which the inductor portion 76 is connected. The electrode 77 connected to the end of the inductor portion 76a far from the substrate 53 constituting the inductor portion 76 is connected to the tuning circuit terminal 15, and the end of the inductor portion 76b adjacent to the substrate 53 constituting the inductor portion 76 is connected. The electrode 78 to be connected is connected to the ground.

  The conductor patterns of the inductor portions 73 and 76 are both clockwise, and the direction of the magnetic flux is substantially perpendicular to the substrate 53.

  Further, the electrodes 75 and 78 connected to the grounds of the chip inductors 71 and 72 are arranged in close proximity to each other.

  With the above configuration, the inductance portions 73a and 76a far from the substrate of the chip inductors 71 and 72 can sufficiently secure a gap with the ground or peripheral components, so that the stray capacitance when mounted on the substrate 53 can be reduced. Furthermore, since the electrodes 75 and 78 connected to the ground of the chip inductors 71 and 72 can be opposed to each other, a small-sized high-frequency oscillation device can be realized.

  Therefore, even if the multilayer type small chip inductors 71 and 72 are used, the Q is not lowered and the operation of the oscillation circuit can be guaranteed. As a result, a small-sized and low-cost high-frequency oscillation device can be provided.

  Although the conductor patterns of the inductor portions 73 and 76 are both clockwise, the same effect can be obtained even when both are counterclockwise.

(Embodiment 3)
Hereinafter, Embodiment 3 of the present invention will be described with reference to the drawings. FIG. 6 is a mounting diagram of the multilayer type small chip inductor according to the third embodiment on a substrate. In addition, about the component used in FIG. 6, the same number is attached | subjected about the same thing as FIG. 5, and description is simplified. In the second embodiment, the winding direction of the inductor section 76 of the chip inductor 72 is clockwise, whereas in the third embodiment, the winding direction of the inductor section 83 of the chip inductor 82 is opposite. The difference is that it is clockwise.

  In FIG. 6, the chip inductor 81 includes an inductor portion 84 made of a conductor pattern and electrodes 85 and 86 to which the inductor portion 84 is connected. The electrode 85 to which the end of the inductor portion 84a far from the substrate 53 of the inductor portion 84 is connected is connected to the tuning circuit terminal 12, and the electrode 86 to which the end of the inductor portion 84b adjacent to the substrate 53 of the inductor portion 84 is connected. Is connected to ground.

  Similarly, the chip inductor 82 includes an inductor portion 83 made of a conductor pattern and electrodes 87 and 88 to which the inductor portion 83 is connected. The electrode 88 to which the end of the inductor portion 83a far from the substrate 53 of the inductor portion 83 is connected is connected to the tuning circuit terminal 15, and the electrode 87 to which the end of the conductor pattern 83b adjacent to the substrate 53 of the inductor portion 83 is connected. Is connected to ground.

  Note that the conductor patterns of the inductor portions 84 and 83 are clockwise and counterclockwise, respectively, and the magnetic flux direction is substantially perpendicular to the substrate 53.

  Further, the electrodes 86 and 87 connected to the ground of the chip inductors 81 and 82 are arranged close to each other so as to face each other.

  With the above configuration, each of the inductor portions 84a and 83a far from the substrate 53 of the chip inductors 81 and 82 can secure a sufficient distance from the ground or peripheral components, so that the stray capacitance when mounted on the substrate 53 can be reduced. . Furthermore, since the electrodes 86 and 87 connected to the ground of the chip inductors 81 and 82 can be opposed to each other, a small-sized high-frequency oscillation device can be realized.

  As described above, even when the multilayer type small chip inductors 81 and 82 are used, the Q is not lowered and the operation of the oscillation circuit can be guaranteed. As a result, a small-sized and low-cost high-frequency oscillation device can be provided.

  The inductor portions 84 and 83 have been described as being clockwise and counterclockwise, respectively. However, similar effects can be obtained when the inductor portions 84 and 83 are counterclockwise and clockwise, respectively.

(Embodiment 4)
Embodiment 4 of the present invention will be described below with reference to the drawings. FIG. 7 is a cross-sectional view of the chip inductor according to the fourth embodiment when mounted on a substrate. In addition, about the component used in FIG. 7, the same number is attached | subjected about the same thing as FIG. 4, and description is simplified. Further, the chip inductor 51 or 52 used in FIG. 4 corresponds to the chip inductors 25 and 26 in FIG.

  In FIG. 7, conductor patterns 54a, 54b, 54c, and 54d are provided on the upper surface of the substrate 53. The chip inductor 51 is attached to the conductor patterns 54a and 54b, and the chip inductor 52 is attached to the conductor patterns 54c and 54d.

  In the sectional view in which the chip inductor 51 is mounted on the substrate 53, the case where the conductor pattern 55 provided in the lower layer of the conductor patterns 54a and 54b is connected to the ground is shown. Further, the cross-sectional view in which the chip inductor 52 is mounted on the substrate 53 shows a case where the conductor pattern 56 provided in the lower layer of the conductor pattern 55 is connected to the ground.

  The end of the inductor portion 57 a far from the substrate 53 constituting the inductor portion 57 of the chip inductor 51 is connected to the electrode 58. The electrode 58 is connected to the conductor pattern 54 a of the substrate 53 and then connected to the tuning circuit terminal 12. Further, the end of the inductor portion 57 b close to the substrate 53 constituting the inductor portion 57 of the chip inductor 51 is connected to the electrode 59. The electrode 59 is connected to the conductor pattern 54b of the substrate 53 and then connected to the ground.

  Here, the conductor pattern 55 provided in the lower layer in parallel with the conductor patterns 54a and 54b is connected to the ground.

  Thus, by connecting the conductor pattern 55 provided on the lower layer of the conductor patterns 54 a and 54 b on the upper surface of the substrate 53 to the ground, the interval 91 can be set between the chip inductor 51 and the conductor pattern 55 of the substrate 53. Thereby, unnecessary oscillation components radiated from the chip inductor 51 can be reduced. At the same time, the stray capacitance between the inductor portion 57b of the chip inductor 51 and the conductor pattern 55 connected to the ground can be reduced, so that the Q of the chip inductor 51 can be prevented from being lowered.

  Further, the end of the inductor portion 60 a far from the substrate 53 constituting the inductor portion 60 of the chip inductor 52 is connected to the electrode 61. The electrode 61 is connected to the conductor pattern 54 c of the substrate 53 and then connected to the tuning circuit terminal 15. Furthermore, the end of the inductor portion 60 b adjacent to the substrate 53 constituting the inductor portion 60 of the chip inductor 52 is connected to the electrode 62. The electrode 62 is connected to the conductor pattern 54d of the substrate 53 and then connected to the ground.

  Further, the conductor pattern 55 provided in the lower layer in parallel with the conductor patterns 54c and 54d is deleted in order to eliminate stray capacitance. Furthermore, the conductor pattern 56 provided in the lower layer of the conductor pattern 55 is connected to the ground.

  Thus, by connecting the conductor pattern 56 provided on the lower layer of the conductor patterns 54c and 54d on the upper surface of the substrate 53 to the ground, the interval 92 can be set between the chip inductor 52 and the conductor pattern 56 of the substrate 53. Thereby, unnecessary oscillation components radiated from the chip inductor 52 can be reduced.

  Therefore, the stray capacitance between the inductor portion 60 b of the chip inductor 52 and the conductor pattern 56 connected to the ground can be reduced more than the stray capacitance between the inductor portion 57 b of the chip inductor 51 and the conductor pattern 55. Thereby, the fall of Q of chip inductor 52 can be prevented more.

  As described above, the distance between the chip inductor and the conductor pattern connected to the ground of the substrate can be selected depending on which of the conductor patterns 55 and 56 built in the substrate or the conductor pattern provided in the lower layer is used. it can. Accordingly, it is possible to optimally set the unnecessary radiation of the oscillation component from the chip inductors 51 and 52 or the stray capacitance between the chip inductors 51 and 52 and the respective conductor patterns 55 and 56.

  Next, the case where the shield cover 93 is provided on the upper surface of the chip inductor will be described with reference to FIG. The shield cover 93 is disposed on the upper surfaces of the chip inductors 51 and 52, and can suppress unnecessary radiation of the oscillation component from the high frequency oscillation device.

  However, when the distance 94 between the shield cover 93 and the chip inductor 51 or 52 is reduced, stray capacitance is likely to be generated between the shield cover 93 and the inductor portion 57a, resulting in a decrease in Q. Therefore, the interval 94 needs to be set larger than the interval 91 or the interval 92.

  As a result, the stray capacitance between the respective inductor portions 57a and 60a of the chip inductors 51 and 52 and the shield cover 93 can be reduced, so that the Q of the chip inductors 51 and 52 can be prevented from lowering.

  As described above, both sides of the respective conductor pattern portions forming the chip inductors 51 and 52 are covered with the ground. Therefore, the unnecessary radiation component of the oscillation component from the chip inductors 51 and 52 is suppressed. Further, for example, harmonic components based on the PLL control data do not jump into the chip inductors 51 and 52, so that the C / N as a high-frequency oscillator is improved.

  The high-frequency oscillation device according to the present invention has an effect that even when a small chip inductor having a low Q is used, the Q is not deteriorated when the substrate is mounted, and is particularly useful when used for small-sized mobile phones and communication devices. It is.

The figure of the high frequency oscillation apparatus in Embodiment 1 of this invention Equivalent circuit diagram of chip inductor Same as above, chip inductor frequency vs. Q characteristics Same as above, chip inductor layout Arrangement diagram of chip inductor in Embodiment 2 of the present invention Chip inductor layout in Embodiment 3 of the present invention Sectional drawing in the board | substrate mounting of the chip inductor in Embodiment 4 of this invention Diagram of conventional high-frequency oscillator Same as above, chip inductor layout

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Integrated circuit 2 Differential amplifier circuit 3 Tuning circuit 4 Transistor 5 Transistor 10 Capacitor 11 Capacitor 12 Tuning circuit terminal 13 Capacitor 14 Capacitor 15 Tuning circuit terminal 16 Capacitor 17 Capacitor 25 Chip inductor 26 Chip inductor 53 Substrate 57 Inductor part 58 Electrode 59 Electrode 60 Inductor 61 Electrode 62 Electrode

Claims (6)

In a high-frequency oscillation device formed of an integrated circuit and including a differential amplifier circuit mounted on a substrate and the tuning circuit connected to the differential amplifier circuit and mounted on the substrate, the differential circuit The amplifier circuit includes a differential amplifier composed of first and second transistors, and a first tuning circuit connected from the base of the first transistor and the collector of the second transistor via respective coupling capacitors. And a second tuning circuit terminal connected from the collector of the first transistor and the base of the second transistor via respective coupling capacitors, and the tuning circuit includes the first tuning circuit. A series connection body in which a first capacitor and a second capacitor connected in series are connected between the terminal for use and the second tuning circuit terminal, and the first tuning circuit end A multilayer type first chip inductor connected between the first tuning inductor and the ground, and a multilayer type second chip inductor connected between the second tuning circuit terminal and the ground, the first chip inductor comprising: A first inductor portion provided in parallel with the substrate and formed of a conductor pattern, a first electrode connected to an end of the first inductor portion far from the substrate, and the first inductor portion The second chip inductor is provided in parallel with the substrate and has a second inductor portion formed of a conductor pattern, and the second electrode is connected to the end of the substrate near the substrate. A third electrode connected to an end of the inductor section far from the substrate and a fourth electrode connected to an end of the second chip inductor close to the substrate; The second inductor portion has the same winding direction, the first and third electrodes are connected to the first and second tuning circuit terminals, respectively, and the second and fourth electrodes Are high-frequency oscillators each connected to ground. The high-frequency oscillation device according to claim 1, wherein the second and fourth electrodes are placed close to each other and face each other. 2. The high-frequency oscillation device according to claim 1, wherein the first and second inductor portions have different winding directions, and the second and fourth electrodes are placed close to each other and face each other. A multilayer substrate is used as the substrate, and first and second chip inductors are mounted on the first conductor pattern provided on the upper surface of the multilayer substrate, and a second layer provided on the lower layer of the first conductor pattern. 2. The ground plane is formed on the conductor pattern or the third conductor pattern provided in a lower layer of the second conductor pattern so as to face at least the first and second chip inductors. High frequency oscillator. A shield case is provided on the upper surface of the first and second chip inductors with a first gap therebetween, and the first gap is formed between the first and second chip inductors and the second substrate layer. The high frequency oscillation device according to claim 4, wherein the high frequency oscillation device is larger than the second interval. In the third substrate layer provided in the lower layer of the second substrate layer, the capacitances of the first and second capacitors are varied in accordance with at least the positions where the first and second chip inductors are mounted. 5. The high-frequency oscillation device according to claim 4, wherein a PLL control data routing pattern is provided.

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