JP2005221356A - Radar device and distance measuring method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a radar device for effectively preventing measurement omissions with respect to measuring object bodies. <P>SOLUTION: This radar device is equipped with a transmission part for generating a trigger signal STG in synchronism with a modulation signal while transmitting a high frequency signal modulated by the modulation signal, a reception part for receiving the frequency signal reflected by n pieces of measuring object bodies to sequentially output n pieces of demodulation signals SRs, and a detection signal generation part 7 for generating detection signals W1 to Wn capable of measuring distances to the object bodies based on the trigger signal STG and on the demodulation signals SRs. The generation part 7 is equipped with TFFs 70-1 to 70-n for generating the detection signals W1 to Wn having pulse widths corresponding to time differences between the trigger signal STG and the demodulation signals SRs, and inverters 71-1 to 71-(n-1) and AND circuits 72-1 to 72-(n-1) for controlling the operational state of TFF 70-(j+1) so that a detection signal W(j+1) can be generated when inputting a rear edge of an j-th detection signal Wj. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to, for example, a radar apparatus that detects distances to a plurality of measurement objects, and a distance measurement method that measures distances to a plurality of measurement objects.

  As this type of radar apparatus, a radar apparatus (distance measuring apparatus) disclosed in Japanese Patent Laid-Open No. 5-232228 is known. As shown in FIG. 1 of the publication, the radar apparatus includes a light emission signal generation circuit, an LD driver, a semiconductor laser, a light receiving element, an amplifier, a first to nth (n is an integer of 2 or more) gate circuit, The first to n-th object time measurement circuits and the distance measurement value calculation circuit are provided. In this case, the first to nth gate circuits each include an RS flip-flop and a comparator. In this radar apparatus, the light emission signal generation circuit outputs a common start signal to the LD driver, each object time measurement circuit, and the first gate circuit. At this time, from the time when the rising edge of the start signal is output from the light emission signal generation circuit, the LD driver starts the transmission of the optical pulse signal by driving the semiconductor laser, and each object time measurement circuit starts the time measurement. Then, the first gate circuit starts operating. Specifically, the RS flip-flop in the first gate circuit is set by the rising edge of the start signal input to the S input terminal, and is set to the high level (hereinafter referred to as “H level”) from the Q output terminal to the enable terminal of the comparator. Is also output). Therefore, the comparator of the first gate circuit having an H level signal input to the enable terminal becomes operable.

  On the other hand, the optical pulse signal transmitted by the semiconductor laser is reflected by n measurement objects (measurement objects) located at different distances from the radar apparatus. Accordingly, n light pulse signals with a time difference are received by the light receiving element. In this case, the light receiving element photoelectrically converts the first received optical pulse signal and outputs it to the amplifier as a received pulse signal. Next, the amplifier amplifies the reception pulse signal output from the light receiving element to a level larger than the reference voltage of the comparator and outputs the amplified signal to the comparator of each gate circuit. In this case, only the comparator of the first gate circuit in the operable state operates in synchronization with the input of the received pulse signal, and the R terminal of the RS flip-flop of the first object time measuring circuit and the first gate circuit And a signal that rises from a low level (hereinafter also referred to as “L level”) to an H level to the S terminal of the RS flip-flop of the second gate circuit. Thereby, the first object time measuring circuit ends the time measurement. The RS flip-flop of the first gate circuit is reset and outputs an L level signal from the Q output terminal to the enable terminal of the comparator. Therefore, the comparator becomes inoperable when an L level signal is input to the enable terminal, and the output signal falls from the H level to the L level. The RS flip-flop of the second gate circuit is set by the rising edge input to the S input terminal, and outputs an H level signal from the Q output terminal to the enable terminal of the comparator in the second gate circuit. Therefore, the comparator of the second gate circuit, in which an H level signal is input to the enable terminal, becomes operable.

  Next, when the light receiving element receives the second optical pulse signal, the received optical pulse is photoelectrically converted and output to the amplifier as a received pulse signal. In this case, similarly to the above operation, the amplifier amplifies the reception pulse signal output from the light receiving element to a level larger than the reference voltage of the comparator and outputs the amplified signal to the comparator of each gate circuit. In this case, only the comparator of the second gate circuit in the operable state operates by inputting the reception pulse signal, and the second object time measuring circuit, the R terminal of the RS flip-flop of the second gate circuit, and 3 A signal rising from the L level to the H level is output to the S terminal of the RS flip-flop of the second gate circuit. Thereby, the second object time measurement circuit ends the time measurement. The RS flip-flop of the second gate circuit is reset and outputs an L level signal from the Q output terminal to the enable terminal of the comparator. Therefore, the comparator becomes inoperable when an L level signal is input to the enable terminal, and the output signal falls from the H level to the L level. The RS flip-flop of the third gate circuit is set by the rising edge input to the S input terminal, and outputs an H level signal from the Q output terminal to the enable terminal of the comparator in the third gate circuit. Therefore, the comparator of the third gate circuit, which has an H level signal input to the enable terminal, becomes operable.

Next, in the same manner as described above, the L-th optical pulse signal (L is an integer of 3 to (n-1) or less) sequentially received is photoelectrically converted to only the L-th gate circuit. Each time passes and the time measurement of the Lth object time measurement circuit is finished. Therefore, it is possible to measure each time from when the optical pulse signal is transmitted until it is reflected by each measurement object and received. As a result, the distance from each measured time to each measurement object is calculated.
JP-A-5-232228 (page 2-4, Fig. 1)

  However, this radar apparatus has the following problems. That is, each object time measuring circuit of the radar apparatus has finished measuring time when the pulse signal output from the comparator of the gate circuit is input. On the other hand, the RS flip-flop of the (L + 1) th gate circuit is set to the pulse signal output from the comparator of the Lth gate circuit. In this case, the Lth comparator generates a pulse signal that rises in synchronization with the front edge of the received reception pulse signal. However, since the RS flip-flop of the Lth gate circuit is reset in conjunction with the output of the H level pulse signal of this comparator, the Q output terminal of this RS flip-flop changes from the enable terminal of the Lth comparator. An L level signal is output. Therefore, immediately after the comparator becomes inoperable and outputs the H level signal, the output H level signal instantaneously falls to the L level. For this reason, a pulse signal having a pulse width much narrower than the received pulse signal is output. Therefore, in this radar device, when a pulse signal narrower than the pulse width that can be detected by the RS flip-flop of the object time measurement circuit or the gate circuit is output from the comparator, each circuit does not operate normally. As a result, there is a problem that a measurement omission for the measurement object may occur.

  The present invention has been made in view of such problems, and it is a main object of the present invention to provide a radar apparatus and a distance measurement method that can effectively prevent measurement leakage from a measurement object.

  A radar apparatus according to the present invention includes a transmitter that generates a trigger signal in synchronization with a modulation signal and transmits a high-frequency signal modulated by the modulation signal, and n measurement objects (n is an integer of 2 or more). A receiving unit that receives each reflected high-frequency signal and sequentially outputs n demodulated signals, and a detection that can measure the distance to each measurement object based on the trigger signal and each demodulated signal A detection signal generation unit that generates n signals, and the detection signal generation unit has a pulse width corresponding to a time difference between the trigger signal and the first to n-th demodulated signals output from the reception unit. (J + 1) th when the nth signal generation circuit for generating the detection signals of the first detection signal and the rear edge of the jth detection signal (j is an integer of 1 to (n−1)) are input. The second detection signal can be generated The (j + 1) -th said controlling the operation state of the signal generating circuit, respectively (n-1) is constituted by a number of control circuits.

  In this case, a flip-flop circuit that generates a pulse-like signal having a front edge synchronized with the input of the trigger signal and a rear edge synchronized with the input of the mth demodulated signal as the mth detection signal is provided. The m-th signal generation circuit (m is an integer of 1 to n) and equivalently, the polarity inversion signal of the j-th detection signal and the (j + 1) -th detection signal And a logic circuit that allows the (j + 1) th flip-flop circuit to input the (j + 1) th demodulated signal after the input of the rear edge of the jth detection signal. The jth control circuit is preferably configured.

  The distance measurement method according to the present invention includes a transmission step of generating a trigger signal in synchronization with a modulation signal and transmitting a high-frequency signal modulated with the modulation signal, and n (n is an integer of 2 or more) measurement. A reception step of receiving each of the high-frequency signals reflected by the object and sequentially outputting n demodulated signals, and a pulse width corresponding to a time difference between the trigger signal and the first to n-th demodulated signals A detection signal generation step of generating n detection signals, and the (j + 1) th detection signal when the rear edge of the detection signal of the jth (j is an integer of 1 to (n-1)) is input. A control step for controlling generation of the detection signal and a measurement step for measuring each distance to each measurement object based on the n detection signals are executed.

  According to the radar apparatus and the distance measurement method of the present invention, the detection signal having a pulse width corresponding to the time difference between the trigger signal and the first to nth demodulated signals is generated, respectively, and the jth (j is 1 or more). Control is performed so that the (j + 1) th detection signal can be generated when the rear edge of the detection signal (n-1) is inputted. For this reason, a detection signal whose pulse width is sufficiently long according to the time difference is generated. Therefore, since the detection signal can be reliably detected, measurement omission with respect to the measurement object can be effectively prevented.

  According to the radar apparatus of the present invention, the mth signal generation circuit has a pulse shape having a front edge synchronized with the input of the trigger signal and a rear edge synchronized with the input of the mth demodulated signal. A flip-flop circuit that generates a signal as the m-th detection signal, and the j-th control circuit is equivalent to the polarity inversion signal of the j-th detection signal and the (j + 1) -th detection. And a logic circuit that allows the (j + 1) th flip-flop circuit to input the (j + 1) th demodulated signal after the rear edge of the jth detection signal is input. Configured. Accordingly, a signal generation circuit that reliably generates a detection signal can be realized with a simple configuration, and thus the detection signal generation unit can be configured to be small and inexpensive. Therefore, a small and inexpensive radar apparatus can be realized.

  Hereinafter, the best mode of a radar apparatus and a distance measurement method according to the present invention will be described with reference to the accompanying drawings.

  First, the configuration of the radar apparatus 1 will be described with reference to the drawings.

  As shown in FIG. 1, the radar apparatus 1 includes a pulse signal generation unit 2, a transmission unit 3, a transmission antenna 4, a reception antenna 5, a reception unit 6, a detection signal generation unit 7, and pulse width measurement units 8-1 to 8- n (n is an integer greater than or equal to 2; the same applies hereinafter) and a distance calculation unit 9, and are configured to be able to measure distances L1 to Ln between a plurality of measurement objects 11-1 to 11-n (vehicles as an example). Has been. The pulse signal generation unit 2, the transmission unit 3, and the transmission antenna 4 constitute a transmission unit in the present invention, and the reception antenna 5 and the reception unit 6 constitute a reception unit in the present invention. Moreover, the radar apparatus 1 is integrated (modulated) by resin-molding in the state in which each above-mentioned component was mounted in one printed circuit board as an example.

  As an example, the pulse signal generator 2 generates a pulse-like trigger signal STG as shown in FIG. 1 based on an internal clock output from a crystal oscillator (not shown) disposed therein. It outputs to the detection signal generation part 7. The pulse signal generator 2 generates a pulsed modulation signal ST in synchronization with the trigger signal STG and outputs it to the transmitter 3. For example, the transmitter 3 continuously generates a carrier wave of a predetermined frequency (for example, 24 GHz) in a quasi-millimeter wave band, modulates the carrier wave with the input modulation signal ST to generate a high-frequency signal STR, and generates the generated high-frequency signal STR. The signal STR is transmitted from the transmission antenna 4. On the other hand, the receiving antenna 5 receives the high-frequency signal STR reflected by the n measurement objects 11-1 to 11-n among the high-frequency signals STR transmitted through the transmitting antenna 4, and receives the high-frequency signal SRR1. ~ SRRn is output to the receiving unit 6. In this case, as shown in the figure, the receiving antenna 5 first receives the high-frequency signal STR reflected from the measurement object 11-1 having the shortest distance to the radar apparatus 1 and receives the high-frequency signal SRR1 as the receiving unit 6. And then the high frequency signal STR reflected from the measurement object 11-2 having the next shortest distance to the radar device 1 is received and the high frequency signal SRR2 is output to the receiving unit 6, and then the radar device 1 The high-frequency signals STR reflected by the measurement objects 11-3 to 11-n are received in the order of short distances, and the high-frequency signals SRR3 to SRRn are sequentially output to the receiving unit 6. Hereinafter, when the high-frequency signals SRR1 to SRRn are not particularly distinguished, they are also simply referred to as “high-frequency signals SRR”. In this case, the transmission antenna 4 and the reception antenna 5 are configured by patch antennas as an example.

  As shown in FIG. 1, the receiver 6 demodulates the input high frequency signal SRR and outputs the demodulated signal SR to the detection signal generator 7. In this case, the high frequency signal SRR includes the high frequency signals SRR1 to SRRn described above. Therefore, the demodulated signal SR output from the receiver 6 includes demodulated signals SR1 to SRn corresponding to the pulses of the high frequency signals SRR1 to SRRn, as shown in FIG. Hereinafter, when the demodulated signals SR1 to SRn are not particularly distinguished, they are also simply referred to as “demodulated signals SR”. The demodulated signals SR1 to SRn correspond to the “first to nth demodulated signals” in the present invention.

  Based on the trigger signal STG and the demodulated signal SR, the detection signal generator 7 rises in synchronization with the rising edge of the trigger signal STG and falls n in synchronization with the rising edges of the demodulated signals SR1 to SRn, for example. The pulse-like detection signals W1 to Wn are generated and output. In addition, as an example, the detection signal generation unit 7 includes T flip-flops with n preset terminals (hereinafter also referred to as “TFF”) 70-1 to 70-n (hereinafter, not distinguished) as illustrated in FIG. Sometimes referred to as “TFF70”), n inverters 71-0, 71-1 to 71- (n−1) (hereinafter referred to as “inverters 71-1 to 71- (n−1)” are not distinguished. 71 ”) and (n−1) AND circuits 72-1 to 72- (n−1) (hereinafter also referred to as“ AND circuit 72 ”when not distinguished). Each TFF 70 inputs a trigger signal STG to each preset terminal (PRN terminal) via an inverter 71-0, and in synchronization with the rising edge of the trigger signal STG, outputs terminals (Q terminals, that is, non-inverted output terminals). ) To output an H level signal. Each TFF 70 receives the demodulated signal SR at its clock terminal, and when the rising edge of the demodulated signal SR is input with the H level signal being input to the input terminal (T terminal). The polarity of the signal that has been output from the output terminal (Q terminal) until now is inverted and an L level signal is output. Each TFF 70 constitutes a signal generation circuit in the present invention.

  Further, TFF 70-m (m is an integer of 1 to n, and the same applies hereinafter) outputs a detection signal Wm from the output terminal (Q terminal) to the pulse width measuring unit 8-m as shown in FIG. Further, the TFF 70-j (j is an integer not less than 1 and not more than (n-1); the same applies hereinafter) outputs a detection signal Wj from its output terminal (Q terminal) to the inverter 71-j. In this case, the TFF 70-1 outputs the detection signal W1 from the output terminal (Q terminal) to the input terminal (T terminal). On the other hand, the TFF 70- (j + 1) inputs a signal output from the AND circuit 72-j to its input terminal (T terminal), and one input terminal of the AND circuit 72-j from its output terminal (Q terminal). Output a detection signal W (j + 1).

  As shown in FIG. 2, the inverter 71-j receives the detection signal Wj output from the TFF 70-j and outputs the polarity inversion signal to the other input terminal of the AND circuit 72-j. The AND circuit 72-j has a polarity inversion signal of the detection signal Wj input from the other input terminal, and a detection signal W (output from the output terminal (Q terminal) of the TFF 70- (j + 1) and input from the one input terminal. j + 1) is output to the input terminal (T terminal) of TFF 70- (j + 1). The inverter 71 and the AND circuit 72 together constitute a control circuit and a logic circuit in the present invention.

  Each pulse width measurement unit 8-1 to 8-n measures each pulse width Tw1 to Twn of each detection signal W1 to Wn output from the detection signal generation unit 7, respectively. Each pulse width measuring unit 8-1 to 8-n outputs pulse width data D1 to Dn indicating the measured pulse widths Tw1 to Twn to the distance calculating unit 9, as shown in FIG. The distance calculation unit 9 calculates the distances L1 to Ln between the radar device 1 and the measurement objects 11-1 to 11-n based on the time 1/2 of each pulse width Tw1 to Twn and the speed of light. To do. In addition, the distance calculation unit 9 outputs distance data LD indicating the calculated distances L1 to Ln to an external device.

  Next, a distance measurement method using the radar apparatus 1 will be described with reference to FIGS.

  In the radar apparatus 1, as shown in FIG. 1, the pulse signal generation unit 2 generates a trigger signal STG and outputs it to the detection signal generation unit 7, and also generates a modulation signal ST generated in synchronization with the trigger signal STG. It outputs to the transmission part 3 (transmission step). At this time, the detection signal generation unit 7 starts generating the detection signals W1 to Wn in synchronization with the trigger signal STG output by the pulse signal generation unit 2 (detection signal generation step). Specifically, as shown in FIG. 2, each TFF 70 inputs a trigger signal STG to each preset terminal (PRN terminal) via an inverter 71-0. In this case, as shown in FIG. 3, each TFF 70 outputs detection signals W <b> 1 to Wn that rise to H level in synchronization with the rising edge of the trigger signal STG from the output terminal (Q terminal) of each TFF 70. At this time, as shown in the figure, the input terminal (T terminal) of the TFF 70-1 becomes H level in conjunction with the output terminal (Q terminal). Subsequently, each inverter 71-j outputs an L level signal obtained by inverting the polarity of each H detection signal Wj (output of TFF 70-j) to the other input terminal of the AND circuit 72-j. At this time, an H level signal, which is the detection signal W (j + 1), is input to one input terminal of the AND circuit 72-j. For this reason, the AND circuit 72-j outputs an L level signal. As a result, as shown in the figure, the input terminal (T terminal) of the TFF 70- (j + 1) is maintained at the L level and the reception of the demodulated signal SR is prohibited (control step).

  As shown in FIG. 1, the transmission unit 3 generates a high-frequency signal STR modulated by the modulation signal ST output from the pulse signal generation unit 2 and outputs the high-frequency signal STR to the transmission antenna 4. Thereby, the high frequency signal STR is transmitted from the transmission antenna 4 (transmission step). In this case, the receiving antenna 5 is reflected by the measuring objects 11-1 to 11-n after a predetermined time Tw1 to Twn has elapsed from the output of the modulation signal ST (that is, the trigger signal STG) by the pulse signal generator 2. The high frequency signals STR are sequentially input. In this case, the predetermined times Tw1 to Twn are the times during which the high-frequency signal STR reciprocates the distances L1 to Ln between the radar apparatus 1 and the respective measurement objects 11-1 to 11-n, that is, the distances L1 to Ln are two. It means the time required to propagate a double distance (L1 × 2 to Ln × 2).

  The receiving unit 6 demodulates the demodulated signal SR by receiving the high frequency signal SRR input from the receiving antenna 5. In this case, as the demodulated signal SR, as shown in FIGS. 1 and 3, demodulated signals SR1 to SRn corresponding to the respective high frequency signals SRR1 to SRRn are in this order after a predetermined time Tw1 to Twn from the trigger signal STG. Demodulated. Next, the demodulated signals SR1 to SRn are sequentially output from the receiving unit 6 to the detection signal generating unit 7 (sequentially output, receiving step). In this case, in the detection signal generator 7, the demodulated signal SR1 that is input first is input to the clock terminal of each TFF 70, as shown in FIG. At this time, as shown in FIG. 3, in synchronization with the rising edge of the demodulated signal SR1, the TFF 70-1 in a state where the H level signal is input to the input terminal (T terminal) is output from the output signal (Q Terminal) from H level to L level. Thereby, a detection signal W1 having a pulse width of the predetermined time Tw1 is generated (detection signal generation step). An L level signal is input to the input terminal (T terminal) of the TFF 70-1 in conjunction with the falling of the output terminal (Q terminal) of the TFF 70-1. As a result, the TFF 70-1 stops its operation. Next, the inverter 71-1 outputs an H level signal obtained by inverting the polarity of the L level detection signal W1 to the other input terminal of the AND circuit 72-1. At this time, an H level signal, which is the detection signal W2, is input to one input terminal of the AND circuit 72-1. For this reason, the AND circuit 72-1 changes the input signal to the input terminal (T terminal) of the TFF 70-2 from the L level to the H level in conjunction with the output of the inverter 71-1 rising from the L level to the H level. Launch. As a result, as shown in FIG. 3, a signal rising from the L level to the H level is input to the input terminal (T terminal) of the TFF 70-2. As a result, the TFF 70-2 is allowed to accept the demodulated signal SR, and is allowed to generate the detection signal W2 (generate a falling edge) (control step).

  Next, when the second demodulated signal SR2 is input to the detection signal generator 7, the demodulated signal SR2 is input to the clock terminal of each TFF 70, as shown in FIG. At this time, as shown in FIG. 3, in synchronization with the rising edge of the demodulated signal SR2, the TFF 70-2 in a state where an H-level signal is input to the input terminal (T terminal) is output from the output signal (Q Terminal) from H level to L level. Thereby, the detection signal W2 having a pulse width of the predetermined time Tw2 is generated (detection signal generation step). An L level signal is input to one input terminal of the AND circuit 72-1 in conjunction with the falling edge of the output terminal (Q terminal) of the TFF 70-2. Therefore, the AND circuit 72-1 outputs the input signal to the input terminal (T terminal) of the TFF 70-2 in conjunction with the fall of the output signal (Q terminal) of the TFF 70-2 from the H level to the L level. Fall from level to L level. As a result, as shown in FIG. 3, a signal that falls from the H level to the L level is input to the input terminal (T terminal) of the TFF 70-2. Therefore, the TFF 70-2 stops its operation. Next, the inverter 71-2 outputs an H level signal obtained by inverting the polarity of the L level detection signal W2 to the other input terminal of the AND circuit 72-2. At this time, an H level signal, which is the detection signal W3, is input to one input terminal of the AND circuit 72-2. Therefore, the AND circuit 72-2 changes the input signal to the input terminal (T terminal) of the TFF 70-3 from the L level to the H level in conjunction with the output of the inverter 71-2 rising from the L level to the H level. To launch. As a result, as shown in FIG. 3, a signal rising from the L level to the H level is input to the input terminal (T terminal) of the TFF 70-3. As a result, the TFF 70-3 is allowed to accept the demodulated signal SR, and is allowed to generate the detection signal W3 (generate a falling edge) (control step).

  In this case, the detection signal generator 7 sequentially receives the demodulated signal SRj + 1 (specifically, the demodulated signals SR3,... SRn). At this time, the detection signal generator 7 operates in the same manner as described above. Specifically, as shown in FIG. 3, in the state after inputting the demodulated signal SRj, the output signal (Q terminal) of the TFF 70-j falls to the L level. An L level signal is input. Therefore, the inverter 71-j inverts the polarity of the L level signal and outputs the H level signal to the other input terminal of the AND circuit 72-j. At this time, the H level detection signal W (j + 1) is input to one input terminal of the AND circuit 72-j. Therefore, the AND circuit 72-j outputs an H level signal to the input terminal (T terminal) of the TFF 70- (j + 1). As a result, the TFF 70- (j + 1) is allowed to accept the demodulated signal SR, and the detection signal W (j + 1) is allowed to be generated (falling edge is generated) (control step). In this state, when the demodulated signal SRj + 1 is input to the detection signal generator 7, an H level signal is input to the input terminal (T terminal) in synchronization with the rising edge of the demodulated signal SRj + 1. TFF 70- (j + 1) drops the output signal (Q terminal) from the H level to the L level. Thereby, the detection signal W (j + 1) having a pulse width of the predetermined time Tw (j + 1) is generated (detection signal generation step). Further, an L level signal is input to one input terminal of the AND circuit 72-j in conjunction with the falling of the output terminal (Q terminal) of the TFF 70- (j + 1). For this reason, the AND circuit 72-j is coupled to the input terminal (T terminal) of the TFF 70- (j + 1) in conjunction with the output signal (Q terminal) of the TFF 70- (j + 1) falling from the H level to the L level. The input signal falls from the H level to the L level. As a result, as shown in FIG. 3, a signal that falls from the H level to the L level is input to the input terminal (T terminal) of the TFF 70- (j + 1). Therefore, TFF 70- (j + 1) stops its operation.

  On the other hand, the pulse width measuring units 8-1 to 8-n measure the pulse widths Tw1 to Twn of the detection signals W1 to Wn output from the detection signal generating unit 7, as shown in FIG. Subsequently, the pulse width measuring units 8-1 to 8-n output pulse width data D1 to Dn indicating the measured pulse widths Tw1 to Twn to the distance calculating unit 9, as shown in FIG. The distance calculation unit 9 calculates the distances L1 to Ln to the measurement objects 11 to 11-n based on the pulse width data D1 to Dn output from the pulse width measurement units 8-1 to 8-n. Calculate (measurement step). In addition, the distance calculation unit 9 outputs distance data LD indicating the calculated distances L1 to Ln to an external device.

  Thus, according to the radar apparatus 1 and the distance measurement method, the detection signals W1 to Wn having the pulse widths Tw1 to Twn corresponding to the time difference between the trigger signal and the demodulated signals SR1 to SRn are generated, and the jth Control is performed so that the (j + 1) th detection signal W (j + 1) can be generated when the rear falling edge of the detection signal Wj is input. Therefore, it is possible to generate detection signals W1 to Wn whose pulse widths Tw1 to Twn are sufficiently long according to the time difference. Therefore, since the TFF 70, the inverter 71, the AND circuit 72, and the pulse width measuring units 8-1 to 8-n can reliably detect the detection signals W1 to Wn, the measurement on the measurement objects 11-1 to 11-n is performed. Leakage can be effectively prevented.

  In the radar apparatus 1, the mth TFF 70-m is synchronized with the leading rising edge synchronized with the rising edge of the trigger signal STG and the rising edge of the mth demodulated signal SRm via the inverter 71-0. And a TFF 70-m that generates a pulse-like signal having a rear falling edge as the m-th detection signal Wm, and the j-th inverter 71-j and the AND circuit 72-j include the j-th inverter The polarity inversion signal of the detection signal Wj and the (j + 1) th detection signal Wj are input, and the (j + 1) th TFF 70− (j + 1) after the input of the rear falling edge of the jth detection signal Wj. ) Is provided with an inverter 71-j and an AND circuit 72-j that allow the input of the (j + 1) -th demodulated signal SRj + 1. That. Therefore, according to the radar apparatus 1, the detection signal generation unit 7 (signal generation circuit in the present invention) that reliably generates the detection signals W1 to Wn can be configured with a simple configuration. The generation unit 7 can be configured to be small and inexpensive. As a result, a small and inexpensive radar apparatus 1 can be provided.

  In the above example, the trigger signal STG, the demodulated signal SR, and the detection signals W1 to Wn are described as an example in which the front edge and the rear edge are configured with positive pulses of rising and falling edges, respectively. The present invention is not limited to this. For example, at least one of the trigger signal STG, the demodulated signal SR, and the detection signals W1 to Wn can be configured by negative pulses having a leading edge and a trailing edge, which are a falling edge and a rising edge, respectively.

  Further, the detection signal generation unit 7 according to the present invention has been described with respect to the example in which each TFF 70, each inverter 71, and each AND circuit 72 is configured. However, the detection signal generation unit 7 can also be configured by a logic circuit that operates equivalently. .

1 is a block diagram showing a configuration of a radar apparatus 1. FIG. 4 is a block diagram mainly showing a configuration of a detection signal generation unit 7. FIG. 6 is a timing chart for explaining the operation of a detection signal generation unit 7;

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Radar apparatus 2 Pulse signal generation part 3 Transmission part 4 Transmission antenna 5 Reception antenna 6 Reception part 7 Detection signal generation part 11-1 to 11-n Measuring object 70-1 to 70-n T flip-flop 71-0 to 71 -(N-1) Inverter 72-1 to 72- (n-1) AND circuit SR, SR1-SR1n Demodulated signal STG Trigger signal W1-Wn Detection signal

Claims (3)

A transmitter that generates a trigger signal in synchronization with the modulation signal and transmits a high-frequency signal modulated with the modulation signal, and each of the high-frequency signals reflected by n (n is an integer of 2 or more) measurement objects. A reception unit that sequentially outputs n demodulated signals, and a detection signal that generates n detection signals that can measure the distance to each measurement object based on the trigger signal and each demodulated signal A generation unit,
The detection signal generation unit generates n signal generation circuits each generating the detection signal having a pulse width corresponding to a time difference between the trigger signal and the first to n-th demodulated signals output from the reception unit. And the (j + 1) th detection signal can be generated when the rear edge of the detection signal of the jth (j is an integer between 1 and (n-1)) is input. (N-1) control circuits for controlling the operation states of the signal generation circuits, respectively. The mth signal generation circuit (m is an integer of 1 to n) has a front edge synchronized with the input of the trigger signal and a rear edge synchronized with the input of the mth demodulated signal. A flip-flop circuit that generates a pulsed signal as the m-th detection signal;
The j-th control circuit equivalently inputs a polarity inversion signal of the j-th detection signal and the (j + 1) -th detection signal, and the rear edge of the j-th detection signal 2. The radar apparatus according to claim 1, further comprising a logic circuit that allows the (j + 1) -th demodulated signal to be input to the (j + 1) -th flip-flop circuit after the first input. A transmission step of generating a trigger signal in synchronization with the modulation signal and transmitting a high-frequency signal modulated with the modulation signal;
a reception step of receiving each of the high frequency signals reflected by n measurement objects (n is an integer of 2 or more) and sequentially outputting n demodulation signals;
A detection signal generating step for generating n detection signals having a pulse width corresponding to a time difference between the trigger signal and the first to n-th demodulated signals;
A control step for controlling generation of the (j + 1) th detection signal when a rear edge of the detection signal of the jth (j is an integer of 1 to (n-1)) is input;
A distance measuring method that executes a measuring step of measuring each distance to each measurement object based on the n detection signals.

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