JP2005209783A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device including a multilayer structure of an insulation layer and metal layers in which the peeling of the insulation layer and the metal layer is prevented, and to provide a highly reliable semiconductor device. <P>SOLUTION: The manufacturing method of a semiconductor device including a multilayer structure of an insulation layer 4 and metal layers 5, 6 and 7 comprises a step for applying a liquid material containing polysilazane and then calcinating the liquid material to form the insulation layer 4 wherein calcination is carried out in a steam atmosphere. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device.

  In recent years, in an electronic device such as a semiconductor device, multilayer wiring has been performed in order to achieve high integration. In a semiconductor device having a multilayer wiring, when electrically connecting upper and lower wiring patterns arranged via an interlayer insulating layer, a contact hole is formed in the interlayer insulating layer, and the connection is made via this contact hole. Like to do. As a method for forming such a multilayer wiring, the following method is generally known.

First, a metal layer is formed on a substrate, and this is etched to form a lower wiring layer. Next, an interlayer insulating layer is formed on the lower wiring layer, and a predetermined opening (contact hole) is formed in the interlayer insulating layer using a photolithography method. Further, a metal material as a contact plug is applied over the entire surface of the interlayer insulating layer so as to fill the formed contact hole, and patterned by photolithography to form a contact plug. Then, an upper wiring metal layer is formed so as to be connected to the contact plug, and this is patterned by a photolithography method to form an upper wiring layer (see, for example, Patent Document 1). .
International Publication No. 00/59040 Pamphlet

  In Patent Document 1, a liquid material is used to form an interlayer insulating layer. In other words, after applying the liquid material, the insulating layer is formed by firing, but unless the firing is performed under appropriate conditions, there is no separation between the insulating layer and the metal layer (wiring layer). May occur.

  The present invention has been made to solve the above problems, and in a method for manufacturing a semiconductor device including a laminated body of an insulating layer and a metal layer, a manufacturing method in which peeling between the insulating layer and the metal layer is unlikely to occur. An object of the present invention is to provide a highly reliable semiconductor device.

  In order to achieve the above object, a manufacturing method of a semiconductor device of the present invention is a manufacturing method of a semiconductor device including a laminated body of an insulating layer and a metal layer, and after applying a liquid material containing polysilazane, An insulating layer forming step of forming an insulating layer by firing is performed, and the firing is performed in a water vapor atmosphere.

  When firing is performed in a water vapor atmosphere as described above, it has become possible to prevent or suppress the occurrence of film peeling that may occur between the insulating layer and the metal layer. The film peeling that has occurred in the prior art is considered to be due to the nitrogen component remaining in the insulating layer after firing. In the present invention, this residual nitrogen component is obtained by firing in a steam atmosphere. As a result, it is considered that the film peeling can be prevented or suppressed.

  In the production method of the present invention, the firing can be performed in a steam atmosphere having a humidity of 50% to 100%. When the humidity is 50% or less, a nitrogen component may remain in the film and the film may peel off.

  In the method for manufacturing a semiconductor device of the present invention, a metal layer forming step of forming the metal layer after the insulating layer forming step may be included, or the metal layer may be formed before the insulating layer forming step. A metal layer forming step to be formed may be included.

  In the insulating layer forming step, the insulating layer can be formed to a thickness of 500 nm or more. When the thickness of the insulating layer to be formed is 500 or more, the influence of stress that may occur between the insulating layer and the metal layer is increased when firing by the conventional method. The method of the present invention is preferred when forming

  In the insulating layer forming step, the liquid material containing the polysilazane may be applied by spin coating. Film formation by spin coating is very simple and is preferable because the film thickness is relatively uniform.

  Furthermore, in the metal layer forming step, a metal layer can be formed using Al or Ta. Between such an Al or Ta metal layer and an insulating layer, film peeling is likely to occur when fired by a conventional method. Therefore, the method of the present invention is suitable particularly when such a metal layer is formed. is there.

  Hereinafter, an embodiment of a method for manufacturing a semiconductor device of the present invention will be described in detail with reference to the drawings. FIG. 1 is a schematic cross-sectional view showing a configuration of a TFT (thin film transistor) 100 as an example of a semiconductor device manufactured by the manufacturing method of the present invention. FIGS. It is a cross-sectional schematic diagram which shows the outline of the process. In addition, in each figure, in order to make each layer and each member the size which can be recognized on drawing, the scale is varied for every layer and each member.

  First, the structure of the manufactured TFT 100 will be described with reference to FIG. A TFT 100 shown in FIG. 1 includes a polycrystalline silicon film 2 on the surface of a glass substrate (base material) 1, and the polycrystalline silicon film 2 has a source region 21, a channel region 22, and a drain region 23. The source electrode 6 is electrically connected to the source region 21 via the contact hole 11 formed in the interlayer insulating layer 4, and the drain electrode 5 is electrically connected to the drain region 23 via the contact hole 12 formed in the interlayer insulating layer 4. It is connected to the.

  That is, the TFT 100 is suitable as a pixel switching element of an electro-optical device such as a liquid crystal device, and is applicable to a liquid crystal device or the like using the drain electrode 5 as a pixel electrode. A gate electrode 7 is formed on the channel region 22 of the polycrystalline silicon film 2 with the gate insulating film 3 interposed therebetween. The gate insulating film 3 and the interlayer insulating layer 4 are made of a silicon oxide film using polysilazane as a raw material.

  Here, the polycrystalline silicon film 2 and the gate electrode 7 are laminated via the gate insulating film 3, and the polycrystalline silicon film 2 and the source electrode 6 or the polycrystalline silicon film 2 and the drain electrode 5 are respectively The gate insulating film 3 and the interlayer insulating layer 4 are stacked. As described above, the TFT 100 according to the present embodiment has a multilayer wiring structure, and particularly includes the interlayer insulating layer 4 having a thickness of 500 nm or more, and is manufactured using a manufacturing method as described below. be able to.

Hereinafter, a method for manufacturing the TFT 100 shown in FIG. 1 will be described with reference to FIGS. First, as shown in FIG. 2A, the polycrystalline silicon film 2 is formed on the surface of the glass substrate 1. This polycrystalline silicon film 2 can be formed as follows. First, a liquid repellent film (not shown) such as a fluororesin film is formed on the glass substrate 1. Then, the element forming region of the liquid repellent film is irradiated with ultraviolet rays or the like, and the liquid repellent film in the element forming region is decomposed and patterned to form a liquid repellent bank. Thereafter, liquid silicon hydride is applied to the element formation region and dried. Next, the dried silicon hydride film is baked and thermally decomposed into an amorphous silicon film. Further, after irradiating the entire glass substrate 1 with ultraviolet rays to decompose and remove the liquid repellent bank, the amorphous silicon film is irradiated with an excimer laser such as XeCl and annealed to polycrystallize the amorphous silicon film. A silicon film 2 is formed. Thereafter, channel doping of the polycrystalline silicon film 2 is performed. That is, appropriate impurities (for example, PH ₃ ions when forming an n-type conductive layer) are implanted and diffused over the entire surface.

  Next, as shown in FIG. 2B, a gate insulating film 3 is formed so as to cover the polycrystalline silicon film 2. Specifically, a liquid material in which polysilazane is dispersed or dissolved in xylene is applied to the entire surface of the glass substrate 1, and the applied liquid material is baked at 300 ° C. to 500 ° C., for example, in a water vapor atmosphere with a humidity of 50% to 100%. As a result, the gate insulating film 3 having a thickness of about 80 nm to 150 nm is obtained. The liquid material can be applied by spin coating, dip coating, LSMCD, slit coating, or a droplet discharge device.

  Thereafter, as shown in FIG. 2C, a gate electrode 7 is formed in a predetermined region on the gate insulating film 3. Specifically, a metal material containing Al or Ta as a main component is applied over the entire surface by a vapor deposition method, and patterned by a photolithography method or the like so as to be selectively formed in a predetermined region.

Next, as shown in FIG. 3A, using the formed gate electrode 7 as a mask, an appropriate impurity (for example, B ₂ H ₆ ions when a p-type conductive layer is formed) is formed in the polycrystalline silicon film 2. Type in. By implantation of the impurity ions, a source region 21, a channel region 22, and a drain region 23 are formed in the polycrystalline silicon film 2, respectively.

  Next, as shown in FIG. 3B, the insulating film 4 is formed on the entire surface of the gate insulating film 3 (glass substrate 1) including the gate electrode 7. This insulating film 4 is formed by the same method as the gate insulating film 3 described above. That is, a liquid material made of a xylene solution of polysilazane is applied by spin coating, and this is applied to, for example, water vapor having a humidity of 50% to 100%. The insulating film 4 having a thickness of about 500 nm is obtained by baking at a temperature of 300 ° C. to 500 ° C. in the atmosphere.

  Further, as shown in FIG. 3C, contact holes 11 and 12 are formed in the formed insulating film 4. Here, a mask (not shown) having a predetermined pattern is formed on the insulating film 4, and a contact hole is formed by etching through the mask.

  Then, as shown in FIG. 3D, a liquid contact forming material mainly composed of an organometallic compound is supplied to the formed contact holes 11 and 12 using an ink jet apparatus (not shown). Thereafter, the liquid contact forming material is fired and solidified to form a contact plug. Further, the source electrode 6 and the drain electrode 5 are formed in a predetermined wiring pattern so as to be connected to the contact plug.

  As a pattern forming method of the source electrode 6 and the drain electrode 5, for example, a metal material mainly composed of Al or Ta is applied by vapor deposition, and a photolithography method or the like is used to selectively form the metal material in a predetermined region. A patterning method can be employed. Note that the contact plug, the source electrode 6 and the drain electrode 5 may be formed in the same process, that is, the electrodes 5 and 6 may be formed while filling the contact holes 11 and 12. In this case, the contact plug, the source electrode 6 and the drain electrode 5 are preferably made of the same metal material.

  The TFT (semiconductor device) 100 shown in FIG. 1 can be obtained by the method as described above. Here, when the gate insulating film 3 and the interlayer insulating layer 4 are formed, a liquid material made of a xylene solution of polysilazane is applied by spin coating, and this is applied in a water vapor atmosphere with a humidity of 50% to 100% at 300 ° C. to 500 ° C. Each insulating film is obtained by baking at a temperature of ° C. That is, when firing is performed in a water vapor atmosphere, peeling between the gate insulating film (insulating layer) 3 and the gate electrode (metal layer) 7 is very difficult to occur, and the interlayer insulating film (insulating layer) 4 And between the gate electrode (metal layer) 7, between the interlayer insulating film (insulating layer) 4 and the source electrode (metal layer) 6, and between the interlayer insulating film (insulating layer) 4 and the drain electrode (metal layer) 5. The film peeling was extremely unlikely to occur between the two. In particular, although the interlayer insulating film 4 is formed with a thickness of 500 nm or more, no film peeling occurs between the gate electrode 7, the source electrode 6, and the drain electrode 5, and the reliability is extremely high. It became TFT100.

Next, in order to confirm the effect of the present invention, the following comparative study was performed.
First, as an example, a 20 wt% xylene solution of polysilazane was prepared and applied on a metal plate made of Al. Specifically, the solution is dropped in the air and then applied at a predetermined rotational speed, pre-baked at 100 ° C. for 5 minutes, and further in an oxygen atmosphere of 80% humidity at 300 ° C. for 1 hour. An insulating film having a thickness of 1 μm was obtained by annealing under the above conditions. And the state of the film | membrane between the obtained insulating film and a metal plate was observed.

  On the other hand, as a comparative example, a 20 wt% xylene solution of polysilazane was prepared and applied on a metal plate made of Al. Specifically, the solution is dropped in the air, then applied at a predetermined rotation speed, pre-baked at 100 ° C. for 5 minutes, and then further at 300 ° C., 1% in an oxygen atmosphere with a humidity of 3% or less. Annealing was performed under time conditions to obtain an insulating film having a thickness of 1 μm. And the state of the film | membrane between the obtained insulating film and a metal plate was observed.

  When the state of the film between the insulating film and the metal plate was observed, the film did not peel off in the example, but a crack was generated between the insulating film and the metal plate in the comparative example. From the above examination results, when manufacturing a semiconductor device including a laminate of an insulating layer and a metal layer as in the present invention, after applying a liquid material containing polysilazane, this is fired in a water vapor atmosphere. When the insulating layer is formed, it is possible to provide a highly reliable semiconductor device that does not easily peel off from the metal layer.

1 is a schematic cross-sectional view illustrating an embodiment of a semiconductor device. FIG. 2 is a schematic cross-sectional view showing one process of the method for manufacturing the semiconductor device of FIG. FIG. 3 is a schematic cross-sectional view showing a process following FIG. 2.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 3 ... Gate insulating film (insulating layer), 4 ... Interlayer insulating layer (insulating layer), 5 ... Drain electrode (metal layer), 6 ... Source electrode (metal layer), 7 ... Gate electrode (metal layer), 100 ... TFT (Semiconductor device)

Claims (7)

A method of manufacturing a semiconductor device including a laminate of an insulating layer and a metal layer,
After applying a liquid material containing polysilazane, comprising an insulating layer forming step of forming an insulating layer by baking this,
A method of manufacturing a semiconductor device, wherein the baking is performed in a water vapor atmosphere.   The method for manufacturing a semiconductor device according to claim 1, further comprising a metal layer forming step of forming the metal layer after the insulating layer forming step.   3. The method of manufacturing a semiconductor device according to claim 1, further comprising a metal layer forming step of forming the metal layer before the insulating layer forming step.   4. The method of manufacturing a semiconductor device according to claim 1, wherein, in the insulating layer forming step, the insulating layer is formed to a thickness of 500 nm or more.   5. The method of manufacturing a semiconductor device according to claim 1, wherein, in the insulating layer forming step, the liquid material containing the polysilazane is applied by spin coating.   6. The method for manufacturing a semiconductor device according to claim 1, wherein in the metal layer forming step, a metal layer is formed using Al or Ta.   7. The method of manufacturing a semiconductor device according to claim 1, wherein in the insulating layer forming step, firing is performed in a water vapor atmosphere having a humidity of 50% to 100%.

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