JP2005194138A - Dielectric ceramic composition, and laminated ceramic capacitor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a dielectric ceramic composition of which the temperature characteristic of dielectric constant is flat, the insulation resistance and high temperature load reliability are superior, and the absolute value of DC bias change rate is small, while having a high dielectric constant, and a laminated ceramic capacitor constituted by using this dielectric ceramic composition. <P>SOLUTION: The dielectric ceramic composition is expressed by a composition formula: 100(Ba<SB>1-x</SB>Ca<SB>x</SB>)<SB>m</SB>TiO<SB>3</SB>+aMnO+bV<SB>2</SB>O<SB>5</SB>+cSiO<SB>2</SB>+dRe<SB>2</SB>O<SB>3</SB>(provided that Re is at least one kind of metal element selected from the group consisting of Y, La, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb; and a, b, c, and d express mole ratios), and also, x, m, a, b, c, and d are in the ranges of 0.030≤x≤0.20, 0.990≤m≤1.030, 0.010≤a≤5.0, 0.050≤b≤2.5, 0.20≤c≤8.0, 0.0050≤d≤2.5, respectively. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a dielectric ceramic composition and a multilayer ceramic capacitor formed using the dielectric ceramic composition.

Conventionally, in order to use Ni and Ni alloy as an internal electrode, as a dielectric material for a multilayer capacitor that does not become a semiconductor even when fired under a low oxygen partial pressure and has a flat temperature characteristic of relative dielectric constant, for example, Dielectric containing BaTiO ₃ as a main component and Re ₂ O ₃ as a subcomponent (where Re is one or more of Tb, Dy, Ho, and Er), Co ₂ O ₃ , BaO, MnO, and MgO Body ceramic composition (see Patent Documents 1 to 3), BaTiO ₃ as a main component, and Re as an auxiliary component (where Re is one of Y, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb) Dielectric ceramic composition to which Ca, Mg, and Si are added (see Patent Document 4), (Ba, Ca) TiO ₃ as a main component, and Re ₂ O ₃ as a subcomponent (where Re is Y, Gd, Tb Dy, Ho, Er, and one or more of the Yb), MgO, and the dielectric ceramic composition obtained by adding MnO (see Patent Document 5), a main component (Ba, Ca) TiO _3, as a sub-component Many ceramic compositions such as a dielectric ceramic composition to which V ₂ O ₅ , SiO ₂ , MnO, and MgO are added (see Patent Document 6) have already been proposed.
Japanese Patent Laid-Open No. 5-9066 Japanese Patent Laid-Open No. 5-9067 Japanese Patent Laid-Open No. 5-9068 JP 2001-39765 A JP 2000-58378 A JP, 2003-165768, A In a multilayer ceramic capacitor using these dielectric ceramic compositions, a DC voltage having a low electric field strength of, for example, about 1 V / μm, which has a small applied voltage with respect to the thickness of the conventional dielectric ceramic layer. Often used below.

  With the progress of electronic technology in recent years and the progress of higher functionality and higher integration of electronic devices, the usage conditions of multilayer ceramic capacitors are becoming increasingly severe.

  In particular, due to the high integration of electronic devices, the ambient temperature of multilayer ceramic capacitors mounted in the vicinity of a heating element such as a CPU operating at high frequency is higher than before.

  The multilayer ceramic capacitor mounted in the circuit is loaded with a DC voltage (DC bias) for stabilizing the circuit operation, and the high temperature load reliability is deteriorated due to the high use environment as described above, that is, There is a concern that the deterioration life of the insulation resistance in an environment where voltage is applied at a high temperature is shortened.

  On the other hand, in order to satisfy the demand for the reduction in size and capacity of the multilayer ceramic capacitor as described above, it is necessary to make the dielectric ceramic layer thinner and multilayer.

  As described above, multilayer ceramic capacitors are required to have both a small size and a large capacity, and an improvement in insulation resistance and high-temperature load reliability. There is a need for a dielectric ceramic composition that is excellent in insulation resistance and high temperature load reliability even when the body ceramic layer is made thin.

  However, the conventional dielectric ceramic composition has been designed on the assumption that it is used under a DC voltage with a low electric field strength of, for example, about 1 V / μm. When used under a high electric field strength DC voltage, the insulation resistance and high temperature load reliability are drastically reduced, and the capacitance change rate (hereinafter referred to as DC bias change rate) with respect to the applied DC electric field is increased. There was a problem.

  When the high temperature load reliability is reduced, there is a high possibility that the multilayer ceramic capacitor is short-circuited and then burned out during use, and when the DC bias change rate is large, the effective capacity of the multilayer ceramic capacitor is reduced. Since the electrostatic capacity required at the design stage is not satisfied, there is a concern that the operation of the electronic device in which it is used becomes unstable or eventually fails.

  For this reason, when applying the conventional dielectric ceramic composition to a multilayer ceramic capacitor having a thin dielectric ceramic layer, in order to avoid the occurrence of the above-mentioned problems, depending on the degree of thinning. It was necessary to lower the rated voltage in advance, that is, to reduce the DC voltage that can be applied.

  As shown in Patent Documents 1 to 6, the dielectric ceramic composition cited as the prior art is applied with a DC voltage having an electric field strength of 10 V / μm at 150 ° C. with a dielectric ceramic layer thickness of about 2 to 3 μm. However, the high temperature load reliability when the dielectric ceramic layer is thinned to about 1 μm has not been ensured.

  In addition, as shown in Patent Document 5, if the DC bias change rate is reduced, the relative dielectric constant decreases to less than 3000. Therefore, the multilayer ceramic capacitor is reduced in size and capacity, and the DC bias change rate is improved. It was difficult to achieve both.

  Furthermore, as shown in Patent Document 6, when a dielectric ceramic composition capable of thinning a dielectric ceramic layer to about 2 μm is attempted to flatten the temperature characteristics of the relative dielectric constant, the relative dielectric constant becomes less than 3000. Thus, it has been difficult to achieve both the reduction in size and increase in capacity of the multilayer ceramic capacitor and the flattening of the temperature characteristics of the capacitance.

  Therefore, the object of the present invention is to solve the above-mentioned problem, that is, even if the dielectric ceramic layer is thinned to about 1 μm while having a high relative permittivity contributing to the miniaturization and large capacity of the multilayer capacitor, A dielectric ceramic composition having a small absolute value of DC bias change rate, a flat temperature characteristic of a relative dielectric constant, a good insulation resistance and high temperature load reliability, and the dielectric ceramic composition It is to provide a multilayer ceramic capacitor.

To solve the technical problems described above, the dielectric ceramic composition of the present invention, the composition _{formula: 100 (Ba 1-x Ca} x) m TiO 3 + aMnO + bV 2 O 5 + cSiO 2 + dRe 2 O 3 ( where, Re is Y, La, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb are at least one metal element, and a, b, c, and d represent molar ratios) A dielectric ceramic composition represented by:
0.030 ≦ x ≦ 0.20, 0.990 ≦ m ≦ 1.030, 0.010 ≦ a ≦ 5.0, 0.050 ≦ b ≦ 2.5, 0.20 ≦ c ≦ 8.0, It is in the range of 0.050 ≦ d ≦ 2.5.

  The multilayer ceramic capacitor of the present invention comprises a plurality of dielectric ceramic layers, an internal electrode formed between the dielectric ceramic layers, and an external electrode electrically connected to the internal electrode. The dielectric ceramic layer is composed of the above-described dielectric ceramic composition.

  The internal electrode is made of at least one conductive material selected from Ni, Ni alloy, Cu, and Cu alloy.

According to the present invention, although the dielectric constant is 3000 or more, even if the dielectric ceramic layer is thinned to about 1 μm, the absolute value of the DC bias change rate when a DC voltage of 2 V / μm is applied is 20% or less. The temperature characteristic of relative permittivity is X7R characteristic of EIA standard (relative permittivity at 25 ° C as a reference, the absolute value of temperature change rate of relative permittivity within the range of -55 ° C to 125 ° C is 15% The insulation resistance is as high as 10 ¹¹ Ω · m or more at 25 ° C, and the high temperature load reliability is 150 ° C and a DC voltage of 10 V / μm is applied. A dielectric ceramic composition having an average failure life of as high as 100 hours or more can be obtained.

  Therefore, by applying the dielectric ceramic composition according to the present invention to a multilayer ceramic capacitor, it has excellent high temperature load reliability even under the use conditions that are becoming stricter due to higher functionality and higher integration of electronic devices. Can be secured.

  Furthermore, it is possible to achieve both a reduction in the capacity and the capacity of the multilayer ceramic capacitor and an improvement in the DC bias change rate, and the electrical characteristics can be stable and excellent.

  FIG. 1 is a cross-sectional view schematically showing a multilayer ceramic capacitor 1 constituted by using a dielectric ceramic composition according to the present invention.

  The multilayer ceramic capacitor 1 includes a multilayer body 2. The multilayer body 2 includes a plurality of dielectric ceramic layers 3 to be laminated, and a plurality of internal electrodes 4 and 5 formed along a plurality of specific interfaces between the plurality of dielectric ceramic layers 3. The The internal electrodes 4 and 5 are formed so as to reach the outer surface of the multilayer body 2, but the internal electrode 4 that is led out to one end face 6 of the multilayer body 2 and the inner part that is led out to the other end face 7. Electrodes 5 are alternately arranged inside the laminate 2.

  External electrodes 8 and 9 are formed on the outer surface of the laminate 2 and on the end faces 6 and 7, respectively. Further, if necessary, first plating layers 10 and 11 made of Ni, Cu or the like are formed on the external electrodes 8 and 9, respectively, and further, a second plating layer made of solder, Sn or the like is formed thereon. Plating layers 12 and 13 are respectively formed.

  Next, a method for manufacturing the multilayer ceramic capacitor 1 as described above will be described in the order of manufacturing steps.

  First, raw material powder for the dielectric ceramic composition is prepared, and this is slurried, and this slurry is formed into a sheet shape to obtain a green sheet for the dielectric ceramic layer 3. Here, as the dielectric ceramic raw material powder, the raw material powder for the dielectric ceramic composition according to the present invention is used as will be described in detail later.

  Next, the internal electrodes 4 and 5 are formed on each one main surface of a specific green sheet. The internal electrodes 4 and 5 are made of at least one conductive material selected from Ni, Ni alloy, Cu, and Cu alloy, and are particularly preferably made of Ni or Ni alloy. These internal electrodes 4 and 5 are usually formed by a screen printing method or a transfer method using a conductive paste made of a conductive material as described above, but not limited to these, and formed by any method. May be.

  Next, a necessary number of green sheets for the dielectric ceramic layer 3 on which the internal electrodes 4 or 5 are formed are stacked, and these green sheets are sandwiched between an appropriate number of green sheets on which no internal electrodes are formed. Is thermocompression-bonded to obtain a raw laminate.

  Next, this raw laminate is fired at a predetermined temperature in a predetermined reducing atmosphere, whereby a sintered laminate 2 as shown in FIG. 1 is obtained.

  Thereafter, external electrodes 8 and 9 are formed on both end faces 6 and 7 of the laminate 2 so as to be electrically connected to the internal electrodes 4 and 5, respectively. As materials for these external electrodes 8 and 9, Ni, Ni alloy, Cu, Cu alloy, Ag, Ag alloy, or the like can be used. The external electrodes 8 and 9 are usually formed by applying a conductive paste obtained by adding glass frit to a metal powder on both end faces 6 and 7 of the laminate 2 and baking it.

  The conductive paste to be the external electrodes 8 and 9 is usually applied to the laminated body 2 after sintering and baked as described above, but is applied to the raw laminated body before firing, It may be baked simultaneously with the baking for obtaining the body 2.

  Next, plating of Ni, Cu or the like is performed on the external electrodes 8 and 9 to form first plating layers 10 and 11. Finally, solder, Sn, or the like is plated on the first plated layers 10 and 11 to form second plated layers 12 and 13 to complete the multilayer ceramic capacitor 1.

In such a multilayer ceramic capacitor 1, the dielectric ceramic layer 3, the composition _{formula: 100 (Ba 1-x Ca} x) m TiO 3 + aMnO + bV 2 O 5 + cSiO 2 + dRe 2 O 3 ( where, Re is Y, La, At least one metal element selected from Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb, and a, b, c, and d represent a molar ratio). It is comprised with a dielectric ceramic composition.

  However, in the above composition formula, x, m, a, b, c, and d are 0.030 ≦ x ≦ 0.20, 0.990 ≦ m ≦ 1.030, and 0.010 ≦ a ≦ 5. 0, 0.050 ≦ b ≦ 2.5, 0.20 ≦ c ≦ 8.0, and 0.050 ≦ d ≦ 2.5.

  Even if this dielectric ceramic composition is fired in a reducing atmosphere, it can be sintered without becoming a semiconductor.

Moreover, if the dielectric ceramic layer 3 is formed in the multilayer ceramic capacitor 1 using this dielectric ceramic composition, the dielectric ceramic layer is thinned to about 1 μm while the relative dielectric constant is 3000 or more. Even when layered, the absolute value of the DC bias change rate when a DC voltage of 2 V / μm is applied is as small as 20% or less, the temperature characteristics of the relative permittivity are flattened to satisfy the EIA standard X7R characteristics, and the insulation resistance is reduced. The resistivity at 25 ° C. is as high as 10 ¹¹ Ω · m or more, and the high temperature load reliability can be increased to an average failure life of 100 h or more when a DC voltage with an electric field strength of 10 V / μm is applied at 150 ° C. it can.

The starting materials for such a dielectric ceramic composition are a compound represented by (Ba _1-x Ca _x ) _m TiO ₃ , a Mn compound, a V compound, a Si compound, and a Re compound (where Re is Y, La , Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb), the production method of the raw material powder of the dielectric ceramic composition, Any method may be used as long as it can realize the compound represented by (Ba _1-x Ca _x ) _m TiO ₃ .

For example, when a compound represented by (Ba _1-x Ca _x ) _m TiO ₃ is called a main component and the other components are called subcomponents, a step of mixing BaCO ₃ , CaCO ₃ , and TiO ₂ , The raw material powder of the dielectric ceramic composition can be obtained by a manufacturing method including a step of heat-treating the mixture for synthesis and a step of adding and mixing the subcomponents to the obtained main component.

  Further, by a production method comprising a step of synthesizing a main component by a wet synthesis method such as a hydrothermal synthesis method, a hydrolysis method, or a sol-gel method, and a step of adding a subcomponent to the obtained main component and mixing. Also, a raw material powder for the dielectric ceramic composition can be obtained.

  In addition, subcomponents Mn compound, V compound, Si compound, and Re compound (where Re is selected from Y, La, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, and Yb) The at least one metal element) is not limited to oxide powder as long as it can constitute the dielectric ceramic composition, and a solution of an alkoxide or an organic metal may be used. Depending on the form, the properties of the obtained dielectric ceramic composition are not impaired.

  Further, the dielectric ceramic composition as described above is fired to form the dielectric ceramic layer 3 of the multilayer ceramic capacitor 1 shown in FIG. 1, and is included in the internal electrodes 4 and 5 in such a firing process. Metals such as Ni, Ni alloy, Cu, and Cu alloy may diffuse into the dielectric ceramic layer 3, but according to the above dielectric ceramic composition, such metal components diffuse. However, it has been confirmed that there is no substantial influence on the electrical characteristics.

  Next, the present invention will be described more specifically based on examples. This example is also to provide a basis for limiting the composition range according to the present invention.

  In this example, a multilayer ceramic capacitor as shown in FIG. 1 was produced.

First, as starting materials for the main component _{(Ba 1-x Ca x)} m TiO 3, high-purity BaCO _3, CaCO _3, and to prepare each powder of TiO _2, shown in Tables 1 and 2 below Each of the above starting material powders was prepared so that the Ca content, that is, “Ca modification amount: x” and “(Ba, Ca) / Ti ratio: m” were obtained.

  The blended powder was wet-mixed using a ball mill and uniformly dispersed, and then subjected to a drying treatment to obtain a adjusted powder.

  The obtained adjusted powder was calcined at a temperature of 1000 ° C. or higher to obtain a main component powder having an average particle size of 0.20 μm and Ca contents of x and m shown in Tables 1 and 2. The average particle size was determined by observing the powder with a scanning electron microscope and measuring the particle size of 300 particles.

In addition, as starting materials for subcomponents, MnCO ₃ , V ₂ O ₅ , SiO ₂ , and Re ₂ O ₃ (where Re is Y, La, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, And at least one metal element selected from Yb), and the composition formulas selected for x, m, a, b, c, and d shown in Tables 1 and 2 below, respectively. _{: 100 (Ba 1-x Ca} x) m TiO 3 + aMnO + bV 2 O 5 + cSiO 2 + dRe as the composition represented by ₂ O ₃ obtained was formulated with the main component powder, a starting material powder of the respective subcomponents . Sample No. In 65 to 70, two kinds of metal elements were simultaneously added as Re, but the same amount of each metal element was added.

  Next, this blended powder was wet-mixed using a ball mill and uniformly dispersed, and then subjected to a drying treatment to obtain a raw material powder for the dielectric ceramic composition.

  Next, a polyvinyl butyral binder, a plasticizer, and an organic solvent such as ethanol were added to the dielectric ceramic raw material powder and wet mixed by a ball mill to obtain a dielectric ceramic composition slurry. This slurry was formed into a sheet on a carrier film made of polyethylene terephthalate or the like to obtain a green sheet of a dielectric ceramic composition. The thickness of the obtained green sheet was 1.4 μm.

  Next, on the obtained green sheet, after printing an internal electrode pattern using a conductive paste mainly composed of Ni, 6 layers are stacked so as to constitute a plurality of capacitances facing each other, and An appropriate number of ceramic green sheets with no internal electrode pattern formed on the upper and lower surfaces were stacked and thermocompression bonded to obtain a raw laminate.

This raw laminate was debindered by holding at 350 ° C. for 3 hours in an N ₂ atmosphere, and then using a mixed gas of N ₂ —H ₂ —H ₂ O, the oxygen partial pressure at which the Ni internal electrode was not oxidized was 10 ^In a reducing atmosphere of ⁻¹² to 10 ⁻⁹ MPa, the laminates were obtained by firing for 2 hours at the temperatures shown in Tables 3 and 4 respectively.

A conductive paste containing Ag as a main component and containing a B ₂ O ₃ —SiO ₂ —BaO-based glass frit is applied to both end faces of the obtained fired laminate, and the temperature is 600 ° C. in an N ₂ atmosphere. Baked at temperature.

  On the baked Ag electrode, Ni plating is performed by a known method to form a first plating layer, and Sn plating is performed thereon to form a second plating layer. A connected external electrode was formed.

The outer dimensions of the multilayer ceramic capacitor thus obtained were 5.0 mm in width, 5.7 mm in length, and 2.4 mm in thickness. The number of effective dielectric ceramic layers was 5, the counter electrode area per layer was 16.3 mm ² , and the thickness of the ceramic dielectric layer was 1.0 μm.

With respect to these obtained samples, the capacitance (C) and dielectric loss (tan δ) were measured by applying an alternating voltage of 0.5 V _rms and 120 Hz at 25 ° C. using an automatic bridge type measuring device. The relative dielectric constant (ε _r ) was calculated from C, the internal electrode area, and the ceramic dielectric layer thickness.

Furthermore, the electrostatic capacity (C _DC ) when a DC voltage of 2 V is superimposed on an AC voltage of 0.5 V _rms and 120 Hz at 25 ° C. is measured. The DC bias change rate (ΔC _DC ) based on the capacitance was calculated based on the equation: ΔC _DC = ((C _DC −C) / C).

In addition, the electrostatic capacity was measured while changing the temperature within the range of −55 ° C. to 125 ° C., and the absolute value of the change was maximized based on the electrostatic capacity (C ₂₅ ) at 25 ° C. Regarding the electric capacity (C _TC ), the temperature change rate (ΔC _TC ) at that time was calculated based on the formula of ΔC _TC = ((C _TC −C ₂₅ ) / C ₂₅ ).

  Further, the insulation resistance (IR) was measured by applying a DC voltage of 5 V for 60 s at 25 ° C. using an insulation resistance meter, and the resistivity (ρ) was calculated based on the obtained IR and the structure of the multilayer ceramic capacitor. .

In addition, as a high temperature load reliability test, a DC voltage of 10 V was applied at a temperature of 150 ° C., and the change over time in the insulation resistance (R _Life ) was measured, and the insulation resistance value of each sample became 10 ⁵ Ω or less. Time points were taken as failures, and their mean failure time (MTTF) was determined.

  The evaluation results of the above electrical characteristics are shown in Tables 3 and 4.

The preferable ranges for the electrical characteristics shown in Tables 3 and 4 are 3000 or more for ε _r , 5% or less for tan δ, and the absolute value for ΔC _DC is 20% or less. And ΔC _TC has an absolute value of 15% or less, ρ is 11 or more when expressed in log (ρ / Ω · m), and MTTF is 100 h or more. .

  Hereinafter, the reason why the present invention is limited to the above composition range will be described.

  In Tables 1 to 4, the sample numbers marked with * are samples that are out of the composition range according to the present invention.

First, when x <0.030, as shown in Sample 1, ε _r is less than 3000, log (ρ / Ω · m) is less than 11, and MTTF is less than 100 _h . On the other hand, when x> 0.20, as shown in Sample 2, ε _r is less than 3000, log (ρ / Ω · m) is less than 11, and MTTF is less than 100 h.

Next, when m <0.990, as shown in Sample 3, log (ρ / Ω · m) is less than 11, and MTTF is significantly shortened. On the other hand, when m> 1.030, as shown in Sample 4, ε _r is less than 3000, the absolute value of ΔC _TC exceeds 15%, and log (ρ / Ω · m) is less than 11, MTTF is significantly shortened.

Next, when a <0.010, as shown in Sample 5, log (ρ / Ω · m) is less than 11 and MTTF is less than 100 h. On the other hand, when a> 5.0, as shown in Sample 6, the absolute value of ΔC _DC exceeds 20%, the absolute value of ΔC _TC exceeds 15%, and log (ρ / Ω · m) is Less than 11.

Next, when b <0.050, as shown in Sample 7, the absolute value of ΔC _TC exceeds 15% and log (ρ / Ω · m) is less than 11. On the other hand, when b> 2.5, as shown in Sample 8, ε _r is less than 3000, and MTTF is less than 100 _h .

Next, when c <0.20, as shown in Sample 9, ε _r is less than 3000, tan δ exceeds 5%, the absolute value of ΔC _TC exceeds 15%, and log (ρ / Ω · m) is less than 11, and MTTF is less than 100 h. On the other hand, when c> 8.0, as shown in Sample 10, the absolute value of ΔC _TC exceeds 15%.

Next, when d <0.050, as shown in Sample 11, ε _r is less than 3000, the absolute value of ΔC _DC exceeds 20%, and MTTF is less than 100 h. On the other hand, when d> 2.5, the absolute value of ΔC _TC exceeds 15%.

On the other hand, as shown in Tables 3 and 4, according to the dielectric ceramic composition according to Samples 13 to 70 within the scope of the present invention, εr is as large as 3000 or more and tan δ is 5% or less. The absolute value of ΔC _DC is as small as 20% or less, the absolute value of ΔC _TC is as small as 15% or less, and ρ is expressed as log (ρ / Ω · m) 11 and higher, and MTTF can be as long as 100 h or longer.

1 is a cross-sectional view schematically showing a multilayer ceramic capacitor 1 configured using a dielectric ceramic composition according to the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Multilayer ceramic capacitor 2 Laminated body 3 Dielectric ceramic layer 4, 5 Internal electrode 8, 9 External electrode 10, 11 1st plating layer 12, 13 2nd plating layer

Claims (3)

Composition _{formula: 100 (Ba 1-x Ca} x) m TiO 3 + aMnO + bV 2 O 5 + cSiO 2 + dRe 2 O 3 ( where, Re is Y, La, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, And a dielectric ceramic composition represented by: at least one metal element selected from Yb and a, b, c, and d each representing a molar ratio;
0.030 ≦ x ≦ 0.20,
0.990 ≦ m ≦ 1.030,
0.010 ≦ a ≦ 5.0,
0.050 ≦ b ≦ 2.5,
0.20 ≦ c ≦ 8.0,
0.050 ≦ d ≦ 2.5,
A dielectric ceramic composition in the range of   The multilayer ceramic capacitor comprising: a plurality of dielectric ceramic layers; an internal electrode formed between the dielectric ceramic layers; and an external electrode electrically connected to the internal electrode. 2. A multilayer ceramic capacitor comprising the dielectric ceramic composition according to 1.   The multilayer ceramic capacitor according to claim 2, wherein the internal electrode is made of at least one conductive material selected from Ni, Ni alloy, Cu, and Cu alloy.

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