JP2005191604A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic component and a semiconductor device in which thermal stress can be relaxed avoiding wiring from being cut off, and to provide a manufacturing method for them, a circuit board mounting them, and an electronic apparatus having the circuit board. <P>SOLUTION: The semiconductor device comprises a semiconductor chip 12, a solder ball 20 for external connection, wiring 18 for connecting the semiconductor chip 12 and the solder ball 20 electrically, a stress relax layer 16 formed on the semiconductor chip 12, and a part 22 for transmitting stress from the solder ball 20 to the stress relax layer 16 at the outer circumferential position of the electrical joint 24a of the solder ball 20 and the wiring 18. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a small electronic component, a semiconductor device whose final package size is close to a chip (semiconductor element) size, a manufacturing method thereof, a circuit board on which these are mounted, and an electronic apparatus having the circuit board.

  In pursuit of high-density mounting of semiconductor devices, bare chip mounting is ideal. However, bare chips are difficult to guarantee quality and handle. Therefore, a CSP (chip scale / size package) having a package close to the chip size has been developed.

In such a CSP type semiconductor device, it is an important subject to alleviate thermal stress due to a difference in thermal expansion coefficient between the semiconductor chip and the mounting substrate. In particular, as the number of pins increases, it is necessary to connect wiring from the electrode to the solder ball, so that it is required that the wiring is not cut by thermal stress.
JP-A-8-330355 JP-A-8-330313

  An object of the present invention is to solve the above-described problems, and an object of the present invention is to provide an electronic component and a semiconductor device that can relieve thermal stress so as not to cut the wiring, a manufacturing method thereof, a circuit board on which these are mounted, An object of the present invention is to provide an electronic device having this circuit board.

  The semiconductor device according to the present invention includes a semiconductor element, an external electrode provided for connection to the outside in the region of the semiconductor element, and the semiconductor element and the semiconductor element connected to the external electrode via a connection portion. Wiring that electrically connects the external electrode, a stress relaxation portion provided on the semiconductor element, and a stress transmission portion that transmits stress from the external electrode to the stress relaxation portion.

  According to the present invention, since the semiconductor element and the external electrode are connected by the wiring, the pitch of the external electrode can be converted as necessary. Further, the stress transmission part can relieve the stress by transmitting the stress from the external electrode to the stress relaxation part.

  Note that the wiring is connected to the external electrode through the connection portion. Here, the connection portion includes not only a case where the connection portion exists as a separate member between the wiring and the external electrode, but also a case where the connection portion is a part of at least one of the wiring and the external electrode. Further, the connection portion includes not only one that directly contacts at least one of the wiring and the external electrode, but also one that does not directly contact any of them. That is, the connection portion in the present invention refers to at least a part of a member that electrically connects the wiring and the external electrode.

  Specifically, the wiring may be provided on the stress relaxation portion, and the stress transmission portion may be provided on the connection portion.

  According to this, since the wiring is provided on the stress relaxation part, the connection part and the stress transmission part are provided on the stress relaxation part, and the stress from the external electrode is transmitted to the stress relaxation part.

  Alternatively, the wiring is provided below the stress relaxation part, the connection part is provided through the stress relaxation part, and the stress transmission part is integrated with the connection part on the stress relaxation part. It may be formed automatically.

  According to this, since the connection portion penetrates the stress relaxation portion, the connection portion does not transmit stress in the vertical direction with respect to the stress relaxation portion. Instead, the stress transmission part provided on the stress relaxation part transmits stress to the stress relaxation part.

  The stress relaxation part may be formed with a thickness from the wiring to the stress transmission part.

  A groove may be formed in the stress relaxation part outside the stress transmission part. By forming the groove, the stress relaxation part is easily deformed, and the stress from the stress transmission part is easily absorbed.

  In the stress relaxation part, a space may be formed between a part in contact with the wiring and a part in contact with the stress transmission part. By doing so, the stress relaxation part is easily deformed, and the stress from the stress transmission part is easily absorbed.

  The stress relaxation portion having such a space may be formed by being etched from the outside to the lower side of the stress transmission portion after being formed with a thickness from the wiring to the stress transmission portion.

  The present invention may include an auxiliary transmission unit that is interposed between at least a base outer periphery of the external electrode and the stress relaxation unit, and transmits stress from the external electrode to the stress relaxation unit.

  Since the auxiliary transmission part transmits the stress from the external electrode to the stress relaxation part, it is possible to prevent the stress from being concentrated between the external electrode and the stress transmission part.

  The auxiliary transmission part may be formed of a material that can be used as the stress relaxation part.

The stress relaxation portion includes a first stress relaxation layer and a second stress relaxation layer formed on the first stress relaxation layer,
The wiring is provided between the first and second stress relaxation layers,
The connection portion is provided through the second stress relaxation layer;
The stress transmission portion may be integrally formed with the connection portion on the second stress relaxation layer.

  According to this, a connection part transmits the stress of an up-down direction with respect to a 1st stress relaxation layer. The stress transmission unit transmits stress to the second stress relaxation layer. Thus, the stress is relieved at two places.

The stress relaxation portion includes a first stress relaxation layer and a second stress relaxation layer formed on the first stress relaxation layer,
The wiring is provided between the first and second stress relaxation layers,
The connection portion is provided through the second stress relaxation layer;
The stress transmission portion includes a first transmission portion formed integrally with the connection portion between the first and second stress relaxation layers, and the connection portion on the second stress relaxation layer. And a second transmission portion that is integrally formed.

  According to this, a connection part transmits the stress of an up-down direction with respect to a 1st stress relaxation layer. In addition, stress is transmitted to the first stress relaxation layer also from the first transmission part of the stress transmission part. Furthermore, the stress transmission part has a second stress transmission part, and the second stress transmission part transmits stress to the second stress relaxation layer. Thus, stress is relieved at three locations.

  Here, it is preferable that the second transmission unit transmits the stress to the second stress relaxation layer with an area larger than that of the first transmission unit.

  According to this, since the second transmission unit transmits a large amount of stress, the stress transmitted by the first transmission unit is relatively small. Here, since the first transmission part is close to the direct contact part between the connection part and the wiring, the influence transmitted to the contact part is reduced by reducing the stress transmitted from the first transmission part. Can do.

  It is preferable that the stress transmission part is provided in a non-contact state with respect to the connection part.

  By doing so, the stress transmission portion does not transmit stress to the direct contact portion between the connection portion and the wiring.

  The stress relaxation portion may include a separation portion that prevents transmission of stress between a support region that supports the stress transmission portion and a connection region where the connection portion is formed.

  According to this, the stress transmitted from the stress transmission part to the support area of the stress relaxation part is not transmitted to the connection area because the separation part is provided. Therefore, stress is not transmitted from the stress transmission part to the connection part via the stress relaxation part.

  Here, an example of the separation part is a groove.

  It is preferable that the wiring has a bent portion that forms a hollow space with the semiconductor element.

  According to this, since the wiring can be freely deformed in the bent portion, the stress can be absorbed most.

  Moreover, you may inject | pour gel material into the said hollow space, and may protect a bending part.

The stress relaxation portion includes a first stress relaxation layer and a second stress relaxation layer formed on the first stress relaxation layer,
The wiring includes a first wiring portion formed below the first stress relaxation layer, and a second wiring portion formed between the first and second stress relaxation layers. ,
The connection portion includes a first wiring connection portion that connects the first and second wiring portions through the first stress relaxation layer, and the external electrode that extends through the second stress relaxation layer. And a second wiring connection part for connecting the second wiring part with the second wiring part,
The first and second wiring connecting portions are provided at positions shifted in a plane,
The stress transmission portion is formed on the first transmission portion formed integrally with the first wiring connection portion between the first and second stress relaxation layers, and on the second stress relaxation layer. A second transmission portion formed integrally with the second wiring connection portion.

  According to the present invention, since the first and second transmission portions are provided in the first and second wiring connection portions, respectively, stress is transmitted to the stress relaxation layer in each wiring connection portion. Can do. Further, a position where the contact position of the first wiring connection portion with respect to the first and second wiring portions and the contact position of the second wiring connection portion with respect to the external electrode and the second wiring portion are shifted in a plane. It has become. Therefore, it is difficult for the stress applied to one contact position to be directly transmitted to the other contact position. Since the stress transmitted from the external electrode is relaxed before reaching the semiconductor element, the influence on the semiconductor element can be reduced.

  The wiring may be drawn from the external electrode in a direction substantially perpendicular to the direction in which the stress is generated.

  By doing so, the direction in which the stress is generated intersects the direction in which the wiring is disposed at a substantially right angle. And it can prevent that a wiring is pulled by the arrangement | positioning direction and is cut | disconnected.

  The stress transmission part may be formed at an outer peripheral position of the connection part.

  By doing so, the stress transmission part transmits the stress at the outer peripheral position of the connection part between the external electrode and the wiring, so that the stress can be transmitted in a large area.

  The electronic component according to the present invention includes an electronic element, an external electrode for connection to the outside, a wiring for electrically connecting the electronic element and the external electrode, and stress relaxation provided on the electronic element. And a stress transmission part that transmits stress from the external electrode to the stress relaxation part at an outer peripheral position of an electrical connection part between the external electrode and the wiring.

An electronic component manufacturing method according to the present invention includes a step of integrally forming a plurality of electronic elements in a substrate shape,
Forming an electrode on the substrate-like electronic element;
Providing a stress relaxation part in the substrate-like electronic element avoiding the electrode;
Forming a wiring from the electrode;
Forming a stress transmission part for transmitting stress from the external electrode to the stress relaxation part at an outer peripheral position of an electrical connection part between the wiring and the external electrode;
Cutting the substrate-like electronic element into individual pieces;
Have

A method of manufacturing a semiconductor device according to the present invention includes a step of forming an electrode on a wafer,
Avoiding the electrode and providing a stress relaxation portion on the wafer;
Forming a wiring from the electrode;
Forming a stress transmission part for transmitting stress from the external electrode to the stress relaxation part at an outer peripheral position of an electrical connection part between the wiring and the external electrode;
Cutting the wafer into individual pieces;
Have

  According to the present invention, after the stress relaxation layer, wiring, and external electrode are formed on the wafer, the wafer is cut to obtain individual semiconductor devices. Accordingly, the stress relaxation layer, the wiring, and the external electrode can be simultaneously formed for many semiconductor devices, so that the manufacturing process can be simplified.

The stress relaxation portion forming step is performed after the wiring forming step,
Before the wafer cutting step, a step of forming a groove by etching outside the stress transmission portion in the stress relaxation portion may be included.

  By forming the groove, the stress relaxation part is easily deformed, and the stress from the stress transmission part is easily absorbed.

The stress relaxation portion forming step is performed after the wiring forming step,
Before the wafer cutting step, a step may be included in which the stress relaxation portion is etched down to the lower side of the stress transmission portion.

  By doing so, a space is formed in the stress relieving part between the part that contacts on the wiring and the part that contacts under the stress transmission part. And it becomes easy to deform | transform a stress relaxation part and it becomes easy to absorb the stress from a stress transmission part.

  Including a step of forming an auxiliary transmission portion by providing a material that can be used as the stress relaxation portion from above the stress relaxation portion to at least a root outer periphery of the external electrode before the wafer cutting step. Good.

  When the auxiliary transmission portion is formed in this manner, stress from the external electrode is transmitted to the stress relaxation portion by the auxiliary transmission portion, so that concentration of stress between the external electrode and the stress transmission portion can be prevented.

  A circuit board according to the present invention includes the semiconductor device and a substrate on which a desired wiring pattern is formed, and external electrodes of the semiconductor device are connected to the wiring pattern. The electronic device according to the present invention has this circuit board.

  Preferred embodiments of the present invention will be described below with reference to the drawings. Although the present invention can be applied to small electronic components, an example applied to a semiconductor device will be described in particular.

  In addition, each drawing is shown partially enlarged for easy understanding. In particular, in the following description, the description is made assuming that one semiconductor device is finally made into individual pieces, and therefore terms and shapes used are slightly different from actual ones. The portion described as a semiconductor chip is not limited to a piece (that is, a chip) as it is meant, but may refer to a wafer that is not a piece. In other words, the term “semiconductor chip” as used herein means that a predetermined circuit that can be used even if it is separated on a base substrate (for example, made of silicon) may be formed. There is no particular limitation. Further, since only representative portions necessary for the description of the wiring and the like are taken up, the same components and other structures are omitted in other portions in each drawing.

(First embodiment)
FIG. 1 is a cross-sectional view showing the semiconductor device according to the first embodiment. The semiconductor device 10 shown in the figure includes a stress relaxation layer 16 and a wiring 18 formed thereon. Specifically, a stress relaxation layer 16 is formed on the semiconductor chip 12 while avoiding the electrode 14, and a wiring 18 is formed from the electrode 14 to the stress relaxation layer 16.

Here, the stress relaxation layer 16 is made of a photosensitive polyimide resin. When the semiconductor device 10 is mounted on a substrate (not shown), a stress caused by a difference in thermal expansion coefficient between the semiconductor chip 12 and the substrate is applied. It is to ease. Further, the polyimide resin has an insulating property against the wiring 18 and can protect the surface, and also has heat resistance when the solder ball 20 is melted. Among the polyimide resins, those having a low Young's modulus (for example, olefin-based polyimide resin, BCB manufactured by Dow Chemical Co., etc.) are preferably used, and the Young's modulus is particularly preferably about 20 kg / mm ² or less. As the stress relaxation layer 16 becomes thicker, the stress relaxation force becomes larger, but it is preferable to have a thickness of about 1 to 100 μm. However, when a polyimide resin having a Young's modulus of about 10 kg / mm ² is used, a thickness of about 10 μm is sufficient.

  Alternatively, as the stress relaxation layer 16, a material having a low Young's modulus and capable of performing stress relaxation, such as a silicone-modified polyimide resin, an epoxy resin, or a silicone-modified epoxy resin, can be used. When a non-photosensitive resin is used, a predetermined pattern may be formed by a photoetching process in combination with another resist.

  The wiring 18 is made of chrome (Cr). Here, chrome (Cr) was selected because of its good adhesion to the polyimide resin constituting the stress relaxation layer 16. Alternatively, in consideration of crack resistance, aluminum, aluminum silicon, aluminum alloys such as aluminum copper, or copper alloys, or metals having extensibility (extending properties) such as copper (Cu) or gold may be used. Alternatively, if titanium or titanium tungsten having excellent moisture resistance is selected, disconnection due to corrosion can be prevented. Titanium is also preferable from the viewpoint of adhesion with polyimide. When titanium is used for the wiring 18, it may be formed in two or more layers by combining titanium and the other metal. The wiring 18 is formed by a method such as sputtering, plating, or a combination thereof, and a predetermined pattern is formed by photoetching.

  In addition, the material of the stress relaxation layer and the material of the wiring given here as examples can be appropriately selected from those of the first embodiment in any form after the second embodiment.

  A solder ball (external electrode) 20 is provided on the wiring 18. Specifically, a stress transmission portion 22 is provided on the wiring 18, a pedestal 24 is provided on the stress transmission portion 22, and a solder ball 20 is provided on the pedestal 24. The stress transmission part 22 and the pedestal 24 are formed by copper plating, and the solder balls 20 are made of solder in a ball shape of a hemisphere or more. The stress transmission part 22 and the pedestal 24 are preferably formed of the same metal as the material used for the wiring 18.

  As shown in FIG. 1, the characteristic feature of this embodiment is that the relationship between the width d of the base end portion 24a of the pedestal 24 and the stress transmission portion 22 and the width D of the stress transmission portion 22 is d <D. It is that.

  In other words, the base end portion 24a of the pedestal 24 is a part (connecting portion) of a member that electrically connects the solder ball (external electrode) 20 and the wiring 18, and the stress transmission portion reaches its outer peripheral position. 22 is integrally expanded. By forming such a stress transmission part 22, the solder ball 20 is supported on the stress relaxation layer 16 with a relatively wide width D.

  Such a wide stress transmission portion 22 is effective in transmitting stress. That is, due to the difference in thermal expansion coefficient between the mounting substrate and the semiconductor chip 12, for example, when heat is applied to the substrate and the semiconductor device mounted on the substrate, a stress that bends the semiconductor chip 12 occurs. This stress is a force that causes the center of the solder ball 20 to be tilted. According to the present embodiment, the solder balls 20 are supported with respect to the stress relaxation layer 16 by the stress transmission portion 22 having a relatively wide width D. Therefore, the stress for defeating the solder ball 20 is transmitted to the stress relaxation layer 16 over a wide area, and the stress relaxation layer 16 can absorb a large stress.

  Further, the action of stress transmission is the same as that shown in the first embodiment after the second embodiment.

  Although not shown in the figure, it is preferable to provide a wiring protective layer such as a solder resist as the outermost layer in order to prevent corrosion of the wiring.

(Second Embodiment)
FIG. 2 is a cross-sectional view showing a semiconductor device according to the second embodiment. The semiconductor device 30 shown in the figure has a wiring 38 formed under the stress relaxation layer 36. Specifically, a wiring 38 is formed from the electrode 34 on the semiconductor chip 32 via an oxide film (not shown) as an insulating layer, and a stress relaxation layer 36 is formed thereon. The wiring 38 is made of chrome (Cr).

  A hole 36a is formed in the stress relaxation layer 36 by photolithography, and the stress relaxation layer 36 does not cover the wiring 38 in the region of the hole 36a. In other words, the hole 36a is formed so that the wiring 38 is located immediately below the hole 36a. A chromium (Cr) layer 42 and a copper (Cu) layer 44 are formed by sputtering over the wiring 38 and the inner peripheral surface and the opening end where the hole 36a is formed. That is, the chrome (Cr) layer 42 and the copper (Cu) layer 44 are formed so as to penetrate the stress relaxation layer 36. In addition, the chrome (Cr) layer 42 and the copper (Cu) layer 44 are expanded with a relatively wide width at the opening end.

  A pedestal 46 made of copper (Cu) is formed on the copper (Cu) layer 44, and solder balls 40 are formed on the pedestal 46. The solder ball 40 is electrically connected to the electrode 34 via the ground wiring 38, the copper layer 44, the chrome layer 42, and the pedestal 46.

  According to the present embodiment, at the opening end portion of the hole 36 a, the stress transmission portion 48 formed from at least a part of the chrome (Cr) layer 42, the copper (Cu) layer 44, and the pedestal 46 is transferred to the stress relaxation layer 36. The stress from the solder ball 40 is transmitted.

  This stress transmission part 48 is located in the outer periphery rather than the connection part 38a. Here, the connecting portion 38 a is a part of the chrome (Cr) layer 42 and is a part of a member that electrically connects the solder ball (external electrode) 40 and the wiring 38.

  In this example, the stress transmission part 48 is provided including the collar part 48a, that is, the protruding part. Therefore, the stress transmitting portion 48 can transmit the stress acting so as to tilt around the center of the solder ball 40 to the stress relaxation layer 36 over a wide area. The larger the area of the stress transmission part 48, the more effective.

  Further, according to the present embodiment, the stress transmission part 48 is arranged at a position different from the connection part 38a to the wiring 38, and the connection part 38a and the wiring 38 are arranged on a hard oxide film. Therefore, the generated stress is absorbed by the stress relaxation layer 36. Therefore, it is difficult for stress to be transmitted to the connection portion 38a, and stress is not easily transmitted to the wiring 38, so that cracks can be prevented.

(Third embodiment)
FIG. 3 is a cross-sectional view showing a semiconductor device according to the third embodiment. The semiconductor device 31 shown in the figure has an auxiliary transmission layer 33 formed on the stress relaxation layer 36 of the semiconductor device 30 shown in FIG. Also in this embodiment, the connection portion 38 a is a part of the chrome (Cr) layer 42 and is a part of a member that electrically connects the solder ball (external electrode) 40 and the wiring 38.

  The auxiliary transmission layer 33 is formed in contact with at least the root outer periphery of the solder ball 40. Therefore, stress is transmitted from the solder ball 40 to the stress relaxation layer 36 via the auxiliary transmission layer 33. By doing so, it is possible to avoid stress from being concentrated and concentrated between the solder ball 40 and the stress transmission portion 48, particularly at the joint portion between the base 46 and the copper (Cu) layer 44. Here, the stress transmission part 48 is formed from at least a part of the chrome (Cr) layer 42, the copper (Cu) layer 44, and the pedestal 46.

  The auxiliary transmission layer 33 is made of a resin that can be used as the stress relaxation layer 36. The thickness of the auxiliary transmission layer 33 is determined according to the flexibility (Young's modulus) of the resin itself and the magnitude of stress that requires transmission. . That is, when a soft resin is used, large stress transmission is possible if the auxiliary transmission layer 33 is formed thick. Further, when a relatively hard resin is used, if the auxiliary transmission layer 33 is formed thin, it is possible to avoid the transmitted stress from becoming too large.

  The auxiliary transmission layer 33 can be formed by spin coating after the solder balls 40 are formed.

  Alternatively, after the formation of the stress transmission part 48 (including the base 46) and before the formation of the solder balls 40, a resin layer is formed on the stress relaxation layer 36, and an opening is formed in the resin layer on the stress transmission part 48. A solder ball 40 may be provided. In this case, the opening can be formed by applying a photolithography technique or an etching (dry or wet) technique.

  These methods are suitable when the auxiliary transmission layer 33 is formed before the semiconductor device 31 is cut into individual pieces.

(Fourth embodiment)
4A and 4B are sectional views showing a semiconductor device according to the fourth embodiment. 4A is a cross-sectional view taken along line IV-IV in FIG. 4B. The semiconductor device 37 shown in these drawings has a groove 35 formed in the stress relaxation layer 36 of the semiconductor device 30 shown in FIG. However, FIG. 2 and FIG. 4A differ in cross-sectional position. Also in the present embodiment, the connection portion 38a is a part of a member that electrically connects the solder ball (external electrode) 40 and the wiring 38 (see FIG. 2).

  As shown in FIGS. 4A and 4B, the groove 35 is formed in a portion of the stress relaxation layer 36 located outside the stress transmission portion 48.

  In this way, when stress is transmitted from the stress transmission part 48 to the stress relaxation layer 36, the stress relaxation layer 36 is more easily deformed on the stress transmission part 48 side than the groove 35. This makes it easier for the stress relaxation layer 36 to absorb the stress. In particular, by forming the groove 35 when the material constituting the stress absorbing layer 36 has low flexibility (high Young's modulus), the same stress as when using a material with high flexibility (low Young's modulus) is used. Relaxation power can be obtained. If the above-described processing is further performed using a highly flexible material, stress relaxation can be further achieved. The same applies to the fifth and sixth embodiments described later.

  Further, the groove 35 is formed on the side of the direction in which stress is applied from the stress transmission portion 48 to the stress relaxation layer 36 (the direction indicated by the arrow in FIG. 4B). Therefore, the stress relaxation force is increased in the direction in which the stress is applied.

  The formation position of the groove 35 is not limited to the position shown in FIGS. 4A and 4B. For example, the groove 35 may be formed on a side in a direction different from the direction in which the stress is applied from the stress transmission portion 48 to the stress relaxation layer 36 (the direction indicated by the arrow in FIG. 4B), or surrounds the stress transmission portion 48. You may form as follows.

(Fifth embodiment)
FIG. 5 is a cross-sectional view showing a semiconductor device according to the fifth embodiment. A semiconductor device 39 shown in the figure is obtained by etching the stress relaxation layer 36 of the semiconductor device 30 shown in FIG.

  That is, the stress relaxation layer 41 of the semiconductor device 39 is formed thinner than the stress relaxation layer 36 shown in FIG. In addition, a space 43 is formed between a portion that contacts under the collar portion 48 a of the stress transmission portion 48 and a portion that contacts on the wiring 38. That is, the stress relaxation layer 41 is formed so as to be constricted under the collar portion 48 a of the stress transmission portion 48. The constricted shape may be a round shape or a tapered shape.

  Also in this embodiment, the connection portion 38 a is a part of a member that electrically connects the solder ball (external electrode) 40 and the wiring 38.

  Thus, by forming the space 43 under the collar portion 48a of the stress transmission portion 48, the stress relaxation layer 41 is easily deformed. This makes it easier for the stress relaxation layer 41 to absorb stress.

  The space 43 can be formed by subjecting the stress relaxation layer 36 shown in FIG. 2 to isotropic dry etching. That is, according to isotropic dry etching, the etching rates in the horizontal direction and the depth direction are almost equal, and therefore, as shown in FIG. 5, the etching is performed in a constricted shape under the collar portion 48a of the stress transmission portion 48. can do. Thereby, the space 43 can be formed.

(Sixth embodiment)
FIG. 6 is a cross-sectional view showing a semiconductor device according to the sixth embodiment. The semiconductor device 45 shown in the figure is obtained by adding an auxiliary transmission unit 47 to the semiconductor device 39 shown in FIG.

  That is, in FIG. 6, the auxiliary transmission portion 47 is formed on the outer periphery of the solder ball 40 continuously from the stress relaxation layer 41. The auxiliary transmission part 47 is interposed between at least the root outer periphery of the solder ball 40 and the stress relaxation layer 41. By doing so, the stress applied to the solder ball 40 can be transmitted to the stress relaxation layer 41 via the auxiliary transmission portion 47. Then, it is possible to avoid the stress being dispersed and the stress being concentrated on the joint portion between the solder ball 40 and the stress transmission portion 48.

  In addition, as shown in FIG. 3, in the semiconductor device 45 having such an auxiliary transmission portion 47, after the stress relaxation layer 36 and the auxiliary transmission layer 33 are formed, etching is performed in the same manner as in the fifth embodiment. Can be manufactured.

  Also in this embodiment, the connection portion 38 a is a part of a member that electrically connects the solder ball (external electrode) 40 and the wiring 38.

(Seventh embodiment)
FIG. 7 is a cross-sectional view showing a semiconductor device according to the seventh embodiment. The seventh embodiment has the characteristics of both the first and second embodiments.

  In the figure, the semiconductor device 50 has a wiring 58 formed between first and second stress relaxation layers 56 and 57. Specifically, a first stress relaxation layer 56 is formed on the semiconductor chip 52 avoiding the electrode 54, and a wiring 58 is formed from the electrode 54 to the stress relaxation layer 56. This configuration is the same as in the first embodiment.

  A second stress relaxation layer 57 is formed on the wiring 58. The second stress relaxation layer 57 may also be provided with a thickness in the same range as the first stress relaxation layer 56 described above. A hole 57 a is formed in the stress relaxation layer 57, and a chrome (Cr) layer 62 and a copper (Cu) layer 64 are formed so as to penetrate the stress relaxation layer 57. Alternatively, the wiring 18 described in the first embodiment may be used instead. The chrome (Cr) layer 62 and the copper (Cu) layer 64 are expanded with a relatively wide width at the opening end of the hole 57a. A pedestal 66 is formed on the copper (Cu) layer 64, and solder balls 60 are formed on the pedestal 66.

  Further, at the opening end portion of the hole 57a, the solder ball is transferred from the stress transmission portion 68 formed from a part of the chrome (Cr) layer 62, the copper (Cu) layer 64, and the pedestal 66 to the second stress relaxation layer 57. Stress from 60 is transmitted. This stress transmission part 68 is provided in the outer peripheral position rather than the connection part 58a. Here, the connection portion 58 a is a part of the chrome (Cr) layer 62 and is a part of a member that electrically connects the solder ball (external electrode) 60 and the wiring 58.

  Since the configuration above the wiring 58 is the same as that of the second embodiment, detailed description thereof is omitted.

  According to the present embodiment, the vertical stress from the solder ball 60 is transmitted to and absorbed by the first stress relaxation layer 56 via the connection portion 58a, and the second stress via the stress transmission portion 68. It is transmitted to the relaxation layer 57 and absorbed. Thus, the absorption of stress becomes more effective by providing the two-stage absorption structure. In the present embodiment, the second stress relaxation layer 57 also serves as a protective film for the wiring 58 and the semiconductor chip 52.

  In addition, you may apply the shape which the groove | channel 35 of 4th-6th Embodiment and the stress relaxation layer 41, or the auxiliary | assistant transmission part 47 to the 2nd stress relaxation layer 57 of this embodiment.

(Eighth embodiment)
FIG. 8 is a sectional view showing a semiconductor device according to the eighth embodiment. The semiconductor device 51 shown in the figure has an auxiliary transmission layer 53 formed on the first stress relaxation layer 57 of the semiconductor device 50 shown in FIG. Also in the present embodiment, the connection portion 58 a is a part of a member that electrically connects the solder ball (external electrode) 60 and the wiring 58.

  The auxiliary transmission layer 53 is formed in contact with at least the root outer periphery of the solder ball 60. Therefore, stress is transmitted from the solder ball 60 to the stress relaxation layer 57 via the auxiliary transmission layer 53. By doing so, it is possible to avoid the stress being dispersed and the stress being concentrated at the joint between the solder ball 60 and the stress transmission portion 68.

  In addition, since the material and formation method of the auxiliary | assistant transmission layer 53 are the same as that of 3rd Embodiment, description is abbreviate | omitted.

(Ninth embodiment)
FIG. 9 is a cross-sectional view showing a semiconductor device according to the ninth embodiment. The ninth embodiment is a modification of the seventh embodiment.

  In the figure, a semiconductor device 70 has a wiring 78 formed between first and second stress relaxation layers 76 and 77. Specifically, a first stress relaxation layer 76 is formed on the semiconductor chip 72 avoiding the electrode 74, and a wiring 78 is formed from the electrode 74 to the stress relaxation layer 76.

  A second stress relaxation layer 77 is formed on the wiring 78. A copper (Cu) layer 82 by sputtering, a copper (Cu) layer 84 by plating, a copper (Cu) layer 86 by sputtering, and a pedestal 88 by plating are formed so as to penetrate the stress relaxation layer 77. A solder ball 80 is formed on the pedestal 88.

  Here, the copper (Cu) layer 82 and the copper (Cu) layer 84 have a larger area than the pedestal 88 and the base end portion 88 a of the copper (Cu) layer 86. In the copper (Cu) layer 82 and the copper (Cu) layer 84, the stress transmission portion 89 corresponding to the outer peripheral position of the base end portion 88 a transmits the stress from the solder ball 80 to the first stress relaxation layer 76. It has become. A part of the stress transmission part 89 (contact part with the base end part 88a) is part of a member (connection part) that electrically connects the solder ball (external electrode) 80 and the wiring 78. ).

  According to the present embodiment, since the stress transmission part 89 is formed at the outer peripheral position of the base end part 88 a that electrically connects the solder ball 80 and the wiring 78, the stress is applied to the first stress relaxation layer 76 over a wide area. Can be transmitted. In the present embodiment, even if the first stress relaxation layer 76 is omitted, the stress can be absorbed by the second stress relaxation layer 77.

  Also in the present embodiment, a stress transmission portion 87 similar to the stress transmission portion 68 (see FIG. 7) of the seventh embodiment is further formed, and the same operational effects are achieved.

(10th Embodiment)
FIG. 10 is a sectional view showing a semiconductor device according to the tenth embodiment. The tenth embodiment is a modification of the ninth embodiment. Therefore, only the difference from the ninth embodiment will be described. The copper (Cu) layer 92 and the copper (Cu) layer 93 formed on the wiring 91 are smaller than the stress transmission portion 94. Therefore, although the stress that tries to incline the solder ball 95 is transmitted from the stress transmitting portion 94, it is difficult to transmit from the copper (Cu) layer 92 and the copper (Cu) layer 93. Since the copper (Cu) layer 92 and the copper (Cu) layer 93 do not function as a stress transmission part, the stress is hardly transmitted to the wiring 91. By doing so, disconnection of the wiring 91 can be prevented.

  In the present embodiment, a part of the stress transmission part 94 is a part (connecting part) of a member that electrically connects the solder ball (external electrode) 95 and the wiring 91.

  In addition, even if the 1st stress relaxation layer 76 is abbreviate | omitted in 9th Embodiment, the effect that a stress can be absorbed with the 2nd stress relaxation layer 77 is the same also in 10th Embodiment.

(Eleventh embodiment)
11A and 11B are diagrams illustrating a semiconductor device according to the eleventh embodiment. In addition, FIG. 11B is a plan view seen at the XI-XI position in FIG. 11A.

  In these drawings, the semiconductor device 100 has a solder ball 114 supported by a stress transmission portion 112 in a non-contact position with the electrical connection portion 110.

  Specifically, a wiring 106 is formed on the oxide film 104 formed on the semiconductor chip 102. The wiring 106 electrically connects the pad 106 a located at the center of the solder ball 114 to the electrode 108. Moreover, the wiring 106 extends from the pad 106a in a direction perpendicular to the direction of the stress (indicated by an arrow in FIG. 11B) generated by the difference in thermal expansion coefficient between the mounting substrate and the semiconductor device 100. Therefore, even if stress is applied to the wiring 106, in the vicinity of the pad 106a, no force is applied in the extending direction, so that disconnection is difficult.

  A stress relaxation layer 118 is formed on the wiring 106. However, on the pad 106a, a hole is formed in the stress relaxation layer 118, and the connecting portion 110 is formed so as to electrically connect the pad 106a and the solder ball 114. The connection part 110 is a part of a member that electrically connects the solder ball (external electrode) 114 and the wiring 106.

  In addition, a plurality of stress transmission portions 112 are provided between the oxide film 104 and the solder balls 114 at the outer peripheral position of the connecting portion 110 and at a non-contact position. For this reason, a plurality of holes are formed in the stress relaxation layer 118. The connection part 110 and the stress transmission part 112 are continuously formed as a protrusion protruding downward from the base 116 that receives the solder ball 114.

  This embodiment is configured as described above, and its operation will be described. In the present embodiment, the solder ball 114 is electrically connected to the wiring 106 by the connecting portion 110 at the center position. And the stress transmission part 112 is provided in the outer peripheral position of the connection part 110, and the non-contact position. Therefore, since it is in a non-contact state, it is difficult to transmit the influence of the stress transmitted by the stress transmission unit 112 to the connection unit 110, and thus disconnection can be prevented by not transmitting the stress to the wiring 106.

  The pedestal 116 is partially in contact with the stress relaxation layer 118. In particular, the contact portion 116 a located on the outer periphery of the stress transmission portion 112 transmits stress to the stress relaxation layer 118 and absorbs it.

(Twelfth embodiment)
12A and 12B are views showing a semiconductor device according to the twelfth embodiment. Note that FIG. 12B is a plan view seen at the position XII-XII in FIG. 12A. The twelfth embodiment is a modification of the eleventh embodiment described above. Therefore, differences from the eleventh embodiment will be described.

  12A and 12B, the semiconductor device 120 includes first and second stress relaxation layers 122 and 124. A wiring 126 is formed on the first stress relaxation layer 122, and a stress transmission part 128 is formed on the first stress relaxation layer 124. Therefore, the stress from the solder ball 130 is transmitted from the stress transmission unit 128 to the first stress relaxation layer 122 and absorbed. Note that the connection portion 132 formed on the pad 126a has the same configuration as the connection portion 110 shown in FIG. That is, the connection part 132 is a part of a member that electrically connects the solder ball (external electrode) 130 and the wiring 126.

  Further, according to the present embodiment, the stress is relaxed by the first stress relaxation layer 122 via the stress transmission unit 128. Therefore, the pedestal 134 is omitted from the contact portion with the second stress relaxation layer 124 that is formed in a collar shape at the outer peripheral position of the stress transmission portion 128. But you may provide a contact part similarly to 11th Embodiment.

(13th Embodiment)
FIG. 13 is a diagram illustrating a semiconductor device according to a thirteenth embodiment. The thirteenth embodiment is a modification of the eleventh embodiment or the twelfth embodiment described above. In other words, the semiconductor device 140 illustrated in FIG. 13 includes a cylindrical stress transmission unit 142 instead of the plurality of columnar stress transmission units 112 illustrated in FIGS. 11A and 11B. This stress transmission part 142 is partly cut away in order to introduce the wiring 144 inside, and is not in contact with the wiring 144. Even with such a stress transmission part 142, the same effect as the eleventh embodiment can be achieved.

  Note that the connection part for electrically connecting the solder ball (external electrode) and the wiring is the same as in the twelfth embodiment.

(14th Embodiment)
FIG. 14 is a diagram illustrating a semiconductor device according to a fourteenth embodiment. Also in the semiconductor device 150 shown in the figure, the first stress relaxation layer 154 is formed on the semiconductor chip 152. However, a substantially ring-shaped groove 156 is formed in the stress relaxation layer 154. And the island part 158 divided by the groove | channel 156 is formed. A wiring 159 is formed so as to reach the island portion 158. Specifically, in order to form the wiring 159, the groove 156 has a C shape.

  A second stress relaxation layer 160 is formed on the first stress relaxation layer 154. In the second stress relaxation layer 160, a hole 160a that extends to the outside of the groove 156 is formed.

  Sputtering is performed on the inner peripheral surface and the opening end of the hole 160a, the exposed surface 154a from the hole 160a in the first stress relaxation layer 154, and the wiring 159 formed on the island portion 158. A pedestal 162 is provided via a metal thin film. A solder ball 164 is provided on the pedestal 162.

  According to the present embodiment, the island portion 158 is separated from the region receiving the stress from the solder ball 164 by the groove 156. Therefore, stress is not easily transmitted to the wiring 159, and disconnection can be prevented.

  Note that the connection portion that is a part of a member that electrically connects the solder ball (external electrode) and the wiring is the same as in the twelfth embodiment.

(Fifteenth embodiment)
FIG. 15 is a diagram illustrating a semiconductor device according to the fifteenth embodiment. The semiconductor device 170 shown in the figure is the same as the above embodiment in that bumps 174 are provided on the stress relaxation layer 172 to absorb the stress.

  The feature of the present embodiment is that the wiring 176 has a bent portion 180 that forms a hollow space between the semiconductor chip 178 and the gel material 182 is injected into the hollow space. The gel material 182 may be omitted because it is injected for reinforcement. The wiring 176 is preferably made of gold from the viewpoint of spreadability. When the bent portion 180 is formed in this way, even if stress is applied to the wiring 176, the bent portion 180 absorbs it. Therefore, the stress transmitted from the bump 174 is not transmitted to the electrode 184. Thus, disconnection can be prevented.

  In order to form the bent portion 180, a resist is deposited so as to draw an outline of the bent portion 180, a wiring 176 is formed thereon, and then the resist is removed by dry etching or wet etching. Note that a material other than a resist can be used if etching is possible.

  Although not shown in the figure, it is preferable to provide a wiring protective layer such as a solder resist as the outermost layer in order to prevent corrosion of the wiring.

  The present embodiment can be applied to other embodiments. In this case, a twelfth embodiment is described with respect to a connection portion that is a part of a member that electrically connects a solder ball (external electrode) and a wiring. It is the same.

(Sixteenth embodiment)
FIG. 16 is a diagram illustrating a semiconductor device according to the sixteenth embodiment. The semiconductor device 190 shown in the figure includes a first wiring 194 formed on the semiconductor chip 192, a first stress relaxation layer 196 formed on the wiring 194, and the stress relaxation layer 196. And a second wiring 198 to be formed.

  Specifically, a hole is formed in the first stress relaxation layer 196 on the first wiring 194, and a second wiring 198 is formed from the first wiring 194 to the first stress relaxation layer 196. Has been.

  A copper (Cu) layer 200 by plating is provided on the second wiring 198, and a second stress relaxation layer 202 is formed on the copper (Cu) layer 200. Further, a hole 202 a is formed in the second stress relaxation layer 202 on the copper (Cu) layer 200. A bump 204 is provided on the copper (Cu) layer 200. A part of the bump 204 is in contact with the second stress relaxation layer 202 so that stress can be transmitted.

  According to the present embodiment, the connection portion 206 of the first and second wirings 194 and 198 and the connection portion 208 of the second wiring 198 and the bump 204 are arranged at positions shifted in a plane. . Here, the connection portion 206 indicates a portion where the first and second wirings 194 and 198 are in contact with each other, and the connection portion 208 indicates a portion where the second wiring 198 and the bump 204 are in contact with each other. The connection portions 206 and 208 form part of a member that electrically connects the wiring 194 and the bump (external electrode) 204.

  Therefore, even if stress is transmitted from the bump 204 to the second wiring 198 via the connection portion 208, this stress is not easily transmitted to the other connection portion 206. In this way, stress is hardly transmitted to the first wiring 194, so that the disconnection of the wiring 194 is prevented.

(Manufacturing process)
17A to 18C are views showing a method for manufacturing the semiconductor device according to the present embodiment.

  First, an electrode 302 and other elements are generally formed on the wafer 300 by a known technique until the state before dicing is performed (see FIG. 17A). In this embodiment, the electrode 302 is formed of aluminum, but an aluminum alloy-based material (for example, aluminum silicon or aluminum silicon copper) or a copper-based material may be used.

  Further, a passivation film (not shown) made of an oxide film or the like is formed on the surface of the wafer 300 in order to prevent chemical changes. The passivation film is formed not only avoiding the electrode 302 but also avoiding a scribe line where dicing is performed. By not forming the passivation film on the scribe line, it is possible to avoid generation of dust generated by the passivation film during dicing, and to prevent generation of cracks in the passivation film.

  Subsequently, sputtering is performed using the wafer 300 as a target, and foreign matter on the surface of the wafer 300 is blown (that is, reverse sputtering).

  Next, as shown in FIG. 17A, a titanium tungsten (TiW) layer 304 and a copper (Cu) layer 306 are formed over the entire surface of the wafer 300 by sputtering. In addition, although this manufacturing process demonstrates by the example which uses titanium tungsten (TiW) and copper (Cu) as wiring, this invention is not limited to this.

When the wiring resistance is lowered, the copper plating layer 308 is formed on the copper layer 306 by electroplating. The thickness of each layer is, for example,
Titanium tungsten layer: 1000 mm (10 ⁻¹⁰ m)
Copper layer: 1000cm ( ^10-10m )
Copper plating layer: 0.5-5 μm
It is good also as a grade.

  Next, as illustrated in FIG. 17B, the titanium tungsten layer 304, the copper layer 306, and the copper plating layer 308 are dry-etched using a photolithography technique to form a wiring 310.

  Specifically, a photoresist (not shown) is applied on the copper plating layer 308, pre-baked, exposed and developed, washed, dried and post-baked. Then, the copper plating layer 308 and the copper layer 306 are dry-etched and washed, and the titanium tungsten layer 304 is dry-etched. Subsequently, the photoresist is removed and washed. In this way, the wiring 310 is formed as shown in FIG. 17B.

Next, O _{2 is applied to} the wiring 310. After performing ashing by plasma and dehydrating the wafer 300, a polyimide resin 312 is applied to the entire surface of the wafer 300 as shown in FIG. 17C. The polyimide resin 312 becomes a stress relaxation layer similarly to the stress relaxation layer 36 and the like shown in FIG. Here, the adhesion between the wiring 310 and the wafer 300 and the polyimide resin 312 is improved by performing ashing.

  It is preferable to use a polyimide resin 312 that has high adhesion to the passivation film of the wafer 300, a low Young's modulus, a low water absorption, and a large film thickness.

  Then, pre-baking, exposure, drying, development, washing, drying, and curing steps are performed on the polyimide resin 312. Thus, holes 314 are formed in the polyimide resin 312 as shown in FIG. 17D. Since the polyimide resin 312 is contracted by the drying and curing steps while being in close contact with the wiring 310 and the wafer 300, the hole 314 has a taper of about 60 to 70 ° on the inner surface. Therefore, it is preferable to select a polyimide resin 312 whose inner surface of the hole 314 is tapered.

Subsequently, O _{2 with} respect to the surface of the polyimide resin 312. Ashing by plasma is performed, and sputtering is performed using this polyimide resin 312 as a target to remove foreign matter. The adhesion of the surface of the polyimide resin 312 to the metal film is improved by ashing.

Then, as shown in FIG. 17E, a titanium tungsten (TiW) layer 316 and a copper (Cu) layer 318 are overlaid on the entire surface of the polyimide resin 312 by sputtering. Then, a copper plating layer 320 is formed on the copper layer 318 by electroplating. Note that a titanium (Ti) layer may be formed instead of the titanium tungsten layer 316. The thickness of each layer is, for example,
Titanium tungsten layer: 1000 mm (10 ⁻¹⁰ m)
Copper layer: 1000cm ( ^10-10m )
Copper plating layer: 0.5 to 100 μm
It is good also as a grade.

  Next, a photoresist is applied on the copper plating layer 320, and after pre-baking, exposure, development, washing, drying, and post-baking, the copper plating layer 320 and the copper layer 318 are etched. Then, after cleaning, the titanium tungsten layer 316 is etched, and the photoresist is removed and cleaned.

In this way, as shown in FIG. 18A, the stress transmission part 322 is formed on the wiring 310. Then, with respect to the stress transmission part 322, O ₂ Perform ashing with plasma.

  Then, as shown in FIG. 18B, a solder paste 324 is provided on the stress transmission part 322. The solder paste 324 can be provided by screen printing, for example. Further, if the particle size of the solder paste 324 is about 25 to 15 μm, it can be easily removed from the printing mask. Alternatively, the solder paste 324 may be provided by a solder plating method.

  Subsequently, through a reflow process, the solder paste 324 is melted to form a solder ball 326 by surface tension as shown in FIG. 18C. Then, flux cleaning is performed.

  According to the semiconductor device manufacturing method described above, almost all the steps are completed in the wafer process. In other words, the process of forming the external terminals connected to the mounting substrate can be performed within the wafer process, and the conventional packaging process, that is, the individual semiconductor chips are handled and the inner lead bonding is performed on each individual semiconductor chip. It is not necessary to perform a process, an external terminal formation process, or the like. Further, when the stress relaxation layer is formed, a substrate such as a patterned film becomes unnecessary. For these reasons, a low-cost and high-quality semiconductor device can be obtained.

(Other embodiments)
The present invention can be applied to a CSP type semiconductor device. FIG. 19 shows a typical CSP type semiconductor device. In the figure, a wiring 3 is formed from the electrode 2 of the semiconductor chip 1 toward the center of the active surface 1 a, and an external electrode 5 is provided on each wiring 3. Since all the external electrodes 5 are provided on the stress relaxation layer 7, it is possible to alleviate stress when mounted on a circuit board (not shown). Further, a solder resist layer 8 is formed as a protective film in a region excluding the external electrode 5.

  The stress relaxation layer 7 is formed at least in a region surrounded by the electrode 2. The electrode 2 refers to a portion connected to the wiring 3. In consideration of securing a region for forming the external electrode 5, although not shown in FIG. 19, the stress relaxation layer 7 exists at a position on the outer periphery of the electrode 2, and the wiring 3 is routed thereon. Similarly, the external electrode 5 may be provided.

  The electrode 2 is an example of a so-called peripheral electrode type that is located in the peripheral portion of the semiconductor chip 1. However, an area array arrangement type semiconductor chip in which an electrode is formed in an inner region than the peripheral region of the semiconductor chip may be used. good. In this case, the stress relaxation layer 7 may be formed so as to avoid at least a part of the electrode 2.

  As shown in the figure, the external electrode 5 is provided not on the electrode 2 of the semiconductor chip 1 but in an active region of the semiconductor chip 1 (region where active elements are formed). The external electrode 5 can be provided in the active region by providing the stress relaxation layer 7 in the active region and further disposing (withdrawing) the wiring 3 in the active region. That is, pitch conversion can be performed. Therefore, when the external electrode 5 is disposed, an active region, that is, a region as a fixed surface can be provided, and the degree of freedom of the setting position of the external electrode 5 is greatly increased.

  Then, by bending the wiring 3 at a necessary position, the external electrodes 5 are provided so as to be arranged in a lattice pattern. Since this is not an essential configuration of the present invention, the external electrodes 5 do not necessarily have to be arranged in a grid pattern.

In FIG. 19, the width of the electrode 2 and the width of the wiring 3 at the junction between the electrode 2 and the wiring 3 are
Wiring 3 <electrode 2
But
Electrode 2 ≦ Wiring 3
It is preferable that In particular,
Electrode 2 <Wiring 3
In this case, not only the resistance value of the wiring 3 is decreased, but also the strength is increased, so that disconnection is prevented.

  In all of the above-described embodiments, when external stress applied to the solder ball portion is concentrated on the wiring, the wiring is designed by bending (or bending) the wiring in the plane direction, and in addition to or separately from this. By incorporating a bent (curved) structure in each of the embodiments as in the fifteenth embodiment, the stress concentration on the wiring can be dispersed.

  Such a semiconductor device can be manufactured by performing almost all processes by a wafer process. Specifically, a plurality of electrodes 2 are formed on the wafer, and a process of forming the stress relaxation layer 7 on the wafer while avoiding these electrodes 2 and forming the wiring 3 from the electrodes 2, and thereafter the wafer is separated into individual pieces. A semiconductor device is obtained by cutting into pieces.

  Here, for forming the electrode 2 and the wiring 3, for example, a metal thin film forming technique such as sputtering or etching can be applied. A solder plating process can be applied to the formation of the external electrode 5. Furthermore, photolithography for exposing and developing a photosensitive resin can be applied to the process of forming the stress relaxation layer 7. All of these steps can be performed by a wafer process.

  As described above, if almost all processes are performed in the wafer process and then cut into individual semiconductor devices, the stress relaxation layers 7, the wirings 3, and the external electrodes 5 of many semiconductor devices can be simultaneously formed. It can be simplified.

  FIG. 20 shows a circuit board 1000 on which the semiconductor device 1100 manufactured by the method according to the above-described embodiment is mounted. In general, an organic substrate such as a glass epoxy substrate is used as the circuit substrate. On the circuit board, wiring patterns made of, for example, copper are formed so as to form a desired circuit, and the wiring patterns and external electrodes of the semiconductor device are mechanically connected to achieve electrical connection therebetween. In this case, the above-described semiconductor device is provided with a structure that absorbs strain caused by a difference in thermal expansion from the outside as a stress relaxation portion. Therefore, even when the semiconductor device is mounted on a circuit board, it is connected and after that. Reliability can be improved. Furthermore, since the device is devised for the wiring of the semiconductor device, the reliability at the time of connection and after the connection can be improved. Note that the mounting area can be reduced to the area mounted by the bare chip. For this reason, if this circuit board is used for an electronic device, the electronic device itself can be miniaturized. Further, it is possible to secure a mounting space within the same area, and it is possible to achieve high functionality.

  As an electronic apparatus including the circuit board 1000, a notebook personal computer 1200 is shown in FIG.

  In addition, although the said embodiment is an example which applied this invention to the semiconductor device, this invention can be applied to various electronic components for surface mounting irrespective of an active component or a passive component. Examples of the electronic component include a resistor, a capacitor, a coil, an oscillator, a filter, a temperature sensor, a thermistor, a varistor, a volume, or a fuse. Then, by using a predetermined electronic element instead of the semiconductor element of the above-described embodiment and forming a stress transmission part similar to that of the above-described embodiment, stress is relieved at the stress relaxation part, and disconnection of the wiring or the like is performed. Can be prevented. Moreover, since the manufacturing method is the same as that of the above embodiment, the description thereof is omitted.

FIG. 1 is a diagram illustrating the semiconductor device according to the first embodiment. FIG. 2 is a diagram illustrating a semiconductor device according to the second embodiment. FIG. 3 is a diagram illustrating a semiconductor device according to the third embodiment. 4A and 4B are diagrams illustrating a semiconductor device according to the fourth embodiment. FIG. 5 is a diagram illustrating a semiconductor device according to the fifth embodiment. FIG. 6 is a diagram illustrating a semiconductor device according to the sixth embodiment. FIG. 7 is a view showing a semiconductor device according to the seventh embodiment. FIG. 8 is a diagram illustrating a semiconductor device according to the eighth embodiment. FIG. 9 is a diagram illustrating a semiconductor device according to the ninth embodiment. FIG. 10 is a diagram illustrating a semiconductor device according to the tenth embodiment. 11A and 11B are diagrams illustrating a semiconductor device according to the eleventh embodiment. 12A and 12B are views showing a semiconductor device according to the twelfth embodiment. FIG. 13 is a diagram illustrating a semiconductor device according to a thirteenth embodiment. FIG. 14 is a diagram illustrating a semiconductor device according to a fourteenth embodiment. FIG. 15 is a diagram illustrating a semiconductor device according to the fifteenth embodiment. FIG. 16 is a diagram illustrating a semiconductor device according to the sixteenth embodiment. FIG. 17A to FIG. 17E are views showing the manufacturing process of the semiconductor device according to the present invention. 18A to 18C are views showing a manufacturing process of the semiconductor device according to the present invention. FIG. 19 illustrates a CSP-type semiconductor device. FIG. 20 is a diagram showing a circuit board on which a semiconductor device manufactured by applying the method according to the present invention is mounted. FIG. 21 is a diagram showing an electronic apparatus including a circuit board on which a semiconductor device manufactured by applying the method according to the present invention is mounted.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Semiconductor chip, 2 ... Electrode, 3 ... Wiring, 5 ... External electrode, 7 ... Stress relaxation layer, 8 ... Solder resist layer, 10 ... Semiconductor device, 12 ... Semiconductor chip, 14 ... Electrode, 16 ... Stress relaxation layer, DESCRIPTION OF SYMBOLS 18 ... Wiring, 20 ... Solder ball, 22 ... Stress transmission part, 24 ... Base, 30 ... Semiconductor device, 31 ... Semiconductor device, 32 ... Semiconductor chip, 33 ... Auxiliary transmission layer, 34 ... Electrode, 36 ... Stress relaxation layer, 36 ... Stress absorbing layer, 37 ... Semiconductor device, 38 ... Wiring, 39 ... Semiconductor device, 40 ... Solder ball, 41 ... Stress relaxation layer, 43 ... Space, 45 ... Semiconductor device, 46 ... Base, 47 ... Auxiliary transmission section, 48 ... Stress transmission part, 50 ... Semiconductor device, 51 ... Semiconductor device, 52 ... Semiconductor chip, 53 ... Auxiliary transmission layer, 54 ... Electrode, 56 ... First stress relaxation layer, DESCRIPTION OF SYMBOLS 7 ... 2nd stress relaxation layer, 58 ... Wiring, 60 ... Solder ball, 66 ... Base, 68 ... Stress transmission part, 70 ... Semiconductor device, 72 ... Semiconductor chip, 74 ... Electrode, 76 ... 1st stress relaxation layer 77 ... second stress relaxation layer, 78 ... wiring, 80 ... solder ball, 87 ... stress transmitting portion, 88 ... pedestal, 89 ... stress transmitting portion, 91 ... wiring, 94 ... stress transmitting portion, 95 ... solder ball, DESCRIPTION OF SYMBOLS 100 ... Semiconductor device, 102 ... Semiconductor chip, 104 ... Oxide film, 106 ... Wiring, 108 ... Electrode, 110 ... Connection part, 112 ... Stress transmission part, 114 ... Solder ball, 116 ... Base, 118 ... Stress relaxation layer, 120 DESCRIPTION OF SYMBOLS ... Semiconductor device, 122 ... 1st stress relaxation layer, 124 ... 1st stress relaxation layer, 124 ... 2nd stress relaxation layer, 126 ... Wiring, 128 ... Stress transmission part, DESCRIPTION OF SYMBOLS 130 ... Solder ball, 132 ... Connection part, 134 ... Base, 140 ... Semiconductor device, 142 ... Stress transmission part, 144 ... Wiring, 150 ... Semiconductor device, 154 ... First stress relaxation layer, 158 ... Island part, 159 ... Wiring, 160 ... second stress relaxation layer, 162 ... pedestal, 164 ... solder ball, 170 ... semiconductor device, 172 ... stress relaxation layer, 174 ... bump, 176 ... wiring, 178 ... semiconductor chip, 180 ... bending portion, 182 DESCRIPTION OF SYMBOLS ... Gel material, 184 ... Electrode, 190 ... Semiconductor device, 194 ... First wiring, 196 ... First stress relaxation layer, 198 ... Second wiring, 202 ... Second stress relaxation layer, 204 ... Bump, 206 ... Connection part 208 ... Connection part 300 ... Wafer 302 ... Electrode 304 ... Titanium tungsten layer 306 ... Copper , 308 ... copper plating layer, 310 ... wire, 312 ... polyimide resin, 316 ... titanium-tungsten layer, 318 ... copper layer, 320 ... copper plating layer, 322 ... stress transmission portion, 324 ... solder paste, 326 ... solder balls,

Claims (28)

  A semiconductor element, an external electrode provided for connection to the outside in the region of the semiconductor element, and the semiconductor element and the external electrode are electrically connected to each other via the connection portion. A semiconductor device comprising: a wiring to be connected; a stress relaxation portion provided on the semiconductor element; and a stress transmission portion transmitting stress from the external electrode to the stress relaxation portion. The semiconductor device according to claim 1,
The wiring is provided on the stress relaxation portion,
The stress transmission unit is a semiconductor device provided in the connection unit. The semiconductor device according to claim 1,
The wiring is provided under the stress relaxation portion,
The connection portion is provided through the stress relaxation portion,
The stress transmission part is a semiconductor device formed integrally with the connection part on the stress relaxation part. The semiconductor device according to claim 3.
The stress relaxation portion is a semiconductor device formed with a thickness from the wiring to the stress transmission portion. The semiconductor device according to claim 4.
A semiconductor device in which a groove is formed in the stress relaxation part outside the stress transmission part. The semiconductor device according to claim 3.
A semiconductor device in which a space is formed in the stress relaxation portion between a portion that contacts on the wiring and a portion that contacts under the stress transmission portion. The semiconductor device according to claim 6.
The stress relaxation portion is a semiconductor device formed by being etched from the outside to the lower side of the stress transmission portion after being formed with a thickness from the wiring to the stress transmission portion. The semiconductor device according to claim 3.
A semiconductor device having an auxiliary transmission portion that is interposed between at least a base outer periphery of the external electrode and the stress relaxation portion and transmits stress from the external electrode to the stress relaxation portion. The semiconductor device according to claim 8.
The auxiliary transmission part is a semiconductor device made of a material that can be used as the stress relaxation part. The semiconductor device according to claim 1,
The stress relaxation portion includes a first stress relaxation layer and a second stress relaxation layer formed on the first stress relaxation layer,
The wiring is provided between the first and second stress relaxation layers,
The connection portion is provided through the second stress relaxation layer;
The stress transmission portion is a semiconductor device formed integrally with the connection portion on the second stress relaxation layer. The semiconductor device according to claim 1,
The stress relaxation portion includes a first stress relaxation layer and a second stress relaxation layer formed on the first stress relaxation layer,
The wiring is provided between the first and second stress relaxation layers,
The connection portion is provided through the second stress relaxation layer;
The stress transmission portion includes a first transmission portion formed integrally with the connection portion between the first and second stress relaxation layers, and the connection portion on the second stress relaxation layer. And a second transmission part formed integrally. The semiconductor device according to claim 11.
The second transmission unit is a semiconductor device that transmits the stress to the second stress relaxation layer with a larger area than the first transmission unit. The semiconductor device according to claim 1,
The stress transmission unit is a semiconductor device provided in a non-contact state with respect to the connection unit. The semiconductor device according to claim 13.
The stress relieving part is a semiconductor device having a separation part that prevents the transmission of stress between a support area that supports the stress transmission part and a connection area where the connection part is formed. The semiconductor device according to claim 14.
The separation device is a semiconductor device which is a groove. The semiconductor device according to claim 1,
The semiconductor device having a bent portion that forms a hollow space between the wiring and the semiconductor element. The semiconductor device according to claim 16.
A semiconductor device in which a gel material is injected into the hollow space. The semiconductor device according to claim 1,
The stress relaxation portion includes a first stress relaxation layer and a second stress relaxation layer formed on the first stress relaxation layer,
The wiring includes a first wiring portion formed below the first stress relaxation layer, and a second wiring portion formed between the first and second stress relaxation layers. ,
The connection portion includes a first wiring connection portion that connects the first and second wiring portions through the first stress relaxation layer, and the external electrode that extends through the second stress relaxation layer. And a second wiring connection part for connecting the second wiring part, and the first and second wiring connection parts are provided at positions shifted in a plane,
The stress transmission portion is formed on the first transmission portion formed integrally with the first wiring connection portion between the first and second stress relaxation layers, and on the second stress relaxation layer. And a second transmission part formed integrally with the second wiring connection part. The semiconductor device according to claim 1,
The semiconductor device, wherein the wiring is drawn from the external electrode in a direction substantially perpendicular to the direction of the stress generation. The semiconductor device according to claim 1,
The stress transmission unit is a semiconductor device formed at an outer peripheral position of the connection unit.   An electronic element; an external electrode for connection to the outside; a wiring for electrically connecting the electronic element and the external electrode; a stress relaxation portion provided on the electronic element; the external electrode; An electronic component comprising: a stress transmission portion that transmits stress from the external electrode to the stress relaxation portion at an outer peripheral position of an electrical connection portion with the wiring. A step of integrally forming a plurality of electronic elements on a substrate;
Forming an electrode on the substrate-like electronic element;
Providing a stress relaxation part in the substrate-like electronic element avoiding the electrode;
Forming a wiring from the electrode;
Forming a stress transmission portion that transmits stress from the external electrode to the stress relaxation portion at an outer peripheral position of an electrical connection portion between the wiring and the external electrode;
Cutting the substrate-like electronic element into individual pieces;
The manufacturing method of the electronic component which has this. Forming an electrode on the wafer;
Avoiding the electrode and providing a stress relaxation portion on the wafer;
Forming a wiring from the electrode;
Forming a stress transmission part for transmitting stress from the external electrode to the stress relaxation part at an outer peripheral position of an electrical connection part between the wiring and the external electrode;
Cutting the wafer into individual pieces;
A method for manufacturing a semiconductor device comprising: 24. The method of manufacturing a semiconductor device according to claim 23.
The stress relaxation portion forming step is performed after the wiring forming step,
A method of manufacturing a semiconductor device, comprising a step of forming a groove by etching outside the stress transmission portion in the stress relaxation portion before the wafer cutting step. 24. The method of manufacturing a semiconductor device according to claim 23.
The stress relaxation portion forming step is performed after the wiring forming step,
A method for manufacturing a semiconductor device, comprising: a step of etching the stress relaxation portion to a position below the stress transmission portion before the wafer cutting step. 24. The method of manufacturing a semiconductor device according to claim 23.
A semiconductor including a step of forming an auxiliary transmission portion by providing a material that can be used as the stress relaxation portion from above the stress relaxation portion to at least a base outer periphery of the external electrode before the wafer cutting step. Device manufacturing method. A semiconductor device according to any one of claims 1 to 20, and a substrate on which a desired wiring pattern is formed,
A circuit board in which external electrodes of the semiconductor device are connected to the wiring pattern.   An electronic device having the circuit board according to claim 27.

Images