JP2005174958A - Ceramic circuit substrate and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a ceramic circuit substrate which can reduce burning strain smaller while preventing problems of stamping unnecessary ruggedness on a front layer conductor or a passive element, causing a foreign matter adhesion, or decreasing a plating property and solder wettability in the method of manufacturing the ceramic circuit substrate by a simultaneous burning step using a restricted sheet. <P>SOLUTION: In the method of manufacturing the ceramic circuit substrate, an unburned circuit substrate 30 in which a resistor 7 and a front layer conductor 8' are covered with a ceramic paste coating layer 26 is manufactured. Thereafter, the restricted sheets 24, 24 not sintered at the burning temperature of the unburned circuit substrate 30 are laminated, and the unburned circuit substrate 30 is restricted by the restricted sheets 24, 24. The unburned circuit substrate 30 is burned at the temperature of a range that the restricted sheets 24, 24 are not sintered to obtain the ceramic circuit substrate 32. After the restricted sheets 24, 24 are removed, the ceramic coating layer 35 coating the front layer conductor 8' is removed, and the part of the front layer conductor 8' is reduced in thickness. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method of manufacturing a ceramic circuit board having a surface layer conductor and passive elements such as a resistor, an inductor, and a capacitor by a co-fire process, and a ceramic circuit board suitably manufactured by the method. . In particular, it is deeply related to a ceramic circuit board having a resistor (resistor) on its surface. Moreover, it is suitable when the ceramic circuit board is a connected ceramic circuit board that is divided into a plurality of ceramic circuit boards.

  A method of manufacturing a ceramic circuit board by manufacturing a green circuit board formed by laminating a ceramic green sheet and a conductor layer, and then co-fireing the ceramic body and the conductor is a simultaneous firing step. It is called (co-fire process). Compared with the process of printing a conductor paste on a fired ceramic circuit board and then baking the conductor paste onto the ceramic circuit board (post-fire process), the co-firing process is a process where the surface layer conductor such as a mounting pad is attached to the ceramic body. There is a great advantage that it can be formed in a batch. In recent years, various ceramic circuit boards in which passive elements such as resistors, inductors and capacitors are built in by simultaneous firing have been studied (Patent Documents 3 to 5 below).

  However, in the co-firing process, the firing contraction timings of the green sheet, the conductor, and the passive element are different, so that firing distortion such as warpage is likely to occur in the finished ceramic circuit board. It is well known that firing strain causes defects such as mounting defects in the mounting process. In addition, firing strain may cause a large change or variation in the electrical characteristics of the passive element.

  Various methods have been studied in order to solve the firing strain problem. As a representative method, firing is performed in a thickness direction (Z direction) by firing an unfired circuit board while being physically constrained from above and below, thereby producing a ceramic circuit having a small firing strain. A method for manufacturing a substrate is known. Specifically, a method of firing while restraining by applying pressure from above and below the unfired circuit board (Patent Document 1 below), or firing in a state where the unfired circuit board is sandwiched between restraint sheets that do not shrink during the firing process Thereafter, there is a method of removing the restraining sheet (Patent Document 2 below).

JP-A-62-260777 JP-A-4-243978 JP 61-212091 A Japanese Patent Laid-Open No. 2-5448 JP-A-5-226840

  In the method of firing an unfired circuit board while restraining it from above and below with a restraint sheet (Patent Document 2), the restraint sheet comes into direct contact with a surface layer conductor such as a mounting pad formed on the substrate surface. Therefore, there is a possibility that unnecessary irregularities are stamped on the surface of the surface layer conductor, foreign matter adheres, and the plating property and solder wettability are deteriorated. In addition, the method of removing the constraining sheet after firing the unsintered circuit board between the constraining sheet that does not shrink during the firing process is a method for removing the constraining sheet in order to improve the adhesion strength and soldering resistance of the surface layer conductor. Is formed thickly (the thickness after firing is 15 μm or more and 50 μm or less). Specifically, there is a problem that the constraining sheet is difficult to partially adhere due to the unevenness of the thick surface layer conductor, and firing distortion is likely to occur in a portion where the constraining is insufficient.

  In addition, when a ceramic circuit board in which passive elements are formed on the substrate surface is manufactured on the premise that the characteristic value is adjusted with a laser trimming apparatus using these means, unevenness caused by particles contained in the restraint sheet is generated. There is a problem that the passive element is stamped on the passive element, or the passive element is removed together when the constraining sheet is removed. There is a method of forming a surface layer conductor or a passive element by a post-fire process, but there is a problem that the number of firings is increased, and the post-fire process is not suitable for forming a fine pattern.

  One object of the present invention is to stamp unnecessary irregularities on surface layer conductors and passive elements, to cause foreign matter adhesion, in a method of manufacturing a ceramic circuit board by a simultaneous firing process using a constraining sheet, It is an object of the present invention to provide a method capable of reducing the firing strain while preventing the occurrence of problems such as deterioration in solderability and solder wettability. Another object is to provide a ceramic circuit board that can be manufactured by the method.

Means for Solving the Problems and Effects of the Invention

  In order to solve the above-mentioned problems, the present invention provides a green circuit board in which a passive element and a surface layer conductor connected to the passive element are arranged on the main surface of a laminate formed by laminating a ceramic green sheet and a conductor layer. Apply the ceramic paste that is integrated into the unfired circuit board by simultaneous firing to the surface of the unfired circuit board where the passive elements and surface conductors are formed, and cover the passive elements and surface conductors And a constraining sheet mainly comprising a hardly sinterable inorganic material that is not sintered at the firing temperature of the unfired circuit board on both sides of the unfired circuit board coated with the passive element and the surface layer conductor, The restraint step of restraining the unfired circuit board by the restraint sheet, and the restrained unfired circuit board are fired at a temperature within a range where the restraint sheet is not sintered and restrained by the restraint sheet. The ceramic coating substrate covering the surface layer conductor is removed from the firing step of obtaining the ceramic circuit substrate, the ceramic sheet based on the ceramic paste applied in the coating step and the restraining sheet from the ceramic circuit substrate restrained by the restraining sheet, And a removal step of exposing the surface layer conductor to the substrate surface.

  According to the present invention, firing is performed in a state where the unfired circuit board and the ceramic paste coating layer applied to the unfired circuit board are sandwiched between the constraining sheets, so that firing shrinkage in the XY direction (in-plane direction) is suppressed, and the Z direction ( The firing shrinkage in the thickness direction) is dominant, and this can reduce the firing strain (warpage). A ceramic paste coating layer is interposed between the passive element and the constraining sheet, and between the surface conductor and the constraining sheet, and the unevenness of the constraining sheet is not stamped on the passive element and the surface layer conductor. Further, at the time of firing, the ceramic paste coating layer acts to absorb irregularities based on the passive element and the surface layer conductor, and a uniform restraining force is exerted on the surface of the unfired circuit board. Then, the occurrence variation of the firing strain in the in-plane direction is reduced, and the overall firing strain can be further reduced. The ceramic paste coating layer is integrated with the unfired circuit board by simultaneous firing. Therefore, after firing, a ceramic coating layer covering the passive element and the surface layer conductor is formed. When removing this ceramic coating layer, it is possible to remove foreign substances (such as coarse ceramic particles) adhering to the surface conductor together. Thus, according to the method of the present invention, in the method of manufacturing a ceramic circuit board by a simultaneous firing process using a constraining sheet, stamping unnecessary irregularities on the surface layer conductor, causing foreign matter adhesion, It is possible to prevent the occurrence of problems such as lowering of plating properties and solder wettability, and to further reduce firing strain. As a result, the variation in the electrical characteristics of the passive elements for each product can be reduced, leading to the provision of a ceramic circuit board with stable performance.

  As the above-mentioned ceramic paste, a material prepared by preparing an inorganic material having substantially the same composition as the ceramic green sheet constituting the unfired circuit board and an organic material as a solvent or a binder can be suitably used. According to this configuration, the firing temperature, that is, the firing timing, of the ceramic paste coating layer and the unfired circuit board matches, so that both can be integrated easily and reliably. Note that “substantially the same” means that the inevitable impurities are ignored.

  The present invention is particularly suitable when the passive element is a resistor. That is, the substrate manufacturing step includes an operation of forming a resistor and a surface layer conductor connected in an arrangement on the main surface of the multilayer body. And the formation thickness adjustment before baking of these resistors and a surface layer conductor can be performed so that the thickness of a surface layer conductor may become larger than the thickness of a resistor by the dimension at the time of completion | finish of a baking process. In this case, in the removing step, the surface conductor reduced on the resistor is removed together with the removal of the ceramic coating layer, thereby leaving the ceramic portion based on the ceramic paste on the resistor while reducing the thickness of the surface conductor. Can be exposed. For example, assuming that the form shown in FIG. 11B is at the end of the firing process, the removal process includes the removal of the ceramic coating layer 35 and the surface conductor 8 ′ (after the thickness reduction) so that the form shown in FIG. The thickness is reduced (indicated by reference numeral 8). By doing so, it is possible to remove the ceramic coating layer and expose the surface layer conductor without impairing the conductive state between the resistor and the surface layer conductor. Further, the ceramic portion 11b remaining in direct contact with the resistor 7 is advantageous because it acts to protect the resistor 7.

  Further, a laser trimming process may be provided in which the resistor is irradiated with laser light through the ceramic portion and the resistivity of the resistor is adjusted. In the laser trimming process, an extremely large thermal shock is applied to the resistor due to rapid heating and cooling. At this time, the remaining ceramic portion can be expected to relax the thermal stress. As a result, the occurrence of cracks is prevented, and the resistivity of the resistor can be adjusted with high accuracy. Therefore, it becomes possible to manufacture a ceramic circuit board having a small variation in electrical characteristics. In general, an overcoat layer made of a glass composition is provided for protecting the resistor. However, according to the method of the present invention, there may be a case where it is not necessary to provide the overcoat layer.

  However, an overcoat layer forming step of forming an overcoat layer directly over the resistor so as to extend over both the ceramic portion covering the resistor and the surface layer conductor may be performed. In this case, the effect of preventing the occurrence of cracks in the laser trimming process and the effect of preventing deterioration with time such as oxidation of the resistor are further enhanced. Further, an overcoat layer may be formed after the laser trimming process is completed. In this case, since the hole formed in the laser trimming process is filled with the overcoat layer, it is suitable for preventing deterioration of the resistor over time.

  Moreover, you may perform the plating process which forms a plating layer on the surface layer conductor exposed through the removal process. In this way, even when contaminants such as ceramic powder adhere to the surface conductor, the surface conductor can be improved in quality by forming the plating layer. That is, various properties such as solder wettability are improved, and it can be used as a solder connection portion with an integrated circuit chip or the like.

  Further, in order to solve the problem, the present invention connects a resistor and the resistor so as to be arranged on the main surface of the laminated circuit portion in which the ceramic dielectric layer and the conductor layer are laminated. In a ceramic circuit board provided with a surface layer conductor and having an overcoat layer protecting the resistor and the surface layer conductor, the ceramic circuit board is made of a ceramic having the same composition as the ceramic dielectric layer between the resistor and the overcoat layer. The main feature is that a protective layer is provided. The overcoat layer is originally provided for the purpose of protecting the resistor, but there is a difference in physical properties from the ceramic dielectric layer of the laminated circuit portion. In the present invention, the resistor is sandwiched between the same material from above and below to eliminate the difference. This configuration is advantageous for suppressing thermal damage to the resistor, and as a result, stable electrical characteristics can be maintained.

  Specifically, when a laser trimming portion that penetrates the protective layer in the substrate thickness direction and is excavated with a resistor is provided, the benefit of the protective layer is increased for the following reason. It is known that fine cracks are generated in the resistor when the laser trimming portion is formed. If a crack is generated in the resistor, the crack progresses when the ceramic circuit board is heated and cooled for solder reflow, and the resistivity of the resistor changes. Originally, the overcoat layer has the effect of preventing such a phenomenon, but as in the present invention, by providing a protective layer made of the same material as the base material (ceramic dielectric layer), the resistor is thermally damaged. Can be further reduced, and as a result, the progress of cracks can be actively suppressed.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
FIG. 1 shows a cross-sectional structure of a ceramic circuit board 1 of the present invention. The ceramic circuit board 1 includes a multilayer circuit portion 2 having a multilayer structure in which ceramic dielectric layers 5 and conductor layers 6 are alternately laminated, and a surface layer conductor formed on the first main surface CP of the multilayer circuit portion 2. 8 and a resistor 7. On the second main surface DP of the multilayer circuit unit 2, a mounting pad 12 for electrical connection with another mounting substrate or the like is formed. 2nd main surface DP shows the main surface on the opposite side to the side in which the resistor 7 was formed. In the multilayer circuit portion 2, the conductor layers 6, 6, the conductor layer 6 and the surface layer conductor 8, and further, a plurality of via conductors 4 that conduct the conductor layer 6 and the mounting pad 12 have a thickness of each ceramic dielectric layer 5. It is provided in a shape that penetrates in the vertical direction. These via conductors 4 provide electrical connection between layers. The mounting pad 12 includes a base conductor 13 and a plating layer 14. Although not shown, a structure in which solder bumps and mounting pins are brazed onto the mounting pad 12 using a brazing material (including solder) can also be used.

  On the first main surface CP side of the multilayer circuit portion 2, the non-formation region of the resistor 7 and the surface layer conductor 8 is covered with the surface layer ceramic portion 11a. The surface ceramic portion 11a is made of the same material as the ceramic dielectric layer 5 of the multilayer circuit portion 2, and is integrated with the ceramic dielectric layer 5 by simultaneous firing. Further, an overcoat layer 9 is provided on the resistor 7 and the surface conductor 8. The overcoat layer 9 made of the glass composition is provided with an opening 9a so that a part of the surface conductor 8 is exposed. The surface layer conductor 8 exposed to the opening 9 a is covered with a plating layer 10. On the plated layer 10, solder bumps for flip chip connection of electronic components such as integrated circuit chips can be provided. That is, the overcoat layer 9 functions as a solder dam. In the present embodiment, the surface conductor 8 is directly connected to the resistor 7, but the form of the surface conductor 8 is not limited to this, and terminal pads for forming solder bumps, etc. Is also included in the concept of the surface layer conductor 8. A similar overcoat layer 9 ′ is also provided on the second main surface DP side on which the mounting pads 12 are formed.

  FIG. 3 shows a partially enlarged view of the ceramic circuit board 1 of FIG. As shown in FIG. 3, the resistor 7 and the surface layer conductor 8 overlap each other in such a manner that the surface layer conductor 8 rises on the resistor 7 from above. As a result, the pair of facing surface conductors 8, 8 facing each other are conducted through the resistor 7. The positional relationship between the resistor 7 and the surface conductors 8 and 8 can be easily understood from the schematic top view of FIG. According to such an arrangement, a step is generated directly above the resistor 7. However, in the ceramic circuit board 1, the step ceramic layer 11 b is disposed on the resistor 7, thereby filling the step. It is in shape. In the present specification, the “vertical direction” represents the thickness direction of the ceramic circuit board 1.

  FIG. 4 shows a cross-sectional view in a direction orthogonal to the cross-sectional view of FIG. According to this figure, the relationship between the surface ceramic parts 11a and 11b indicated by different symbols becomes clear. That is, as shown in FIG. 4, the surface ceramic portion 11 b is integrated with the surface ceramic portion 11 a that covers the main surface CP of the multilayer circuit portion 2, and is located between the resistor 7 and the overcoat layer 9. It is. The surface ceramic part 11a and the surface ceramic part 11b have the same composition.

  Returning to FIG. The surface layer ceramic portion 11b is disposed directly above the resistor 7, and the step formed by the surface layer conductor 8 being lifted onto the resistor 7 disappears, so that the upper surface 11p of the surface layer ceramic portion 11b and the upper surface 8p of the surface layer conductor 8 face each other. It is one. Furthermore, the upper surface 8p of the surface conductor 8 has a substantially constant height (the main surface CP of the multilayer circuit portion 2 is a reference). That is, the thickness of the surface conductor 8 is adjusted to be small at a position where it overlaps the resistor 7, while the thickness is adjusted to be large at a position shifted in-plane from the resistor 7. By doing so, the transfer of the shape of the resistor 7 to the upper surface 8p of the surface layer conductor 8 is suppressed.

  Such a structure is advantageous in disposing electronic components such as integrated circuit chips at positions close to the resistor 7. In order to mount an electronic component on the ceramic circuit board 1, for example, as shown in FIG. 1, an opening 9a is formed in the overcoat layer 9 to provide solder bumps. When the flatness of the overcoat layer 9 is high, the degree of freedom in arranging the electronic components is high.

  On the other hand, as in the conventional ceramic circuit board shown in FIG. 6, the surface layer conductors 70 and 70 constituting the circuit pattern are connected to both ends of the resistor 71 having a constant thickness. The overcoat layer 72 has a relatively wide range of formation and large irregularities. It is necessary to avoid such uneven portions as the arrangement positions of the electronic components.

  In short, the present configuration shown in FIG. 3 is more suitable for high-density mounting than the conventional configuration of FIG. Of course, the formation position of the overcoat layer 9 is not limited to the position covering the resistor 7. However, for example, when the integrated circuit chip is surface-mounted, the flatness of the substrate surface is strongly required, so that the structure like the ceramic circuit substrate 1 is advantageous.

  Further, as shown in FIG. 3, the resistor 7 is formed with a laser trimming portion 7a for adjusting the resistivity so as to excavate the resistor 7. The laser trimming portion 7a is formed to penetrate the overcoat layer 9 and the surface ceramic portion 11b in the substrate thickness direction. As shown in FIG. 5, the laser trimming portion 7a is L-shaped in this embodiment, but the shape can be variously adjusted. Further, the laser trimming portion 7a may be protected (covered) with a resin such as epoxy in order to prevent the resistor 7 from being oxidized.

  Returning to FIG. The plating layer 10 can be composed of, for example, a Ni / Au plating layer. Moreover, you may comprise by the plating layer by the same kind metal (for example, Cu, Ag) as the metal contained in the surface layer conductor 8, and the Ni / Au plating layer formed on this plating layer. The thickness of the plating layer 10 is adjusted to, for example, 1 μm or more and 100 μm or less. On the other hand, the surface layer conductor 8 is a base of the plating layer 10 and is made of the same kind of metal as the conductor layer 6 and the via conductor 4. On the plated layer 10, solder bumps made of solder not containing Pb such as Sn—Pb eutectic solder, Sn—Ag—Cu solder, Sn—Ag solder may be formed.

Hereinafter, the manufacturing process of the ceramic circuit board 1 will be described.
The ceramic circuit board 1 is manufactured using a ceramic green sheet. The ceramic green sheet can be produced by a known doctor blade method. First, raw material ceramic powder made of dielectric ceramic (for example, in the case of glass ceramic powder, mixed powder of borosilicate glass powder and ceramic filler powder such as alumina, BaTiO _3, etc .: average particle size is about 0.3 μm to 1 μm ) Solvent (acetone, methyl ethyl ketone, diacetone, methyl isobutyl ketone, benzene, bromochloromethane, ethanol, butanol, propanol, toluene, xylene, etc.), binder (acrylic resin (eg polyacrylic acid ester, polymethyl methacrylate)) , Cellulose acetate butyrate, polyethylene, polyvinyl alcohol, polyvinyl butyral, etc.), plasticizer (butyl benzyl phthalate, dibutyl phthalate, dimethyl phthalate, phthalate ester, polyethylene Glycol derivatives, tricresol phosphate, etc.), peptizers (fatty acids (glycerin triolates, etc.), surfactants (benzenesulfonic acid, etc.), wetting agents (alkyl allyl polyether alcohol, polyethylene glycol ethyl ether, nithyl phenyl glycol, A mixture of additives such as polyoxyethylene ester) is kneaded to form a slurry, which is applied onto a back sheet such as PET using a doctor blade and dried appropriately, thereby producing a ceramic green sheet. Get.

  Next, a metallized paste for forming via conductors (hereinafter referred to as via conductor paste) is prepared. The metal powder to be used is made of, for example, any one of Ag, AgPt, AgPd, Au, Ni, and Cu, and the average particle diameter is adjusted in the range of 2 μm to 20 μm. A via conductor paste can be obtained by blending and preparing an organic solvent such as butyl carbitol in the metal powder so as to obtain an appropriate viscosity.

Next, a metallized paste (hereinafter referred to as a conductor layer paste) used to form the surface layer conductor 8 and the conductor layer 6 is prepared. The metal powder to be used is preferably the same type as that used in the via conductor paste and having an average particle size adjusted to be as small as 0.1 μm to 3 μm. To this metal powder, an inorganic compound powder having an average particle size of 500 nm or less (preferably 100 nm or less, more preferably 50 nm or less) is blended in the range of 0.5% by mass or more and 30% by mass or less. A conductor layer paste can be obtained by blending and preparing a binder and an organic solvent such as butyl carbitol so as to obtain an appropriate viscosity. The inorganic compound powder may be a ceramic green sheet raw material ceramic powder, or at least one of aluminum oxide (Al ₂ O ₃ ), silicon dioxide (SiO ₂ ), and titanium oxide (TiO ₂ ). You may mix | blend and use the inorganic compound powder (average particle diameter of 100 nm or less, desirably 50 nm or less) which consists of seeds.

Next, a paste used for forming the resistor 7 (hereinafter referred to as a resistor paste) is prepared. Specifically, a resistor paste can be prepared by kneading a conductor powder such as RuO ₂ or LaB ₆ , a powder of a borosilicate glass composition, and an organic binder. For example, with respect to 100 parts by mass of RuO ₂ powder adjusted to an average particle size of 0.01 μm or more and 20 μm or less, glass powder is mixed in a range of 50 parts by mass or more and 500 parts by mass or less, and the organic binder described above is 100 parts by mass of RuO ₂ powder. It mix | blends in 5 to 20 mass parts with respect to a part.

  Using the ceramic green sheet and metallized paste produced as described above, an unfired circuit board is produced as follows. First, as shown in FIG. 7, an unfired via conductor 4 is formed by forming a through hole at a predetermined position of a ceramic green sheet 25 prepared in advance by a technique such as punching or laser and filling via conductor paste. . After that, the unfired conductor layer 6 is formed by printing the conductor layer paste on the main surface of the ceramic green sheet 25 by a method such as screen printing. When the formation of the via conductor 4 and the conductor layer 6 is completed in this manner, another ceramic green sheet 25 is overlaid thereon, and the pattern printing / ceramic green sheet lamination process is repeated. The via conductor 4 is exposed on one main surface (first main surface CP), and the base conductor 13 of the mounting pad 12 is formed on the other main surface (second main surface DP). An unfired laminate 20 is obtained. Then, the resistor 7 and the surface layer conductor 8 ′ are printed and formed in this order on the first main surface CP side of the multilayer body 20. Thereby, the unbaked circuit board 30 is obtained (board | substrate preparation process). A resistor paste is used for printing the resistor 7, and a conductor paste is used for printing the surface conductor 8 '.

  In addition, about the via conductor 4, the conductor layer 6, the resistor 7, the base conductor 13, etc., it is refused for convenience that the code | symbol before baking and after baking is made the same.

  Next, as shown in FIG. 8, the ceramic paste 18 is applied to the unfired circuit board 30 by a printing method such as a screen printing method. Thereby, the ceramic paste coating layers 22 and 26 are formed on the main surface of the unfired circuit board 30 (covering step). The formation thickness of the ceramic paste coating layer 26 is just enough to fill the step formed by the surface conductor 8 being lifted onto the resistor 7. In addition, according to the method of the present embodiment, when the surface layer conductors 8 are densely arranged, the ceramic paste coating layers 22 and 26 with the ceramic paste 18 reaching every corner and having small surface irregularities can be formed. As a result, the restraining force of the restraining sheets 24, 24, which will be described later, acts evenly in the plane, and the effect of reducing the firing strain can be further expected.

  As the ceramic paste 18, a material prepared by preparing an inorganic material having substantially the same composition as the ceramic green sheet 25 constituting the unfired circuit board 30 and an organic material such as a solvent and a binder can be preferably used. Specifically, as the ceramic paste 18, the green sheet forming slurry used for the production of the ceramic green sheet 25 can be used as it is. In addition, the type of organic solvent or the like and the blending ratio of the organic material and the inorganic material may be different from those for the green sheet forming slurry in order to improve the printability. When the printing process of the ceramic paste 18 is completed, the unfired circuit board 30 may be dried in a drying furnace in order to appropriately remove the organic solvent and the like contained in the ceramic paste coating layers 22 and 26.

Next, constraining sheets 24 and 24 mainly containing a hardly sinterable inorganic material that is not sintered at the firing temperature of the unfired circuit board 30 are laminated on both surfaces of the unfired circuit board 30 (restraint process). When the ceramic circuit board 1 is made of a low-temperature fired ceramic (glass ceramic) as in this embodiment, the restraint sheets 24, 24 are, for example, one or more selected from Al ₂ O ₃ , ZrO ₂ and BN. The ceramic green sheet mainly composed of the hardly sinterable inorganic material can be used. That is, the constraining sheets 24, 24 may be of any composition that is not sintered at the firing temperature of the ceramic paste coating layers 22, 26 and the unfired circuit board 30. Note that “mainly” or “including as a main body” means containing the largest amount by mass%.

  Next, as shown in FIG. 9, the unfired circuit board 30 restrained by the restraining sheets 24 and 24 is fired at a temperature in a range where the restraining sheets 24 and 24 are not sintered. This firing temperature range is a temperature in a range where the unfired circuit board 30 and the ceramic paste coating layers 22 and 26 are sintered and integrated, and the restraint sheets 24 and 24 are not sintered. In this way, the ceramic circuit board 32 restrained by the restraining sheets 24, 24 can be manufactured (firing process). In addition, said baking temperature range can be 800 degreeC or more and 1000 degrees C or less (for example, 950 degreeC) common with a low-temperature baking ceramic. Moreover, you may bake in the atmosphere pressurized rather than atmospheric pressure, or you may bake, pressing the restraint sheets 24 and 24 mechanically.

  The ceramic circuit board 32 (work board) at the end of firing has a ceramic layer 34 derived from the ceramic paste coating layer 26. The ceramic layer 34 includes a ceramic coating layer 35 that covers the surface conductor 8 ′, a surface ceramic portion 11 a that serves to fill the space between the adjacent surface conductors 8 ′ and 8 ′, and a surface ceramic portion 11 b that covers the resistor 7. Composed. From this ceramic circuit board 32, the constraining sheets 24, 24, the ceramic coating layer 35 covering the surface conductor 8 ′, and a part of the surface conductor 8 ′ are removed by wet sandblasting or polishing, so that the surface conductor 8 is applied to the substrate surface. Expose (removal step). Since the restraint sheets 24 and 24 and the ceramic covering layer 35 are different from each other in ease of removal, their removal methods may be different from each other. Specifically, the constraining sheets 24 and 24 are removed by wet sand blasting, and the ceramic coating layer 35 and part of the surface conductor 8 'are removed by mechanical polishing, chemical etching, or a combination thereof.

  The removal process will be described in detail. In the removing step, the ceramic coating layer 26 is formed on the resistor 7 as shown in FIG. The surface conductor 8 can be exposed while leaving the surface ceramic portion 11b based on the above. It is important to pay attention to the following points in order to obtain the surface layer conductor 8 in which the portion overlapping the resistor 7 is reduced in thickness by removing a part of the surface layer conductor 8 'at the end of firing.

First, as shown in FIG. 11B, it is important that the thickness t ₁ of the surface layer conductor 8 ′ is larger than the thickness t ₂ of the resistor 7 in the dimensions at the end of the firing step. Otherwise, when removing the ceramic coating layer 35 in the removing step and reducing the thickness of the surface conductor 8 'until it reaches the height of the portion not raised on the resistor 7, the surface conductor 8 and the resistor 7 Connectivity may be impaired. Therefore, it is important to adjust the formation thickness of the resistor 7 and the surface conductor 8 ′ in the substrate manufacturing process. In the present embodiment, as shown in FIG. 11 (c), the printing thickness t ₁₀ of the surface layer conductor 8 ', so that always be larger than the print thickness t ₂₀ of the resistor 7, to perform the substrate manufacturing process I have to.

  The ceramic coating layer 35 and the surface ceramic portions 11a and 11b are both obtained by firing the ceramic paste coating layer 26. Although the surface conductor 8 ′ and the ceramic coating layer 35 are integrated, if the thickness d1 of the ceramic coating layer 35 is sufficiently small (for example, 50 μm or less), the removal is relatively easy, and almost no foreign matter remains. .

  In the coating step, it is desirable to apply the ceramic paste in a thickness range of 1 μm to 50 μm. When the coating thickness of the ceramic paste is less than 1 μm, it is impossible to obtain a sufficient effect of uniforming the restraining force in the plane. On the other hand, if the thickness exceeds 50 μm, a thick ceramic coating layer will be formed on the surface conductor after firing, which makes it difficult to remove or significantly increases the time spent in the removal process. To do. As a result, productivity may be sacrificed. Alternatively, the covering step may be performed after the surface of the unfired circuit board 30 on which the resistor 7 and the surface conductor 8 'are formed is slightly flattened by pressing. By doing so, the resistor 7 and the surface layer conductor 8 ′ are slightly recessed into the base, and as a result, the amount of ceramic paste applied can be slightly reduced.

  Also on the second main surface DP side, the ceramic coating layer 37 covering the base conductor 13 is removed in the same manner as the first main surface CP side. The ceramic coating layer 37 is a part of the ceramic layer 38 that is a fired product of the ceramic paste coating layer 22, and the thickness d2 thereof is substantially equal to the thickness d1 of the ceramic coating layer 35 on the first main surface CP side. A part of the ceramic layer 38 remains as a surface ceramic part 36 that covers the second main surface DP.

  Next, as shown in FIG. 10, an overcoat layer 9 is formed on the surface conductor 8 exposed on the substrate surface and further on the surface ceramic portions 11a and 11b (overcoat layer forming step). The overcoat layer 9 is provided with an opening 9 a for an external connection terminal at a position overlapping the surface layer conductor 8. A similar overcoat layer 9 ′ is also formed on the back side where the underlying conductor 13 is exposed. The overcoat layers 9 and 9 'can be formed by applying a glass paste containing a lead silicate or lead borosilicate low melting point glass composition by a screen printing method or the like and baking it. The firing temperature range of this glass paste is set to a temperature range lower than the firing temperature range of the unfired circuit board 30.

  Next, the plating layer 10 is formed on the surface layer conductor 8 exposed from the opening 9a of the overcoat layer 9 (plating process). Similarly, on the opposite side, the mounting pad 12 is obtained by forming the plating layer 14 on the base conductor 13. This plating process can be a plating process of the same kind of metal as the surface conductor 8, and the plating layer 10 can be, for example, a Cu plating layer or an Ag plating layer. Further, by forming a Ni / Au plating layer on these plating layers, the Ni / Au plating layer can be formed on a plating metal layer with few pits. According to this procedure, a denser Ni / Au plating layer can be formed, which contributes to improving the solder wettability of the plating layer 10. However, an electroless Ni / Au plating layer may be directly formed on the surface conductor 8. Further, the conductive bumps may be formed by plating.

  Next, the resistance is adjusted by irradiating the resistor 7 with laser light through the overcoat layer 9 (laser trimming step). It is preferable to cover and protect the laser trimming portion 7a formed by this process with a resin such as epoxy because the resistor 7 can be prevented from being oxidized. The ceramic circuit board 1 is manufactured through the steps described above.

  The ceramic circuit board 1 shown in the present embodiment is generally manufactured in the form of a multi-piece ceramic circuit board 85 as shown in FIG. Each ceramic circuit board 1 is folded along the dividing grooves 112. When the ceramic circuit board to be manufactured is a connected ceramic circuit board 85 that becomes a plurality of ceramic circuit boards 1 by division, the warp problem becomes more serious, and therefore it is particularly effective to apply the manufacturing method of the present invention. It is.

The cross-sectional schematic diagram of a ceramic circuit board. Schematic diagram of a multi-cavity ceramic circuit board. The partial expanded sectional view of FIG. Sectional drawing of the direction orthogonal to sectional drawing of FIG. The enlarged top view of a resistor and a surface layer conductor. The expanded sectional view of the resistor in the conventional ceramic circuit board. FIG. 3 is an explanatory diagram of a manufacturing process of the ceramic circuit board of FIG. 1. Process explanatory drawing following FIG. Process explanatory drawing following FIG. Process explanatory drawing following FIG. Explanatory drawing of the formation method of a surface layer conductor.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Ceramic circuit board 2 Laminated circuit part 4 Via conductor 5 Ceramic dielectric layer 6 Conductor layer 7 Resistor 7a Laser trimming part 8 Surface layer conductor 9 Overcoat layer 10 Plating layer 11a, 11b Surface layer ceramic part 18 Ceramic paste 20 Laminated body 22, 26 Ceramic paste coating layer 24 Restraint sheet 25 Ceramic green sheet 30 Unfired circuit board 34 Ceramic layer 35 Ceramic coating layer CP First main surface

Claims (8)

A substrate manufacturing step of manufacturing a green circuit board in which a passive element and a surface layer conductor connected to the passive element are arranged on a main surface of a laminate formed by laminating a ceramic green sheet and a conductor layer;
A coating for coating the passive element and the surface conductor by applying a ceramic paste integrated with the unfired circuit board by simultaneous firing on the surface of the green circuit board on which the passive element and the surface layer conductor are formed. Process,
A constraining sheet mainly comprising a hardly sinterable inorganic material that is not sintered at the firing temperature of the unfired circuit board is laminated on both sides of the unfired circuit board coated with the passive element and the surface layer conductor. A constraining step of constraining the green circuit board with a sheet;
Firing the unfired circuit board restrained by the restraining sheet at a temperature in a range where the restraining sheet is not sintered, and producing a ceramic circuit board restrained by the restraining sheet;
From the ceramic circuit board restrained by the restraining sheet, the ceramic covering layer covering the surface conductor is removed from the ceramic sheet based on the restraining sheet and the ceramic paste applied in the covering step, and the surface conductor is removed. A removal step to expose the substrate surface;
A method for producing a ceramic circuit board, comprising:   2. The ceramic circuit board according to claim 1, wherein the ceramic paste is prepared by preparing an inorganic material having substantially the same composition as the ceramic green sheet and an organic material as a solvent or a binder. Method. The passive element is configured as a resistor;
The substrate manufacturing step includes an operation of forming the resistor and the surface conductor to be connected to the main surface of the multilayer body in an arrangement arranged on the main body,
In the dimensions at the end of the firing step, the thickness of the surface layer conductor is larger than the thickness of the resistor, and the thickness of the resistor and the surface layer conductor is adjusted before firing,
In the removing step, the thickness of the surface conductor that has been applied to the resistor together with the removal of the ceramic coating layer is reduced, leaving a ceramic portion based on the ceramic paste on the resistor. 3. The method of manufacturing a ceramic circuit board according to claim 1, wherein the surface layer conductor is exposed.   4. The method of manufacturing a ceramic circuit board according to claim 3, further comprising a laser trimming step of irradiating the resistor with laser light through the ceramic portion to adjust the resistivity of the resistor.   4. An overcoat layer forming step of forming an overcoat layer directly over the resistor so as to straddle both the ceramic portion covering the resistor and the surface layer conductor. 4. A method for producing a ceramic circuit board according to 4.   6. The method of manufacturing a ceramic circuit board according to claim 1, further comprising a plating step of forming a plating layer on the surface conductor exposed through the removing step.   On the main surface of the laminated circuit portion formed by laminating the ceramic dielectric layer and the conductor layer, there are provided a resistor and a surface layer conductor connected to the resistor so as to be raised from above, and the resistor and the surface layer. A ceramic circuit board having an overcoat layer for protecting a conductor, wherein a protective layer made of a ceramic having the same composition as the ceramic dielectric layer is provided between the resistor and the overcoat layer. Ceramic circuit board. The ceramic circuit board according to claim 7, further comprising a laser trimming portion that penetrates the protective layer in a thickness direction of the substrate and in which the resistor is excavated.

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