JP2005167072A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the following problems: a mutual contact of a sealing resin of adjacent semiconductor chips in a flip chip type MCM package lowers a connection reliability to prevent a distance between the semiconductor chips from narrowing, which cannot increase a packaging density of the semiconductor chips in the package, or the like. <P>SOLUTION: A substrate thickness 18 of a region for mounting a semiconductor chip A1 and a substrate thickness 19 of a region for mounting a semiconductor chip B2 of a wiring board 6 greater than a substrate thickness 20 of a region 21 for not mounting the semiconductor chip makes the height of the surface of the region for mounting the semiconductor chip A1 and the height of the surface of the region for mounting the semiconductor chip B2 greater than the height of the surface of the region 21 for not mounting the semiconductor chip. The resin 8 protruding from the semiconductor chip A1 and the semiconductor chip B2 flows out to the region 21 lower than the mounting region and the region 21 for not mounting the semiconductor chip, which can eliminate a connection defect caused by an increase in thermal stress added to the projecting electrode 4 by a thermal shock test. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

  With the downsizing of portable electronic devices, the demand for multi-chip modules (MCM) and cavity structure packages in which a plurality of semiconductor chips and electronic components are mounted in one package is increasing.

  A general method for manufacturing a conventional MCM will be described with reference to FIGS.

  As shown in FIG. 7A, the protruding electrode 4 is formed on the external electrode 3 of each of the semiconductor chip A1 and the semiconductor chip B2.

  As shown in FIG. 7B, the conductive adhesive 5 is applied to the protruding electrodes 4 of the semiconductor chip A1 and the semiconductor chip B2.

  As shown in FIG. 7C, the semiconductor chip A <b> 1 and the semiconductor chip B <b> 2 are bonded by aligning the protruding electrode 4 and the wiring pattern 7 on the wiring substrate 6.

  As shown in FIG. 8A, the resin 8 is injected from the side surfaces of the semiconductor chip A1 and the semiconductor chip B2, filled into the gaps between the semiconductor chip A1 and the semiconductor chip B2, and the wiring board 6, and the resin 8 after filling is heated. Cure and complete MCM assembly. At this time, it is necessary that the total length of the resin length 9 protruding from the semiconductor chip A1 and the resin length 10 protruding from the semiconductor chip B2 does not exceed the distance 11 between the semiconductor chip A1 and the semiconductor chip B2. is there. The resin length 9 protruding from the semiconductor chip A1 and the resin length 10 protruding from the semiconductor chip B2 are usually about 0.5 mm. Therefore, the distance 11 between the semiconductor chip A1 and the semiconductor chip B2 must be 1.0 mm or more.

  The reason is that, as shown in FIG. 8B, when the distance 11 between the semiconductor chip A1 and the semiconductor chip B2 becomes narrower than 1.0 mm, a problem in reliability occurs. That is, the distance 11 between the semiconductor chip A1 and the semiconductor chip B2 is reduced, and the total length of the resin length 9 protruding from the semiconductor chip A1 and the resin length 10 protruding from the semiconductor chip B2 is the semiconductor chip A1 and the semiconductor chip. When the distance 11 between the chips B2 is exceeded, the resin 8 protruding from the semiconductor chip A1 and the resin 8 protruding from the semiconductor chip B2 are connected to each other. In this case, it is known from experiments and stress simulation that the thermal stress applied to the protruding electrode 4 in the thermal shock test increases and a connection failure occurs.

  Next, a general manufacturing method of a conventional cavity structure package will be described with reference to FIGS.

  As shown in FIG. 9A, the protruding electrode 4 is formed on the external electrode 3 of the semiconductor chip 12.

  As shown in FIG. 9B, the conductive adhesive 5 is applied to the protruding electrodes 4 of the semiconductor chip 12.

  As shown in FIG. 9C, the semiconductor chip 12 is bonded by aligning the protruding electrode 4 and the wiring pattern 7 of the wiring substrate 6 having the concave cavity 13.

  As shown in FIG. 10A, the resin 8 is injected from the side surface of the semiconductor chip 12, filled into the gap between the semiconductor chip 12 and the bottom surface of the concave cavity 13, and the filled resin 8 is thermally cured. At this time, it is necessary to set the cavity size large so that the resin length 14 protruding from the semiconductor chip 12 does not exceed the distance 15 between the sidewalls of the semiconductor chip 12 and the concave cavity 13. The resin length 14 protruding from the semiconductor chip 12 is usually about 0.5 mm. Therefore, the distance 15 between the semiconductor chip 12 and the side wall of the cavity 13 is required to be 0.5 mm or more.

  The reason is that, as shown in FIG. 10B, when the resin 8 protruding from the semiconductor chip 12 and the side wall 16 of the cavity 13 are connected, the thermal stress applied to the protruding electrode 4 in the thermal shock test increases, resulting in poor connection. This is because it occurs.

  Subsequently, as shown in FIG. 11, an electronic component 17 is connected to the opposite surface of the cavity 13 of the wiring board 6 to complete the assembly of the cavity structure package. The method of connecting the electronic component 17 to the wiring board 6 is soldering, flip chip, or the like.

The cavity structure package assembled in this way is used as an electronic device in a state where the input / output terminals 23 are mounted on the mother board by soldering or the like.
Japanese Patent Laid-Open No. 08-335593 Japanese Patent No. 3061014

  In the above conventional MCM structure, if the distance 11 between the adjacent semiconductor chip A1 and the semiconductor chip B2 is shortened as shown in FIG. 8B, a defect occurs in the thermal shock test, so that the package (semiconductor device) can be downsized. There is a problem that the mounting density of semiconductor chips in one package cannot be increased.

  Further, in the conventional package structure having the concave cavity 13, if the distance 15 between the semiconductor chip 12 and the side wall of the cavity 13 is shortened as shown in FIG. There was a problem that the device could not be downsized.

  An object of the present invention is to provide a semiconductor device that can be miniaturized or that can increase the mounting density of semiconductor chips in a package structure having an MCM structure or a concave cavity, and a method for manufacturing the same.

  The first semiconductor device of the present invention provides a gap between the first semiconductor chip mounting region in which the first wiring electrode is formed on one surface and the second semiconductor chip mounting region in which the second wiring electrode is formed. The first wiring electrode of the wiring substrate that is opened and the electrode of the first semiconductor chip are electrically connected via the first protruding electrode, and the second wiring electrode of the wiring substrate and the second semiconductor chip are connected to each other. The electrode is electrically connected via the second protruding electrode, the first resin is filled between the wiring board and the first semiconductor chip, and the first resin is filled between the wiring board and the second semiconductor chip. 2 is a semiconductor device filled with resin, and the surface heights of the first semiconductor chip mounting region and the second semiconductor chip mounting region on the one surface side of the wiring board are set to the first semiconductor chip mounting region and the first semiconductor chip mounting region. The surface height of the area excluding the semiconductor chip mounting area 2 Characterized in that it was also high.

  According to the second semiconductor device of the present invention, the wiring electrode of the wiring board having the semiconductor chip mounting region in which the concave portion is formed on one surface and the wiring electrode is formed at the center of the bottom surface of the concave portion and the electrode of the semiconductor chip are protruding electrodes An input / output terminal electrically connected to the wiring electrode is provided on the front end surface of the convex portion surrounding the bottom surface of the concave portion of the wiring substrate. In the formed semiconductor device, the surface height of the semiconductor chip mounting region at the center of the bottom surface of the recess of the wiring board on one surface side is made higher than the surface height of the peripheral portion of the bottom surface of the recess excluding the semiconductor chip mounting region It is characterized by that.

  According to a third method of manufacturing a semiconductor device of the present invention, a first semiconductor chip mounting region in which a first wiring electrode is formed on one surface and a second semiconductor chip mounting region in which a second wiring electrode is formed; And the surface heights of the first semiconductor chip mounting region and the second semiconductor chip mounting region on one surface side are excluded from the first semiconductor chip mounting region and the second semiconductor chip mounting region. A step of preparing a wiring board having a height higher than the surface height of the region, and electrically connecting the first wiring electrode of the wiring board and the electrode of the first semiconductor chip via the first protruding electrode; Electrically connecting the second wiring electrode and the electrode of the second semiconductor chip via the second protruding electrode, and injecting the first resin between the wiring substrate and the first semiconductor chip And between the wiring board and the second semiconductor chip. It is intended to include a step of injecting the resin.

  The fourth method of manufacturing a semiconductor device according to the present invention includes a semiconductor chip mounting region in which a recess is formed on one surface and a wiring electrode is formed at the center of the bottom of the recess, and the tip of the protrusion surrounding the bottom of the recess An input / output terminal electrically connected to the wiring electrode is formed on the surface, and the surface height of the semiconductor chip mounting region at the center of the bottom surface of the concave portion of the wiring board on one surface side is set to the bottom surface of the concave portion excluding the semiconductor chip mounting region. A step of preparing a wiring board having a height higher than the surface height of the peripheral portion, a step of electrically connecting the wiring electrode of the wiring board and the electrode of the semiconductor chip via a protruding electrode, and between the wiring board and the semiconductor chip And a step of injecting a resin.

  According to the manufacturing method of the first semiconductor device and the third semiconductor device, in the MCM structure in which the first and second semiconductor chips are mounted on one surface side of the wiring board, the first on the one surface side of the wiring board. By making the surface height of the semiconductor chip mounting area and the second semiconductor chip mounting area higher than the surface height of the area excluding the first semiconductor chip mounting area and the second semiconductor chip mounting area, the first Even when the interval between the semiconductor chip mounting region and the second semiconductor chip mounting region is narrowed, the first resin filled between the wiring substrate and the first semiconductor chip is injected, and the wiring substrate When the second resin filled between the two semiconductor chips is injected, the resin protruding from the first semiconductor chip mounting region and the second semiconductor chip mounting region, respectively, from the regions on the wiring board. In the thermal shock test, the first protruding electrode and the second resin that flowed out into the lower region and protruded from the first resin and the second resin are not connected above the surfaces of the first and second semiconductor chip mounting regions. The thermal stress applied to the second protruding electrode does not increase, and it is possible to eliminate connection failure due to an increase in thermal stress. Therefore, even if the distance between the first and second semiconductor chips is narrowed, no problem occurs in the thermal shock test, and the semiconductor device can be miniaturized or the mounting density of the semiconductor chips can be increased.

  According to the second semiconductor device and the fourth semiconductor device manufacturing method, in the package structure having the concave cavity in which the concave portion is formed on one surface of the wiring substrate and the semiconductor chip is mounted at the bottom center portion of the concave portion, By setting the surface height of the semiconductor chip mounting region at the center of the bottom surface of the recess of the wiring board on the side higher than the surface height of the peripheral portion of the bottom surface of the recess excluding the semiconductor chip mounting region, the semiconductor chip mounting region and the recess Even when the gap between the convex portion surrounding the bottom surface of the substrate is narrowed, the resin protruding from the semiconductor chip mounting area is higher than the semiconductor chip mounting area when the resin filled between the wiring board and the semiconductor chip is injected. The resin that has flowed out into the peripheral area of the bottom of the low-pitched recess is not connected to the side wall of the protrusion above the surface of the semiconductor chip mounting area. There, the heat stress applied to the protruding electrode does not increase, it is possible to eliminate the connection failure due to thermal stress increases. Therefore, even if the distance between the semiconductor chip and the convex portion is narrowed, no problem occurs in the thermal shock test, and the semiconductor device can be miniaturized.

  As described above, according to the present invention, in the MCM structure in which the first and second semiconductor chips are mounted on the one surface side of the wiring board, the first semiconductor chip mounting region and the second on the one surface side of the wiring board are provided. By making the surface height of the semiconductor chip mounting region higher than the surface height of the region excluding the first semiconductor chip mounting region and the second semiconductor chip mounting region, the first semiconductor chip mounting region and the second semiconductor chip mounting region Even when the distance from the semiconductor chip mounting region is reduced, the first resin filled between the wiring board and the first semiconductor chip is injected and between the wiring board and the second semiconductor chip. At the time of injecting the second resin to be filled, the resin protruding from the first semiconductor chip mounting area and the second semiconductor chip mounting area respectively flowed out into areas lower than those areas on the wiring board. The first resin and the second resin are not connected above the surfaces of the first and second semiconductor chip mounting regions, and the thermal stress applied to the first protruding electrode and the second protruding electrode in the thermal shock test It is possible to eliminate connection failure due to increased thermal stress. Therefore, even if the distance between the first and second semiconductor chips is narrowed, no problem occurs in the thermal shock test, and the semiconductor device can be miniaturized or the mounting density of the semiconductor chips can be increased.

  According to the present invention, in the package structure having a concave cavity in which a recess is formed on one surface of the wiring board and a semiconductor chip is mounted at the bottom center part of the recess, the bottom center part of the recess of the wiring board on the one surface side By making the surface height of the semiconductor chip mounting area higher than the surface height of the periphery of the bottom surface of the recess excluding the semiconductor chip mounting area, the distance between the semiconductor chip mounting area and the convex part surrounding the bottom surface of the recess is reduced. Even if it is narrowed, when the resin filled between the wiring board and the semiconductor chip is injected, the resin that protrudes from the semiconductor chip mounting area flows into the peripheral area of the bottom surface of the recess that is lower than the semiconductor chip mounting area. However, the protruding resin is not connected to the side wall of the convex part above the surface of the semiconductor chip mounting area, and the thermal stress applied to the protruding electrode increases in the thermal shock test. Not, it is possible to eliminate the connection failure due to thermal stress increases. Therefore, even if the distance between the semiconductor chip and the convex portion is narrowed, no problem occurs in the thermal shock test, and the semiconductor device can be miniaturized.

(First embodiment)
A first embodiment of the present invention will be described with reference to the drawings. The semiconductor device in this embodiment has an MCM structure, and is shown in the cross-sectional view of FIG.

  The difference from the conventional MCM structure in this embodiment is that the surface height of the region where the semiconductor chip A1 is mounted and the region where the semiconductor chip B2 is mounted is made higher than the surface height of the region 21 where no semiconductor chip is mounted. The wiring board 6 is used. For this purpose, the substrate thickness 18 in the region where the semiconductor chip A1 is mounted and the substrate thickness 19 in the region where the semiconductor chip B2 is mounted are made thicker than the substrate thickness 20 in the region 21 where no semiconductor chip is mounted.

  A method for manufacturing the semiconductor device of this embodiment will be described with reference to FIGS.

  As shown in FIG. 1A, the protruding electrodes 4 are formed on the external electrodes 3 of the semiconductor chip A1 and the semiconductor chip B2. For example, an SBB (stud bump) method is a typical method for forming a gold bump as the protruding electrode 4 on the aluminum pad as the external electrode 3.

  Next, as shown in FIG. 1B, a conductive adhesive 5 is applied to the protruding electrodes 4 of the semiconductor chip A1 and the semiconductor chip B2. At this time, the semiconductor chip A1 and the semiconductor chip B2 are inverted so that the formation surface of the protruding electrode 4 is downward, the tip portion of the protruding electrode 4 is immersed in the conductive paste tank, and the conductive adhesive 5 is transferred. The method is usually used.

  Next, as shown in FIG. 1C, the wiring substrate 6 faces the semiconductor chip A <b> 1 and the semiconductor chip B <b> 2, and the protruding electrode 4 is bonded to the wiring pattern 7 on the wiring substrate 6. At this time, the substrate thickness 18 in the region where the semiconductor chip A1 is mounted and the substrate thickness 19 in the region where the semiconductor chip B2 is mounted are larger than the substrate thickness 20 in the region where the semiconductor chip is not mounted. As the wiring substrate 6, a ceramic multilayer substrate is usually used. The minimum thickness of the layers constituting the ceramic multilayer substrate is usually 0.1 mm. Therefore, the substrate thickness 18 in the region where the semiconductor chip A1 is mounted and the substrate thickness 19 in the region where the semiconductor chip B2 is mounted are 0.1 mm, 0. The thickness can be increased by a multiple of 0.1 mm, such as 2 mm and 0.3 mm.

  Next, as shown in FIG. 2, the resin 8 is injected from the side surfaces of the semiconductor chip A1 and the semiconductor chip B2, and the resin 8 is completely filled in the gap between the semiconductor chip A1 and the wiring board 6 and the gap between the semiconductor chip B2 and the wiring board 6. Thereafter, the resin 8 is thermally cured. At this time, since the substrate thickness 18 of the region where the semiconductor chip A1 is mounted is thicker than the substrate thickness 20 of the region 21 where the semiconductor chip is not mounted, the resin 8 protruding from the semiconductor chip A1 is the region 21 where the semiconductor chip is not mounted. Spills up. Similarly, since the substrate thickness 19 of the region where the semiconductor chip B2 is mounted is thicker than the substrate thickness 20 of the region 21 where the semiconductor chip is not mounted, the resin 8 protruding from the semiconductor chip B2 is the region 21 where the semiconductor chip is not mounted. Spills up. Therefore, as shown in FIG. 8B, the distance 11 between the semiconductor chip A1 and the semiconductor chip B2 is made shorter than the total length of the resin length 9 protruding from the semiconductor chip A1 and the resin length 10 protruding from the semiconductor chip B2. However, in the present embodiment, the resin 8 protruding from the semiconductor chip A1 and the resin 8 protruding from the semiconductor chip B2 are not connected above the surface of the semiconductor chip mounting region of the wiring board 6. Therefore, even in the thermal shock test, the thermal stress applied to the protruding electrode 4 does not increase, and connection failure does not occur.

  In the conventional MCM structure, the distance 11 between the semiconductor chip A1 and the semiconductor chip B2 needs to be 1.0 mm or more. On the other hand, in the present embodiment, the substrate thickness 18 in the region on which the semiconductor chip A1 is mounted and the substrate thickness 19 in the region on which the semiconductor chip B2 is mounted are determined from the substrate thickness 20 in the region 21 on which the semiconductor chip is not mounted. By increasing the thickness by a multiple of 0.1 mm, the distance 11 between the semiconductor chip A1 and the semiconductor chip B2 can be brought close to about 0.4 mm. This 0.4 mm is a total of the positional accuracy of the ceramic substrate layers on which two adjacent semiconductor chips are mounted because the layer bonding positional accuracy of the ceramic multilayer substrate is about 0.2 mm.

  As described above, according to the present embodiment, in the MCM structure, even if the distance between the adjacent semiconductor chip A1 and the semiconductor chip B2 is narrow, connection failure due to an increase in thermal stress applied to the protruding electrode 4 in the thermal shock test is eliminated. It becomes possible. Therefore, the size of the package can be reduced, or the mounting density of semiconductor chips in one package can be increased.

  In the present embodiment, an example in which two semiconductor chips are mounted on the wiring board 6 has been described. However, three or more semiconductor chips may be mounted, and the effect of the present invention can be obtained when a plurality of semiconductor chips are mounted.

(Second Embodiment)
A second embodiment of the present invention will be described with reference to the drawings. The semiconductor device in the present embodiment has a package structure having a concave cavity, and is shown, for example, in the cross-sectional view of FIG.

  The difference from the conventional package structure having a concave cavity in the present embodiment is that the surface height of the area on which the semiconductor chip 12 is mounted on the bottom surface of the concave cavity 13 is the area 21 on which the surrounding semiconductor chip is not mounted. That is, the wiring board 6 having a height higher than the surface height is used. Therefore, the substrate thickness 22 in the region where the semiconductor chip 12 is mounted is made thicker than the substrate thickness 20 in the region 21 where the semiconductor chip is not mounted.

  A method for manufacturing the semiconductor device of this embodiment will be described with reference to FIGS.

  As shown in FIG. 3A, the protruding electrode 4 is formed on the external electrode 3 of the semiconductor chip 12.

  Next, as shown in FIG. 3B, a conductive adhesive 5 is applied to the protruding electrodes 4 of the semiconductor chip 12.

  Next, as shown in FIG. 3C, the concave cavity 13 of the wiring substrate 6 and the semiconductor chip 12 face each other, and the protruding electrode 4 is bonded to the wiring pattern 7. In the cavity 13, the substrate thickness 22 in the region where the semiconductor chip 12 is mounted is thicker than the substrate thickness 20 in the region where the semiconductor chip is not mounted. As the wiring substrate 6, a ceramic multilayer substrate is usually used.

  Next, as shown in FIG. 4, the resin 8 is injected from the side surface of the semiconductor chip 12, filled in the gap between the semiconductor chip 12 and the bottom surface of the cavity 13, and the filled resin 8 is thermally cured. At this time, in the cavity 13, the substrate thickness 22 in the region where the semiconductor chip is mounted is thicker than the substrate thickness 20 in the region where the semiconductor chip is not mounted, so that the resin 8 protruding from the semiconductor chip 12 21 flows out. Therefore, even if the distance 15 between the semiconductor chip 12 and the side wall 16 of the cavity is a short distance, the resin 8 protruding from the semiconductor chip 12 is above the surface of the semiconductor chip mounting area of the cavity side wall 16 and the wiring substrate 6. , Never connected. Therefore, even in the thermal shock test, the thermal stress applied to the protruding electrode 4 does not increase, and connection failure does not occur.

  In the conventional cavity structure package, the distance 15 between the semiconductor chip and the sidewall of the cavity needs to be 0.5 mm or more. On the other hand, in this embodiment, the substrate thickness 22 in the region where the semiconductor chip is mounted is increased by a multiple of 0.1 mm from the substrate thickness 20 in the region where the semiconductor chip is not mounted. The distance 15 between the sidewalls of the cavity can be as close as about 0.2 mm. This 0.2 mm is due to the fact that the layer lamination position accuracy of the ceramic multilayer substrate is about 0.2 mm.

  Next, as shown in FIG. 5, the electronic component 17 is connected to the wiring pattern 7 formed on the surface opposite to the cavity 13 of the wiring board 6 to complete the assembly of the cavity structure package. The method of connecting the electronic component 17 to the wiring board 6 is soldering, flip chip, or the like. An input / output terminal 23 is formed on the outer peripheral convex portion of the cavity 13, and a part of the external electrode 3 of the semiconductor chip 12 and a part of the electronic component 17 are electrically connected in the wiring substrate 6. It is drawn out to the input / output terminal 23. When the distance 15 between the side wall of the semiconductor chip and the cavity is made close to about 0.25 mm, the outer peripheral convex portion (side wall) of the cavity 13 becomes an obstacle, and the resin 8 cannot be injected into the side surface of the semiconductor chip 12. Although a problem arises, this can be solved by adopting a structure in which the outer peripheral convex portion of the cavity 13 is installed only in, for example, three sides of the semiconductor chip 12.

  Further, as shown in FIG. 6, the cavity structure package assembled in the above-described process is used as an electronic device in a state where the input / output terminals 23 are mounted on the mother board 24 by soldering or the like.

  As described above, according to the present embodiment, in a package structure having a concave cavity, even if the distance 15 between the semiconductor chip and the sidewall of the cavity is narrowed, the connection due to an increase in thermal stress applied to the protruding electrode 4 in the thermal shock test. Defects can be eliminated. Therefore, the package can be reduced in size.

  INDUSTRIAL APPLICABILITY The present invention is useful as a semiconductor device having an MCM structure or a package structure having a concave cavity, a manufacturing method thereof, and the like.

Sectional drawing of the manufacturing process of the semiconductor device in the 1st Embodiment of this invention Sectional drawing of the manufacturing process of the semiconductor device in the 1st Embodiment of this invention Sectional drawing of the manufacturing process of the semiconductor device in the 2nd Embodiment of this invention Sectional drawing of the manufacturing process of the semiconductor device in the 2nd Embodiment of this invention Sectional drawing of the manufacturing process of the semiconductor device in the 2nd Embodiment of this invention Sectional drawing of the manufacturing process of the semiconductor device in the 2nd Embodiment of this invention Cross-sectional view of the manufacturing process of a conventional MCM structure semiconductor device Cross-sectional view of the manufacturing process of a conventional MCM structure semiconductor device Cross-sectional view of the manufacturing process of a semiconductor device with a conventional cavity structure package Cross-sectional view of the manufacturing process of a semiconductor device with a conventional cavity structure package Cross-sectional view of the manufacturing process of a semiconductor device with a conventional cavity structure package

Explanation of symbols

1 Semiconductor chip A
2 Semiconductor chip B
3 External electrode 4 Protruding electrode 5 Conductive adhesive 6 Wiring substrate 7 Wiring pattern 8 Resin 9 Resin length protruding from semiconductor chip A 10 Resin length protruding from semiconductor chip B 11 Distance between semiconductor chip A and semiconductor chip B 12 Semiconductor chip 13 Cavity 14 Resin length protruding from the semiconductor chip 15 Distance between the side wall of the semiconductor chip and the cavity 16 Side wall of the cavity 17 Electronic component 18 Substrate thickness of the area where the semiconductor chip A is mounted 19 Area where the semiconductor chip B is mounted Substrate Thickness 20 Substrate Thickness 21 in No Semiconductor Chip Mounting Area 21 Semiconductor Chip No Mounting Area 22 Semiconductor Chip Mounting Area Substrate Thickness 23 Input / Output Terminals 24 Motherboard

Claims (4)

The first of the wiring boards having a first semiconductor chip mounting region having a first wiring electrode formed on one surface and a second semiconductor chip mounting region having a second wiring electrode formed at an interval. The wiring electrode and the electrode of the first semiconductor chip are electrically connected via the first protruding electrode, and the second wiring electrode of the wiring substrate and the electrode of the second semiconductor chip are the second protruding. Electrically connected via an electrode, filled with a first resin between the wiring substrate and the first semiconductor chip, and a second resin between the wiring substrate and the second semiconductor chip; A semiconductor device filled with
The surface height of the first semiconductor chip mounting region and the second semiconductor chip mounting region on the one surface side of the wiring board is defined as a region excluding the first semiconductor chip mounting region and the second semiconductor chip mounting region. A semiconductor device characterized by being higher than the surface height of the semiconductor device. The wiring electrode of the wiring substrate having a semiconductor chip mounting region in which a concave portion is formed on one surface and a wiring electrode is formed in the center of the bottom surface of the concave portion is electrically connected to the electrode of the semiconductor chip via a protruding electrode. In addition, a resin is filled between the wiring board and the semiconductor chip, and an input / output terminal electrically connected to the wiring electrode is formed on the front end surface of the convex portion surrounding the bottom surface of the concave portion of the wiring board. A semiconductor device,
The surface height of the semiconductor chip mounting region at the center of the bottom surface of the concave portion of the wiring board on the one surface side is made higher than the surface height of the peripheral portion of the bottom surface of the concave portion excluding the semiconductor chip mounting region. A semiconductor device. A first semiconductor chip mounting region in which a first wiring electrode is formed on one surface and a second semiconductor chip mounting region in which a second wiring electrode is formed are spaced apart from each other on the one surface side. A wiring board in which the surface height of the first semiconductor chip mounting region and the second semiconductor chip mounting region is higher than the surface height of the region excluding the first semiconductor chip mounting region and the second semiconductor chip mounting region. A process of preparing
The first wiring electrode of the wiring board and the electrode of the first semiconductor chip are electrically connected via a first protruding electrode, and the second wiring electrode of the wiring board and the second semiconductor chip are connected. Electrically connecting the electrodes to each other via a second protruding electrode;
A step of injecting a first resin between the wiring substrate and the first semiconductor chip and injecting a second resin between the wiring substrate and the second semiconductor chip. Production method. A concave portion is formed on one surface, and a semiconductor chip mounting region having a wiring electrode formed at the center of the bottom surface of the concave portion is electrically connected to the wiring electrode at the tip surface of the convex portion surrounding the bottom surface of the concave portion. The surface height of the semiconductor chip mounting region at the center of the bottom surface of the concave portion of the wiring board on the one surface side is defined as the surface of the peripheral portion of the bottom surface of the concave portion excluding the semiconductor chip mounting region. Preparing a wiring board higher than the height;
Electrically connecting the wiring electrode of the wiring board and the electrode of the semiconductor chip via a protruding electrode;
A method for manufacturing a semiconductor device, comprising: injecting a resin between the wiring substrate and the semiconductor chip.

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