JP2005166887A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device for suppressing occurrence of corrosion by removing a resist and a reaction product, and to provide the semiconductor device. <P>SOLUTION: The method for manufacturing the semiconductor device is provided with a process for forming the resist film of a prescribed pattern on a metal film formed on a semiconductor substrate, a process for dry-etching the metal film by a gas containing a fluorine-based gas and forming a wiring layer of the prescribed pattern, a process for making semiconductor substrate temperature formed on the wiring layer 144-250°C, and a process for performing ashing by the gas containing at least the fluorine-based gas and exposing the wiring layer. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device and a semiconductor manufacturing apparatus that improve the yield particularly in a metal etching process.

  In general, the formation of a wiring layer in a semiconductor device manufacturing process is performed as follows.

  For example, using a multi-chamber semiconductor manufacturing apparatus as shown in FIG. 5, a resist pattern is formed on the metal film of the semiconductor substrate 101 in which an element region is formed and a metal layer is formed via an insulating film, and then etched. In the chamber 103, dry etching is performed using a chlorine-based gas to form a wiring pattern.

  At this time, if the etched semiconductor substrate is exposed to the atmosphere as it is, the etching gas reacts with moisture in the atmosphere to generate metal corrosion. The

Then, in the post-processing chamber 104 heated to 250 ° C. by a lamp (not shown), resist or etching is performed by H ₂ O vapor and O ₂ , N ₂ gas radicalized by microwaves (2.45 GHz). The reaction product (side wall) and the like that are sometimes generated are removed (ashed), and the wiring layer is exposed.

  In recent years, with an increase in current of an element, an element having an increased wiring thickness and wiring width is required. However, for example, when the thickness of an Al wiring composed of an Al—Si—Cu film or the like is 3 μm or more, the time required for etching with a chlorine-based gas becomes longer, and the amount of reaction products generated also increases. Furthermore, in order to increase the wiring width, the resist area needs to be increased from, for example, 20-30% to 50-80%, and the amount of resist increases, which makes it difficult to remove by ashing. there were.

  Therefore, an attempt was made to extend the ashing time in the post-processing chamber, but the wiring patterned on the insulating film 101b as shown in the top view in FIG. The resist 101d on the layer 101c and the reaction product (not shown) formed on the side wall of the wiring layer cannot be completely removed, and at the same time, a large amount of corrosion 107 is removed by residual chlorine. It occurred.

  Therefore, the present invention provides a semiconductor device manufacturing method and a semiconductor manufacturing apparatus capable of eliminating conventional problems, completely removing resists and reaction products, suppressing the occurrence of corrosion, and improving yield and quality. It is intended to provide.

  According to one embodiment of the present invention, a resist film having a predetermined pattern is formed on a metal film formed on a semiconductor substrate, and the metal film is dry-etched with a gas containing a chlorine-based gas, A step of forming a wiring layer of a pattern, a step of setting the temperature of the semiconductor substrate on which the wiring layer is formed to 150 to 250 ° C., and ashing with a gas containing at least a fluorine-based gas to expose the wiring layer There is provided a method of manufacturing a semiconductor device comprising the step of:

  According to another aspect of the present invention, means for placing a semiconductor substrate having a resist film with a predetermined pattern on a metal film without exposing to the atmosphere, and a gas containing a chlorine-based gas on the semiconductor substrate. There is provided a semiconductor manufacturing apparatus comprising: means for supplying; means for setting the semiconductor substrate temperature to 150 to 250 ° C .; and means for supplying a gas containing fluorine gas on the semiconductor substrate.

  According to one embodiment of the present invention, there is provided a semiconductor device manufacturing method and a semiconductor manufacturing apparatus capable of completely removing a resist and a reaction product and suppressing the occurrence of corrosion to improve yield and quality. Can do.

  Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1)
FIG. 1 is a conceptual diagram of a semiconductor manufacturing apparatus according to an embodiment of the present invention. As shown in the figure, a load lock chamber 2, 2 ′, an etching chamber 3, a post-processing chamber (asher) 4 in which a semiconductor wafer 1 is set during loading and unloading, and a substrate transfer chamber 5 for transferring a substrate to each chamber. It is a multi-chamber system composed of The post-processing chamber 4 is provided with an N ₂ supply line 6 for supplying Hot N ₂ . Each chamber is maintained at a high vacuum by a vacuum pump (not shown).

  With such a semiconductor manufacturing apparatus, a wiring layer in the semiconductor device is formed as follows.

First, as shown in FIG. 2, an insulating layer 1b such as TEOS or BPSG is formed on a semiconductor wafer 1a in which an element region (not shown) is formed, and a barrier metal layer having a thickness of 3 to 5 μm. A metal layer 1c composed of an Al—Si—Cu film, an antireflection film or the like is formed. Then, a resist pattern 1d having a resist area of 50 to 80% is formed by ordinary lithography. A semiconductor wafer 1 on which a resist pattern is formed is set in a load lock chamber 2 of a semiconductor manufacturing apparatus shown in FIG. The loaded semiconductor wafer 1 is transferred to the etching chamber 3 and uses a chlorine-based gas of the gas species Cl ₂ / BCl ₃ to generate high-density plasma, for example, by ICP (Inductively Coupled Plasma) method, and apply a bias. By pulling to the wafer side, dry etching proceeds and the wiring layer 1c ′ is patterned. At this time, the reaction product 7 is formed on the side wall of the wiring layer 1c ′, and chlorine also remains.

Next, the semiconductor wafer 1 on which the wiring layer is formed is transferred to the post-processing chamber 4 and subjected to post-processing. First, from the _{N 2} supply line 6, the _N 2 heated to _{150~250 ℃ (Hot N 2),} 30sec supplied with 500～1000Sccm. Then, ashing is performed by adding a fluorine-based gas such as CF ₄ or CHF ₃ together with H ₂ O vapor and O ₂ and N ₂ gas radicalized by a normal microwave (2.45 GHz). Further, as in the prior art, after being exposed to the atmosphere, wet treatment and ashing are performed with a stripping solution or the like to remove the resist and reaction products during etching, and a wiring layer is formed as shown in FIG.

In this way, after etching and before the post-treatment process, the supply of Hot N ₂ into the post-treatment chamber and the wafer temperature is made higher than the critical temperature (144 ° C.) of the chlorine residue, so that the residual chlorine Things can be vaporized and removed. In the post-treatment process, the resist and the reaction product can be completely removed by introducing the fluorine-based gas together with the normal gas. Furthermore, the occurrence of corrosion within a period of 24 hours has not been observed in the past, which frequently occurred at the same time as the atmosphere was released.

  As described above, at the time of forming the wiring layer, the resist and reaction products can be completely removed and the occurrence of corrosion can be suppressed. Therefore, the yield and quality in a semiconductor device including such a wiring layer can be improved. It becomes possible.

(Embodiment 2)
FIG. 4 is a conceptual diagram of a semiconductor manufacturing apparatus according to an embodiment of the present invention. The semiconductor manufacturing apparatus in the present embodiment is substantially the same as that in the first embodiment, but an N ₂ supply line 16 for supplying Hot N ₂ to the etching chamber 13 is provided, and no post-processing chamber (asher) is provided. It is different in point.

  With such a semiconductor manufacturing apparatus, a wiring layer in the semiconductor device is formed as follows.

First, as in the first embodiment, a semiconductor wafer 11 having a resist pattern formed on a metal layer is set and carried into a load lock chamber 12 of a semiconductor manufacturing apparatus shown in FIG. The loaded semiconductor wafer 11 is transported to the etching chamber 13, and dry etching is performed in the same manner as in the first embodiment using a gas obtained by adding 5 sccm or more of CHF ₃ to the chlorine gas of the gas species Cl ₂ / BCl _3. The wiring layer is patterned.

Next, before the semiconductor wafer 11 is carried out, N ₂ (Hot N ₂ ) heated to 150 to 250 ° C. is supplied from the N ₂ supply line 16 at 500 to 1000 sccm for 30 seconds. Then, as in the prior art, after being opened to the atmosphere, wet treatment and ashing are performed with a stripping solution or the like to remove the resist and reaction products during etching, thereby forming a wiring layer.

Thus, by introducing the fluorine-based gas together with the normal gas at the time of etching, the formation of the reaction product on the side wall can be suppressed. After etching, before carrying out the wafer, Hot N ₂ is supplied into the etching chamber, and the wafer temperature is set higher than the critical temperature of the chlorine residue (144 ° C.), so that not only on the wafer but also inside the chamber. The chlorine residue can be removed. As described above, since the chlorine residue inside the chamber can be removed, the cleaning frequency of the chamber can be suppressed. Further, in a multi-chamber semiconductor manufacturing apparatus, a post-processing chamber can be eliminated. Further, as in the first embodiment, the occurrence of corrosion within 24 hours is not recognized.

  As described above, since the resist and reaction products can be completely removed and the occurrence of corrosion can be suppressed during the formation of the wiring layer as in the first embodiment, the yield in a semiconductor device including such a wiring layer can be reduced. It becomes possible to improve the quality.

These In embodiment has been supplied Hot _{N 2} was heated with _{N 2} 150 to 250 ° C., the wafer temperature has only to become 250 ° C. or less beyond 144 ° C.. Considering the behavior and temperature controllability of the chlorine residue, it is necessary that the chlorine residue is removed at a higher temperature than the critical temperature, for example, 150 ° C. or higher, in order to remove the chlorine residue with high productivity. On the other hand, when the temperature exceeds 250 ° C., the resist is cured, and peeling becomes difficult.

Further, if the chamber side wall temperature is, for example, around 250 ° C., even if N ₂ at room temperature is introduced, the wafer temperature can be made higher than the critical temperature (144 ° C.) of the chlorine residue, Although not specified, Hot N ₂ is preferably supplied in consideration of the time lag until the wafer temperature rises.

  In addition, this invention is not limited to embodiment mentioned above. Various other modifications can be made without departing from the scope of the invention.

1 is a conceptual diagram of a semiconductor manufacturing apparatus in one embodiment of the present invention. 4A and 4B illustrate a step of forming a wiring layer of a semiconductor device in one embodiment of the present invention. 4A and 4B illustrate a step of forming a wiring layer of a semiconductor device in one embodiment of the present invention. 1 is a conceptual diagram of a semiconductor manufacturing apparatus in one embodiment of the present invention. The figure which shows the conventional semiconductor manufacturing apparatus. The top view which shows the problem of the formation process of the wiring layer of the conventional semiconductor device. Sectional drawing which shows the problem of the formation process of the wiring layer of the conventional semiconductor device.

Explanation of symbols

1 , 11 , 101 Semiconductor wafer 2, 2 ′ 12, 12 ′, 102, 102 ′ Load lock chamber 3, 13, 103 Etching chamber 4, 104 Post-processing chamber 5, 15, 105 Substrate transfer chamber 6, 16 N ₂ supply Line 7 Reaction product 107 Corrosion

Claims (7)

Forming a resist film having a predetermined pattern on the metal film formed on the semiconductor substrate;
A step of dry etching the metal film with a gas containing a chlorine-based gas to form a wiring layer having a predetermined pattern;
The temperature of the semiconductor substrate on which the wiring layer is formed exceeds 144 ° C. and 250 ° C. or less;
A method of manufacturing a semiconductor device comprising a step of performing ashing with a gas containing at least a fluorine-based gas to expose the wiring layer. The step of setting the semiconductor substrate temperature to more than 144 ° C. and not more than 250 ° C.
2. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of supplying a gas having a temperature exceeding 144 ° C. and not exceeding 250 ° C. to the surface of the semiconductor substrate. _{3. The} method for manufacturing a semiconductor device according to claim ₂ , wherein the gas is N ₂ gas.   4. The method of manufacturing a semiconductor device according to claim 1, wherein the metal film has a thickness of 3 to 5 [mu] m.   5. The method of manufacturing a semiconductor device according to claim 1, wherein the resist film having a predetermined pattern occupies 50 to 80% of the area of the semiconductor substrate. Means for placing a semiconductor substrate having a resist film of a predetermined pattern on a metal film without exposure to the atmosphere;
Means for supplying a gas containing a chlorine-based gas on the semiconductor substrate;
Means for setting the semiconductor substrate temperature to more than 144 ° C. and not more than 250 ° C .;
A semiconductor manufacturing apparatus comprising means for supplying a gas containing fluorine gas on the semiconductor substrate. In the means for setting the surface temperature of the semiconductor substrate to more than 144 ° C. and not more than 250 ° C.,
The semiconductor manufacturing apparatus according to claim 6, further comprising means for supplying a gas to the surface of the semiconductor substrate.

Images