JP2005142334A - Premolding type semiconductor package and semiconductor device using same - Google Patents

Premolding type semiconductor package and semiconductor device using same Download PDF

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JP2005142334A
JP2005142334A JP2003376711A JP2003376711A JP2005142334A JP 2005142334 A JP2005142334 A JP 2005142334A JP 2003376711 A JP2003376711 A JP 2003376711A JP 2003376711 A JP2003376711 A JP 2003376711A JP 2005142334 A JP2005142334 A JP 2005142334A
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lead
resin
semiconductor chip
chip mounting
bonding
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Michiaki Kita
道明 北
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Mitsui High Tec Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Abstract

<P>PROBLEM TO BE SOLVED: To provide a premolding type semiconductor package which has no poor resin sealing of leads such as resin peeling nor tilt of the leads and therefore has an excellent positional accuracy of the leads at the time of wire bonding, and to provide a semiconductor device using the same. <P>SOLUTION: In the premold type semiconductor package 11, a plurality of leads 13 formed around a semiconductor chip mounting section 12 are resin-sealed except for the top face on the semiconductor chip mounting section side, and a hollow part 18 is formed above the top face of the leads 13 which is not resin-sealed and above the semiconductor chip mounting section 12. In the semiconductor device 10 using the semiconductor package 11, ends of the leads 13 whose top faces are not resin-sealed are bent and embedded in sealing resin 19, and bonding sections 20 are formed on the top faces of the leads 13 which are not resin-sealed. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、例えばCCD等の撮像素子等の半導体チップを収納するプリモールド型の半導体パッケージ及びこれを用いた半導体装置に関する。 The present invention relates to a pre-molded semiconductor package that houses a semiconductor chip such as an image sensor such as a CCD, and a semiconductor device using the same.

光学装置に用いられる半導体チップとして、例えば撮像素子等の光素子(例えば、CCD)がある。この光素子は、テレビカメラやデジタルカメラにおいて、レンズを介して形成された光信号の像を電気信号に変換する。
図5に示すように光素子50を搭載した半導体装置51は、中空の半導体パッケージ(即ち、プリモールド型の半導体パッケージ)52を用いて形成され、光素子50が中空部53の下方に位置し、リード54はパッド側(即ち、パッケージ内側)の上面が封止樹脂55から露出し、側面と底面が樹脂封止され、半導体チップ搭載部56に搭載された光素子50の電極パッド部57とリード54上面のコイニング箇所(ボンディング部)58が、金線(ボンディングワイヤ)59によってワイヤボンディングされている。なお、図5において、60はリッド(密閉蓋)を、61は放熱板をそれぞれ示す。
また、特許文献1にも、プリモールド型の半導体パッケージが開示され、中空部内に突出するリードの先端を押し曲げて、キャビティを形成する金型に押しつけ、リードの露出部分に形成されるボンディング部に樹脂が回り込むのを防止する技術が開示されている。
As a semiconductor chip used in an optical device, for example, there is an optical element (for example, CCD) such as an imaging element. This optical element converts an image of an optical signal formed through a lens into an electric signal in a television camera or a digital camera.
As shown in FIG. 5, the semiconductor device 51 on which the optical element 50 is mounted is formed using a hollow semiconductor package (that is, a pre-molded semiconductor package) 52, and the optical element 50 is positioned below the hollow portion 53. The lead 54 has an upper surface exposed from the sealing resin 55 on the pad side (that is, the inside of the package), a side surface and a bottom surface are resin-sealed, and the electrode pad portion 57 of the optical element 50 mounted on the semiconductor chip mounting portion 56. A coining portion (bonding portion) 58 on the upper surface of the lead 54 is wire-bonded by a gold wire (bonding wire) 59. In FIG. 5, 60 indicates a lid (sealing lid), and 61 indicates a heat sink.
Also, Patent Document 1 discloses a pre-mold type semiconductor package, in which a tip of a lead protruding into a hollow portion is pressed and bent, pressed against a mold forming a cavity, and a bonding portion formed on an exposed portion of the lead A technique for preventing the resin from wrapping around is disclosed.

特開平11−126785号公報(図1、図4)JP 11-126785 A (FIGS. 1 and 4)

ところが、図5に示す半導体装置51においては、リード54の上面が封止樹脂55より露出するようモールド金型に当接して樹脂封止されるが、リード54上面側に封止樹脂55が漏れ、該上面に封止樹脂55の一部が付着し、ワイヤボンディングが困難になるので、ボンディング箇所上の樹脂を除去せねばならない等の問題がある。
以上の問題は、特許文献1に記載されたプリモールド型の半導体パッケージにおいては一応の解決がなされている。
However, in the semiconductor device 51 shown in FIG. 5, the lead 54 abuts against the mold so that the upper surface of the lead 54 is exposed from the sealing resin 55 and is resin-sealed, but the sealing resin 55 leaks to the upper surface side of the lead 54. Since a part of the sealing resin 55 adheres to the upper surface and wire bonding becomes difficult, there is a problem that the resin on the bonding portion must be removed.
The above problems have been temporarily solved in the pre-molded semiconductor package described in Patent Document 1.

しかしながら、特許文献1記載のプリモールド型の半導体パッケージ、及び図5に示すプリモールド型の半導体パッケージ52においては、リードの上面がその先部まで封止樹脂より露出しているので、封止樹脂との接合力が弱く樹脂剥がれや樹脂剥がれによるリードの傾きを生じる。これは半導体装置の信頼性を損ない、画像のゆらぎやブレを招く一因となる。
また、リードは細幅で、薄いことから機械的強度が弱く、樹脂封止の際に、先端側が左右方向(幅方向)にシフトすることがあり、ワイヤボンディングに際して位置精度が劣化する。
However, in the pre-molded semiconductor package described in Patent Document 1 and the pre-molded semiconductor package 52 shown in FIG. 5, the top surface of the lead is exposed from the sealing resin up to the tip thereof. Bonding strength with the resin is weak, and the resin is peeled off or the lead is inclined due to the resin peeling. This impairs the reliability of the semiconductor device and causes image fluctuation and blurring.
In addition, since the lead is thin and thin, its mechanical strength is weak, and the tip side may shift in the left-right direction (width direction) during resin sealing, which degrades the positional accuracy during wire bonding.

本発明は樹脂剥がれ等のリードの樹脂封止不良や、リードの傾きがなく、ワイヤボンディングに際してのリードの位置精度がすぐれ、また、樹脂がリードの上面にあるボンディング部に付着せずワイヤボンディングが信頼性よくなされる中空部を有したプリモールド型の半導体パッケージ及びこれを用いた半導体装置を提供することを目的とする。 In the present invention, there is no resin sealing failure such as resin peeling, and there is no inclination of the lead, the lead positional accuracy during wire bonding is excellent, and the resin does not adhere to the bonding portion on the upper surface of the lead and wire bonding is possible. It is an object of the present invention to provide a pre-molded semiconductor package having a hollow portion made with high reliability and a semiconductor device using the same.

前記目的に沿う請求項1記載のプリモールド型の半導体パッケージは、半導体チップ搭載部の周りに設けられた複数のリードが、半導体チップ搭載部側の上面を残して樹脂封止され、前記リード上面が樹脂封止されなかった上方と前記半導体チップ搭載部の上方に、中空部が形成されるプリモールド型の半導体パッケージにおいて、
前記上面が樹脂封止されなかったリードの先部は、屈曲されて封止樹脂内に埋まり込み、当該リードの樹脂封止されていない前記上面にボンディング部が施されている。
2. The premold type semiconductor package according to claim 1, wherein the plurality of leads provided around the semiconductor chip mounting portion are resin-sealed leaving the upper surface on the semiconductor chip mounting portion side, and the upper surface of the lead In a pre-molded type semiconductor package in which a hollow portion is formed above the portion not sealed with resin and above the semiconductor chip mounting portion,
The tip portion of the lead whose upper surface is not resin-sealed is bent and embedded in the sealing resin, and a bonding portion is provided on the upper surface of the lead which is not resin-sealed.

また、請求項2記載のプリモールド型の半導体パッケージは、請求項1記載のプリモールド型の半導体パッケージにおいて、前記封止樹脂内に埋まり込んだリードの先部の屈曲は段差状である。 The pre-molded semiconductor package according to claim 2 is the pre-molded semiconductor package according to claim 1, wherein the bending of the tip of the lead embedded in the sealing resin is stepped.

請求項3記載のプリモールド型の半導体パッケージは、請求項1及び2記載のプリモールド型の半導体パッケージにおいて、前記リードの樹脂封止されていない上面に施されたボンディング部は、周囲面よりスポット状(部分的)に低められ、又は周囲面よりスポット状に盛り上げられている。 The pre-molded semiconductor package according to claim 3 is the pre-molded semiconductor package according to claim 1 or 2, wherein the bonding portion applied to the upper surface of the lead that is not resin-sealed is a spot from the peripheral surface. (Partially) lowered or raised in a spot shape from the surrounding surface.

そして、請求項4記載の半導体装置は、半導体チップ搭載部と、該半導体チップ搭載部の周囲にその上面が露出して設けられた複数のリードとを中空部に有するプリモールド型のパッケージ本体と、
前記チップ搭載部上に配置される半導体チップと、
前記半導体チップの各電極端子と前記リードの露出部に形成されるボンディング部とを前記中空部内で連結するボンディングワイヤと、
前記パッケージ本体の密閉蓋とを有する半導体装置において、
前記リードの先部が屈曲して前記パッケージ本体の封止樹脂内に埋め込まれて、前記ボンディング部は、前記リードの中間位置に設けられている。
According to a fourth aspect of the present invention, there is provided a semiconductor device comprising: a pre-molded package main body having a semiconductor chip mounting portion and a plurality of leads provided with exposed upper surfaces around the semiconductor chip mounting portion; ,
A semiconductor chip disposed on the chip mounting portion;
A bonding wire for connecting each electrode terminal of the semiconductor chip and a bonding portion formed in the exposed portion of the lead in the hollow portion;
In the semiconductor device having a sealing lid of the package body,
The leading portion of the lead is bent and embedded in the sealing resin of the package body, and the bonding portion is provided at an intermediate position of the lead.

そして、請求項5記載の半導体装置は、請求項4記載の半導体装置において、前記ボンディング部は、周囲面よりスポット状に低められ、又は周囲面よりスポット状に盛り上げられている。 According to a fifth aspect of the present invention, in the semiconductor device according to the fourth aspect, the bonding portion is lowered in a spot shape from the peripheral surface or raised in a spot shape from the peripheral surface.

請求項1〜3記載のプリモールド型の半導体パッケージ及び請求項4、5記載の半導体装置においては、上面が封止樹脂から露出しているリードの先部は屈曲されているので、機械的強度が強められ、樹脂封止の際にリードは振らつかずシフトしない。また、前記屈曲された先部は封止樹脂内に埋まり込んで封止樹脂と強く接着し、樹脂剥がれが防止され、リードの傾きが発生せず、ワイヤボンディングに際しての位置精度がすぐれる。 In the pre-molded semiconductor package according to any one of claims 1 to 3 and the semiconductor device according to any one of claims 4 and 5, since the tip portion of the lead whose upper surface is exposed from the sealing resin is bent, the mechanical strength is increased. The lead does not shake during resin sealing and does not shift. Further, the bent tip portion is embedded in the sealing resin and strongly adhered to the sealing resin, the resin peeling is prevented, the inclination of the lead does not occur, and the positional accuracy in wire bonding is excellent.

特に、請求項2記載のプリモールド型の半導体パッケージにおいては、リードの先部が段差状となって、封止樹脂内に埋まり込んでいるので、前記のように機械的強度が増し、樹脂封止時に振らつくことがなくリード上面がモールド金型に当接するので、封止樹脂が付着せずワイヤボンディングを生産性よく行える。 In particular, in the pre-molded semiconductor package according to claim 2, since the tip portion of the lead is stepped and embedded in the sealing resin, the mechanical strength is increased as described above, and the resin sealing is performed. Since the upper surface of the lead is in contact with the mold without shaking when stopped, the sealing resin does not adhere and wire bonding can be performed with high productivity.

そして、請求項3記載のプリモールド型の半導体パッケージ及び請求項5記載の半導体装置においては、リード上面のボンディング部をコイニング等により他の面よりスポット状に低めていると、該スポット状の周囲が相対的に高い面となりモールド金型に当接するので、該箇所に封止樹脂が付着するようなことはなく、ワイヤボンディングの生産性及び信頼性がさらに向上する。
また、リード上面のボンディング部をエッチング等によりスポット状に他の面より盛り上げていると、該ボンディング部への封止樹脂の付着が防止され、この場合にも同様な効果がある。
In the pre-molded semiconductor package according to claim 3 and the semiconductor device according to claim 5, when the bonding portion on the upper surface of the lead is lowered in a spot shape from other surfaces by coining or the like, Becomes a relatively high surface and abuts against the mold, so that the sealing resin does not adhere to the portion, and the productivity and reliability of wire bonding are further improved.
Further, when the bonding portion on the upper surface of the lead is raised in a spot shape from other surfaces by etching or the like, adhesion of the sealing resin to the bonding portion is prevented, and in this case, the same effect is obtained.

続いて、添付した図面を参照しつつ、本発明を具体化した実施の形態につき説明し、本発明の理解に供する。
ここに、図1は本発明の第1の実施の形態に係る半導体装置の断面図、図2(A)は同半導体装置のリードの部分平面図、図2(B)は同リードの部分側断面図、図3はプリモールド型の半導体パッケージの製造工程の説明図、図4(A)は本発明の第2の実施の形態に係る半導体装置のリードの部分平面図、図4(B)は同リードの部分側断面図である。
Next, embodiments of the present invention will be described with reference to the accompanying drawings for understanding of the present invention.
1 is a sectional view of the semiconductor device according to the first embodiment of the present invention, FIG. 2A is a partial plan view of a lead of the semiconductor device, and FIG. 2B is a partial side of the lead. FIG. 3 is an explanatory view of a manufacturing process of a pre-mold type semiconductor package, FIG. 4 (A) is a partial plan view of a lead of a semiconductor device according to a second embodiment of the present invention, and FIG. 4 (B). FIG. 3 is a partial side sectional view of the lead.

図1〜図3に示す本発明の第1の実施の形態に係る半導体装置10及びこれに使用するプリモールド型の半導体パッケージ11について説明する。
図1に示すように、プリモールド型の半導体パッケージ11は、中央に半導体チップ搭載部12を備え、複数のリード13が内外を貫通するパッケージ本体14とその密閉蓋15とを有している。パッケージ本体14は平面視して矩形となって、底部16と底部16の周囲に一体的に立設されている側壁部17とを有し、リード13は底部16と側壁部17との中間部分を内外に貫通して配置されている。
A semiconductor device 10 according to a first embodiment of the present invention shown in FIGS. 1 to 3 and a premolded semiconductor package 11 used therefor will be described.
As shown in FIG. 1, a pre-molded semiconductor package 11 includes a semiconductor chip mounting portion 12 at the center, and has a package body 14 through which a plurality of leads 13 penetrate the inside and the outside and a sealing lid 15. The package main body 14 has a rectangular shape in plan view, and has a bottom portion 16 and a side wall portion 17 that stands integrally around the bottom portion 16, and the lead 13 is an intermediate portion between the bottom portion 16 and the side wall portion 17. Is arranged through the inside and outside.

半導体チップ搭載部12の周りに設けられた複数のリード13が半導体チップ搭載部側の上面を残して樹脂封止され、リード13の上面が樹脂封止されなかった上方と半導体チップ搭載部12の上方に、中空部18が形成されている。
上面が樹脂封止されなかったリード13の先部は、図2に示すように、段差状、この実施の形態ではクランク状に屈曲されて封止樹脂19内に埋まり込み、各リード13の樹脂封止されていない上面(露出部)にボンディング部20が設けられている。
A plurality of leads 13 provided around the semiconductor chip mounting part 12 are resin-sealed leaving the upper surface on the semiconductor chip mounting part side, and the upper surface of the lead 13 and the semiconductor chip mounting part 12 are not sealed. A hollow portion 18 is formed above.
As shown in FIG. 2, the tip portion of the lead 13 whose upper surface is not resin-sealed is bent into a step shape, in this embodiment a crank shape, and buried in the sealing resin 19, and the resin of each lead 13. A bonding portion 20 is provided on the upper surface (exposed portion) that is not sealed.

図2に示すように、ボンディング部20は、リード13の上面が中空部18に露出する部分で、より半導体チップ搭載部側(中間位置)に設けられ、この実施の形態では、平面視して周囲に堰21を有する四角形の窪みとなっている。周囲面よりスポット状に低められたこの窪みの深さは、僅少(例えば、リード13の厚みの1/50〜1/10)でよく、プレス加工によって形成されている。堰21を含むリード13の上面は極めて滑らかな平面となっている。 As shown in FIG. 2, the bonding portion 20 is a portion where the upper surface of the lead 13 is exposed to the hollow portion 18, and is provided closer to the semiconductor chip mounting portion side (intermediate position). It is a rectangular depression having a weir 21 around it. The depth of the recess lowered in a spot shape from the peripheral surface may be very small (for example, 1/50 to 1/10 of the thickness of the lead 13), and is formed by pressing. The upper surface of the lead 13 including the weir 21 is a very smooth flat surface.

半導体チップ搭載部12の上には、銀ペースト等の接着剤を介して半導体チップ(例えば、光素子)22が搭載され、半導体チップ22の上面に形成されているそれぞれの電極端子23とボンディング部20とは、ボンディングワイヤの一例である金細線24によって電気的結合がなされている。また、半導体チップ搭載部12の底面には、半導体チップ22から発生する熱を外部に逃がす放熱板25が設けられている。
パッケージ本体14の密閉蓋15は、この実施の形態では、透明のガラスからなって、中空部18に不活性ガスを充填した状態で、中空部18の密閉を図り、これによって半導体装置10が構成されている。
A semiconductor chip (for example, an optical element) 22 is mounted on the semiconductor chip mounting portion 12 via an adhesive such as silver paste, and each electrode terminal 23 and bonding portion formed on the upper surface of the semiconductor chip 22. 20 is electrically coupled by a gold wire 24 which is an example of a bonding wire. Further, on the bottom surface of the semiconductor chip mounting portion 12, a heat radiating plate 25 that releases heat generated from the semiconductor chip 22 to the outside is provided.
In this embodiment, the sealing lid 15 of the package body 14 is made of transparent glass, and the hollow portion 18 is sealed in a state in which the hollow portion 18 is filled with an inert gas, whereby the semiconductor device 10 is configured. Has been.

続いて、このプリモールド型の半導体パッケージ11の製造方法について、図3を参照しながら説明する。
モールド金型装置を構成する上型26と下型27でキャビティ(空間)28が形成されている。予め、底部に放熱板25が設けられた半導体チップ搭載部12と、その周囲に隙間を有して形成され、先部が段差状に屈曲した複数(多数)のリード13とを備え、リード13は、外側端が枠体に連結されたリードフレームをプレス加工又はエッチング加工等で作っておき、このリードフレームを上型26と下型27が挟んで密閉保持している。なお、半導体チップ搭載部12は図示しない複数のサポートバーによって、周囲の枠体に連結され、また、半導体チップ搭載部12の上面はボンディング部20の位置より下がっている。
Next, a method for manufacturing the pre-mold type semiconductor package 11 will be described with reference to FIG.
A cavity (space) 28 is formed by the upper mold 26 and the lower mold 27 constituting the mold apparatus. The lead 13 includes a semiconductor chip mounting portion 12 having a heat sink 25 provided at the bottom in advance, and a plurality (a large number) of leads 13 having a gap around the tip and bent in a stepped shape. In this case, a lead frame whose outer end is connected to the frame is made by pressing or etching, and the lead frame is sandwiched and held between the upper die 26 and the lower die 27. The semiconductor chip mounting portion 12 is connected to a surrounding frame by a plurality of support bars (not shown), and the upper surface of the semiconductor chip mounting portion 12 is lowered from the position of the bonding portion 20.

このリードフレームをモールド金型装置にセットする場合には、半導体チップ搭載部12の上面と、リード13のうち中空部18に露出する上面が、それぞれ上型26の天井面29、30に接している。特に、リード13のボンディング部20を形成する周囲の堰21が天井面30に密接し、窪んだボンディング部20への樹脂移動を防止し、これによって、ボンディング部20が樹脂等で汚れない清浄な面を確保できるようにしている。
以上の工程を経た後、樹脂注入口31から所定のエポキシ樹脂が充填されて、パッケージ本体14が形成される。この後、ボンディング部20には貴金属めっきの一例である金めっきがなされる。なお、この貴金属めっきは、リードフレームを製造した直後に行ってもよい。
When this lead frame is set in the mold apparatus, the upper surface of the semiconductor chip mounting portion 12 and the upper surface of the lead 13 exposed to the hollow portion 18 are in contact with the ceiling surfaces 29 and 30 of the upper die 26, respectively. Yes. In particular, the surrounding weir 21 that forms the bonding portion 20 of the lead 13 is in close contact with the ceiling surface 30 to prevent the resin from moving to the recessed bonding portion 20, thereby preventing the bonding portion 20 from being stained with resin or the like. The surface can be secured.
After the above steps, a predetermined epoxy resin is filled from the resin injection port 31 to form the package body 14. Thereafter, the bonding portion 20 is subjected to gold plating which is an example of noble metal plating. The noble metal plating may be performed immediately after the lead frame is manufactured.

続いて、図4を参照しながら、本発明の第2の実施の形態に係る半導体装置及びそのプリモールド型の半導体パッケージについて説明するが、第1の実施の形態と相違する部分は、リード13のボンディング部33のみである。
図4に示すように、この実施の形態においては、ボンディング部33は、その周囲からスポット状に極めて僅少の高さ(例えば、1〜5μm)の範囲で上方に突出し、しかも、突出部分は極めて滑らかな平面となっている。
Next, the semiconductor device and the premolded semiconductor package thereof according to the second embodiment of the present invention will be described with reference to FIG. 4. The difference from the first embodiment is the lead 13. Only the bonding part 33 of FIG.
As shown in FIG. 4, in this embodiment, the bonding portion 33 protrudes upward in a very small height (for example, 1 to 5 μm) from the periphery in the spot shape, and the protruding portion is extremely It is a smooth flat surface.

これによって、ボンディング部33が上型26の天井面30に確実に当接し、その部分に樹脂が侵入しないという効果を生じる。なお、貴金属めっきは、樹脂封止の後(又は前)に行うものとする。
ボンディング部33(ボンディング部20も同じ)が封止樹脂で汚れないので、掃除の必要がなくなり、製品の品質及び製造の効率が向上することになる。
As a result, the bonding portion 33 comes into contact with the ceiling surface 30 of the upper mold 26 with certainty, and the effect that the resin does not enter the portion is produced. In addition, precious metal plating shall be performed after (or before) resin sealing.
Since the bonding portion 33 (same as the bonding portion 20) is not contaminated with the sealing resin, it is not necessary to clean, and the product quality and the manufacturing efficiency are improved.

本発明は、前記した実施の形態に限定されるものではなく、本発明の要旨を変更しない範囲での改良や寸法変更も本発明の技術的範囲に含まれる。例えば、この実施の形態においては、リードフレーム内に半導体チップ搭載部12を設け、更に半導体チップ搭載部12の底に放熱板25を設けたが、これらを省略して、パッケージ本体の中央に半導体チップを搭載してもよい。またリード先部の屈曲の段差状はクランク状に限らず、封止樹脂との接合力を高める屈曲形状であればよい。 The present invention is not limited to the embodiments described above, and improvements and dimensional changes within the scope not changing the gist of the present invention are also included in the technical scope of the present invention. For example, in this embodiment, the semiconductor chip mounting portion 12 is provided in the lead frame, and the heat sink 25 is further provided on the bottom of the semiconductor chip mounting portion 12, but these are omitted and the semiconductor is mounted in the center of the package body. A chip may be mounted. The step shape of the bending of the lead tip is not limited to the crank shape, but may be any bent shape that enhances the bonding force with the sealing resin.

本発明の第1の実施の形態に係る半導体装置の断面図である。1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present invention. (A)は同半導体装置のリードの部分平面図、(B)は同リードの部分側断面図である。(A) is a partial plan view of the lead of the semiconductor device, and (B) is a partial sectional side view of the lead. プリモールド型の半導体パッケージの製造工程の説明図である。It is explanatory drawing of the manufacturing process of a premold type semiconductor package. (A)は本発明の第2の実施の形態に係る半導体装置のリードの部分平面図、(B)は同リードの部分側断面図である。(A) is a partial top view of the lead | read | reed of the semiconductor device which concerns on the 2nd Embodiment of this invention, (B) is a partial sectional side view of the lead | read | reed. 従来例に係る半導体装置の断面図である。It is sectional drawing of the semiconductor device which concerns on a prior art example.

符号の説明Explanation of symbols

10:半導体装置、11:プリモールド型の半導体パッケージ、12:半導体チップ搭載部、13:リード、14:パッケージ本体、15:密閉蓋、16:底部、17:側壁部、18:中空部、19:封止樹脂、20:ボンディング部、21:堰、22:半導体チップ、23:電極端子、24:金細線(ボンディングワイヤ)、25:放熱板、26:上型、27:下型、28:キャビティ、29、30:天井面、31:樹脂注入口、33:ボンディング部 DESCRIPTION OF SYMBOLS 10: Semiconductor device, 11: Premold type semiconductor package, 12: Semiconductor chip mounting part, 13: Lead, 14: Package main body, 15: Sealing lid, 16: Bottom part, 17: Side wall part, 18: Hollow part, 19 : Sealing resin, 20: bonding part, 21: weir, 22: semiconductor chip, 23: electrode terminal, 24: gold fine wire (bonding wire), 25: heat sink, 26: upper mold, 27: lower mold, 28: Cavity 29, 30: Ceiling surface, 31: Resin inlet, 33: Bonding part

Claims (5)

半導体チップ搭載部の周りに設けられた複数のリードが半導体チップ搭載部側の上面を残して樹脂封止され、前記リード上面が樹脂封止されなかった上方と前記半導体チップ搭載部の上方に、中空部が形成されるプリモールド型の半導体パッケージにおいて、
前記上面が樹脂封止されなかったリードの先部は、屈曲されて封止樹脂内に埋まり込み、当該リードの樹脂封止されていない前記上面にボンディング部が施されていることを特徴とするプリモールド型の半導体パッケージ。
A plurality of leads provided around the semiconductor chip mounting portion are resin-sealed leaving the upper surface on the semiconductor chip mounting portion side, above the lead upper surface of the semiconductor chip mounting portion and above the semiconductor chip mounting portion, In a pre-mold type semiconductor package in which a hollow portion is formed,
A tip portion of the lead whose upper surface is not resin-sealed is bent and embedded in a sealing resin, and a bonding portion is provided on the upper surface of the lead which is not resin-sealed. Pre-molded semiconductor package.
請求項1記載のプリモールド型の半導体パッケージにおいて、前記封止樹脂内に埋まり込んだリードの先部の屈曲は段差状であることを特徴とするプリモールド型の半導体パッケージ。 2. The pre-mold type semiconductor package according to claim 1, wherein the leading end of the lead embedded in the sealing resin is stepped. 請求項1及び2のいずれか1項に記載のプリモールド型の半導体パッケージにおいて、前記リードの樹脂封止されていない上面に施されたボンディング部は、周囲面よりスポット状に低められ、又は周囲面よりスポット状に盛り上げられていることを特徴とするプリモールド型の半導体パッケージ。 3. The pre-molded semiconductor package according to claim 1, wherein a bonding portion provided on an upper surface of the lead that is not resin-sealed is lowered in a spot shape from a peripheral surface, or a peripheral portion. A pre-molded semiconductor package characterized by being raised in a spot shape from the surface. 半導体チップ搭載部と、該半導体チップ搭載部の周囲にその上面が露出して設けられた複数のリードとを中空部に有するプリモールド型のパッケージ本体と、
前記チップ搭載部上に配置される半導体チップと、
前記半導体チップの各電極端子と前記リードの露出部に形成されるボンディング部とを前記中空部内で連結するボンディングワイヤと、
前記パッケージ本体の密閉蓋とを有する半導体装置において、
前記リードの先部が屈曲して前記パッケージ本体の封止樹脂内に埋め込まれて、前記ボンディング部は、前記リードの中間位置に設けられていることを特徴とする半導体装置。
A pre-molded package body having a semiconductor chip mounting portion and a plurality of leads provided with exposed upper surfaces around the semiconductor chip mounting portion in a hollow portion;
A semiconductor chip disposed on the chip mounting portion;
A bonding wire for connecting each electrode terminal of the semiconductor chip and a bonding portion formed in the exposed portion of the lead in the hollow portion;
In the semiconductor device having a sealing lid of the package body,
2. A semiconductor device according to claim 1, wherein a tip portion of the lead is bent and embedded in a sealing resin of the package body, and the bonding portion is provided at an intermediate position of the lead.
請求項4記載の半導体装置において、前記ボンディング部は、周囲面よりスポット状に低められ、又は周囲面よりスポット状に盛り上げられていることを特徴とする半導体装置。 5. The semiconductor device according to claim 4, wherein the bonding portion is lowered in a spot shape from the surrounding surface or raised in a spot shape from the surrounding surface.
JP2003376711A 2003-11-06 2003-11-06 Premolding type semiconductor package and semiconductor device using same Pending JP2005142334A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006332841A (en) * 2005-05-24 2006-12-07 Shimadzu Corp Image pickup device assembly
CN102509761A (en) * 2012-01-04 2012-06-20 日月光半导体制造股份有限公司 Chip package
JP2018022891A (en) * 2016-07-26 2018-02-08 コンチネンタル オートモーティブ システムズ インコーポレイテッドContinental Automotive Systems, Inc. Electronic controller including housing sealed by laser welding

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006332841A (en) * 2005-05-24 2006-12-07 Shimadzu Corp Image pickup device assembly
CN102509761A (en) * 2012-01-04 2012-06-20 日月光半导体制造股份有限公司 Chip package
JP2018022891A (en) * 2016-07-26 2018-02-08 コンチネンタル オートモーティブ システムズ インコーポレイテッドContinental Automotive Systems, Inc. Electronic controller including housing sealed by laser welding

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