JP2005130203A - Receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To resolve the problem that it is difficult to quickly and accurately perform a gain adjustment of reception signals of an OFDM (orthogonal frequency division multiplexing) modulation system giving a large signal level variation in a radio LAN or the like. <P>SOLUTION: A receiver has an RSSI circuit 20 and a coarse VGA (5I and 5Q), and the RSSI circuit 20 is a nonlinear conversion means which converts I and Q signals to signals having had output ranges nonlinearly compressed relatively to input ranges, and coarse VGA is a gain adjustment circuit which adjusts the gain of an inputted reception signal to a specific gain value G1 uniquely determined in accordance with signal levels of I and Q signals based on the output of the circuit 20. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a receiving apparatus that is used for, for example, a wireless LAN and performs gain control of a received signal at high speed and with high accuracy.

  In the communication field, generally, since the electric field strength of a received signal changes according to the distance between communication devices, the receiving device has a function of adjusting the amplification gain of the received signal. The most typical gain adjustment circuit used in communication equipment measures the input level or output level of a detector and feedback-controls the gain according to the measured level, thereby setting the input level of the detector to a target value. It is intended to operate. At this time, if the gain adjustment range is narrow, the transmission output is limited because the dynamic range of the receivable signal cannot be widened, or the quality of the received signal is degraded. Therefore, to prevent these problems, it is necessary to ensure a wide gain adjustment range.

In the field of mobile communication, since the receiving device moves between several cells while receiving radio waves, the electric field strength of the received signal changes from moment to moment. The change in the received electric field strength is more remarkable as the speed of the moving body (receiving apparatus) and the carrier frequency are higher. For this reason, particularly in high-frequency mobile communication, gain adjustment is required that is relatively fast and has a wide range in response to changes in the received electric field strength.
Furthermore, in fields such as wireless LANs, modulation schemes such as OFDM (Orthogonal Frequency Division Multiplexing) that are strong in complex multipath environments in the outdoors are used, and transmission data is correctly received by receivers of such modulation schemes. Therefore, it is required to perform gain adjustment over a wide range at a higher speed. In addition to this, communication using OFDM modulation requires high gain accuracy, that is, control of the received signal level with high accuracy.

In a receiving device using the OFDM modulation scheme, if the gain is changed in a certain received signal section, for example, in a data block in a packet, data of two gains are mixed in one packet, and the baseband processing in the subsequent stage As a result of the packet data output value of the AD converter input to the circuit being changed halfway, Fast Fourier Transform (FFT) cannot be performed correctly in the baseband processing circuit. Therefore, the gain adjustment process must be completed before the data block of the packet. Usually, a packet of an OFDM signal has a signal section (preamble) for synchronization prior to a data block, and gain adjustment needs to be performed using this preamble. However, in the case of a wireless LAN, for example, the preamble time is as short as 8 μs, and when the time required for establishing synchronization is excluded, the time that can be allocated for gain adjustment is at most about 4 μs at most.
In communication systems that require such high-speed gain adjustment, it is difficult to apply a gain adjustment method that performs feedback control while detecting the input level or output level of the detector as described above.

  The OFDM modulation scheme communication is a kind of multicarrier modulation scheme that carries data by being distributed over many subcarriers in a continuous frequency band. In general, compared with a single carrier received signal, a multicarrier received signal is a more complex multiplex of signals having different phases due to multipath effects. Due to this effect, and also the effect of frequently switching multiple antennas in space (or antenna) diversity, the OFDM received signal has a large fluctuation in signal level until it is synchronized and demodulated into one signal, Therefore, it is necessary to widen the input range of the received signal. In addition, due to large fluctuations in the received signal, an AD converter that quantizes the signal easily saturates, which may impair the linearity of the signal level that is important in OFDM demodulation.

  Therefore, a receiving apparatus has been proposed in which the received signal level is detected by dividing it into a plurality of ranges, and the received signal is attenuated in advance before gain adjustment in accordance with the detected range so that the AD converter is not saturated (for example, , See Patent Document 1).

However, in the technique described in Patent Document 1, when an excessive level received signal exceeding the input range of the IF level detector for detecting the received signal level is input, the received signal level is detected by the IF level detector. The range may not be determined.
Further, this is feedback control for determining the control amount for monitoring the output of the AD converter to obtain the final received signal level, and the response of gain control is poor due to time loss due to feedback. In addition, the gain control (coarse adjustment) according to the detection of the first input range is roughly 20 dB in three stages in the embodiment described in Patent Document 1, and in order to obtain high gain accuracy, the output of the AD converter is It is thought that it is necessary to increase the number of times feedback control is performed by monitoring. For the above reasons, the gain adjustment method described in Patent Document 1 is impossible to stably perform high-accuracy gain adjustment in a short time within 4 μs, for example, in OFDM signal reception processing.

Also, during the OFDM signal reception processing, the VCO oscillation signal in the mixer during quadrature detection leaks to the reception signal input end side, and further, due to the mismatch of the elements constituting each circuit, etc. There is a problem that a direct current (DC) offset occurs. In the OFDM modulation method, it is specified not to use subcarriers in the vicinity of the center frequency that is highly influenced by the DC offset level. However, for example, in a direct conversion system in which a received signal (radio signal) with a high frequency is directly detected and down-converted using a VCO oscillation signal of the same level as the carrier wave (carrier), the high frequency signal itself If the frequency is high, the effect of device mismatch becomes large. Therefore, the direct conversion method is a method in which a larger DC offset is likely to occur as compared with a normal conversion method. If the DC offset of the received signal is large, the subsequent OFDM demodulation may not be performed correctly. Therefore, it is necessary to remove the DC offset at high speed and with high accuracy simultaneously with gain adjustment. However, the actual situation is that it is difficult to realize a receiver that simultaneously performs DC offset adjustment in a short gain adjustment period.
JP 2003-046353 A

  The first problem to be solved is that it is difficult to realize a receiving apparatus that adjusts the gain of a received signal having a large signal level change at high speed and with high accuracy. The second problem to be solved is that it is difficult to realize a receiving apparatus that performs both gain adjustment and DC offset adjustment at high speed and with high accuracy.

  A receiving apparatus according to the present invention is for solving the first problem, and is a receiving apparatus having a function of adjusting the gain of the received signal in accordance with the signal level of the received signal. Non-linear conversion means for converting the received signal into a signal whose output range is nonlinearly compressed with respect to its input range, and a specific gain value uniquely determined according to the signal level of the received signal based on the output of the non-linear conversion means, A gain adjustment circuit for adjusting the gain of the input received signal.

The receiving apparatus of the present invention preferably includes an offset adjustment circuit that adds an offset cancellation value uniquely determined for the specific gain value to the received signal.
Alternatively, preferably, the first and second gain adjustment circuits and the first and second offset adjustment circuits are provided, and the first gain adjustment circuit roughly adjusts the gain of the received signal to the specific gain value. The first offset adjustment circuit adds an offset cancellation value uniquely determined with respect to the specific gain value to the received signal, coarsely adjusts the DC offset, and the second gain adjustment circuit. The second offset adjustment circuit finely adjusts the gain and DC offset of the received signal after coarse adjustment based on the received signal level and DC offset value after coarse adjustment.

  According to the receiving apparatus having such a configuration, when a received signal is input to the nonlinear conversion means, the received signal level based on the output is displayed on a scale corresponding to the nonlinearity of the nonlinear conversion means. For example, when the input of the nonlinear conversion means is log scale compatible and the output is linear scale compatible, the received signal level based on the output is displayed in decibels on the linear scale. In the present invention, the specific gain value is associated with the received signal level based on the output of the nonlinear conversion means on a one-to-one basis. Therefore, if the received signal level is known, the corresponding specific gain value is uniquely determined. . Therefore, in the present invention, the gain of the gain adjustment circuit is set to the specific gain value. The specific gain value is determined in advance, and fluctuation factors that vary from time to time such as circuit variations and environmental changes cannot be considered. Therefore, the specific gain value does not guarantee the signal level that is finally obtained. However, the fluctuation of the signal level due to these factors is small as a ratio to the whole fluctuation of the signal level. Therefore, the level of the received signal output from the gain adjustment circuit controlled with the specific gain value is an approximate value of a desired level. This gain adjustment is not feedback control that determines the control amount of the gain adjustment circuit in the previous stage by detecting the reception signal level after the gain adjustment circuit, so that the gain can be adjusted in a short time after the reception signal is input to the receiving device. The reception signal level adjustment by the adjustment circuit is completed.

  Another receiving apparatus according to the present invention is for solving the second problem, and is a receiving apparatus having a function of adjusting the gain of the received signal according to the signal level of the received signal, Signal level detection means for detecting the signal level of the input received signal, and coarse adjustment of the gain and DC offset of the received signal to values uniquely determined according to the signal level of the received signal detected by the signal level detection means And finely adjust the gain and the DC offset to a value according to the result of the coarse adjustment.

In the receiving apparatus having the other configuration, coarse gain adjustment is performed using the specific gain value described above, and fine adjustment is performed by feedback control. In order to increase the accuracy of the signal level, the above-described feedback control is necessary. In this receiving apparatus, an approximate value of a desired received signal level can be obtained by rough adjustment using a specific gain value. Therefore, even if the adjustment range of the next fine adjustment is narrowed, no range over occurs. If the accuracy of coarse adjustment can be increased and the adjustment range of fine adjustment is narrowed, the detection sensitivity can be increased when the received signal level is detected on the output side of the second gain adjustment circuit for fine adjustment. Furthermore, rough gain adjustment ends rough gain adjustment at an early stage, but if the gain adjustment amount at that time is adapted to the input range of the subsequent circuit, the received signal level will change the input range of the subsequent circuit. Do not exceed.
On the other hand, the adjustment of the direct current offset is executed in two stages by the offset adjustment circuit, that is, coarse adjustment and fine adjustment. In the coarse adjustment, an offset cancellation value uniquely determined according to the specific gain value is used. A DC offset is detected from the output of the offset adjustment circuit after the coarse adjustment, and fine adjustment is performed according to the detected value. As in the case of gain adjustment, such offset adjustment uses a value that is uniquely determined in advance for coarse adjustment, and feedback control is performed only for fine adjustment. Therefore, rough offset cancellation is completed in a short period of coarse adjustment. The DC offset is detected with high detection sensitivity for the received signal after the coarse adjustment, and fine adjustment is executed based on the detected value.

According to the receiving apparatus of the present invention, the input range for intensity detection can be widened using the non-linear conversion means, so that the signal level of the received signal is not distorted due to insufficient input range. The gain adjustment is controlled to a specific gain value that is uniquely determined according to the output from the nonlinear conversion means, instead of switching several ranges each having a certain range. For this reason, the gain can be adjusted to an approximate value of a desired signal level in a short time.
According to another receiving apparatus of the present invention, the gain is roughly adjusted to a specific gain value uniquely determined according to the received signal level, and the DC offset is roughly adjusted with an offset cancellation value uniquely determined according to the specific gain value. Is made. Therefore, the gain and the direct current offset are adjusted at high speed to approximate values of desired values. As a result, the detection sensitivity of the received signal after coarse adjustment can be increased, and the gain and DC offset can be controlled to desired values with high accuracy by fine adjustment using the detected value. In other words, the receiving apparatus having the other configuration can simultaneously perform high-accuracy gain and DC offset adjustment in a short total time despite the two-stage control of coarse adjustment and fine adjustment.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings, taking as an example an OFDM modulation type receiving apparatus (hereinafter simply referred to as “OFDM receiving apparatus”) that performs direct conversion.

FIG. 1 is a block diagram of an OFDM receiver.
The OFDM receiver shown in FIG. 1 includes an antenna (ANT) 1, a low noise amplifier (LNA) 2, mixers (MIXER) 3I and 3Q, filters (FILTER) 4I and 4Q, and a course gain variable as a first gain adjustment circuit. Amplifiers (coarse VGA) 5I and 5Q, coarse adjustment adders 6I and 6Q as a first offset adjustment circuit, fine gain variable amplifiers (fine VGA) 7I and 7Q as a second gain adjustment circuit, second Adder 8I and 8Q for fine adjustment as an offset adjustment circuit, data analog-digital converters (data ADC) 9I and 9Q for quantizing the received signal, and a baseband processing circuit 10.

  The antenna 1 receives a high-frequency signal that is transmitted when a data signal (baseband signal) is carried by a high-frequency carrier (carrier wave). Taking a wireless LAN as an example, the reception signal of the antenna 1 is carried on a carrier of 2.4 GHz band in the case of conforming to IEEE802.11b, and is carried on a carrier of 5 GHz band in the case of conforming to IEEE802.11a. The received signal is obtained by OFDM-modulating the data signal. For example, in the 2.4 GHz band or the 5 GHz band, the data signal is distributed and conveyed on a large number of subcarriers having slightly different frequencies at predetermined intervals. Therefore, the antenna 1 receives a radio wave in which a large number of subcarriers are multiplexed.

  A reception signal having a frequency as high as 2.4 GHz band or 5 GHz band is first amplified or attenuated by the LNA 2 and sent to one input of two mixers 3I and 3Q, respectively. An oscillation signal of a local oscillator (for example, a voltage controlled oscillator: VCO) 11 is applied to the other input of the two mixers 3I and 3Q. Each mixer mixes two input signals (received signal and oscillation signal), and downconverts the received signal to an intermediate frequency according to the frequency difference between the two input signals. In FIG. 1, the VCO 11 is provided in common to the two mixers 3I and 3Q, but two VCOs that generate oscillation signals having a phase difference (90 degree phase difference) orthogonal to each other on the IQ plane may be used. Good. As shown in FIG. 1, when the VCO 11 is shared, a phase shifter (not shown) is provided on one side of the mixers 3I and 3Q, and the output of the phase shifter is output to the mixer 3I or 3Q. Therefore, an in-phase signal (I-signal) of the received signal is output from the mixer 3I, and a quadrature signal (Q signal) of the received signal is output from the mixer 3Q.

  In the direct conversion OFDM receiver shown in FIG. 1, a quadrature downconverter is configured by these two mixers 3I, 3Q, and VCO 11 (and a phase shifter not shown). Further, in the direct conversion method, the oscillation frequency of the VCO 11 is approximately the same as the frequency of the 2.4 GHz band or 5 GHz band as the carrier of the received signal. Therefore, the orthogonal frequency down converter converts the high frequency received signal into the baseband. The I and Q signals are directly detected. Alternatively, the oscillation frequency of the VCO 11 is set to a frequency slightly lower than the carrier frequency. In this case, the intermediate frequency baseband I signal and Q signal (zero IF signal) are directly detected from the high frequency received signal.

  The LNA may be a fixed gain, but here, the LNA 2 having a variable gain is used, and switching between the fixed gain and the variable gain is possible. In FIG. 1, one antenna 1 and one LNA 2 are provided. However, in order to perform the diversity operation, a plurality of antennas and LNAs are provided, as will be described later.

  The path of the I signal output from the mixer 3I includes the filter 4I, coarse VGA (first gain adjustment circuit) 5I, adder (first offset adjustment circuit) 6I, and fine VGA (second gain adjustment). Circuit) 7I, an adder (second offset adjustment circuit) 8I, and data ADC 9I are connected in series toward the baseband processing circuit 10 in this order. Similarly, in the path of the Q signal output from the mixer 3Q, the filter 4Q, coarse VGA (first gain adjustment circuit) 5Q, adder (first offset adjustment circuit) 6Q, fine VGA (second VGA) Gain adjustment circuit) 7Q, adder (second offset adjustment circuit) 8Q, and data ADC 9Q are connected in series toward the baseband processing circuit 10 in this order.

Next, the basic operation of the gain and DC offset adjustment circuit will be briefly described.
The filters 4I and 4Q are low-pass filters, and remove unnecessary noise such as adjacent channel signals and harmonics included in the I and Q signals.
The I signal from the filter 4I is sent to the coarse VGA 5I, and the Q signal from the filter 4Q is sent to the coarse VGA 5Q. With these coarse VGAs 5I and 5Q, the gains of the I signal and the Q signal are roughly adjusted independently or collectively.
The I signal after the gain is coarsely adjusted is applied to one input of the adder 6I, and the Q signal after the gain is coarsely adjusted is applied to one input of the adder 6Q. Coarse offset cancel values (DC voltage values) CI1 or CQ1 set independently or collectively are input to the other inputs of the adders 6I and 6Q. Therefore, the I signal output from the adder 6I and the Q signal output from the adder 6Q are signals in which a direct current (DC) offset (a direct current voltage deviation with respect to an ideal baseband signal) is suppressed to some extent. .

Of the signals whose gain and DC offset have been roughly adjusted in this way, the I signal is sent to the fine VGA 7I, and the Q signal is sent to the fine VGA 7Q, and the gains of the I signal and the Q signal are independently or collectively. Is finely adjusted to obtain a desired gain.
The I signal after the gain is finely adjusted is applied to the input on one side of the adder 8I, and the Q signal after the gain is finely adjusted is applied to the input on one side of the adder 8Q. Fine adjustment offset cancel values CI2 or CQ2 set independently or collectively are input to the inputs on the other side of the adders 8I and 9Q. Therefore, the I signal output from the adder 8I and the Q signal output from the adder 8Q are signals in which the DC offset is completely canceled or sufficiently suppressed, respectively.

  The I and Q signals output from the adders 8I and 8Q are quantized with data ADCs 9I and 9Q, respectively, and then sent to the baseband processing circuit 10. The baseband processing circuit 10 executes predetermined signal processing such as synchronization detection, guard interval removal, data equalization, OFDM demodulation (Fast Fourier Transform: FFT), and error correction decoding.

In the OFDM receiving apparatus having such a configuration, as described above, the gain and DC offset of the I signal and Q signal are adjusted in two stages, coarse adjustment and fine adjustment.
At this time, in order to perform gain adjustment with high accuracy, the switching step width of the minimum gain that can be switched by the fine VGAs 7I and 7Q is made sufficiently finer than the minimum gain step width that can be switched by the coarse VGAs 5I and 5Q. More specifically, the fine gain adjustment range is set to a certain small range centering on the gain after coarse adjustment, and the fine adjustment range is finer than that during coarse adjustment, and the accuracy required by the OFDM receiver. The fine adjustment gain switching step width is set so as to be inscribed with the step width that is achieved.
The gain adjustment range needs to be widened by rough adjustment, but the fine adjustment range does not need to be so wide. However, the gain adjustment accuracy needs to be higher with fine adjustment than with coarse adjustment. More preferably, both the coarse VGA and the fine VGA, or one of the VGA and the fine VGA are configured so that the gain can be controlled linearly.

By the way, in the above description, the coarse adjustment and fine adjustment of the gain and the coarse adjustment and fine adjustment of the DC offset may be performed independently on the I signal side and the Q signal side, respectively, or may be performed collectively. It was good.
However, if only the coarse gain adjustment is made collectively with the I signal and the Q signal, or the coarse gain adjustment and fine adjustment are made collectively with the I signal and the Q signal, respectively, the advantage that the types of gain adjustment signals can be reduced accordingly. There is. In this case, with respect to the DC offset, it is desirable to perform both coarse adjustment and fine adjustment independently for the I signal and the Q signal, respectively. This is because in the direct conversion method, the degree of imbalance of the DC offset is generally larger than the degree of imbalance of the gain between the I signal and the Q signal. FIG. 1 shows a case where coarse adjustment and fine adjustment of gain are performed collectively with the I signal and Q signal, respectively, and rough adjustment and fine adjustment of DC offset are performed independently with the I signal and Q signal.

Next, the circuit configuration of the gain and DC offset control system will be described.
In the present embodiment, as a means for performing such two-stage adjustment at high speed and with high accuracy, as shown in FIG. 1, a received signal strength indicator (RSSI) circuit 20 and an RSSI circuit 20 And an adjustment signal generation unit 30 that generates adjustment signals for gain and DC offset according to the electric field strength of the received signal based on the output of.

  In general, when the effective antenna length is constant, the received signal voltage induced in the antenna 1 that receives the radio wave has a value proportional to the received electric field strength. Therefore, when the effective antenna length is constant, the RSSI circuit 20 is configured by a circuit that detects the received signal level. The RSSI circuit 20 of this example is composed of a reception level detection circuit having a function of nonlinear conversion means for converting the input range into a signal whose output range is nonlinearly compressed and outputting the signal. For this reason, the input range of the RSSI circuit 20 is set wider than the output range. As such an RSSI circuit 20, for example, a log conversion circuit that receives a reception signal in an input range corresponding to a log scale and outputs a signal (reception level signal) for displaying the level of the reception signal in a linear scale can be used. .

  The adjustment signal generation unit 30 includes a selector (SEL.) 31, a measurement analog-digital converter (measurement ADC) 32, an adjustment signal generation circuit 33, a calibration circuit (CALIB.) 34, and a control circuit (CONT.). 35. The control circuit 35 is a circuit that controls all control including timing control such as operation permission (enable) of other circuits in the adjustment signal generating unit 30, activation, stop or switching thereof, and is configured by a microcomputer, for example. The

  The selector 31 appropriately receives the reception level signal S20 from the RSSI circuit 20 and the four detection signals SI1, SQ1, SI2, and SQ2, and switches the input signal according to the timing signal generated by the control circuit 35. Output to the measurement ADC 32. The four detection signals SI1, SQ1, SI2, and SQ2 are I signals or Q signals branched from the outputs of the four adders 6I, 6Q, 8I, and 8Q, respectively.

The measurement ADC 32 receives the signal selected by the selector 31, quantizes it, and outputs it to the adjustment signal generation circuit 33.
The number of quantization bits of the measurement ADC 32 is defined according to the accuracy required for the signal handled at this time. In general, the larger the number of quantization bits of the ADC, the wider the dynamic range (input range) of the input signal. On the other hand, if the number of quantization bits is increased more than necessary, the circuit scale of the measurement ADC 32 increases. Therefore, the input range of the measurement ADC 32 is set appropriately in advance. When a signal having an amplitude change exceeding the input range is input to the measurement ADC 32, the linearity of the signal is lost at the output of the measurement ADC 32. The output range of the RSSI circuit 20 described above is determined in conformity with the input circuit of the subsequent circuit, particularly the measurement ADC 32. When the input range and the output range of the RSSI circuit 20 are linear, the input range is equivalent to the output range, so that it cannot cope with a received signal having a large signal level change.
Therefore, in the present embodiment, the RSSI circuit 20 is provided with a function of nonlinear conversion means so as to expand the input range while keeping the output range constant. The nonlinear conversion characteristic is optimized in consideration of the maximum change width of the received signal level in the communication system using the OFDM receiver and the input range of the subsequent circuit, particularly the measurement ADC 32.

The adjustment signal generation circuit 33 has a function of detecting the level of the reception signal based on the output from the measurement ADC. At this time, the adjustment signal generation circuit 33 detects the received signal level by measuring the peak value or average value of the received signal, for example. The adjustment signal generation circuit 33 is a circuit that generates various adjustment signals AS by calculation or by referring to a table at each timing according to the timing signal generated by the control circuit 35 based on the detected reception signal level. . The adjustment signal AS is supplied to the gain of LNA2, the common gain G1 of coarse VGA5I and 5Q, the common gain G2 of fine VGA7I and 7Q, and the other input of each of the four adders 6I, 6Q, 8I and 8Q. It consists of cancel values CI1, CQ1, CI2, CQ2.
The calibration circuit 34 is a circuit required when obtaining an adjustment signal related to coarse adjustment by referring to a table, and can be omitted when obtaining all adjustment signals AS by calculation.

Next, a description will be given of a control operation performed using the RSSI circuit 20 and the adjustment signal generator 30 having such a configuration when adjusting the gain and the DC offset.
When there is a calibration instruction prior to reception, the control circuit 35 outputs the enable signal to the calibration (CALIB.) Circuit 34, and the calibration operation is started. Thereafter, the control circuit 35 controls the other circuits 20, 31, 32, 33, and 34 at a timing according to a predetermined calibration sequence.
The purpose of calibration is to create a table (TABLE) 33A held in the adjustment signal generation circuit (AS-GEN.) 33. The table 33A stores a rough adjustment common gain G1 and offset cancellation values CI1 and CQ1 for each input signal level. The calibration circuit 34 has a function of scanning the common gain G1 and a function of independently scanning the offset cancellation values CI1 and CQ1 while fixing the values of the common gain G1. The value of the common gain G1 corresponds to the “specific gain value” of the present invention.

  When the operation is started, a calibration signal with known power is supplied to the LNA 2 in order to determine a value of the coarse adjustment gain (specific gain value) with respect to the input level. The signal is converted by the RSSI circuit 20, selected by the selector 31, and further quantized by the measurement ADC 32 to generate a digital reception level signal. The adjustment signal generation circuit 33 reads the digital value to detect the reception signal level. To do. Since the optimum coarse adjustment gain for this known power is uniquely determined, a specific gain value for coarse adjustment for the digital value of the received signal level is held in the table 33A. Thereafter, when the above operation is repeated while changing the power of the calibration signal, the correspondence between the digital value of the received signal level and the specific gain value for coarse adjustment is obtained. Note that this correspondence may be obtained for each gain G0 of LNA2.

  Alternatively, if a specific gain value for coarse adjustment with respect to the digital value of the received signal level is determined in advance and adjustment is not necessary, the above calibration need not be performed, and this data can be stored in ROM to generate a table. That's fine. Further, an optimal table may be changed by using a RAM instead of the ROM.

Next, for each set value of the common gain G1, offset cancel values CI1 and CQ1 corresponding to the set value are obtained by calibration. Specifically, first, the input of the LPF 4I is short-circuited, and the common gain G1 of the coarse VGA 5I is fixed. Then, the offset cancellation signal CI1 for coarse adjustment is adjusted so that the offset of the detection signal SI1 is minimized, and the value is stored in the table 33A. Next, it is common to change the value of the common gain G1 and similarly adjust the offset cancel signal CI1 so that the offset value of the detection signal SI1 is minimized, and store the value in another location in the table 33A. Repeat for each value of gain G1. This operation is similarly executed in the coarse VGA 5Q on the Q signal side, and a table of offset cancellation values for each common gain G1 is generated in each of the coarse VGAs 5I and 5Q.
Alternatively, an offset cancel table for each thinned common gain G1 is generated without generating a table for every common gain G1, and an offset cancel value for the thinned common gain G1 is generated. You may make it use the value complemented from.

When the calibration is completed, the receiving apparatus waits for the arrival of radio waves with the reception sensitivity, for example, the LNA gain 0 being maximized.
When the reception state is entered and the RSSI circuit 20 detects a received signal at a certain level or higher, the information is sent to the control circuit 35. The control circuit 35 obtains the timing for starting reception based on this information. Thereafter, the selector 31 is switched, the sampling operation and switching timing of the I and Q signals in the measurement ADC 32, switching between coarse adjustment and fine adjustment, Timing signals for various operations such as switching between gain and offset adjustment and switching between these combination controls are generated and output to necessary circuits according to a predetermined sequence to control the entire receiving operation.

First, rough adjustment is performed within a specific fixed interval.
The purpose of this coarse adjustment is that the input levels of the fine VGA 7I and 7Q for fine adjustment in the latter stage are excessive and do not saturate, or do not become excessively small, and each output of the coarse VGA 5I and 5Q is within a range where the fine VGA 7I and 7Q can be accurately adjusted. Is to contain. The content to be executed is that the reception signal level after the reception signal is nonlinearly converted by the RSSI circuit 20 is detected by the adjustment signal generation circuit 33, and the coarse VGA gain adjustment and the DC offset coarse adjustment are performed according to the detected reception signal level. Are to be performed simultaneously.

Normally, when the selector 31 selects the RSSI circuit 20 side input during reception standby, it is not necessary to switch the selector 31 at the beginning of the reception state. At this time, the reception level signal S20 is output from the selector 31, and a digital reception level value is output from the measurement ADC 32 that quantizes the reception level signal S20. Next, the adjustment signal generation circuit 33 sets a specific gain value uniquely determined according to the input reception level value, that is, the gain G0 of the LNA 2 and the corresponding common gain G1 of the coarse VGAs 5I and 5Q. The gain G0 and the specific gain value G1 may be obtained by calculation, or may be obtained by referring to the built-in table 33A created by the calibration described above. The gain G0 generated in this way is output to the LNA 2 and the specific gain value G1 is output to the coarse VGAs 5I and 5Q. As a result, coarse gain adjustment is performed.
In the case of this example, the offset cancellation values CI1 and CQ1 used for the coarse adjustment are set to values that are uniquely determined according to the common specific gain value G1. In this case, the adjustment signal generation circuit 33 obtains the offset cancellation values CI1 and CQ1 for coarse adjustment by calculation using the set specific gain value G1 or by referring to the built-in table 33A. The two offset cancellation values CI1 and CQ1 generated in this way are output to the adders 6I and 6Q, respectively, and as a result, rough adjustment of the DC offset is executed.
The coarse adjustment specific gain value and the offset cancellation value set in this way are fixed, thereby completing the coarse adjustment within a certain interval.

Next, fine adjustment is performed in a specific fixed interval. Here, the DC offset and gain are finely adjusted for each of the I signal and the Q signal immediately before being input to the data ADCs 9I and 9Q in consideration of variations in all circuit characteristics and environmental dependency fluctuations.
The coarsely adjusted I signal is detected at the output terminal of the adder 6I, and the coarsely adjusted Q signal is detected at the output terminal of the adder 6Q, and is output to the selector 31 as detection signals SI1 and SQ1, respectively. The selector 31 is controlled by the control circuit 35 and sequentially switches the detection signals SI1 and SQ1 to send to the measurement ADC 32. A digital I signal and a Q signal are sequentially output from the measurement ADC 32 and input to the adjustment signal generation circuit 33.
The adjustment signal generation circuit 33 performs gain measurement and DC offset measurement for each of the I signal and the Q signal. However, if a DC offset remains in the signal, the value of the common gain G2 to be input to the fine VGAs 7I and 7Q for fine adjustment cannot be obtained correctly. Therefore, the DC offset of the I signal and the Q signal is measured, the cancellation value is obtained first, and the offset cancellation is executed, and then the gain is finely adjusted.

  The measurement of the DC offset can be performed in a section where the voltage periodically changes in the received signal packet. If the voltage value in this section is integrated, the integrated value for one period should ideally be zero, but a DC offset occurs in this section due to DC variations in the circuit and environmental factors. . Since this DC offset is also superimposed in the data block, the DC offset can be measured in the period of this periodic voltage change.

For example, in the case of IEEE802.11a of the wireless LAN standard, a preamble is present at the beginning of an OFDM reception signal packet as a period of periodic voltage change. The waveform is shown in FIG.
As can be seen from FIG. 2, in the preamble, the same waveform is repeatedly sent every 0.8 μsec. One cycle of this repetitive waveform is sampled in a short time, and the sampling value is added. The added value should ideally be zero, but is not actually zero. The sum of sampling values for one period when the sampling time is sufficiently shortened can be regarded as the DC offset amount. Separate and independent DC offsets are generated in the I signal and Q signal having different signal paths. As described above, in this embodiment, offset adjustment is performed separately for the I signal and the Q signal, and for this purpose, it is necessary to measure the DC offset separately for the I signal and the Q signal.
However, measuring the DC offset of the I signal and the Q signal one by one in order takes time for two cycles, so here, in order to shorten the operation time, the measurement of the DC offset is performed for each sampling time within one cycle. The signal and Q signal are measured alternately. That is, double oversampling is executed for each of the I signal and the Q signal.

  Since the I and Q signals input to the adjustment signal generating circuit 33 are digital, the DC offset can be measured using a simple circuit such as a shift register. The adjustment signal generation circuit 33 inverts the polarity of the measured DC offset to calculate offset cancellation values CI2 and CQ2 for fine adjustment using the I signal and the Q signal, respectively, and the calculated offset values CI2 and CQ2 are adders, respectively. Output to 8I and 8Q.

  As a result, the I signal and Q signal whose offset is completely canceled are input to the adjustment signal generation circuit 33 through the selector 31 and the measurement ADC 32 again. The adjustment signal generation circuit 33 measures the peak value, the RMS value, or the average value, calculates a common gain value G2 for fine adjustment based on the measurement result, and outputs it to the coarse VGA 7I and the fine VGA 7Q.

The lengths of the fine adjustment section and the coarse adjustment section described above generally differ depending on the received signal system (for example, the difference in modulation system), and are controlled by the control circuit 35 in accordance with the difference in this system. The
Further, the change in amplitude of the received signal differs depending on the received signal system, for example, the modulation system. Therefore, the table 33A that holds the correspondence between the reception level of the reception signal (OFDM reception signal) modulated by OFDM, the specific gain value G1, and the offset cancellation values CI1 and CQ1 for coarse adjustment is unique to the OFDM reception signal. is there. For example, a CCK (Complementary Code Keying) received signal has a smaller change in peak value and a stable signal level than an OFDM received signal. For this reason, especially when the signal level is measured by the peak value or the RMS value and the gain is optimized by the control amount obtained according to the signal level, the optimum value differs between CCK and OFDM. It is necessary to have.

  In the configuration shown in FIG. 1, in order to correspond to a plurality of methods, a calculation formula or table 33A is held for each method. For example, the calculation formula or table to be used is changed depending on the method detected by the baseband processing circuit 10. The switching function is also provided to the adjustment signal generation circuit 33. In this way, each time the method is switched, the control parameters at the time of coarse adjustment and fine adjustment described above are dynamically changed in conjunction with it, and the shift to gain and offset adjustment to the values suitable for the corresponding method is performed. Performed smoothly.

In addition, this gain and offset adjustment method can be dealt with by dynamically changing the switching even when a plurality of antennas are used for diversity reception operation, for example. FIG. 3 shows a modification of the receiving apparatus in FIG. 1 having two antennas. Here, the same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof is omitted. The basic adjustment method is the same as in FIG.
The receiving apparatus shown in FIG. 3 is configured so that the gains of the I signal and the Q signal can be individually adjusted by each of coarse VGAs 5I and 5Q and fine VGAs 7I and 7Q. GI1, GQ1, GI2, and GQ2 are output from the adjustment signal generation circuit 33 to each VGA as gain values for that purpose. This is also permitted in the receiving apparatus shown in FIG.

3 is characterized by two antennas (ANT1) 1A, an antenna (ANT2) 1B, low noise amplifiers 2A and 2B corresponding to the respective antennas, and an antenna switch 40 that switches between the two antennas 1A and 1B. It is having. The control circuit (CONT.) 35 performs antenna switching control in the initial stage. More specifically, when the gains G0A and G0B of the two low noise amplifiers 2A and 2B are fixed, the level of the received signal of one antenna with the antenna switch 40 turned on is measured from the detection signals SI1 and SQ1. Next, the antenna switch 40 is switched to measure the level of the received signal of the other antenna. Then, the antenna having the higher field strength, for example, the reception level is selected, and the information is sent to the antenna switch 40. Thereafter, the connection state of the antenna having the high electric field strength is maintained, and the gain and offset adjustments in the two stages of coarse adjustment and fine adjustment similar to those described above are executed.
The control circuit 35 performs the switching of the antenna and the measurement of the received electric field strength as appropriate every time a base station that is transmitting radio waves is switched or when it is determined that the received radio waves are weak, Always ensure antenna connections with higher received field strength or higher received signal quality.
The receiver shown in FIG. 3 can perform high-speed and high-precision control because gain and offset are dynamically adjusted in conjunction with such antenna switching.

The receiving apparatus according to the present embodiment shown in FIGS. 1 to 3 can execute power consumption control in conjunction with gain and offset adjustment. That is, in the reception standby state, it is possible to adopt a low power consumption mode in which at least a part of the subsequent circuits after the data ADCs 9I and 9Q is stopped or paused, and is started from the point of necessity. Such power consumption control is because the adjustment control of the gain and offset, which is a feature of the present embodiment, is not feedback control that monitors the output of the data ADC and feeds back the monitored value to the previous stage, thereby having high responsiveness. . For example, in OFDM signal reception, even if control is performed to activate the subsequent circuit for the first time while adjusting the gain and offset with the preamble of each packet, the gain and offset adjustment is performed at a high speed, so subsequent reception operations are performed. Can be done normally.
In the low power consumption mode, control is further performed to stop or suppress the power supply to the RSSI circuit 20 and the adjustment signal generator 30 while data is being received thereafter.
Such power consumption control can also be realized by linking a power supply circuit (not shown) and a microcomputer that controls the entire receiving apparatus in conjunction with the control circuit 35.

  Although common to FIGS. 1 and 3, the control circuit 35 and the microcomputer for overall control can be realized with one configuration. Further, for example, at least some of the functions of the adjustment signal generation circuit 33, the calibration circuit 34, and the control circuit 35 can be realized on a program described in a microcomputer.

The receiving apparatus according to the present embodiment has the following various advantages.
First, even when the fluctuation of the received signal level is large, the received level can be correctly detected in a wide input range by using nonlinear conversion means (RSSI circuit 20) such as a log conversion circuit. That is, there is an advantage that accurate gain adjustment or the like can be performed without saturation of the received signal level.
Secondly, the gain is performed in two stages of coarse adjustment and fine adjustment, but only fine adjustment is feedback control based on the detection value of the received signal, so that the gain convergence is higher than the method of performing feedback control from the beginning. There are advantages.
Third, there is an advantage that rough adjustment is quick. In the gain adjustment method according to the present embodiment, at the time of coarse adjustment, the specific gain values GI1 and GQ1 uniquely determined from the received electric field strength are calculated or obtained by referring to a table, and the gain is roughly adjusted using only the specific gain values GI1 and GQ1. End. In this regard, the conventional gain adjustment method based on feedback control detects a received signal at the output side of a gain adjustment circuit (AGC amplifier), for example, the output of a data ADC, and performs feedback adjustment based on the level. Since it was a control, it took time to adjust the gain. On the other hand, in the present embodiment, since the output of the gain adjustment circuit is not detected in the coarse adjustment, the gain (specific gain value) to be used for the coarse adjustment is determined as soon as the input of a certain amount of radio waves is detected.
Fourthly, the specific gain value is a numerical value of one point having no range, and since it is an approximate value of a desired gain, the range to be fine-tuned is narrowed down. As a result, even if precise control is performed High-speed gain adjustment is possible.
Fifth, since the received signal level is converted to digital and the gain adjustment value is calculated using the digital value, the gain can be adjusted with higher accuracy than when a simple comparator is used.
Sixth, the offset adjustment is not executed serially with the gain adjustment, but the offset adjustment is dynamically executed in conjunction with the gain adjustment, so that the total time is relatively short. That is, in the present embodiment, the offset cancel values CI1 and CQ1 used for the coarse adjustment are values that are uniquely determined by calculation or table reference according to the specific gain values GI1 and GQ1, and thus the specific gain values GI1 and GQ1 are When determined, the offset cancellation values CI1 and CQ1 are immediately determined in conjunction with the determination. Further, for example, the calculation formula and the table value 33A can be determined in consideration of the input ranges of the data ADCs 9I and 9Q, the correction of the signal distortion, and the correction of the distortion in the control system circuit.
Seventh, the gain and offset can be finely adjusted for each of the I signal and the Q signal. In other words, it corresponds to the offset imbalance adjustment of the I signal and the Q signal which are important in the OFDM modulation method, and as a result, there is an advantage that the OFDM demodulation operation can be performed with high accuracy.
Eighth, since the creation of the table 33A is performed at the time of calibration prior to reception, the actual reception operation does not take time to correlate the reception level, gain value, and offset cancellation value. There is.
Ninth, when an assumed received signal differs depending on, for example, a modulation method or a communication method, a calculation formula or table 33A is held for each type, and if the received signal changes, the calculation formula or table 33A is switched. There is an advantage that it can cope with many communication systems and multi-band. In addition, since the adjustment of the gain and the offset dynamically responds to the change of the received signal, there is no useless time loss. In this case, the characteristic switching that does not depend on the external parts without increasing the circuit scale contributes to quick dynamic characteristic change without time delay. Further, it is advantageous for smooth dynamic characteristic change to be performed in the calculation formula and the adjustment signal generation circuit 33 of the table 33A.
Tenth, when diversity transmission of a transmission signal is performed by a plurality of antennas, gain confirmation and antenna switching control for each antenna are performed by using each component in the adjustment signal generation unit 3, which is efficient and antenna switching is performed. There is an advantage that the transition to the subsequent coarse gain adjustment is smooth. Further, when an optimum antenna is determined, an antenna having a high reception field strength or reception level or an antenna having a high signal quality can be selected, so that the best reception can be performed with a signal having as little noise level and distortion as possible. Further, it is not necessary to provide a receiving circuit for each antenna or a special circuit for controlling the antenna, and the circuit scale can be minimized by adding a low noise amplifier and adding an antenna switch.
Eleventh, since the gain (and offset) control having the above-described advantages does not use the output of the subsequent circuit, particularly the data ADCs 9I and 9Q, the operation of at least a part of the subsequent circuit after the data ADC is stopped at the time of adjustment. Or you can pause. Further, the gain (and offset) control system circuit can be stopped or paused at the time of subsequent data reception. As a result, there is an advantage that power consumption can be reduced.

OFDM receiver block diagram The figure which shows the example of the waveform in the preamble prescribed | regulated by the frame structure of wireless LAN specification IEEE802.11a Block diagram of an OFDM receiver with two antennas

Explanation of symbols

1, 1A, 1B ... antenna, 5I, 5Q ... coarse VGA (first gain adjustment circuit), 6I, 6Q ... adder (first offset adjustment circuit), 7I, 7Q ... fine VGA (second gain adjustment) Circuit), 8I, 8Q... Adder (second offset adjustment circuit), 9I, 9Q... Data ADC (rear stage circuit), 20... RSSI circuit (nonlinear conversion means), 33... Adjustment signal generation circuit, 33A. G0, G1, G2, GI1, GQ1 ... gain adjustment signal (specific gain value) for coarse adjustment, CI1, CQ1 ... offset cancellation value for coarse adjustment, SI1, SQ1, SI2, SQ2 ... detection signal

Claims (14)

A receiving device having a function of adjusting the gain of the received signal according to the signal level of the received signal,
Non-linear conversion means for converting the input received signal into a signal whose output range is nonlinearly compressed with respect to the input range;
A gain adjustment circuit that adjusts the gain of the input received signal to a specific gain value that is uniquely determined according to the signal level of the received signal based on the output of the nonlinear conversion means;
A receiving apparatus. The receiving apparatus according to claim 1, wherein the nonlinear conversion unit includes a log conversion circuit that receives a received signal in an input range corresponding to a log scale and displays the received signal level on a linear scale. The receiving apparatus according to claim 1, further comprising an offset adjustment circuit that adds an offset cancellation value uniquely determined for the specific gain value to a reception signal. Having first and second gain adjustment circuits, and first and second offset adjustment circuits;
The first gain adjustment circuit roughly adjusts the gain of the received signal to the specific gain value;
The first offset adjustment circuit adds an offset cancellation value uniquely determined for the specific gain value to the reception signal, and roughly adjusts the DC offset,
The second gain adjustment circuit and the second offset adjustment circuit finely adjust the gain and DC offset of the received signal after coarse adjustment based on the received signal level and DC offset value after coarse adjustment. The receiving device according to claim 1. A post-stage circuit that performs digital signal processing by AD converting the received signal after gain adjustment;
An adjustment signal generating circuit for generating an adjustment signal for the gain adjustment and the offset adjustment,
The adjustment signal generation circuit inputs the coarsely adjusted reception signal which is an analog signal before being input to the subsequent circuit, and outputs a gain adjustment signal for fine adjustment according to the reception signal level after the coarse adjustment. The generated gain adjustment signal is output to the second gain adjustment circuit, the DC offset value is detected from the input received signal after the coarse adjustment, and the polarity of the DC offset value is inverted for fine adjustment. The receiving apparatus according to claim 4, wherein the offset cancel value is generated, and the generated offset cancel value for fine adjustment is output to the second offset adjustment circuit. It is configured to receive radio signals from each of multiple antennas,
The received signal from the antenna having a stronger signal level is selected based on the output of the non-linear conversion means, and gain adjustment based on the output of the non-linear conversion means is performed on the selected received signal. Receiver. The received signal having the same frequency as the wireless carrier wave is directly quadrature-detected and separated into baseband I and Q signals, and gain adjustment based on the output of the nonlinear conversion means is performed for each of the I and Q signals. The receiving device according to claim 1. A received signal having the same frequency as that of the wireless carrier wave is directly quadrature-detected to be separated into baseband I and Q signals, and gain adjustment based on the output of the nonlinear conversion means is performed for each of the I and Q signals. The receiving apparatus according to claim 3, wherein the direct-current offset is adjusted according to the specific gain value. An adjustment signal generating circuit for generating the gain adjustment signal and the offset adjustment signal;
The adjustment signal generation circuit has a function of setting the offset cancellation value and outputting the offset adjustment signal, and when the specific gain value is changed according to the input control signal, an adjustment signal to be output is The receiving apparatus according to claim 3, wherein the gain adjustment signal and the new offset adjustment signal corresponding to the changed target value are switched to be output to the gain adjustment circuit and the offset adjustment circuit, respectively. A table holding the offset cancellation value for each specific gain value;
At the time of calibration prior to signal reception, for each specific gain value, when the specific gain value is given to the gain adjustment circuit, an offset cancellation value that minimizes the DC offset of the output signal is detected, and the detected offset cancellation The receiving device according to claim 3, wherein a value is stored in the table. A post-stage circuit that performs digital signal processing by AD converting the received signal after gain adjustment;
The gain adjustment of the received signal is performed within a range not exceeding the input range of the AD converter that performs the AD conversion,
The receiving apparatus according to claim 1, further comprising: a power supply control mode in which at least a part of the functions of the subsequent circuit including the AD converter is stopped or suspended from a standby time of signal reception to a middle of gain adjustment of the received signal. . A receiving device having a function of adjusting the gain of the received signal according to the signal level of the received signal,
Having signal level detection means for detecting the signal level of the input received signal;
The gain of the received signal and the DC offset are roughly adjusted to a value uniquely determined according to the signal level of the received signal detected by the signal level detecting means, and the gain and the DC offset are adjusted to a value according to the result of the coarse adjustment. Receiving device that makes fine adjustments. Find an offset cancellation value uniquely determined for a specific gain value according to the signal level of the received signal,
The receiving device according to claim 12, wherein the coarse adjustment is performed according to the specific gain value and the obtained offset cancellation value. An AD converter that AD converts the signal after the gain and the DC offset are finely adjusted;
In the coarse adjustment, gain adjustment is performed within a range not exceeding the AD converter,
The receiving device according to claim 12, wherein the received signal level and the DC offset after coarse adjustment are detected, and the fine adjustment is performed according to the detected received signal level and the DC offset.

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