JP2005123388A - Bonding structure, bonding method, semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a bonding structure, a bonding method, a semiconductor device and its manufacturing method, wherein electrode pads between IC chips can be connected well by a metal wire. <P>SOLUTION: When a metal wire 2 after being connected to a first bond is led out to be connected to a second bond, the metal wire 2 is pressed by one lower end line 1a of a capillary to be temporarily bonded to the electrode pad 3 of an IC chip 4. Thereafter, the metal wire 2 is turned back by the other lower edge 1a of the capillary 1 so as to be overlapped, and the metal wire 2 is completely bonded 6b at the same position as in a temporarily bonded part 6a in this turned-back part 20. Consequently, since the thickness of the metal wire 2 increases at the turned-back part 20, this thickness is caused to absorb a pressing force of the capillary 1, and a lower part, etc. of the electrode pad 3 is not damaged to enhance a joining strength. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a bonding structure and a bonding method for connecting, for example, electrodes of a semiconductor chip, a semiconductor device having the bonding structure, and a manufacturing method thereof.

  In recent years, with the development of portable electronic devices, there has been a strong demand for products using small / high-density mounting technology, and at the same time, these products are desired to be low-cost.

  As a manufacturing technique, at the time of manufacturing a semiconductor chip, for example, as shown in FIG. 9, elements (MOS, RF, etc.) having different functions are formed on one IC chip 4 and these elements are connected by wiring. A system for creating one functional block, that is, SoC (System on Chip) has been known. However, there are problems such as a large amount of wafer process development costs, a development period that often requires one year or more, and the performance of the functional blocks cannot be driven.

  In comparison, devices having different functions are individually fabricated as chips by making the best use of existing facilities and technologies. For example, as shown in FIG. 10, a plurality of IC chips (active devices) and passive components (resistors and A system in which a capacitor or the like is stored in the same package, that is, SiP (System in Package) technology has attracted attention. Another technique is to realize electrical connection by directly wire-bonding a plurality of IC chips.

  Specifically, in the case of SoC, for example, as shown in FIG. 9, an IC chip (hereinafter sometimes referred to as a chip) 4 is mounted on a printed circuit board 10, and the electrode pads 3 of the chip 4 and the printed circuit board 10. After the electrode pad 14 is connected to the electrode pad 14 by wire bonding using a metal wire (hereinafter also referred to as a wire or a bonding wire) 2, the whole is sealed with a resin (not shown). In the case of SiP, for example, as shown in FIG. 10, individually manufactured chips are mounted on the printed circuit board 10, and between the electrode pads 14 of the chip 4 a and the electrode pads 3 of the chip 4 b and between the electrodes of the chip 4 c. After the pad 3 and the electrode pad 14 of the printed circuit board 10 are connected by wire bonding using the metal wire 2, the whole is resin-sealed (not shown).

  However, the conventional technique for directly wire bonding between IC chips is performed by the following method, but there are various problems.

  A normal wire bonding process between IC chips will be described with reference to FIG. FIG. 11 shows a capillary (cylindrical wire bonding tool having a through hole 5 in the center) for wire bonding the electrode pad 14 of the IC chip 4a mounted on the printed circuit board 10 and the electrode pad 3 of the IC chip 4b. 1 shows a state in which a metal wire 2 (for example, a gold wire or a copper wire) inserted through 1 is arranged upward and wire bonding is performed. In the figure, arrows indicate the sequence of steps or the operation of the capillary 1.

  In order to connect the electrode pads of the IC chips 4a and 4b mounted on the printed circuit board 10 with metal wires, first, as shown in FIG. 11A, a ball 9 is formed at the tip of the wire 2 by a spark method. The tip of the wire 2 on which the ball 9 is formed is connected to the electrode pad 14 of the first IC chip 4a by the ball bond 11 as shown in FIG.

  Next, as shown in FIG. 4C, the capillary 1 is raised, and as shown in FIG. 4D, the clamper 17 is closed and the wire 2 is tightened, and the capillary 1 is connected to the second IC chip 4b. As shown in FIG. 5E, the capillary 1 is lowered, and the wire 2 is pressed against the electrode pad 3 of the second IC chip 4b at the lower edge of the capillary 1 to give ultrasonic vibration. As a result, the wire 2 is fixed.

  Next, as shown in FIG. 5F, the clamper 17 is loosened and the capillary 1 is moved upward, and as shown in FIG. 5G, the clamper 17 is closed again to fix the wire 2, and the capillary 1 is raised. By doing so, the wire 2 is cut, and the wire 2 is connected to the electrode pad 3 of the second IC chip 4 b by the wedge bond 12.

  Thereafter, as shown in FIG. 5H, a ball 9 is formed at the tip of the wire 2 by a spark technique in preparation for the next ball bonding. The chip after wire bonding is resin-sealed with a mold resin 19 as shown in FIG.

  FIG. 12 is an enlarged view of FIG. 11E in the above process, FIG. 12A is a schematic cross-sectional view, and FIG. 12B is a plan view of the main part after wire cutting. That is, after one end of the wire 2 is ball-bonded 11 to the electrode pad 14 of the first IC chip 4a, the wire 2 is led toward the second IC chip 4b by the capillary 1, and this IC chip. Although the wedge bond 12 is attached to the electrode pad 3 of 4b, as shown in FIG. 4B, the wedge bond 12 forms a capillary indentation 7 (details will be described later) in the press contact portion 6, As will be described in the next figure, the chip 4 is liable to be adversely affected.

  FIG. 13 is a sectional view further enlarging and showing only the vicinity of the electrode pad 3 on the second IC chip 4b side in FIG. As shown in FIG. 13, the electrode pad 3 of the IC chip 4 is formed on the surface of the interlayer film 15 and exposed at the opening of the passivation film 16, and at the time of wedge bonding, one lower end edge 1a of the cylindrical capillary 1 is formed. As a result, the wire 2 is pressed against the electrode pad 3, and at the same time, the electrode pad 3 is also pressed by the lower end edge 1 a on the opposite side that is not in contact with the wire 2.

  Accordingly, as shown in FIG. 13, since the pressure corresponding to the pressing force P of the capillary 1 acts on the IC chip 4 as shown by the arrow through the lower edge 1a of the capillary 1, the stress due to this pressing causes the IC The chip 4 is easily cracked and the internal structure is easily deformed. For this reason, for example, when a sonar diode (constant voltage element) or the like is incorporated directly below or in the vicinity of the electrode pad 3 in order to protect the built-in circuit from static electricity, the protection element is destroyed and becomes inoperable. Sometimes. In addition, since the electrode pads 3 adjacent to each other are easily deformed by the pressing force, the interval between the electrode pads 3-3 cannot be reduced.

  The mechanism by which the above phenomenon occurs in the wedge bond will be described with reference to FIG. FIGS. 14A to 14C correspond to the processes of FIGS. 11E to 11G described above, and are exaggerated only in the vicinity of the electrode pads of the second IC chip. The arrow indicates the movement of the capillary 1. In addition, each following figure demonstrates using the figure similar to this.

  That is, as shown in FIG. 14A, the capillary 1 is lowered and the metal wire 2 is pressed against the electrode pad 3, and at the same time, an ultrasonic wave is applied to perform thermocompression bonding. In this case, not only the lower end edge 1a of the capillary 1 pressing the wire 2 as described above but also the lower end edge 1a on the opposite side presses the electrode pad 3.

  Therefore, when the metal wire 2 is pressed against the electrode pad 3 by the capillary 1, the press contact portion 6 is deformed and formed in a crescent shape (see FIG. 14D) in the pressing portion 25. Then, while deforming, both the wire 2 and the metal of the electrode pad 3 are deformed and enlarged, and an alloy portion (shaded portion) is generated and joined to the press contact portion 6 as shown in FIG.

  In this way, in the electrode pad on the side to be wedge bonded, the wire 2 is deformed and enlarged by pressing, so that the electrode pad 3 is formed in a large area of, for example, 110 μm × 140 μm, and the electrode of the first chip to be ball bonded It is formed larger than the area of the pad 14 (for example, 70 × 70 μm).

  Then, as shown in FIG. 14 (b), the capillary 1 is then raised, and when the metal wire 2 having a certain length is pulled out, the wire 2 is clamped and cut as shown in FIG. 14 (c). . Reference numerals 2 a and 2 b in FIG. 14C indicate the cut ends of the wire 2.

  In order to ensure the cutting of the wire 2 and to ensure the bonding strength between the wire 2 and the electrode pad 3, the capillary 1 needs to contact the electrode pad 3, and as a result, FIG. The capillary indentation 7 as shown in FIG. 6 remains on the pad, and the electrode pad 3 may be deformed by the pressure contact to affect the adjacent pad. Therefore, the interval between the electrode pads 3 cannot be reduced.

  Further, the mechanical damage as shown in FIG. 13 due to the capillary 1 coming into contact with the electrode pad 3 in this way affects the lower part of the electrode pad 3 and peripheral circuit elements on the electrical characteristics. Therefore, if the load on the capillary 1 is lowered to reduce the damage, there is a risk that the bonding strength of the wire 2 cannot be secured this time.

  Therefore, as a wire bonding method for improving the above points, a method is known in which a metal bump is formed in advance on an electrode pad on the wedge bond side, and then wedge bonding is performed thereon (see Patent Document 1 described later).

  Thereby, damage caused by the capillary 1 is absorbed by the bumps interposed between the electrode pad 3 and the capillary 1. Also, the bonding strength of the wire 2 can be improved by adopting a stud bump made of the same material as the metal wire 2 for the bump. 15 and 16 are diagrams showing this method and corresponding to FIG. 14 described above.

  That is, as shown in FIG. 15A, metal bumps 8 are formed in advance on the electrode pads 3 on the side to be wedge-bonded, and the same as in FIGS. 14A to 14C. Join in process. That is, next, as shown in FIG. 15B, the capillary 1 is lowered to press the wire 2 against the electrode pad 3, and at the same time, an ultrasonic wave is applied to perform thermocompression bonding.

  Therefore, unlike the case of FIG. 14, the lower end edge 1 a of the capillary 1 is pressed only on the side pressing the wire 2, and the other lower end edge 1 a is not contacting anything and pressing the wire 2. Since the metal bump 8 is interposed between the lower edge of the side and the electrode pad 3 as well, the pressing force of the capillary 1 is absorbed by the metal bump 8 and the influence on the electrode pad 3 and the chip 4 is mitigated.

  Next, as shown in FIG. 15 (c), the capillary 1 is raised to pull out the wire 2, and the wire 2 is clamped and cut as shown in FIG. 16 (d). As shown in the plan view), the pressing portion 25 of the wire 2 is also crushed on the metal bump 8 whose diameter is expanded by pressing on the electrode pad 3. In this state, the pressure contact portion 6 of the wire 2 pressed by the lower end edge 1 a of the capillary 1 is connected to the electrode pad 3 with the metal bump 8 interposed therebetween. The concave shape at the tip of the pressing portion 25 indicates the shape of the cut end 2 b of the wire 2.

  However, in the case of this method, it is necessary to form bumps on the electrode pads 3 in advance, so that dedicated equipment capable of hitting the bumps is required. In addition, extra time and wire material are required to hit the bumps, which is disadvantageous in terms of productivity and cost, and the electrode pads may be short-circuited due to the crushed bumps entering between adjacent pads. Therefore, it is necessary to secure an interval between pads.

Japanese Patent Laid-Open No. 10-335368 (Claim 2 Claims and FIG. 3)

  However, as described above, the conventional technique for directly connecting a plurality of IC chips by wire bonding has many problems.

  In the wire bonding method shown in FIGS. 13 and 14, when wedge bonding is performed, it is necessary to press the capillary 1 against the electrode pad 3 in order to cut the metal wire 2. Therefore, mechanical damage caused by the capillary 1 is caused by the electrode pad 3. If the load on the capillary 1 is lowered in order to affect the lower and peripheral circuit elements of the wire or to reduce the damage, there is a problem that the bonding strength of the wire 2 cannot be secured.

  Further, the wire bonding method shown in FIGS. 15 and 16 requires that the metal bumps 8 be formed on the electrode pads 3 in advance, and that dedicated equipment for that is required, and for the bump formation. Extra time and wire material are required, which is disadvantageous in terms of productivity and cost.

  Further, in the case of FIG. 14, in consideration of the damage that the capillary 1 causes to the IC chip 4, the elements around the electrode pad 3 and the adjacent pads must be separated at regular intervals. In the case of FIGS. 15 and 16, Since the crushed bumps become large and the crushed bumps may enter between adjacent pads, it is necessary to provide an interval as in FIG. For this reason, when connecting between the IC chips 4 with a plurality of metal wires, there is a limit to narrowing the pitch.

  The present invention has been made to solve the above-described problems, and provides a bonding structure and a bonding method capable of satisfactorily connecting conductive layers with conductive wires, a semiconductor device, and a method for manufacturing the same. It is the purpose.

  That is, according to the present invention, in the bonding structure in which the first conductive layer and the second conductive layer are connected by a conductive wire, the conductive wire is connected to the first conductive layer, and the second conductive layer is connected. A bonding structure (hereinafter referred to as a bonding structure according to the present invention), wherein the conductive wire is connected to the second conductive layer at least at the folded portion in a state where the conductive wire is folded up. .).

Further, the present invention provides a bonding method for connecting a first conductive layer and a second conductive layer with a conductive wire.
Connecting the conductor to the first conductive layer;
Guiding the conductive wire onto the second conductive layer and folding back the conductive wire;
And a step of connecting the conductive wire to the second conductive layer at least at the folded portion. The present invention relates to a bonding method (hereinafter referred to as the bonding method of the present invention).

  The present invention also relates to a semiconductor device having the above-described bonding structure of the present invention (hereinafter referred to as a semiconductor device of the present invention).

  The present invention also relates to a method for manufacturing a semiconductor device using the bonding method of the present invention described above (hereinafter referred to as the manufacturing method of the present invention).

  According to the bonding structure and bonding method of the present invention, a conductive wire (for example, a metal wire) connected to a first conductive layer (for example, an electrode pad of an IC chip) is connected to a second conductive layer (for example, an electrode pad of an IC chip). ) In a state where the conductive wire is folded so as to be folded on the second conductive layer, the conductive wire is connected to the second conductive layer at least at the folded portion. Since the thickness of the conductor increases due to the folding, there is no need to provide connection means such as bumps, and even if this part is mechanically thermocompression-bonded using a tool such as a capillary, the pressure depends on the thickness of the conductor in the folded part. It is absorbed and does not damage circuit elements under the second conductive layer, and can improve the bonding strength by increasing the pressure-bonding force to the pressure-bonding part. That.

  Therefore, it is not necessary to form bumps in advance, and no dedicated equipment or materials are required for this purpose. The manufacturing process can be simplified to improve productivity and cost, and the second conductive layer can be deformed by pressure bonding. Since damage can be prevented, the conductive layer can be narrowed, and the pitch of the connection can be narrowed.

  In addition, according to the semiconductor device of the present invention and the manufacturing method thereof, the semiconductor device having the above-described bonding structure of the present invention is manufactured by the bonding method of the present invention. It is possible to provide a semiconductor device having an effect and a manufacturing method thereof.

  In the above-described bonding structure, bonding method, semiconductor device, and manufacturing method thereof according to the present invention, the lead wire (metal wire) is temporarily pressure-bonded to the second conductive layer (second bond side electrode pad), and the folded portion By making the final pressure bonding to the second conductive layer, it becomes easier to perform the final pressure bonding by temporary pressure bonding, while the thickness of the lead wire increases at the folded portion, so the pressure at the time of the final pressure bonding is absorbed by the thickness and relaxed. In addition, it is desirable in that the bonding strength is improved.

  In this case, the temporary pressure bonding and the main pressure bonding may be performed at the same position or at different positions.

  And the said conducting wire may be cut | disconnected in the connection state to the said 2nd conductive layer, and after connecting to the said 2nd conductive layer, this connection part is relayed, and the said conducting wire is made into 3rd electroconductivity. It may be led on a layer (electrode pad on the third bond side) and connected to this third conductive layer.

  In this case, on the third conductive layer, connecting the conductor wire in a folded state so that the conductor wire is folded over increases the thickness of the conductor wire in the folded portion, so that the pressure at the time of crimping is absorbed and the pressure is relaxed. In addition, it is desirable in that the bonding strength can be increased.

  The first conductive layer (first bond side electrode pad) and the second conductive layer may both be electrodes on a semiconductor chip, and the first conductive layer may be an electrode on a mounting substrate or It may be an electrode on a semiconductor chip mounted on the mounting substrate, and the second conductive layer may be an electrode on the semiconductor chip or an electrode on the mounting substrate.

  In addition, even when a plurality of the semiconductor chips are juxtaposed or stacked on the mounting substrate, it is possible to achieve better connection as described above.

  Further, the conductive wire is connected to the first conductive layer on the mounting substrate, the conductive wire is connected to the second conductive layer on the semiconductor chip, and the conductive layer on the mounting substrate is connected from the connection portion. Can be connected to.

  In this case, it is desirable that the conducting wire is a bonding wire and is ball-bonded on the first conductive layer.

  Thereby, it can be satisfactorily applied to system in package (SiP) or system on chip (SoC).

  Here, the semiconductor device means not only SiP or SoC but also other hybrid integrated circuit devices in which an IC chip is mounted on a printed board, a stacked MCM structure or a juxtaposed MCM structure, and the like.

  The best mode for carrying out the present invention will be specifically described below with reference to the drawings.

Embodiment 1
1 and 2 are schematic views of a process corresponding to FIG. 14 showing the bonding structure of the present embodiment and shown as a conventional example. For the sake of easy understanding, the connecting portion is described as the electrode pads, but other portions may be used, for example, any connection such as the connection between the electrode pad and the lead frame or the conductive pattern on the substrate. The same applies to other embodiments described later.

  The bonding method according to the present embodiment is different from the conventional wire bonding in which the drawn metal wire is directly pressed against the electrode pad to perform the wedge bonding, and is characterized in that the bonding is performed by folding the wire (other embodiments to be described later). This is also the case), and in this embodiment, the crimping is performed twice in the same place.

  First, as shown in FIG. 1A, the capillary 1 is lowered and the metal wire 2 is temporarily pressure-bonded to the electrode pad 3 by the lower end edge 1a of the capillary. At this time, the capillary 1 deforms the temporary crimping portion 6 a of the metal wire 2, but the lower end edge 1 a of the capillary 1 is not brought into contact with the electrode pad 3. After provisional pressure bonding, the capillary 1 is moved upward and the metal wire 2 is pulled out as shown in FIG. In this figure, the bold arrow indicates the movement of the capillary 1. The same applies hereinafter.

  Next, as shown in FIG. 3C, the metal wire 2 is folded back and ultrasonic waves are again applied to the folded metal wire 2 at the lower end 1a of the capillary 1 on the side opposite to the temporary crimping portion 6a. And press-bond. At this time, the temporary crimping portion 6 a and the final crimping portion 6 b after the wire 2 is folded back are made the same, and the capillary 1 is not brought into contact with the electrode pad 3. For this reason, by increasing the thickness of the wire 2 at the folded portion and functioning like a bump, it is possible to relieve the pressure by absorbing the pressing force of the capillary 1 even during the main pressure bonding.

  Therefore, for example, even if a Zener diode or the like is incorporated directly under or around the electrode pad 3 in order to protect the built-in circuit of the IC chip 4 from static electricity, such a protective element is destroyed and becomes inoperable. In addition, since the adjacent electrode pads 3 are not deformed by the pressing force of the capillary 1, it is possible to reduce the interval between the electrode pads while holding the elements or circuits.

  In this case, it is important that both the temporary pressure bonding and the main pressure bonding are performed by applying a pressing force and ultrasonic waves that can provide sufficient bonding strength.

  Next, as shown in FIG. 2D, the capillary 1 is moved upward, the metal wire 2 is pulled out, and as shown in FIG. And cut. As a result, the cut end 2b of the wire 2 is formed, and the folded portion 20 to which the folded bond 13 is made has a structure in which the thickness of the wire 2 is increased as compared with normal wedge bonding, and the strength of the wire is increased.

  Then, as shown in FIG. 6F (plan view of the main part of FIG. 5E), the main crimping portion 6b is indicated by a broken line at the end of the wire 2 that is folded by the folding bond 13 and cut. It is formed on the temporary crimping part 6a and is firmly joined. In addition, the pressing portion 25 of the wire 2 is also deformed and enlarged in accordance with this pressing, but the degree of this deformation is compared with the conventional one (see FIGS. 14 and 16) by the folding portion 20 functioning like a bump. Since the electrode pad 3 is small and does not deform, the adjacent pad is not affected, and the connection pitch can be narrowed.

  According to the present embodiment, since the capillary 1 does not contact the electrode pad 3, mechanical damage due to the pressing force does not affect the lower part of the electrode pad or peripheral circuit elements. In addition, the thickness of the wire 2 at the joint portion is increased by the amount of the folded wire 2 as compared with a normal wedge bond, so that the pressing force can be increased and the joint strength can be increased. Further, since the thickness of the wire 2 at the folded portion functions in the same manner as the bump, it is not necessary to provide a bump in advance, and no dedicated equipment or material for this is required, and the connection can be narrowed in pitch.

Embodiment 2
3 and 4 show the bonding structure of the present embodiment and are schematic diagrams of processes corresponding to the first embodiment.

  The present embodiment is different from the first embodiment described above only in that the position where the metal wire is pulled out in the horizontal direction and turned back, and the temporary crimping location and the final crimping location of the metal wire are different. Accordingly, different points may be described, and descriptions of similar points may be omitted.

  That is, as shown in FIG. 3A, the capillary 1 is lowered and the metal wire 2 is temporarily pressure-bonded to the electrode pad 3 at one lower end edge 1a of the capillary 1, but the lower end edge 1a of the capillary 1 is the electrode pad 3 Do not touch. Then, the temporary pressure bonding is performed at a position closer to the first electrode pad side (left side in the figure) (not shown).

  Next, as shown in FIG. 5B, the wire 2 is pulled out to a position opposite to the temporary crimping portion 6a, and the wire 2 is folded back at this position as shown in FIG. As shown in (d), the main pressure bonding is performed at the position of the main pressure bonding portion 6b closest to the folded portion 20.

  Therefore, since the thickness of the wire 2 is increased in the folded portion and this portion functions like a bump, the pressure can be relieved by absorbing the pressing force of the capillary 1 during the main press bonding. Thereby, for example, in order to protect the built-in circuit of the IC chip 4 from static electricity, even if a Zener diode or the like is incorporated directly under or around the electrode pad 3, such a protective element is destroyed and becomes inoperable. In addition, since the adjacent electrode pads 3 are not deformed by the pressing force of the capillary 1, it is possible to reduce the distance between the electrode pads while holding the elements or circuits.

  Next, as shown in FIG. 4E, the capillary 1 is moved to pull out the wire 2, and as shown in FIG. 4F, the wire 2 is clamped and cut after the return bond 13.

  Therefore, as shown in FIG. 5G (plan view of the main part of FIG. 5F), the area of the pressure contact portion 6 is formed larger than that of the first embodiment, and the temporary pressure bonding portion 6a and the pressure bonding region having a smaller pressure bonding area. The main press bonding part 6b having a large size is formed. In this case as well, it is important to apply pressure by applying a pressing force and ultrasonic waves that can provide sufficient bonding strength for both the temporary pressure bonding and the main pressure bonding.

  As a result, the crimping is performed at two different positions, and the crimping portion 20 is finally crimped by the folding bond 13, so that the folding portion 20 functions in the same manner as the bump, and therefore it is not necessary to provide a bump in advance. No special equipment and materials are required, and the electrode pad 3 and its lower and surrounding circuit elements are not affected, the pressing force can be increased and the bonding strength can be further increased. Since the degree of deformation and expansion of the pressing portion 25 is smaller than that of the conventional example, the distance between adjacent pads can be reduced to reduce the pitch of the connection.

  According to the present embodiment, since the crimping is performed at two different places, the bonding area between the metal wire 2 and the electrode pad 3 can be increased compared to the first embodiment, so that the bonding strength can be further improved. There are advantages. Further, since the metal wire 2 is simply folded back and crushed by the capillary 1 as in the first embodiment, there is no need for a process such as forming a bump in advance, and no special equipment or extra material is required. Since the width of the joint portion between the metal wire 2 and the electrode pad 3 can be made smaller than that of the wedge bond, the connection pitch can be reduced.

Embodiment 3
5 to 8 are schematic views showing the bonding method of the present embodiment. In the above-described embodiment, the metal wire is cut after wire bonding, but this is an example in which this is relay-bonded without cutting, both of which apply the bonding structure of the above-described Embodiment 1 or 2 and are the same In this example, three electrode pads are connected by relay bonding on the IC chip or between the printed circuit board and the IC chip.

  Conventionally, when relay bonding is performed, it is common to perform wedge bonding on the second electrode pad, then perform ball bonding on the second electrode pad, and connect one after another (Japanese Patent Laid-Open No. 2002-353267). See the official gazette). However, as described in the above publication, wire bonding can be continuously performed without cutting the metal wire 2 each time and forming a ball. Further, there is a method of connecting one after another without cutting the metal wire (see FIG. 2 of the above publication), but the bonding strength of the connecting portion is low. However, this embodiment can be carried out satisfactorily.

  FIG. 5 shows an example, in which three electrode pads on the same chip 4 are connected by relay bonds. That is, the electrode pad 3 provided on the chip 4 is connected to the leftmost electrode pad 3a by the ball bond 11, and the wire 2 is formed in a folded structure at the center electrode pad 3b. 2 is connected by a relay bond 13A relayed without being cut, and a wire 2 is further extended to the electrode pad 3c at the right end and connected by a wedge bond 12.

  FIG. 2B shows this plan view. As a result, a large current that cannot be flowed by the circuit wiring on the IC chip can be flown by this connection, or can be used as a jumper line (a line other than the original path).

  (B ′) is a diagram showing a modification, and the connection method to the third electrode pad 3c in the above-described example is the same as that of the first embodiment instead of the wedge bond as shown in FIG. Similarly to the second bond in 2, it may be performed by the method of the folded bond 13 that is folded and cut. The same applies to other examples described later.

  The chip 4 after wire bonding is sealed with a mold resin 19 as shown by phantom lines in FIG. 5A. Generally, in the case of SiP in which the chip 4 is mounted and mounted on a printed board, the printed board Since the resin functions as a part of the mold, there is no inflow of resin to the back side of the printed circuit board, and the fluidity of the resin on the printed circuit board is improved. (This also applies to the following example).

  Although not shown, unlike the present embodiment, the invention is also applied to the case where the mold resin wraps around the back side of the chip, for example, connection between the electrode pad and the lead frame, or flip chip bonding. However, even in this case, the above-described wire bonding structure according to the present embodiment exhibits the same effect as described above.

  FIG. 6 shows another example, (a) is a schematic view, and (b) is a plan view. Similarly, the electrode pads on the IC chip are connected by relay bonds, and the first ball bond is connected to the substrate near the chip. In this example, the last wedge bond is located near the center of the IC chip on the conductive pattern, and two places that cannot be connected by ordinary wire bonds are connected via relay bonds.

  That is, as shown in FIGS. 4A and 4B, the electrode pads 14 of the printed circuit board 10 are connected by ball bonds 11, and the electrode pads 3a at the ends of the chip 4 are connected by relay bonds 13A. The electrode pads 3b are connected by wedge bonds 12.

  As described above, when the electrode pad 14 of the printed circuit board 10 and the electrode pad 3 of the mounted chip 4 are connected by wire bonding, there is a step, and therefore connection by normal wire bonding is not possible. Therefore, in order to prevent the contact between the metal wire and the edge of the IC chip 4, it is necessary to separate the bond point on the substrate from the chip edge by using a special wire loop. By doing so, a position closest to the chip 4 on the printed circuit board 10 and a position far from the chip edge on the IC chip 4 can be connected.

  FIGS. 7A and 7B show another example. FIG. 7A is a schematic diagram, and FIG. 7B is a plan view, which is an example of relay bonding to a chip-stacked IC chip. That is, the electrode pads 3a and 3b of the two IC chips 4a and 4b mounted in a stacked state on the printed circuit board 10 and the electrode pads 14 of the printed circuit board 10 are connected by a relay bond 13A. The electrode pads 14 of the substrate 10 are connected by ball bonds 11, the electrode pads 3 a of the IC chip 4 a are connected by relay bonds 13 A, and the electrode pads 3 b of the IC chip 4 b are connected by wedge bonds 12.

  As described above, the connection between the electrode pads 14 of the printed circuit board 10 and the electrodes of a plurality of IC chips stacked and mounted on the substrate is effective when it is desired to connect the upper and lower IC chips together.

  FIGS. 8A and 8B show another example. FIG. 8A is a schematic view, and FIG. 8B is a plan view. In this example, two electrode pads on a printed circuit board are double-bonded to one electrode pad of an IC chip. That is, the electrode pads 14a of the printed circuit board 10 are connected by ball bonds 11, the wires 2 are drawn onto the IC chip 4 on the circuit board and connected to the electrode pads 3 of the chip by relay bonds 13A. The electrode pad 14 b is connected by a wedge bond 12.

  Therefore, by such a bonding method, one electrode pad of the IC chip 4 can be connected to two electrode pads of the printed circuit board 10, so that workability is improved and unnecessary electrode pads are installed. Since it can be omitted, the omitted space can be used for elements such as installing input / output terminals for other purposes.

  According to the present embodiment, in order to connect a plurality of electrode pads with a relay bond, the metal wire is cut each time, a ball is formed each time, and even if it is not connected to the cut portion by a ball bond, it is continuously Can be wire bonded.

  In addition, since the thickness of the wire 2 at the joint portion is increased by the amount of the return of the wire 2 at the connection portion by the relay bond 13A, the joint strength between the metal wire 2 and the electrode pad can be increased, and the wire 2 is cut. Therefore, high reliability can be realized while maintaining high productivity and low cost.

  Each of the above-described embodiments can be variously modified based on the technical idea of the present invention.

  For example, in the first and second embodiments, when the wire 2 is cut after being folded and bonded, the cut end of the wire 2 is likely to be formed in a protruding shape at the bonding portion, so that the protrusion is pushed again at the lower edge of the capillary 1. It may be crushed and flattened. Thereby, a short circuit or the like due to contact with an adjacent wire or the like can be prevented.

  In addition to the embodiment, the method for folding the wire 2 can be formed by using, for example, a dedicated tool, and then crimped by the capillary 1.

  In addition, the final electrode such as the third electrode pad in the relay bonding according to the third embodiment is not limited to the wedge bonding 12, but may be folded back as in the first or second embodiment to perform the bond 13A.

  Further, for example, the first bond portion is not limited to ball bonding, and bonding using bumps may be used, and bumps may also be used in bonding portions after the second bond portion.

  Further, for example, aluminum may be used for the bonding metal wire 2 in addition to the gold wire or the copper wire.

  In addition, the place and the frequency | count of crimping | bonding of temporary crimping and main crimping in embodiment, the return position of the wire 2, operation | movement of the capillary 1, etc. are not restricted to embodiment, and may be appropriate.

It is the schematic of the principal part which shows the bonding process by Embodiment 1 of this invention. It is the schematic of the principal part which shows a bonding process equally. It is the schematic of the principal part which shows the bonding process by Embodiment 2 of this invention. It is the schematic of the principal part which shows a bonding process equally. It is the schematic which shows an example of the relay bonding by Embodiment 3 of this invention. It is sectional drawing which shows an example of the relay bonding similarly. It is sectional drawing which shows an example of the relay bonding similarly. It is sectional drawing which shows an example of the relay bonding similarly. It is a schematic plan view which shows an example of SoC (system on chip). It is a schematic plan view which shows an example of SiP (system in a package). It is the schematic which shows the wire bonding process between IC chips. It is an enlarged view of the state of one process of the wire bonding process in FIG. It is an expanded sectional view of the important section in the bonding process. It is the schematic which shows an example of the bonding process by a prior art example. It is the schematic which shows the example of improvement in a bonding process. It is the schematic which shows the example of improvement in a bonding process.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Capillary, 1a ... Lower end edge, 2 ... Metal wire, 2a, 2b ... Cutting end,
3, 14 ... Electrode pad, 4 ... IC chip, 5 ... Through hole, 6 ... Pressure contact part, 6a ... Temporary pressure bonding part,
6b ... Main pressure bonding part, 7 ... Indentation, 8 ... Metal bump, 9 ... Ball, 10 ... Printed circuit board,
11 ... Ball bond, 12 ... Wedge bond, 13 ... Folded bond,
13A ... relay bond, 15 ... interlayer film, 16 ... passivation film, 17 ... clamper,
19 ... Mold resin, 20 ... Folded part, 25 ... Pressing part, P ... Pressure

Claims (26)

  In a bonding structure in which a first conductive layer and a second conductive layer are connected by a conductive wire, the conductive wire is connected to the first conductive layer, and the conductive wire is folded on the second conductive layer. The bonding structure is characterized in that the conductive wire is connected to the second conductive layer at least at the folded portion in the folded state.   The bonding structure according to claim 1, wherein the conductive wire is temporarily pressure-bonded to the second conductive layer, and is finally pressure-bonded to the second conductive layer at the folded portion.   The bonding structure according to claim 2, wherein the temporary pressure bonding and the main pressure bonding are performed at the same position or at different positions.   The bonding structure according to claim 1, wherein the conducting wire is cut while being connected to the second conductive layer.   The connection portion is relayed after connection to the second conductive layer, and the conductive wire is led onto the third conductive layer and connected to the third conductive layer. Bonding structure.   The bonding structure according to claim 5, wherein the conductive wire is connected in a folded state so as to be folded on the third conductive layer.   The bonding structure according to claim 1, wherein both of the first conductive layer and the second conductive layer are electrodes on a semiconductor chip.   The first conductive layer is an electrode on a mounting substrate or an electrode on a semiconductor chip mounted on the mounting substrate, and the second conductive layer is an electrode on the semiconductor chip or an electrode on the mounting substrate. The bonding structure according to claim 1.   The bonding structure according to claim 7 or 8, wherein a plurality of the semiconductor chips are juxtaposed or stacked on a mounting substrate.   The conductive wire is connected to the first conductive layer on the mounting substrate, the conductive wire is connected to the second conductive layer on the semiconductor chip, and further connected to the conductive layer on the mounting substrate from this connection portion. The bonding structure according to claim 8, wherein   The bonding structure according to claim 7 or 8, wherein the conducting wire is a bonding wire and is ball-bonded on the first conducting wire layer.   The bonding structure according to claim 1, which is applied to a system-in-package (SiP) or a system-on-chip (SoC). In the bonding method for connecting the first conductive layer and the second conductive layer with a conductive wire,
Connecting the conductor to the first conductive layer;
Guiding the conductive wire onto the second conductive layer and folding back the conductive wire;
And a step of connecting the conductive wire to the second conductive layer at least at the folded portion.   The bonding method according to claim 13, wherein the conductive wire is temporarily pressure-bonded to the second conductive layer, and is finally pressure-bonded to the second conductive layer at the folded portion.   The bonding method according to claim 14, wherein the temporary pressure bonding and the main pressure bonding are performed at the same position or different positions.   The bonding method according to claim 13, wherein the conductive wire is cut while being connected to the second conductive layer.   The bonding method according to claim 13, wherein after the connection to the second conductive layer, the connection portion is relayed to guide the conductive wire onto the third conductive layer and connect to the third conductive layer.   The bonding method according to claim 17, wherein the conductive wires are connected in a folded state so as to be folded on the third conductive layer.   The bonding method according to claim 13, wherein both the first conductive layer and the second conductive layer are electrodes on a semiconductor chip.   The first conductive layer is an electrode on a mounting substrate or an electrode on a semiconductor chip mounted on the mounting substrate, and the second conductive layer is an electrode on the semiconductor chip or an electrode on the mounting substrate. The bonding method according to claim 13.   21. The bonding method according to claim 19 or 20, wherein a plurality of the semiconductor chips are juxtaposed or stacked on the mounting substrate.   The conductive wire is connected to the first conductive layer on the mounting substrate, the conductive wire is connected to the second conductive layer on the semiconductor chip, and further connected from the connecting portion to the conductive layer on the mounting substrate. The bonding method according to claim 20.   21. The bonding method according to claim 19 or 20, wherein the conducting wire is a bonding wire, and ball bonding is performed on the first conducting wire layer.   The bonding method according to claim 13, which is applied to a system in package (SiP) or a system on chip (SoC).   A semiconductor device having the bonding structure according to claim 1. A method for manufacturing a semiconductor device using the bonding method according to any one of claims 13 to 24.

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