JP2005115392A - Active matrix type el display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an active matrix type EL display device. <P>SOLUTION: In the active matrix type EL display device having a pixel matrix circuit arranged on a substrate, the pixel matrix circuit has a plurality of pixel regions arrayed in matrix. Each pixel region has a pixel TFT and a pixel electrode connected to the pixel TFT. The pixel electrode has a reflecting function. An electroluminescent layer is provided above the pixel electrode. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The invention disclosed in this specification relates to an electro-optical device that is driven using a semiconductor device including a thin film semiconductor and a manufacturing method thereof. In particular, the present invention relates to an active-matrix electro-optical device (AM-EOD) in which a pixel matrix circuit and a logic circuit are integrated on the same panel.

  Recently, a technique for manufacturing a thin film transistor (TFT) on an inexpensive glass substrate has been rapidly developed. The reason is that the demand for active matrix electro-optical devices has increased. In the active matrix electro-optical device, a TFT is arranged in each of millions of pixels arranged in a matrix, and electric charges entering and exiting each pixel electrode are controlled by a switching function of the TFT.

  As an electro-optical device, a liquid crystal display device using a change in optical characteristics of liquid crystal (Liquid Crystal Desplay), an EL display device using a light emitting EL material typified by ZnS: Mn (Electro Luminescence Display), and a discoloration of a photochromic dye There are EC display devices (Electro Clomic Desplay) that use the characteristics.

  These electro-optical devices can be driven by an active matrix method, and high-definition display can be realized by employing the same method.

  As described above, the major feature of the active matrix system is that on / off control is performed by pixel TFTs in which charges entering and exiting a plurality of pixel electrodes arranged in a matrix are arranged in each pixel region in the image display region of the electro-optical device. It is a point to do.

  Further, as a feature of the active matrix system, there is a point that a driving circuit is required to drive a TFT (pixel TFT) for controlling a pixel. Previously, an active matrix circuit was configured by connecting a pixel matrix circuit formed on a glass substrate and a separately prepared drive circuit IC.

  However, in recent years, it is common to form a plurality of circuit TFTs constituting a driving circuit on the same substrate as the pixel matrix circuit, and to configure a driving circuit (also called a peripheral driving circuit) around the pixel matrix circuit. It has become.

  More recently, in addition to drive circuits (shift register circuits, buffer circuits, etc.) for driving pixel TFTs, processor circuits, memory circuits, A / D (D / A) converter circuits, correction circuits, pulse oscillation circuits, etc. The SOP (system on panel) structure in which the controller circuit is incorporated on the same substrate is attracting attention.

  Here, FIG. 3 shows a general configuration of the electro-optical device. FIG. 3 shows an example of an active matrix liquid crystal display device. Reference numeral 301 denotes a glass substrate, and 302 denotes a pixel matrix circuit formed on the glass substrate 301.

  Note that the pixel matrix circuit 302 has a configuration in which a plurality of pixel regions are integrated. That is, when the pixel matrix circuit 302 is enlarged, a plurality of pixel regions (arbitrary two regions are described in FIG. 3) are arranged in a matrix as indicated by 303, and each pixel region Are provided with at least a pair of pixel TFTs and pixel electrodes.

  Further, the horizontal scanning drive circuit (transmits a data signal to the data line) 304 includes a shift register circuit, a level shifter circuit, a buffer circuit, a sampling circuit, and the like. A level shifter circuit is a circuit that amplifies drive voltage.

  For example, when the shift register circuit is driven by 10V and the buffer circuit is driven by 16V, it is necessary to perform voltage conversion by the level shifter circuit. Further, the shift register circuit may be used in combination with a counter circuit and a decoder circuit.

  The vertical scanning driving circuit (transmitting a gate signal to the gate line) 305 includes a shift register circuit, a level shifter circuit, a buffer circuit, and the like.

  In the near future, the control circuit 306 is expected to be arranged at a position as shown in FIG. Since the control circuit 306 is composed of a complex logic circuit such as a processor circuit or a circuit having a large occupation area such as a memory circuit, the total occupation area is expected to increase.

  As described above, generally, the pixel matrix circuit 302, the horizontal scanning drive circuit 304, the vertical scanning drive circuit 305, and the controller circuit 306 are arranged on one glass substrate 301. Therefore, in order to secure as many display areas as possible on the determined glass size, it is necessary to make the occupied area other than the pixel matrix circuit as small as possible.

  However, even if the frame structure as shown in FIG. 3 is adopted, there is a limit to the high integration of the peripheral drive circuit. In addition, when an added value such as a controller circuit is added, it is difficult to further increase the area of the pixel matrix circuit.

  The invention disclosed in this specification solves the above-described problems, increases the area of the pixel matrix circuit as a display region of the electro-optical device (optical display device) as much as possible, and maximizes the size of the base substrate. It is an object to realize a large screen display.

The configuration of the invention disclosed in this specification is as follows.
In an electro-optical device having a pixel matrix circuit and a logic circuit arranged on the same substrate,
A part or all of the logic circuit is arranged in a region occupied by the pixel matrix circuit.

In addition, the configuration of other inventions is as follows:
An active matrix substrate having a pixel matrix circuit and a logic circuit on the same substrate;
A liquid crystal layer held on the active matrix substrate;
In an electro-optical device having at least
A part or all of the logic circuit is arranged in a region occupied by the pixel matrix circuit.

  The basic gist of the present invention is to effectively utilize a pixel region on the back side of a pixel electrode in an electro-optical device driven in a reflection type mode or a light emission type mode. That is, as shown in FIG. 3, a logic circuit that has been conventionally arranged on the outer frame of a pixel matrix circuit is configured using a pixel region, and part or all of the logic circuit is incorporated in the pixel matrix circuit. .

  In other words, when a cross section of an active matrix substrate in which a pixel matrix circuit and a logic circuit are integrated is viewed, a part or all of the logic circuit is below a pixel electrode connected to a pixel TFT constituting the pixel matrix circuit. It is an arranged configuration.

  Note that the logic circuit here refers to a circuit other than the pixel matrix circuit composed of a drive circuit and / or a control circuit. The control circuit includes all information processing circuits necessary for driving an electro-optical device represented by a processor circuit, a memory circuit, an A / D or D / A converter circuit, a correction circuit, and a pulse oscillation circuit. And

  An electro-optical device (typically a reflective liquid crystal display device) driven in the reflective mode does not need to transmit light. Therefore, unlike the transmissive liquid crystal display device, the pixel electrode is made transparent to secure an optical path. There is no need. Therefore, it is possible to effectively utilize the back side of the pixel electrode (downward when viewed from the cross section) that could not be used in the transmissive liquid crystal display device as an area for arranging the logic circuit.

  The reflective liquid crystal display device driven in the above-described reflective mode will be briefly described with reference to FIG. In FIG. 4A, 401 is an active matrix substrate, 402 is a counter substrate, and 403 is a liquid crystal layer.

  In addition, a pixel electrode 404 (a reflector may be provided if necessary) is provided on the active matrix substrate 401. Note that the pixel electrode 404 is protected by a protective film 405.

  FIG. 4A shows a state in which the TFT is in an OFF state, and the liquid crystal molecules are arranged in a state that does not change the polarization direction of incident light.

  In this state, light 407 given an arbitrary polarization direction (here, reflected by the beam splitter) using the polarizer 406 is incident on the liquid crystal layer 403 via the beam splitter 408. The beam splitter 408 has a function of selectively transmitting or reflecting light depending on the polarization direction.

  As described above, in the state of FIG. 4A (TFT is off), the light 407 incident on the liquid crystal layer 403 is reflected by the pixel electrode 404 without changing its polarization direction and reaches the beam splitter 408. That is, the light 407 reflected by the pixel electrode 404 is returned in the same polarization direction as that at the time of incidence. Therefore, the light 407 entering the beam splitter 408 is reflected and does not enter the eyes of the observer.

  On the other hand, the state shown in FIG. 4B shows a state in which the TFT is on, and the liquid crystal molecules are arranged in a state in which light 409 indicated by an arrow is polarized. That is, the light 409 reflected by the beam splitter 408 changes its polarization direction by the liquid crystal layer 410 and passes through the beam splitter 408 to enter the observer's eyes.

  As described above, the electro-optical device driven in the reflective mode enables light on / off control corresponding to the on / off state of the TFT. A representative example of such an electro-optical device is a reflective liquid crystal display device, and further includes an ECB (electric field control birefringence) mode, a PCGH (phase transition guest / host) mode, an OCB mode, a HAN mode, a PDLC type GH mode, and the like. It is classified into various drive modes. (Refer to LCD Inteligence August issue, p. 51-63, 1996)

  However, the present invention can be applied to any drive mode as long as the specular reflection plate is disposed immediately behind the liquid crystal layer.

  In addition to the reflective liquid crystal display device, the present invention can also be applied to an active matrix EL display device that is driven in a light-emitting mode and an active matrix EC display device that uses the discoloration characteristics of a photochromic dye. That is, any structure other than the transmission type electro-optical device can be applied.

  Further, in the claims disclosed in this specification, the electro-optical device includes not only a so-called display panel but also an application product incorporating the display panel. The applicant defines an electro-optical device as any device that performs an original function by an electric action, an optical action, or a combination of these actions.

  In the present specification, for convenience of explanation, the term “electro-optical device” is used as appropriate for a display device (display panel), an applied product, or the like.

In addition, the configuration of other inventions is as follows:
In manufacturing an electro-optical device having a pixel matrix circuit and a logic circuit arranged on the same substrate,
A part or all of the logic circuit is arranged in a region occupied by the pixel matrix circuit.

In addition, the configuration of other inventions is as follows:
Forming an active matrix substrate having a pixel matrix circuit and a logic circuit on the same substrate;
Holding a liquid crystal layer on the active matrix substrate;
Having at least
A part or all of the logic circuit is arranged in a region occupied by the pixel matrix circuit.

  By implementing the invention disclosed in this specification, it is possible to overlap the pixel matrix circuit and the logic circuit in the same region. That is, since the area occupied by the logic circuit is not limited, a large image display area (pixel matrix circuit) can be secured by making the most of the size of the glass substrate.

  In addition, since the area where the logic circuit can be arranged is substantially widened, the degree of freedom in designing the electro-optical device is widened, and an extremely high-performance electro-optical device can be realized.

  In constructing an active matrix type electro-optical device in which a pixel matrix circuit and a logic circuit (including a drive circuit and a control circuit) are integrated on a single glass substrate 101, the pixel matrix circuit and the logic circuit are overlapped. To be arranged.

  This configuration is not possible with a transmissive electro-optical device that requires an optical path (opening) such as a backlight. This is because the pixel matrix circuit of the transmissive electro-optical device has almost all openings, and it is impossible to configure a logic circuit without reducing the amount of transmitted light in the pixel matrix circuit.

  Therefore, it can be said that the present invention is a technique that can be implemented in a reflective electro-optical device that does not require an optical path. Specifically, a logic circuit is to be configured below (on the back side) of the pixel electrode serving as a reflector.

  In FIG. 2A, connection wirings 146 to 150 connect circuit TFTs (first, second,... Nth circuit TFTs) to each other to form an A / D converter circuit, a memory circuit, or the like. Wiring. At this point, the logic circuit is complete.

  Further, data wirings 152 to 155 used for inputting / outputting data signals in the first and second pixel TFTs are arranged. Note that the data wirings 153 and 155 can be said to be extraction electrodes to the pixel electrodes 160 and 161 later.

  The pixel electrodes 160 and 161 can be provided with a function as a reflecting plate that reflects incident light by setting the surface of the pixel electrodes 160 and 161 to a mirror surface state. In addition, a reflective film that serves as a mirror may be provided above the pixel electrodes 160 and 161 as necessary.

  With the above structure, the logic circuits 503 and 504 can be incorporated into a plurality of pixel regions constituting the pixel matrix circuit 502 as shown in FIG.

  The present invention shown in the above configuration will be described in detail with the embodiments described below.

  A manufacturing process of an active matrix substrate having the structure of the present invention will be described with reference to FIGS. Note that this example shows an example, and specific conditions such as numerical values to be described may be determined as appropriate by the manufacturer.

  First, the substrate 101 having an insulating surface is prepared. In this embodiment, a glass substrate on which a silicon oxide film is deposited is used as the substrate 101. A quartz substrate may be used instead of the glass substrate.

  Next, an amorphous silicon film (not shown) is formed to a thickness of 500 mm, and is transformed into a crystalline silicon film using an appropriate crystallization technique. Crystallization may be performed by heat treatment, laser treatment, or a combination of both treatments. The crystallization temperature in the case of heat treatment needs to consider the heat resistance temperature of the glass substrate (or quartz substrate).

  When a crystalline silicon film (not shown) is obtained, patterning is performed to form active layers 102 to 105. The active layer 102 is an active layer constituting the first pixel TFT, and the active layer 105 is an active layer constituting the second pixel TFT.

  Between the first and second pixel TFTs (both are P-channel TFTs), the first to Nth circuit TFTs (the circuit TFTs in the middle are omitted) are arranged. In this embodiment, the first circuit TFT is an N-channel type, and the N-th circuit TFT is a P-channel type.

  The Nth circuit TFT is used because the number of necessary circuit TFTs changes depending on what kind of logic circuit is configured. That is, hundreds of thousands to millions of pixel TFTs are actually arranged in a matrix on the glass substrate 101, and the circuit TFTs constitute a logic circuit by sewing between them.

  Of course, the first circuit TFT and the Nth circuit TFT do not necessarily have the same structure. In this embodiment, the description is basically made on the same structure, but it goes without saying that the structure is appropriately changed depending on the design of the logic circuit, such as a difference in channel length and the presence or absence of an offset region.

  Next, when the active layers 102 to 105 are formed, a gate insulating film 106 is formed to a thickness of 1200 mm. As the gate insulating film 106, a silicon oxide film formed by a plasma CVD method or a low pressure thermal CVD method may be used. Of course, it can also be formed using a thermal oxidation method.

  Next, patterns 107 to 110 containing aluminum as a main component are formed on the gate insulating film 106. In this embodiment, an aluminum film having a thickness of 4000 mm containing 0.2 wt% scandium is used as a material for the patterns 107 to 110. Scandium has the effect of preventing hillocks and whiskers generated in the aluminum film.

  The aluminum film patterns 107 to 110 serve as a prototype of the later gate electrode and gate wiring. In addition to the aluminum film, a metal material such as tantalum, niobium, or molybdenum can be used. Alternatively, a crystalline silicon film (polysilicon film) imparted with conductivity may be used.

  In this way, the state of FIG. 1A is obtained (a resist mask not shown remains on the aluminum film patterns 107 to 110). When this state is obtained, anodization using a 3% oxalic acid aqueous solution as the electrolytic solution is performed to form porous anodic oxide films 111-114. In this embodiment, the film is grown to a thickness of 0.7 μm by adjusting the formation current to 2 to 3 mA and the ultimate voltage of 8V.

  At this time, the anodic oxidation reaction proceeds in a direction parallel to the substrate. This is because a resist mask (not shown) still exists on the upper surfaces of the aluminum film patterns 107 to 110, and the anodic oxidation reaction does not proceed there.

  Further, after removing the resist mask with a dedicated stripping solution, anodization is performed again to form dense and strong anodic oxide films 115 to 118 having a thickness of 1000 mm. At this time, an electrolytic solution is used in which an ethylene glycol solution of 3% tartaric acid is neutralized with aqueous ammonia and adjusted to PH = 6.92. Further, processing is performed at a formation current of 5 to 6 mA and an ultimate voltage of 100V.

  Since the electrolytic solution penetrates into the porous anodic oxide films 111 to 114, the anodic oxide films 115 to 118 are formed as shown in FIG. At the same time, gate electrodes 119 to 122 for controlling the first and second pixel TFTs and the first and Nth circuit TFTs are defined. (Fig. 1 (B))

  In addition, since the anodic oxide films 115 to 118 are dense and strong, they have a role of protecting the gate electrodes 119 to 122 from damage caused in a subsequent process such as a doping process or heat of a heating process.

  When the state of FIG. 1B is obtained, a part of the gate insulating film 106 is etched and removed in a self-aligning manner by a dry etching method using the gate electrode and the porous anodic oxide film as a mask. By this step, the gate insulating film 106 remains only under the gate electrode and the porous anodic oxide film.

  Next, the porous anodic oxide films 111 to 114 are removed, and regions that become P-channel TFTs (regions that become first and second pixel TFTs and Nth circuit TFTs) are covered with a resist mask 123.

  Next, P (phosphorus) ions imparting N-type are implanted into the active layer 103 using an ion implantation method. At this time, since the acceleration voltage of ion implantation is as high as about 80 kV, all the P ions are added to the active layer 103 through the remaining gate insulating film 106.

  Next, the acceleration voltage is lowered to about 10 kV, and a second ion implantation is performed. Since the acceleration voltage is low in this ion implantation, P ions are not added under the region where the gate insulating film 106 remains.

  By such two P ion implantations, the source region 124 and the drain region 125 of the first circuit TFT are formed. In the region where P ions are added through the gate insulating film 106, low concentration impurity regions 126, 127 to which P ions having a lower concentration than the source / drain regions are added are formed.

  In particular, the low-concentration impurity region 127 formed on the side close to the drain region 125 is called an LDD (lightly doped drain) region, and has an effect of effectively suppressing off current, leakage current, and the like.

  In addition, an intrinsic or substantially intrinsic channel formation region 128 to which no P ions are added is directly below the gate electrode 120. Strictly speaking, both ends of the channel formation region 128, that is, immediately below the anodic oxide film 116 function as offset regions to which no gate voltage is applied.

  In this way, the state shown in FIG. Next, after removing the resist mask 123, a region to be an N-channel TFT is covered with a resist mask 129. Then, B (boron) ions, which are impurity elements imparting P-type, are added to the active layers 102, 104, and 105.

  Also in this case, as in the case of the previous N-channel TFT, the first ion implantation adjusts the acceleration voltage higher and the second ion implantation weakly. By this B ion implantation process, source regions 130 and 131, drain regions 132 and 133, low-concentration impurity regions 134 to 137, and channel formation regions 138 and 139 of the first and second pixel TFTs are formed. Further, a source region 140, a drain region 141, low-concentration impurity regions 142 and 143, and a channel formation region 144 of the Nth circuit TFT are formed.

  As described above, an N-channel TFT and a P-channel TFT are separately formed with the arrangement shown in FIG. Note that this embodiment is merely an example, and a method other than the above method may be used as a method for manufacturing the N-channel TFT and the P-channel TFT.

  Next, the impurity element added to the active layer is activated by means of heat treatment, laser treatment, or a combination of both. Furthermore, simultaneously with activation, the crystallinity of the active layer damaged by ion implantation is improved.

  Next, after removing the resist mask 129, a first interlayer insulating film 145 is formed to a thickness of 5000 mm. As the first interlayer insulating film 145, a silicon oxide film, a silicon nitride film, or a stacked film thereof may be used.

  Next, when the first interlayer insulating film 145 is formed, contact holes are formed to form connection wirings 146 to 150 of the circuit TFT. The connection wirings 146 to 150 are wirings for connecting the circuit TFTs, and the first to Nth circuit TFTs are connected to each other to constitute a logic circuit. In this state, the first to Nth circuit TFTs are completed.

  In this way, the state of FIG. When the state of FIG. 2A is obtained, a second interlayer insulating film 151 is formed to a thickness of 1 μm. As the second interlayer insulating film 151, polyimide which is a transparent organic resin material is used. Polyimide has a feature that it can easily increase the film thickness by a spin method and has excellent flatness. Moreover, since the relative permittivity is small, the parasitic capacitance can be reduced.

  Next, data wirings 152 to 155 connected to the first and second pixel TFTs are formed. At this time, the data lines 152 and 154 connected to the source regions 130 and 131 are lines for transmitting data signals from the driving circuit, and the data lines 153 and 155 connected to the drain regions 132 and 133 are pixel electrodes to be formed later. And function as pipe wiring for connecting the TFT.

  Further, after the data wirings 152 to 155 are formed, a third interlayer insulating film 156 is formed to a thickness of 5000 mm. In this embodiment, the third interlayer insulating film 156 is also made of polyimide. (Fig. 2 (B))

  Next, the black matrices 157 and 158 are formed using a material having a function of absorbing light. In this embodiment, a resin material in which a black pigment is dispersed is used, but titanium nitride or the like can also be used. As the resin material, an acrylic material, polyimide, polyimide amide, polyamide, or the like may be used.

  After the black matrices 157 and 158 are formed, a polyimide film is formed as a fourth interlayer insulating film 159 to a thickness of 3000 mm thereon. As the fourth interlayer insulating film 159, a silicide film such as a silicon oxide film or a silicon nitride film may be used.

  However, the pixel electrode (or the reflector) formed on the fourth interlayer insulating film 159 needs to be formed on a sufficiently flat surface so as to accurately reflect light. Therefore, it can be said that it is important to pay attention so that the fourth interlayer insulating film 159 can obtain sufficient flatness.

  Then, pixel electrodes 160 and 161 are formed on the fourth interlayer insulating film 159. The pixel electrodes 160 and 161 may be made of a metal material, but in order to form a uniform electric field over the entire surface, a material mainly composed of low resistance aluminum is preferable. Further, it is desirable that the surfaces (light reflecting surfaces) of the pixel electrodes 160 and 161 are in a mirror state so that incident light can be effectively reflected.

  As shown in FIG. 2C, the pixel electrodes 160 and 161 are formed in a pattern in which black matrices 157 and 158 are arranged in the gaps. As is apparent from FIG. 2C, the first to Nth circuit TFTs are arranged below the pixel electrode 160, and a logic circuit can be configured.

  Usually, a protective film is provided on the pixel electrodes 160 and 161 to prevent the pixel electrodes 160 and 161 from being deteriorated. Further, when the pixel electrodes 160 and 161 cannot be provided with a function as a reflection plate, a metal thin film can be separately provided as the reflection plate.

  As described above, an active matrix substrate as shown in FIG. 2C can be manufactured. Although this embodiment shows an example in which a planar transistor is manufactured, it is easy to implement the present invention with TFTs having other structures such as a staggered type and an inverted staggered type.

  In addition, an active matrix liquid crystal display device can be obtained by using a structure in which liquid crystal is sandwiched between an active matrix substrate manufactured in this embodiment and a counter substrate. Further, when an EL material is sandwiched as a light emitting layer instead of a liquid crystal layer, an active matrix EL display device is obtained. An active matrix EC display device can be obtained by sandwiching a solution containing a photochromic dye, a pigment, and an electrolyte.

  As the liquid crystal display device, for example, a guest-host type liquid crystal display device in which a dichroic dye is mixed in a host liquid crystal can be manufactured. Since the cell assembling process may be performed by a known method, description thereof is omitted here. Among guest host systems, what is called a PCGH (Phase change guest host) mode can realize high contrast and bright display because a polarizer is not required.

  In addition to the guest-host method, an ECB (electric field control birefringence) mode, a PDLC (polymer dispersion type) mode, or the like can be used. Since these methods do not require a color filter or a polarizer, they are extremely effective for a reflective liquid crystal display device that is vulnerable to light loss. In the case of the PDLC mode, a liquid crystal panel can be configured even with only an active matrix substrate.

  When an electro-optical device is configured using the present invention, it is preferable to use a glass or quartz substrate for the active matrix substrate and the counter substrate. This is because, when a silicon wafer or the like is used in manufacturing the active matrix substrate, there is a possibility that the electro-optical device may be warped due to the influence of stress after the electro-optical device is constructed, or in the worst case, it may be damaged.

  By the way, the greatest feature of the present invention is that a circuit TFT is formed below the pixel electrode, as shown in FIG. This configuration is not possible with a transmission type electro-optical device that transmits light.

  That is, in the case of a reflection type or light emission type electro-optical device, an area under the pixel electrode that had to be vacated because it becomes an optical path in the transmission type electro-optical device, a logic circuit such as a drive circuit or a control circuit is provided. It can be used as an area that can be constructed.

  Therefore, by implementing the present invention, the driving circuit and the control circuit that have been conventionally arranged in the peripheral region of the pixel matrix circuit are incorporated in the region where the pixel matrix circuit is arranged, and the size of the glass substrate is maximized. Therefore, the pixel matrix circuit, that is, the image display area can be expanded.

  In recent years, the aperture ratio of a transmissive electro-optical device has been gradually increased. However, when replaced with the present invention, there is nothing but an increase in the free space for configuring a logic circuit. In particular, as the miniaturization of semiconductor elements progresses rapidly in the future, this tendency will become stronger and the importance of the present invention will further increase.

As is clear from the basic configuration of the present invention, the present invention can be devised in any way according to the needs of the designer or manufacturer of the electro-optical device. In other words, the basic concept of “constructing a logic circuit in an area where a pixel matrix circuit is arranged” is important, and the designer may determine what kind of logic circuit is arranged as appropriate.

  Here, the configuration of the electro-optical device manufactured according to this embodiment will be described with reference to FIG. In FIG. 5, reference numeral 501 denotes a glass substrate, and 502 denotes a pixel matrix circuit.

  When a part of the pixel matrix circuit 502 is enlarged, the logic circuits 503 and 504 are incorporated in the pixel region.

  In FIG. 5, two logic circuits 503 and 504 are incorporated in one pixel region. However, this is only an example. It is also possible to configure one functional circuit over a plurality of pixel regions by connecting the other pixel regions with each other by wiring.

  Further, when the logic circuit 504 is enlarged, a circuit as indicated by 505 is configured. For example, among the circuits indicated by 505, the left side is a CMOS circuit, and the right side is a NAND circuit (or NOR circuit).

  With the above structure, the logic circuit can be incorporated in the pixel matrix circuit. That is, as shown in FIG. 5, the pixel matrix circuit 502 can be configured by utilizing the size of the glass substrate 501 to the maximum.

  In the reflection type electro-optical device to which the present invention is to be applied, the pixel matrix circuit is directly used as an image display area, so that a large screen display can be performed without being limited to the position where the logic circuit is arranged.

  In this embodiment, the significance of circuit design when the present invention is used will be described. A feature of the present invention is that the pixel matrix circuit and the logic circuit can be arranged in the same region on the glass substrate (or quartz substrate).

  FIG. 6A shows an embodiment of the present invention. A driving circuit 602 and a control circuit 603 are arranged on the glass substrate 601 in accordance with the manufacturing process of the first embodiment (to be exact, 602 is an area where the driving circuit can be arranged, and 603 can arrange a control circuit. Area).

  The logic circuit configured by the drive circuit 602, the control circuit 603, and the like and the pixel matrix circuit 604 are configured to share the arrangement area. Actually, the pixel TFT and the circuit TFT constituting the pixel matrix circuit 604 are formed in the same layer, and the pixel electrode connected to the pixel TFT covers the circuit TFT (see FIG. 2C). ).

  Accordingly, in FIG. 6A, a region overlapping with the pixel matrix circuit 604 in the logic circuit is indicated by a dotted line. This is because, when the active matrix substrate as shown in FIG. 6A is viewed from the top, only the pixel electrodes can be seen but the logic circuit disposed below cannot be seen.

  In the case of FIG. 6A, a vertical scanning drive circuit (vertical portion of the T-shaped drive circuit 602) is arranged at the center of the pixel matrix circuit 604. The signal scanning method is not particularly limited. In addition to the normal method, for example, the gate signal transmission system can be divided on the left and right sides of the substrate with the vertical scanning driving circuit as the center.

  Next, FIG. 6B shows another embodiment of the present invention. As shown in FIG. 6B, a driving circuit 605 can be provided at the end of the glass substrate 601 and the control circuits 606 to 608 can be arranged in a central empty space.

  Since the control circuit has a complicated circuit configuration, it is expected to require a relatively large area. Therefore, the configuration as shown in FIG. 6B is preferable because the degree of freedom in design of the control circuits 606 to 608 is increased.

  In FIG. 6B, the control circuit is divided into three areas 606, 607, and 608. However, the control circuit is only shown for each functional block, and is not necessarily divided.

  6B illustrates an example in which the driver circuit 605 is incorporated in the pixel matrix circuit 604, a structure in which only the driver circuit 605 is provided outside the pixel matrix circuit 604 may be employed. . By doing so, the design freedom of the control circuits 606 to 608 can be increased.

  Next, FIG. 6C shows another embodiment of the present invention. As shown in FIG. 6C, the driving circuit 609 may be formed in a cross shape, and the control circuits 610 to 613 may be arranged in each region on the substrate divided into four regions.

  In the configuration shown in FIG. 6C, the driving method is not specified, and the four regions may be driven together or may be driven individually by different systems. In some cases, four different screens can be displayed on a single substrate.

  In the present embodiment, an example of a configuration for effectively using a pixel region in implementing the present invention will be described. Specifically, a method for arranging the pixel electrodes will be described.

  7A, reference numerals 701 to 704 denote data wirings provided in parallel, and reference numerals 705 to 707 denote gate lines provided in parallel so as to be orthogonal to the data lines 701 to 704.

  A pixel TFT is connected to each intersection of the gate line 705 and the data lines 701 to 704. Similarly, the gate TFTs of the gate lines 706 and 707 are connected to the intersections of the data lines 701 to 704. Yes.

  In the structure shown in FIG. 7A, two pixel TFTs and pixel electrodes (708, 709) are formed in one pixel region (for example, a region surrounded by the gate lines 705, 706 and the data lines 702, 703). (Represented by a dotted line).

  With such a configuration, the area of one pixel region can be increased by about two times compared to the conventional configuration in which a set of pixel TFTs and pixel electrodes are arranged in one pixel region. is there. That is, when the logic circuit (area indicated by hatching) 710 is incorporated in the pixel area, the number of times of overcoming the data line is reduced, so that the cause of disconnection failure or the like can be reduced.

  In FIG. 7B, reference numerals 711 to 714 denote data wirings provided in parallel, and reference numerals 715 to 718 denote gate lines provided in parallel so as to be orthogonal to the data lines 711 to 714.

  A pixel TFT is connected to each intersection of the gate line 715 and the data lines 711 to 714, and similarly, a pixel TFT is connected to the intersection of the data lines 711 to 714 for the gate lines 716 to 718. Yes.

  The structure shown in FIG. 7B is different from FIG. 7A in that four pixel TFTs are provided in one pixel area (for example, an area surrounded by the gate lines 716 and 717 and the data lines 712 and 713). And pixel electrodes (represented by dotted lines 719 to 722).

  In the case of such a configuration, it is possible to further enlarge one pixel area, and it is possible to secure an area corresponding to about four times the conventional area. Such a configuration can significantly reduce the number of times that the logic circuit 723 crosses the gate line and the data line, so that an electro-optical device can be manufactured with a higher yield.

  In the present embodiment, an example of another structure different from the first embodiment of the electro-optical device manufactured by using the present invention will be described. Since the schematic structure is the same as FIG. 2C shown in the first embodiment, in this embodiment, only necessary portions will be described with reference to FIGS. 8A and 8B. I will do it.

  The structure shown in FIG. 8A is an example in which the structure of the pixel TFT is a double gate structure. The double gate structure is a structure in which two gate electrodes are provided on the active layer, and can provide redundancy for defective operation of the pixel TFT.

  Further, a source region 803, low-concentration impurity regions 804 to 807, and a drain region 808 are formed by an ion implantation process using two gate electrodes 801 and 802 (both are crystalline silicon films in this embodiment) as masks. be able to. In particular, the low-concentration impurity regions 805 and 807 arranged on the drain region side are called LDD regions, and an effect of effectively suppressing off current and leakage current can be expected.

  Next, the configuration shown in FIG. 8B is a configuration in which two sets of pixel TFTs and pixel electrodes are arranged between adjacent data wirings 809 and 810. This structure is the same as the structure shown in FIG. 7A, and the data lines 809 and 810 and the pixel electrodes 811 and 812 in FIG. 8B are the data lines 702 and 703 and the pixel electrodes in FIG. 708 and 709.

  Another feature of FIG. 8B is that the pixel TFT and the circuit TFT have a salicide structure. For example, in a CMOS circuit (inverter circuit) 813 composed of two circuit TFTs, tungsten silicide layers 814 to 816 are formed on the source region, drain region, and gate electrode to facilitate ohmic contact.

  The salicide structure can be easily formed by following a well-known method (in this embodiment, the side wall 817 is used), and the description thereof is omitted here. In addition to tungsten, titanium, molybdenum, cobalt, platinum, or the like can be used as a silicide material used for the salicide structure.

  In this embodiment, an embodiment when a special function is added to the black matrix will be described. 9A and 9B are used for the description. Since the schematic structure is the same as FIG. 2C shown in the first embodiment, in this embodiment, only necessary portions will be described with reference to FIGS. 9A and 9B. I will do it.

  In FIG. 9A, titanium nitride is used as the black matrix 901. Titanium nitride is a material having extremely small surface reflection, and thus has a function as a black matrix and is characterized by being a conductive material.

  Therefore, as shown in FIG. 9A, the black matrix 901 can be arranged so as to overlap with the pixel electrode 902, and an auxiliary capacitor can be formed therebetween. At this time, as an insulating layer (fourth interlayer insulating film) 903 between the black matrix 901 and the pixel electrode 902, an organic resin material (polyimide or the like), a silicon oxide film, or a silicon nitride film may be used.

  In the case of the configuration of the present embodiment, an area substantially equivalent to the pixel region can be used as an auxiliary capacity, so that a sufficient capacity can be obtained. Therefore, the material and film thickness of the fourth interlayer insulating film 903 should be selected with emphasis on the planarization effect.

  Next, the structure illustrated in FIG. 9B is a structure in which the space between the pixel electrode 904 and the pixel electrode 905 adjacent thereto is embedded with a black matrix 906. As the black matrix 906, an organic resin material in which a black pigment is dispersed is used.

  The aim of the configuration shown in FIG. 9B is to suppress a horizontal electric field (an electric field in a direction parallel to the substrate) that may be formed between the pixel electrodes 904 and 905, and to disturb the alignment of the liquid crystal (disc Is to prevent (relation).

  Therefore, in this embodiment, a material having a sufficiently low relative dielectric constant is provided so as to cover the end portions (particularly corner portions) of the pixel electrodes 904 and 905 (compared to the liquid crystal material). By doing so, the electric field generated by the pixel electrode concentrates on the liquid crystal having a high relative dielectric constant, and it is possible to suppress the formation of a horizontal electric field between the pixel electrodes.

  The relative dielectric constant of the liquid crystal material used in this embodiment has a dielectric anisotropy between 3.5 and 10, and the relative dielectric constant in a state where an electric field is applied to the liquid crystal is about 10. In comparison, the organic resin material that is the material of the black matrix 906 has a relative dielectric constant of about 3.0 to 3.5, which satisfies the requirements of this embodiment.

  Note that in the case where the film thickness of the black matrix 906 cannot be obtained (a sufficient light shielding ability cannot be exhibited), a trench may be formed in the third interlayer insulating film 907 in advance before the black matrix 906 is formed. .

  In other words, the third interlayer insulating film 906 is etched in a self-aligning manner using the pixel electrodes 904 and 905 as masks, and the black matrix 906 is embedded in the trench groove, thereby providing sufficient light shielding properties.

  Further, the fourth interlayer insulating film 159 in FIG. 2C can be omitted, and the number of interlayer insulating films can be reduced by one. Therefore, the manufacturing process is simplified and the yield is improved.

  In this embodiment, an example of an electro-optical device (applied product) incorporating an electro-optical device (image display device) using the present invention is shown. The image display device may be used in a direct view type or a projection type as necessary.

  Application products include TV cameras, head mounted displays, car navigation systems, projections (front and rear types), video cameras, personal computers, and the like. A simple example of these applications will be described with reference to FIG.

  FIG. 10A illustrates a TV camera, which includes a main body 2001, a camera portion 2002, a display device 2003, and operation switches 2004. The display device 2003 is used as a viewfinder.

  FIG. 10B illustrates a head mounted display, which includes a main body 2101, a display device 2102, and a band portion 2103. Two display devices 2102 having a relatively small size are used.

  FIG. 5C illustrates car navigation, which includes a main body 2201, a display device 2202, operation switches 2203, and an antenna 2204. Although the display device 2202 is used as a monitor, it can be said that the allowable range of resolution is relatively wide because the main purpose is to display a map.

  FIG. 5D illustrates a portable information terminal device (a mobile phone in this embodiment), which includes a main body 2301, an audio output unit 2302, an audio input unit 2303, a display device 2304, operation buttons 2305, and an antenna 2306. The display device 2303 is expected to be requested to display a moving image as a TV phone in the future.

  FIG. 5E illustrates a video camera, which includes a main body 2401, a display device 2402, an eyepiece 2403, operation switches 2404, and a tape holder 2405. Since the photographed image displayed on the display device 2402 can be viewed in real time through the eyepiece 2403, the user can photograph while viewing the image.

  FIG. 5D illustrates a front projection, which includes a main body 2501, a light source 2502, a display device 2503, an optical system (including a beam splitter, a polarizer, and the like) 2504 and a screen 2505. Since the screen 2505 is a large screen screen used for presentations such as conferences and conference presentations, the display device 2503 is required to have a high resolution.

  In addition to the electro-optical device shown in this embodiment, the present invention can be applied to portable information terminal devices such as rear projection, mobile computers, and handy terminals. As described above, the application range of the present invention is extremely wide and can be applied to display media in various fields.

10A and 10B illustrate a manufacturing process of a thin film transistor. 10A and 10B illustrate a manufacturing process of a thin film transistor. 1 is a diagram illustrating a configuration of an electro-optical device. 4A and 4B illustrate a reflective liquid crystal display device. 1 is a diagram illustrating a configuration of an electro-optical device. 1 is a diagram illustrating a configuration of an electro-optical device. 1 is a diagram illustrating a configuration of an electro-optical device. FIG. 4 is a diagram for explaining a cross-sectional structure of the electro-optical device. FIG. 4 is a diagram for explaining a cross-sectional structure of the electro-optical device. The figure which shows the application product of an electro-optical apparatus.

Explanation of symbols

101 Glass substrate 102-105 Active layer 106 Gate insulating film 107-110 Aluminum film pattern 111-114 Porous anodic oxide film 115-118 Dense anodic oxide film 119-122 Gate electrode 123 Resist mask 124 Source region 125 Drain Region 126, 127 Low-concentration impurity region 128 Channel formation region 145 First interlayer insulating film 146-150 Connection wiring 151 Second interlayer insulating film 152-155 Data wiring 156 Third interlayer insulating film 157, 158 Black matrix 159 First 4 interlayer insulating films 160 and 161 pixel electrodes

Claims (18)

In an active matrix EL display device having a pixel matrix circuit disposed on a substrate,
The pixel matrix circuit includes a plurality of pixel areas arranged in a matrix, each of the pixel areas having a pixel TFT and a pixel electrode connected to the pixel TFT,
The pixel electrode has a reflective function;
An active matrix EL display device, wherein a light emitting layer is provided above the pixel electrode. In an active matrix EL display device having a pixel matrix circuit and a logic circuit arranged on the same substrate,
The pixel matrix circuit includes a plurality of pixel areas arranged in a matrix, each of the pixel areas having a pixel TFT and a pixel electrode connected to the pixel TFT,
The pixel electrode has a reflective function;
An active matrix EL display device, wherein a light emitting layer is provided above the pixel electrode. An active matrix substrate having a pixel matrix circuit disposed on the substrate;
In an active matrix EL display device having a light emitting layer held on the active matrix substrate and a counter substrate,
The pixel matrix circuit includes a plurality of pixel areas arranged in a matrix, each of the pixel areas having a pixel TFT and a pixel electrode connected to the pixel TFT,
The pixel electrode has a reflective function;
An active matrix EL display device, wherein the light emitting layer is provided between the active matrix substrate and the counter substrate. An active matrix substrate having a pixel matrix circuit and a logic circuit disposed on the same substrate;
In an active matrix EL display device having a light emitting layer held on the active matrix substrate and a counter substrate,
The pixel matrix circuit includes a plurality of pixel areas arranged in a matrix, each of the pixel areas having a pixel TFT and a pixel electrode connected to the pixel TFT,
The pixel electrode has a reflective function;
An active matrix EL display device, wherein the light emitting layer is provided between the active matrix substrate and the counter substrate. In any one of Claims 1 thru | or 4,
The active TFT EL display device, wherein the pixel TFT has an LDD region. A crystalline silicon film having a source region, a drain region and an LDD region formed on a substrate;
A gate electrode formed on the crystalline silicon film with a gate insulating film interposed therebetween;
An interlayer insulating film formed to cover the gate electrode;
A wiring formed on the interlayer insulating film and connected to the source region or the drain region;
A pixel electrode having a reflective function connected to the wiring,
An active matrix EL display device, wherein a light emitting layer is provided above the pixel electrode. A crystalline silicon film having a source region, a drain region and an LDD region formed on a substrate;
A gate electrode formed on the crystalline silicon film with a gate insulating film interposed therebetween;
A first interlayer insulating film formed to cover the gate electrode;
A second interlayer insulating film formed on the first interlayer insulating film;
A wiring formed on the second interlayer insulating film and connected to the source region or the drain region;
A pixel electrode having a reflective function connected to the wiring,
An active matrix EL display device, wherein a light emitting layer is provided above the pixel electrode. A crystalline silicon film having a source region, a drain region and an LDD region formed on a substrate;
A gate electrode formed on the crystalline silicon film with a gate insulating film interposed therebetween;
A first interlayer insulating film formed to cover the gate electrode;
A second interlayer insulating film formed on the first interlayer insulating film;
A wiring formed on the second interlayer insulating film and connected to the source region or the drain region;
A third interlayer insulating film formed to cover the wiring;
A pixel electrode formed on the third interlayer insulating film and connected to the wiring;
A light emitting layer formed on the pixel electrode,
An active matrix EL display device, wherein the pixel electrode has a reflection function. In claim 7 or claim 8,
The active matrix EL display device, wherein the first interlayer insulating film is a silicon oxide film, a silicon nitride film, or a stacked film of a silicon oxide film and a silicon nitride film. In any one of Claims 7 to 9,
The active matrix EL display device, wherein the second interlayer insulating film is made of a transparent organic material. In any one of Claims 6 to 10,
A pixel TFT constituting a pixel matrix circuit and a circuit TFT constituting a logic circuit are arranged on the same layer on the substrate, and the crystalline silicon film is provided in the pixel TFT and the logic circuit. An active matrix EL display device. In any one of Claims 6 to 11,
Having a counter substrate provided facing the substrate;
An active matrix EL display device, wherein the light emitting layer is provided between the substrate and a counter substrate. In any one of Claims 1 to 12,
An active matrix EL display device, wherein the pixel electrode is made of a material mainly composed of aluminum. In any one of Claims 1 thru / or Claim 13,
An active matrix EL display device, wherein the substrate is a glass substrate. In claim 14,
An active matrix EL display device, wherein a silicon oxide film is deposited on a surface of the glass substrate.   A portable information terminal using the active EL display device according to any one of claims 1 to 15.   A computer using the active EL display device according to any one of claims 1 to 15.   A TV camera using the active EL display device according to any one of claims 1 to 15.

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