JP2005101531A - Manufacturing method for dielectric thin film capacitor - Google Patents

Manufacturing method for dielectric thin film capacitor Download PDF

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JP2005101531A
JP2005101531A JP2004190056A JP2004190056A JP2005101531A JP 2005101531 A JP2005101531 A JP 2005101531A JP 2004190056 A JP2004190056 A JP 2004190056A JP 2004190056 A JP2004190056 A JP 2004190056A JP 2005101531 A JP2005101531 A JP 2005101531A
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heat treatment
dielectric layer
dielectric
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layer
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Yutaka Takeshima
裕 竹島
Mitsuki Shibuya
光樹 渋谷
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a dielectric thin film capacitor that is a dielectric capacitor composed of a substrate, a contact layer, a dielectric layer, and an upper electrode, which does not exert an adverse influence on the capacitor characteristic and has a contact layer whose manufacturing cost is low. <P>SOLUTION: The manufacturing method includes the steps of applying a liquid raw material onto a substrate 10 to do a first heat treatment and form a contact layer 20, forming a lower electrode 30 on the contact layer 20, applying the liquid raw material onto the lower electrode 30 to do a second heat treatment for crystallization and form a dielectric layer 40, forming upper electrodes 51 and 52 on the dielectric layer 40, and doing a third heat treatment at a temperature higher than the first and second heat treatments. The contact layer 20 and the dielectric layer 40 are composed of the same compositional materials or the same materials. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

本発明は、誘電体薄膜キャパシタの製造方法に関する。   The present invention relates to a method for manufacturing a dielectric thin film capacitor.

DRAMやノイズフィルタなどの半導体装置に用いられている誘電体薄膜キャパシタは、基板、下部電極、誘電体薄膜、上部電極が順に積層された構造となっている。誘電体薄膜は、スパッタリング、CVD法(化学気相成長法)、MBE法(分子線エピタキシ法)、ゾルゲル法、MOD法(有機金属分解法)などによって成膜可能であるが、製造コストなどの点ではゾルゲル法やMOD法が有利とされている。   A dielectric thin film capacitor used in a semiconductor device such as a DRAM or a noise filter has a structure in which a substrate, a lower electrode, a dielectric thin film, and an upper electrode are sequentially laminated. The dielectric thin film can be formed by sputtering, CVD method (chemical vapor deposition method), MBE method (molecular beam epitaxy method), sol-gel method, MOD method (organometallic decomposition method), etc. In this respect, the sol-gel method and the MOD method are advantageous.

誘電体薄膜をゾルゲル法やMOD法で成膜する場合、誘電体原料の有機化合物を有機溶媒中に溶解した原料溶液を塗布し、酸化雰囲気中で熱処理する。そのため、下部電極には酸化しにくい貴金属が用いられ、具体的にはPtが多く用いられる。   When forming a dielectric thin film by a sol-gel method or a MOD method, a raw material solution in which an organic compound as a dielectric raw material is dissolved in an organic solvent is applied and heat-treated in an oxidizing atmosphere. Therefore, a noble metal that is difficult to oxidize is used for the lower electrode, and specifically, Pt is often used.

ところで、誘電体薄膜キャパシタの基板としては一般的にSi基板が用いられるが、Siは空気中に放置すると酸化するため、Si基板の表面にはSi酸化物層が形成されている。   By the way, a Si substrate is generally used as the substrate of the dielectric thin film capacitor. However, since Si oxidizes when left in the air, a Si oxide layer is formed on the surface of the Si substrate.

基板表面のSi酸化物と下部電極となる貴金属とは密着性が悪いため、誘電体薄膜キャパシタ形成後にダイシングカットなどの工程が含まれる場合には、密着性を高めるために基板と下部電極との間に密着層を形成する必要がある。密着層としては、Tiが用いられることが多い(特許文献1参照)。
特開平8−78636号公報(特に段落番号「0018」〜「0020」、図2)
Since the Si oxide on the surface of the substrate and the noble metal as the lower electrode have poor adhesion, if a process such as dicing cut is included after the formation of the dielectric thin film capacitor, the substrate and the lower electrode may be increased in order to improve the adhesion. It is necessary to form an adhesion layer between them. Ti is often used as the adhesion layer (see Patent Document 1).
JP-A-8-78636 (particularly paragraph numbers “0018” to “0020”, FIG. 2)

特許文献1にも記載されているように、密着層としてTiを用いた場合にはTi層の酸化によって基板の反りが発生し、誘電体層のひび割れ(クラック)を招くという問題がある。特許文献1には、密着層であるTi層の膜厚を制限することによって基板の反りを抑制することが開示されている。   As described in Patent Document 1, when Ti is used as the adhesion layer, the substrate is warped due to oxidation of the Ti layer, and there is a problem that the dielectric layer is cracked. Patent Document 1 discloses that the warpage of a substrate is suppressed by limiting the thickness of a Ti layer that is an adhesion layer.

しかしTi層の膜厚を制限したとしてもさらに別の問題が発生する。すなわち、密着層の膜厚を制限したとしてもTiがアニールなどの工程において酸化してしまうことに変わりはない。Tiが酸化して下部電極と誘電体層の界面に拡散すると以下の2点の問題が発生する。   However, even if the thickness of the Ti layer is limited, another problem occurs. That is, even if the thickness of the adhesion layer is limited, Ti is still oxidized in a process such as annealing. When Ti is oxidized and diffused to the interface between the lower electrode and the dielectric layer, the following two problems occur.

第1に、誘電体層としてチタン酸バリウム(BaTiO3)、チタン酸ストロンチウム(SrTiO3)、チタン酸ストロンチウムバリウム((Ba,Sr)TiO3、以下BSTと省略する)などを用いる場合、誘電体層と下部電極の界面に拡散したTi酸化物が下部電極と誘電体層の界面での結晶組織ズレの原因となり、誘電体層の結晶性の乱れを招くことがある。誘電体層の結晶性が乱れた場合、十分な誘電率を得られない。 First, when a dielectric layer uses barium titanate (BaTiO 3 ), strontium titanate (SrTiO 3 ), strontium barium titanate ((Ba, Sr) TiO 3 , hereinafter abbreviated as BST), etc. Ti oxide diffused at the interface between the layer and the lower electrode may cause a crystal structure shift at the interface between the lower electrode and the dielectric layer, and may cause disorder in the crystallinity of the dielectric layer. When the crystallinity of the dielectric layer is disturbed, a sufficient dielectric constant cannot be obtained.

第2に、Ti酸化物は高抵抗かつ低誘電率な物質であるため、下部電極と誘電体層との界面に高抵抗かつ低誘電率な層が存在することとなりキャパシタ特性の著しい劣化を招くことがある。   Second, since Ti oxide is a substance having a high resistance and a low dielectric constant, a layer having a high resistance and a low dielectric constant exists at the interface between the lower electrode and the dielectric layer, resulting in significant deterioration of capacitor characteristics. Sometimes.

さらに特許文献1では、誘電体層の表面を平坦化するために結晶化温度以下での仮焼成を行った後に上部電極を形成し、上部電極形成後に結晶化温度以上で本焼成を行うことが記載されている。しかし、特許文献1の図2にあるようにこの製造方法によって得られる誘電体層の比誘電率は220程度であり、BSTの比誘電率としては比較的低い値である。回路の集積化の要請が強い現状では、小さな面積で大きな容量を得られるキャパシタが求められており、さらに比誘電率が高い誘電体層を得る必要がある。   Further, in Patent Document 1, an upper electrode is formed after provisional firing at a temperature lower than the crystallization temperature in order to flatten the surface of the dielectric layer, and main firing is performed at a temperature higher than the crystallization temperature after the upper electrode is formed. Has been described. However, as shown in FIG. 2 of Patent Document 1, the dielectric constant of the dielectric layer obtained by this manufacturing method is about 220, and the relative dielectric constant of BST is a relatively low value. In the present situation where there is a strong demand for circuit integration, a capacitor capable of obtaining a large capacitance with a small area is required, and it is necessary to obtain a dielectric layer having a high relative dielectric constant.

すなわち、特許文献1に記載された技術では、リーク電流の原因となるクラックの発生はある程度抑制できるものの、キャパシタ特性が劣化したり、大きな比誘電率を得にくいといった問題があった。   That is, with the technique described in Patent Document 1, although the occurrence of cracks that cause leakage current can be suppressed to some extent, there are problems such as deterioration of capacitor characteristics and difficulty in obtaining a large relative dielectric constant.

よって本発明は、リーク電流の原因となるクラックの発生やキャパシタ特性の劣化を招くことのない密着層を持ち、また、リーク電流が発生しないように表面が平坦でありかつ十分な比誘電率をもった誘電体層を備える誘電体薄膜キャパシタの製造方法を提供することを目的とする。   Therefore, the present invention has an adhesion layer that does not cause cracks that cause leakage current and deterioration of capacitor characteristics, and has a flat surface and sufficient dielectric constant so that leakage current does not occur. An object of the present invention is to provide a method for manufacturing a dielectric thin film capacitor having a dielectric layer.

上記問題点を解決するために本発明に係る誘電体薄膜キャパシタの製造方法は、基板上に密着層前駆体膜を成膜して1回目の熱処理を行って密着層を形成する工程と、前記密着層上に下部電極を形成する工程と、前記下部電極上に、前記密着層前駆体膜と同一の材料からなる誘電体層前駆体膜を成膜して、該誘電体層前駆体膜の結晶化開始温度よりも高い温度で2回目の熱処理を行って誘電体層を形成する工程と、前記誘電体層上に上部電極を形成する工程と、1回目の熱処理および2回目の熱処理の熱処理温度よりも高い温度で3回目の熱処理を行う工程と、を含むことを特徴とする。   In order to solve the above problems, a method of manufacturing a dielectric thin film capacitor according to the present invention includes a step of forming an adhesion layer precursor film on a substrate and performing a first heat treatment to form the adhesion layer, Forming a lower electrode on the adhesion layer; forming a dielectric layer precursor film made of the same material as the adhesion layer precursor film on the lower electrode; and Performing a second heat treatment at a temperature higher than the crystallization start temperature to form a dielectric layer; forming an upper electrode on the dielectric layer; and a first heat treatment and a second heat treatment And performing a third heat treatment at a temperature higher than the temperature.

密着層を誘電体層と同一組成系の材料とすることにより、密着層の膨張による基板の反りがなくなり、誘電体層にクラックが発生することを防止できる。また、密着層が下部電極と誘電体層との界面に拡散したとしてもキャパシタ特性の劣化を招くことはない。   By using a material having the same composition as that of the dielectric layer for the adhesion layer, warpage of the substrate due to expansion of the adhesion layer can be eliminated, and cracks can be prevented from occurring in the dielectric layer. Further, even if the adhesion layer diffuses to the interface between the lower electrode and the dielectric layer, the capacitor characteristics are not deteriorated.

なおここで同一組成系の材料とは、主たる構成元素が同一の材料を示し、主たる構成元素の比率が異なる材料や、異なる微量元素を含有する材料を含むものとする。   Here, the material having the same composition system means a material in which main constituent elements are the same, and includes materials having different ratios of main constituent elements and materials containing different trace elements.

また、2回目の熱処理温度を誘電体層前駆体膜の結晶化開始温度よりも高い温度にすることによって十分な比誘電率を持つ誘電体層を得ることができる。2回目の熱処理温度が結晶化開始温度より低い場合、3回目の熱処理を十分高い温度で行ったとしても誘電体層が十分な比誘電率とならない。   In addition, a dielectric layer having a sufficient dielectric constant can be obtained by setting the second heat treatment temperature to a temperature higher than the crystallization start temperature of the dielectric layer precursor film. When the second heat treatment temperature is lower than the crystallization start temperature, the dielectric layer does not have a sufficient dielectric constant even if the third heat treatment is performed at a sufficiently high temperature.

さらにまた、上部電極を形成した後に1回目の熱処理および2回目の熱処理よりも高い温度で3回目の熱処理を行うことにより、1回目の熱処理と2回目の熱処理の温度を比較的低くした場合でも十分な比誘電率を持つ誘電体層を得ることができる。1回目の熱処置および2回目の熱処理における処理温度は、表面の平坦化の観点からは低いほうが好ましい。   Furthermore, even when the temperature of the first heat treatment and the second heat treatment is relatively lowered by performing the third heat treatment at a temperature higher than that of the first heat treatment and the second heat treatment after forming the upper electrode. A dielectric layer having a sufficient relative dielectric constant can be obtained. The treatment temperature in the first heat treatment and the second heat treatment is preferably lower from the viewpoint of planarization of the surface.

さらに本発明の誘電体薄膜キャパシタの製造方法においては、密着層前駆体膜と誘電体層前駆体膜とが同一の材料からなることを特徴とする。これにより、密着層と誘電体層の物性がほぼ同一になるから、密着層が下部電極と誘電体層との界面に拡散したときのキャパシタ特性の変化がより小さくなる。また、密着層と誘電体層とを同一の材料、設備を用いて形成することができるので製造コストが低減される。   Furthermore, the dielectric thin film capacitor manufacturing method of the present invention is characterized in that the adhesion layer precursor film and the dielectric layer precursor film are made of the same material. As a result, the physical properties of the adhesion layer and the dielectric layer are substantially the same, so that the change in the capacitor characteristics when the adhesion layer diffuses to the interface between the lower electrode and the dielectric layer becomes smaller. In addition, since the adhesion layer and the dielectric layer can be formed using the same material and equipment, the manufacturing cost is reduced.

さらに本発明の誘電体薄膜キャパシタの製造方法では、1回目の熱処理における処理温度が、前記密着層前駆体膜の結晶化開始温度よりも高いことが好ましい。   Furthermore, in the method for manufacturing a dielectric thin film capacitor of the present invention, it is preferable that the processing temperature in the first heat treatment is higher than the crystallization start temperature of the adhesion layer precursor film.

特許文献1には、誘電体層を結晶化開始温度よりも低い温度で熱処理することによって表面が平坦な誘電体層が形成されることが記載されているが、本発明者が鋭意研究した結果、熱処理温度が低すぎる場合にも表面が平坦化されないことを見出した。1回目の熱処理温度は前駆体膜の結晶化開始温度よりも高く、かつ、表面の平坦性を低下させる大きな結晶粒が成長するような温度よりも低い温度とされることが好ましい。   Patent Document 1 describes that a dielectric layer having a flat surface is formed by heat-treating the dielectric layer at a temperature lower than the crystallization start temperature. It was found that the surface is not flattened even when the heat treatment temperature is too low. The first heat treatment temperature is preferably higher than the crystallization start temperature of the precursor film and lower than the temperature at which large crystal grains that reduce the flatness of the surface grow.

また本発明の誘電体薄膜キャパシタの製造方法においては、誘電体層の材料として強誘電体であるチタン酸バリウム、チタン酸ストロンチウム、チタン酸ストロンチウムバリウムを用いることができる。   In the method for manufacturing a dielectric thin film capacitor of the present invention, ferroelectric materials such as barium titanate, strontium titanate, and strontium barium titanate can be used as the material of the dielectric layer.

さらに本発明の誘電体薄膜キャパシタの製造方法は、前記下部電極は白金からなることを特徴とする。また、前記上部電極は白金からなることを特徴とする。白金は貴金属であるから、熱処理工程を経ても酸化することがなく、下部電極または上部電極として好適である。   Furthermore, the dielectric thin film capacitor manufacturing method of the present invention is characterized in that the lower electrode is made of platinum. The upper electrode is made of platinum. Since platinum is a noble metal, it is not oxidized even after the heat treatment step, and is suitable as a lower electrode or an upper electrode.

以上のように本発明に係る誘電体薄膜キャパシタの製造方法は、密着層を誘電体層と同一組成系の材料で形成するので、誘電体層の酸化膨張による基板の反りが起こらず、誘電体層にクラックが生じることを防止できる。また、密着層が下部電極と誘電体層の界面に拡散してもキャパシタ特性の劣化を招くとことがない。   As described above, in the method for manufacturing a dielectric thin film capacitor according to the present invention, since the adhesion layer is formed of a material having the same composition system as the dielectric layer, the substrate does not warp due to the oxidative expansion of the dielectric layer, and the dielectric It is possible to prevent cracks from occurring in the layer. Further, even if the adhesion layer diffuses to the interface between the lower electrode and the dielectric layer, the capacitor characteristics are not deteriorated.

さらに本発明に係る誘電体薄膜キャパシタの製造方法では、1回目および2回目の熱処理を誘電体層の結晶化開始温度より高い温度で行い、上部電極を形成した後にさらに高い温度で3回目の熱処理を行うことにより、十分高い比誘電率を持ち、かつクラックのない誘電体層を得ることができる。   Furthermore, in the method for manufacturing a dielectric thin film capacitor according to the present invention, the first and second heat treatments are performed at a temperature higher than the crystallization start temperature of the dielectric layer, and the third heat treatment is performed at a higher temperature after forming the upper electrode. By performing the above, it is possible to obtain a dielectric layer having a sufficiently high relative dielectric constant and free from cracks.

以下において図を参照しつつ本発明の実施の形態について説明する。図1は本発明に係る誘電体薄膜キャパシタの製造工程を示す断面図である。   Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing a manufacturing process of a dielectric thin film capacitor according to the present invention.

まず、図1(a)にあるように基板10を用意する。基板10としてSi基板を用いた場合、通常表面はSi酸化物層12となっているので、基板はSi層11とSi酸化物層12の2層構造となっている。   First, the substrate 10 is prepared as shown in FIG. When a Si substrate is used as the substrate 10, since the surface is usually a Si oxide layer 12, the substrate has a two-layer structure of a Si layer 11 and a Si oxide layer 12.

次に、有機化合物を溶解したゾルゲル原料溶液やMOD原料溶液をスピンコートによって塗布し乾燥させて密着層前駆体膜を成膜する。乾燥はホットプレートを用いたり、室温で放置するなど適当な方法で行えばよい。   Next, a sol-gel raw material solution or an MOD raw material solution in which an organic compound is dissolved is applied by spin coating and dried to form an adhesion layer precursor film. Drying may be performed by an appropriate method such as using a hot plate or leaving it at room temperature.

ここで用いる原料溶液は後述する誘電体層の形成に用いる原料溶液と同一組成系のものを用いる。同一の組成の材料を用いることがより好ましい。塗布、乾燥の工程は所望の膜厚が得られるまで複数回繰り返してもよい。所望の膜厚の密着層前駆体膜が得られたところで1回目の熱処理を行って密着層前駆体膜を結晶化させ、図1(b)に示すように密着層20を形成する。   The raw material solution used here has the same composition as that of the raw material solution used for forming the dielectric layer described later. It is more preferable to use materials having the same composition. The coating and drying processes may be repeated a plurality of times until a desired film thickness is obtained. When the adhesion layer precursor film having a desired thickness is obtained, the first heat treatment is performed to crystallize the adhesion layer precursor film, thereby forming the adhesion layer 20 as shown in FIG.

このとき、熱処理の温度は前駆体膜の結晶化温度よりも高い温度とすることが好ましい。熱処理温度が結晶化温度よりも低い場合には、密着層20が凝集状に形成されて表面の平坦性が損なわれてしまうことがある。一方、熱処理温度が高すぎる場合にも大きな結晶粒が成長してしまい表面の平坦性を損なうことから、粒径の比較的小さな結晶粒が成長する程度の温度で熱処理を行うことが好ましい。なお、熱処理にはRTA(ラピッド・サーマル・アニーリング)装置や電気炉などを用いることができる。   At this time, the heat treatment temperature is preferably higher than the crystallization temperature of the precursor film. When the heat treatment temperature is lower than the crystallization temperature, the adhesion layer 20 may be formed in an agglomerated state and the surface flatness may be impaired. On the other hand, even when the heat treatment temperature is too high, large crystal grains grow and impair the surface flatness. Therefore, it is preferable to perform the heat treatment at a temperature at which crystal grains having a relatively small grain size grow. An RTA (rapid thermal annealing) apparatus or an electric furnace can be used for the heat treatment.

次に、図1(c)に示すように密着層20上に下部電極30を形成する。下部電極30としては、後述する2回目、3回目の熱処理などの工程で酸化しにくい物質で形成することが好ましく、Au,Pd,Rhなどの貴金属を用いることができるが、Ptが好適である。下部電極30はスパッタ法などによって形成することができる。   Next, the lower electrode 30 is formed on the adhesion layer 20 as shown in FIG. The lower electrode 30 is preferably formed of a material that is difficult to oxidize in processes such as the second and third heat treatments described later, and a noble metal such as Au, Pd, or Rh can be used, but Pt is preferred. . The lower electrode 30 can be formed by sputtering or the like.

次に、下部電極30上に有機化合物を溶解したゾルゲル原料溶液やMOD原料溶液をスピンコートによって塗布し乾燥させて誘電体層前駆体膜を成膜する。塗布、乾燥の工程は所望の膜厚が得られるまで複数回繰り返してもよい。所望の膜厚の誘電体層前駆体膜が得られたところで2回目の熱処理を行って誘電体層前駆体膜を結晶化させ、図1(d)に示すように誘電体層40を形成する。誘電体層40としては、強誘電体であるチタン酸バリウム、チタン酸ストロンチウム、チタン酸ストロンチウムバリウム(BST)などを用いることができる。   Next, a sol-gel raw material solution or an MOD raw material solution in which an organic compound is dissolved is applied onto the lower electrode 30 by spin coating and dried to form a dielectric layer precursor film. The coating and drying processes may be repeated a plurality of times until a desired film thickness is obtained. When a dielectric layer precursor film having a desired thickness is obtained, a second heat treatment is performed to crystallize the dielectric layer precursor film, thereby forming a dielectric layer 40 as shown in FIG. . As the dielectric layer 40, ferroelectric materials such as barium titanate, strontium titanate, and barium strontium titanate (BST) can be used.

ここで前述のように密着層20と誘電体層40とは同一組成系の材料、あるいは同一の材料で形成する。同一組成系の材料とは例えば、密着層20と誘電体層40とがともにBSTからなり、Ba:Sr:Tiの組成比率が異なるような材料や、これら主要構成元素以外の微量な構成元素が異なる材料などである。   Here, as described above, the adhesion layer 20 and the dielectric layer 40 are formed of the same composition material or the same material. Examples of the material having the same composition system include a material in which both the adhesion layer 20 and the dielectric layer 40 are made of BST, and the composition ratio of Ba: Sr: Ti is different, and a small amount of constituent elements other than these main constituent elements. Different materials.

またこのとき、熱処理の温度は前駆体膜の結晶化温度よりも高い温度とすることが好ましい。熱処理温度が結晶化温度よりも低い場合には、誘電体層40が凝集状に形成されて表面の平坦性が損なわれてしまうことがある。また、結晶化温度より低い温度で熱処理した場合、後述する上部電極形成後に結晶化温度より高い温度で熱処理を行っても誘電体層40が十分な比誘電率を得られないことがわかっている。   At this time, the heat treatment temperature is preferably higher than the crystallization temperature of the precursor film. When the heat treatment temperature is lower than the crystallization temperature, the dielectric layer 40 may be formed in an agglomerated state and the surface flatness may be impaired. In addition, when heat treatment is performed at a temperature lower than the crystallization temperature, it is known that the dielectric layer 40 cannot obtain a sufficient dielectric constant even if heat treatment is performed at a temperature higher than the crystallization temperature after the formation of the upper electrode described later. .

一方、熱処理温度が高すぎる場合にも大きな結晶粒が成長してしまい表面の平坦性を損なうことから、粒径の比較的小さな結晶粒が成長する程度の温度で熱処理を行うことが好ましい。   On the other hand, even when the heat treatment temperature is too high, large crystal grains grow and impair the surface flatness. Therefore, it is preferable to perform the heat treatment at a temperature at which crystal grains having a relatively small grain size grow.

次に、誘電体層上に上部電極51,52を形成する。上部電極51,52を形成した後、誘電体層40の結晶化温度よりも十分高い温度で3回目の熱処理を行うことにより、図1(e)に示す誘電体薄膜キャパシタが完成する。   Next, upper electrodes 51 and 52 are formed on the dielectric layer. After the formation of the upper electrodes 51 and 52, a third heat treatment is performed at a temperature sufficiently higher than the crystallization temperature of the dielectric layer 40, thereby completing the dielectric thin film capacitor shown in FIG.

上部電極51,52は、3回目の熱処理においても酸化しにくいように、Au,Pd,Rhなどの貴金属を用いて形成され、Ptによって形成されていることが好ましい。   The upper electrodes 51 and 52 are preferably made of Pt and made of a noble metal such as Au, Pd, or Rh so that they are not easily oxidized even in the third heat treatment.

なお、図1(e)では、誘電体層40上の一部に上部電極51,52を形成しているが、誘電体層40上の全面に形成しても構わない。   In FIG. 1E, the upper electrodes 51 and 52 are formed on part of the dielectric layer 40, but may be formed on the entire surface of the dielectric layer 40.

本発明では、2回目の熱処理温度を結晶化開始温度よりも高くし、さらに上部電極51,52を形成した後に2回目の熱処理温度よりも高い温度で3回目の熱処理を行っているので、誘電体層40の誘電率が十分に上昇する。   In the present invention, the second heat treatment temperature is set higher than the crystallization start temperature, and the third heat treatment is performed at a temperature higher than the second heat treatment temperature after the upper electrodes 51 and 52 are formed. The dielectric constant of the body layer 40 is sufficiently increased.

また本発明では密着層20を誘電体層40と同じ物質で形成しているため、密着層20の酸化膨張によって基板10の反りを引き起こすことがなく、誘電体層40にクラックが生じることを防止できる。さらに、密着層20が下部電極30と誘電体層40との間に拡散したとしても、密着層20は誘電体層40と同一の材料、すなわち強誘電体からなるのでキャパシタ特性に悪影響を与えることはない。   Further, in the present invention, since the adhesion layer 20 is formed of the same material as the dielectric layer 40, warpage of the substrate 10 is not caused by oxidative expansion of the adhesion layer 20, and cracks are prevented from occurring in the dielectric layer 40. it can. Furthermore, even if the adhesion layer 20 diffuses between the lower electrode 30 and the dielectric layer 40, the adhesion layer 20 is made of the same material as that of the dielectric layer 40, that is, a ferroelectric material, and thus adversely affects the capacitor characteristics. There is no.

以下において本発明のさらに具体的な実施例について説明する。図1(a)は基板10を示す。ここでは直径3インチ、厚さ0.38mmの(100)面Si基板を用いている。基板10の表面には熱処理によって厚さ1μmのSi酸化物12層を形成しているので、基板はSi層11とSi酸化物層12の2層構造となっている。   In the following, more specific examples of the present invention will be described. FIG. 1A shows the substrate 10. Here, a (100) plane Si substrate having a diameter of 3 inches and a thickness of 0.38 mm is used. Since the Si oxide 12 layer having a thickness of 1 μm is formed on the surface of the substrate 10 by heat treatment, the substrate has a two-layer structure of the Si layer 11 and the Si oxide layer 12.

次いで基板10上にBST(チタン酸ストロンチウムバリウム)の原料となる有機化合物を溶解したゾルゲル原料溶液をスピンコートによって塗布し、300℃に加熱したホットプレート上で5分間乾燥させた。この、塗布・乾燥を2回ずつ繰り返すことによって、密着層前駆体膜を形成した。そして、第1回目の熱処理として酸素中で650℃で10分間のRTA熱処理を行った。この熱処理によって密着層前駆体膜は結晶化して、図1(b)に示すようにBSTからなる密着層20となる。なお、ここで用いた原料溶液の組成はBa:Sr:Ti=70:30:100である。   Next, a sol-gel raw material solution in which an organic compound as a raw material of BST (strontium barium titanate) was dissolved was applied onto the substrate 10 by spin coating, and dried on a hot plate heated to 300 ° C. for 5 minutes. By repeating this coating and drying twice, an adhesion layer precursor film was formed. Then, as the first heat treatment, RTA heat treatment was performed in oxygen at 650 ° C. for 10 minutes. By this heat treatment, the adhesion layer precursor film is crystallized to become an adhesion layer 20 made of BST as shown in FIG. The composition of the raw material solution used here is Ba: Sr: Ti = 70: 30: 100.

次に、図1(c)に示すように、密着層20上にスパッタリングによって厚さ約200nmのPtからなる下部電極30を形成した。   Next, as shown in FIG. 1C, a lower electrode 30 made of Pt having a thickness of about 200 nm was formed on the adhesion layer 20 by sputtering.

次に、上記と同様にBSTのゾルゲル原料溶液の塗布・乾燥を2回ずつ繰り返し、酸素中において650℃で10分間のRTA熱処理を行った(2回目の熱処理)。これによって、図1(d)に示すように誘電体層40が形成される。2回目の熱処理後の誘電体層の状態をXRD(X線回折分析)によって調べたところ、誘電体層40は結晶化していることが確認された。しかし結晶の粒径が小さいため、冷却時の熱応力によるマイクロクラックは生じにくい。   Next, application and drying of the sol-gel raw material solution of BST was repeated twice in the same manner as described above, and RTA heat treatment was performed in oxygen at 650 ° C. for 10 minutes (second heat treatment). As a result, a dielectric layer 40 is formed as shown in FIG. When the state of the dielectric layer after the second heat treatment was examined by XRD (X-ray diffraction analysis), it was confirmed that the dielectric layer 40 was crystallized. However, since the crystal grain size is small, microcracks due to thermal stress during cooling hardly occur.

次に、ステンレス製のメタルマスクを用いて、図1(e)に示すように、直径1mm、厚さ約200nmのPtからなる上部電極51,52を2mm間隔で形成した。この状態で、隣接する二つの上部電極51,52にプローブを当てて静電容量を測定したところ、静電容量は7.0nF、比誘電率はおよそ320であった。さらに、3回目の熱処理として酸素雰囲気中において750℃で60分間のRTA熱処理を行った。この状態で上記と同様の方法によって静電容量と、2.0V印加時のリーク電流を測定したところ、静電容量は9.5nF、比誘電率はおよそ440、リーク電流は98pAであった。また、ショート率は2%であった。3回目の熱処理によって比誘電率が上昇し、高い比誘電率をもつ誘電体層40を得ることができた。また、クラックが生じ難いのでリーク電流が小さくショート率も低い。   Next, as shown in FIG. 1E, upper electrodes 51 and 52 made of Pt having a diameter of 1 mm and a thickness of about 200 nm were formed at intervals of 2 mm using a stainless steel metal mask. In this state, the capacitance was measured by applying a probe to two adjacent upper electrodes 51 and 52, and the capacitance was 7.0 nF and the relative dielectric constant was about 320. Further, as the third heat treatment, an RTA heat treatment was performed at 750 ° C. for 60 minutes in an oxygen atmosphere. In this state, the capacitance and the leakage current when 2.0 V was applied were measured by the same method as described above. The capacitance was 9.5 nF, the relative dielectric constant was about 440, and the leakage current was 98 pA. The short-circuit rate was 2%. The dielectric constant increased by the third heat treatment, and the dielectric layer 40 having a high relative dielectric constant could be obtained. In addition, since cracks are difficult to occur, the leakage current is small and the short-circuit rate is low.

静電容量とリーク電流を測定した後、ダイシングソーによってカットテストを行ったが、各層の剥離は生じず、各層が十分な密着強度を持っていることがわかった。   After measuring the capacitance and leakage current, a cut test was performed with a dicing saw. However, it was found that each layer did not peel and each layer had sufficient adhesion strength.

(比較例1)2回目の熱処理を500℃で10分間の条件で行った以外は上記と同様の方法で誘電体薄膜キャパシタを製造した。2回目の熱処理後の誘電体層の状態をXRD(X線回折分析)によって調べたところ、結晶化していなかった。2回目の熱処理後の静電容量は1.1nF、比誘電率はおよそ50であった。誘電体層40がまだ結晶化していないので比誘電率は低い。3回目の熱処理後の静電容量は5.2nF、比誘電率はおよそ240であった。2回目の熱処理の温度が結晶化開始温度以下だったため、結晶化温度以上の温度で3回目の熱処理を行っても十分に比誘電率が上昇しなかった。これは、誘電体層40が結晶化するときに上部電極51,52であるPtの規制を受けるためと思われる。   (Comparative Example 1) A dielectric thin film capacitor was manufactured by the same method as described above except that the second heat treatment was performed at 500 ° C for 10 minutes. When the state of the dielectric layer after the second heat treatment was examined by XRD (X-ray diffraction analysis), it was not crystallized. The capacitance after the second heat treatment was 1.1 nF and the relative dielectric constant was about 50. Since the dielectric layer 40 is not yet crystallized, the relative dielectric constant is low. The capacitance after the third heat treatment was 5.2 nF, and the relative dielectric constant was about 240. Since the temperature of the second heat treatment was equal to or lower than the crystallization start temperature, the relative dielectric constant did not sufficiently increase even when the third heat treatment was performed at a temperature higher than the crystallization temperature. This seems to be due to the restriction of Pt, which is the upper electrodes 51 and 52, when the dielectric layer 40 is crystallized.

また、リーク電流は160pA、ショート率が33%と、実施例に比べて特にショート率が大きく劣っている。これは、3回目の熱処理で誘電体層40が結晶化するとき、上部電極51,52が形成されている部分ではPtによってBSTの結晶化が規制されるのに対して上部電極51,52がない部分では規制されないため、上部電極51,52のない部分で相対的に結晶化および粒成長が進みやすく、上部電極51,52の外周付近の誘電体層40に応力が集中するためと考えられる。   Further, the leakage current is 160 pA and the short-circuit rate is 33%, which is particularly inferior to the embodiment. This is because when the dielectric layer 40 is crystallized by the third heat treatment, crystallization of BST is regulated by Pt in the portion where the upper electrodes 51 and 52 are formed, whereas the upper electrodes 51 and 52 Since it is not restricted in the portion where there is no upper electrode 51, 52, it is considered that crystallization and grain growth are relatively easy to proceed in the portion where the upper electrode 51, 52 is not present, and stress is concentrated on the dielectric layer 40 near the outer periphery of the upper electrode 51, 52. .

(比較例2)2回目の熱処理を750℃で60分間の条件で行い、3回目の熱処理を行わずに誘電体薄膜キャパシタを製造した。2回目の熱処理後の誘電体層40の状態をXRD(X線回折分析)によって調べたところ、結晶化していることが確認された。2回目の熱処理後の静電容量は8.1nF、比誘電率はおよそ370、リーク電流は230pA、ショート率12%であった。   (Comparative Example 2) A second heat treatment was performed at 750 ° C. for 60 minutes, and a dielectric thin film capacitor was manufactured without performing the third heat treatment. When the state of the dielectric layer 40 after the second heat treatment was examined by XRD (X-ray diffraction analysis), it was confirmed that it was crystallized. The capacitance after the second heat treatment was 8.1 nF, the relative dielectric constant was about 370, the leakage current was 230 pA, and the short rate was 12%.

2回目の熱処理を結晶化開始温度よりも十分に高い温度で行っているので比誘電率は比較的高い。しかし、2回目の熱処理温度が実施例よりも高いため、2回目の熱処理後の冷却で、基板10と誘電体層40の線膨張係数の差によって誘電体層40が全面にわたって強い引張応力を受けて、誘電体層40にマイクロクラックが多数発生し、リーク電流が大きくなっている。   Since the second heat treatment is performed at a temperature sufficiently higher than the crystallization start temperature, the relative dielectric constant is relatively high. However, since the temperature of the second heat treatment is higher than that of the example, the dielectric layer 40 receives a strong tensile stress over the entire surface due to the difference in the linear expansion coefficient between the substrate 10 and the dielectric layer 40 due to the cooling after the second heat treatment. Thus, many micro cracks are generated in the dielectric layer 40, and the leakage current is increased.

実施例および比較例1、2の結果から、1回目および2回目の熱処理を結晶化温度より高くかつ大きな結晶粒が成長しない程度の温度で行い、上部電極51,52を形成した後に1回目および2回目の熱処理温度より高い温度で3回目の熱処理を行うことにより、十分な比誘電率を持ち、かつ、クラックのない誘電体層40を得ることができることがわかる。なお、実施例および比較例で説明した熱処理温度は密着層20および誘電体層40の原料溶液の組成によって好適な温度範囲が異なる。   From the results of Examples and Comparative Examples 1 and 2, the first and second heat treatments are performed at a temperature higher than the crystallization temperature and at a level at which large crystal grains do not grow, and after the upper electrodes 51 and 52 are formed, It can be seen that by performing the third heat treatment at a temperature higher than the second heat treatment temperature, it is possible to obtain the dielectric layer 40 having a sufficient relative dielectric constant and free from cracks. Note that the heat treatment temperature described in the examples and comparative examples has a suitable temperature range depending on the composition of the raw material solution of the adhesion layer 20 and the dielectric layer 40.

本発明に係る誘電体薄膜キャパシタの製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of the dielectric thin film capacitor which concerns on this invention.

符号の説明Explanation of symbols

10 基板
11 Si層
12 Si酸化物層
20 密着層
30 下部電極
40 誘電体層
51,52 上部電極
DESCRIPTION OF SYMBOLS 10 Substrate 11 Si layer 12 Si oxide layer 20 Adhesion layer 30 Lower electrode 40 Dielectric layer 51, 52 Upper electrode

Claims (6)

基板上に密着層前駆体膜を成膜して1回目の熱処理を行って結晶化させ密着層を形成する工程と、
前記密着層上に下部電極を形成する工程と、
前記下部電極上に、前記密着層前駆体膜と同一組成系の材料からなる誘電体層前駆体膜を成膜して、該誘電体層前駆体膜の結晶化温度よりも高い温度で2回目の熱処理を行って、誘電体層を形成する工程と、
前記誘電体層上に上部電極を形成する工程と、
1回目の熱処理および2回目の熱処理の熱処理温度よりも高い温度で3回目の熱処理を行う工程と、を含むことを特徴とする誘電体薄膜キャパシタの製造方法。
Forming an adhesion layer precursor film on a substrate and performing a first heat treatment to crystallize and form an adhesion layer;
Forming a lower electrode on the adhesion layer;
A dielectric layer precursor film made of a material having the same composition as that of the adhesion layer precursor film is formed on the lower electrode, and a second time at a temperature higher than the crystallization temperature of the dielectric layer precursor film. Performing a heat treatment to form a dielectric layer;
Forming an upper electrode on the dielectric layer;
And a step of performing a third heat treatment at a temperature higher than a heat treatment temperature of the first heat treatment and the second heat treatment.
請求項1に記載の誘電体薄膜キャパシタの製造方法であって、前記密着層前駆体膜と前記誘電体層前駆体膜とは同一の材料からなることを特徴とする誘電体薄膜キャパシタの製造方法。   2. The method of manufacturing a dielectric thin film capacitor according to claim 1, wherein the adhesion layer precursor film and the dielectric layer precursor film are made of the same material. . 請求項1あるいは請求項2に記載の誘電体薄膜キャパシタの製造方法であって、1回目の熱処理における処理温度が、前記密着層前駆体膜の結晶化開始温度よりも高いことを特徴とする誘電体薄膜キャパシタの製造方法。   The dielectric thin film capacitor manufacturing method according to claim 1 or 2, wherein a processing temperature in the first heat treatment is higher than a crystallization start temperature of the adhesion layer precursor film. Manufacturing method of thin film capacitor. 前記誘電体層は、チタン酸バリウム、チタン酸ストロンチウム、チタン酸ストロンチウムバリウムのいずれかからなることを特徴とする、請求項1ないし請求項3のいずれか一項に記載の誘電体薄膜キャパシタの製造方法。   4. The dielectric thin film capacitor according to claim 1, wherein the dielectric layer is made of any one of barium titanate, strontium titanate, and barium strontium titanate. 5. Method. 前記下部電極は白金からなることを特徴とする、請求項1ないし請求項4のいずれか一項に記載の誘電体薄膜キャパシタの製造方法。   The method for manufacturing a dielectric thin film capacitor according to claim 1, wherein the lower electrode is made of platinum. 前記上部電極は白金からなることを特徴とする、請求項1ないし請求項5のいずれか一項に記載の誘電体薄膜キャパシタの製造方法。   6. The method for manufacturing a dielectric thin film capacitor according to claim 1, wherein the upper electrode is made of platinum.
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EP1758153A2 (en) 2005-08-24 2007-02-28 Tokyo Electron Limited Perovskite type capacitor and method of manufacturing the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1758153A2 (en) 2005-08-24 2007-02-28 Tokyo Electron Limited Perovskite type capacitor and method of manufacturing the same
US7742277B2 (en) 2005-08-24 2010-06-22 Ibiden Company Limited Dielectric film capacitor and method of manufacturing the same

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