JP2005093788A - Semiconductor device and its manufacturing method - Google Patents
Semiconductor device and its manufacturing method Download PDFInfo
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Abstract
Description
本発明は、半導体装置およびその製造方法に関する。 The present invention relates to a semiconductor device and a manufacturing method thereof.
近年の電子機器の小型化・高機能化の進展とともに、薄型化や高速伝送に対応した半導体チップ実装技術の開発が求められている。その中で、突出した接続端子(バンプ)を有する半導体チップと基板とを電気的に接続する形態として、半導体チップのバンプが形成された面と基板の配線パターンが形成された面とを対向させて、バンプと配線パターンを直接接続するフリップチップ接続技術が注目されている。 With the recent progress of miniaturization and high functionality of electronic devices, development of semiconductor chip mounting technology corresponding to thinning and high-speed transmission is required. Among them, as a form of electrically connecting the semiconductor chip having protruding connection terminals (bumps) and the substrate, the surface on which the bumps of the semiconductor chip are formed and the surface on which the wiring pattern of the substrate is formed are opposed to each other. Thus, flip-chip connection technology that directly connects bumps and wiring patterns has attracted attention.
フリップチップ接続技術としては、半導体チップに形成されたはんだバンプと基板側の配線パターンを電気的に接続するC4方式(例えば非特許文献1参照)、異方導電性接着樹脂を用いて、半導体チップに形成されたバンプと基板側の配線パターンを導電粒子を介して電気的に接続する方法(例えば非特許文献2参照)、半導体チップに形成されたバンプと基板側の配線パターンを接触させた状態で熱硬化性接着樹脂を硬化させ、その収縮力によって接触状態を保つ方法(例えば非特許文献3)などが知られている。
C4方式では鉛フリー化の観点から、鉛を含まないはんだの使用が検討されているが、リフロー温度が上昇することによって熱応力が増大し、接続信頼性が低下する場合があり、信頼性を確保するためには高耐熱性を有する基板材料を用いる必要がある。また、高い接続信頼性を実現するために半導体チップと基板との間に液状樹脂を充填して硬化させるアンダーフィル工程が必要になるが、狭ギャップへの充填に長時間を要し、生産性が低下する。 In the C4 system, the use of solder that does not contain lead has been studied from the viewpoint of lead-free soldering. However, as the reflow temperature increases, the thermal stress increases and the connection reliability may decrease. In order to ensure, it is necessary to use a substrate material having high heat resistance. Also, in order to achieve high connection reliability, an underfill process that fills and hardens the liquid resin between the semiconductor chip and the substrate is required, but it takes a long time to fill the narrow gap, and productivity Decreases.
異方導電性接着樹脂を用いた接続方法や熱硬化性接着樹脂の収縮力で接触状態を保つ方法では、接着樹脂の硬化に10〜20秒の時間を要しており、生産性向上の観点から接続時間の短縮が求められている。また、機械的な接触によってバンプと配線パターンが電気的に接続されているために、接着樹脂と半導体チップ表面との接着力が低下することや、高温放置時の接着樹脂の熱膨張による接触部を引き離す力が発生することによって、接続抵抗が上昇したり、導通不良を起こす場合がある。 In the connection method using anisotropic conductive adhesive resin and the method of maintaining the contact state by the shrinkage force of the thermosetting adhesive resin, it takes 10 to 20 seconds to cure the adhesive resin, and the viewpoint of improving the productivity Therefore, shortening of connection time is required. In addition, since the bump and the wiring pattern are electrically connected by mechanical contact, the adhesive force between the adhesive resin and the semiconductor chip surface is reduced, or the contact portion is caused by the thermal expansion of the adhesive resin when left at high temperature. As a result of generating a force that separates the contact resistance, the connection resistance may increase or conduction failure may occur.
一方、最近、超音波振動を利用した金属接合によるフリップチップ接続方式が注目されている(例えば非特許文献4参照)。この方式の特徴として、1)低温(常温〜200℃)でバンプと配線パターンを金属接合させることが可能であること、2)接続に要する時間が1秒以下であること、が挙げられ、熱応力の低減および金属接合部の形成による高接続信頼性、短時間接続による高生産性を実現できる可能性がある。これまでにSAW(Surface Acoustic Wave)フィルタなどの小チップをセラミック基板にフリップチップ接続する際に適用された例はあるが(例えば特開平08−330880号公報)、半導体チップと基板の間を樹脂で充填するアンダーフィル工程が不要な場合に限られていた。しかし、より大型のチップと樹脂基板とを超音波振動を利用してフリップチップ接続する場合、信頼性確保のためにはアンダーフィル工程が必須であり、狭ギャップへの液状樹脂の充填に長時間を要することから、生産性の低下につながるおそれがあった。 On the other hand, recently, a flip chip connection method using metal bonding using ultrasonic vibration has attracted attention (for example, see Non-Patent Document 4). The features of this method are 1) that bumps and wiring patterns can be metal-bonded at low temperatures (room temperature to 200 ° C), and 2) the time required for connection is 1 second or less, and heat There is a possibility of realizing high connection reliability by reducing stress and forming a metal joint, and high productivity by short-time connection. There has been an example in which a small chip such as a SAW (Surface Acoustic Wave) filter has been flip-chip connected to a ceramic substrate (for example, Japanese Patent Laid-Open No. 08-330880). It was limited to the case where the underfill process of filling with was unnecessary. However, when flip chip connection is used to connect a larger chip and a resin substrate using ultrasonic vibration, an underfill process is indispensable to ensure reliability, and it takes a long time to fill a narrow gap with liquid resin. Therefore, there is a possibility that productivity may be reduced.
そこで本発明は、熱硬化性接着フィルムを用いて超音波振動を利用した金属接合によるフリップチップ接続を行なうことによって、良好な接続信頼性を示す半導体装置および高い生産性を実現する製造方法を提供することを目的とする。 Therefore, the present invention provides a semiconductor device exhibiting good connection reliability and a manufacturing method for realizing high productivity by performing flip chip connection by metal bonding using ultrasonic vibration using a thermosetting adhesive film. The purpose is to do.
本発明は、以下のことを特徴とする。
(1)半導体装置の製造方法において、(a)突出した接続端子を有する半導体チップと配線パターンの形成された基板と熱硬化性接着フィルムを準備する工程、(b)基板表面に熱硬化性接着フィルムを貼り付けて接着樹脂層を形成する工程、(c)半導体チップの突出した接続端子と基板表面の配線パターンを位置合わせした後、加熱・加圧した状態で超音波振動を印加することにより半導体チップの突出した接続端子と基板表面の配線パターンを電気的に接続するとともに半導体チップと基板を接着樹脂層にて接着する工程、(d)接着樹脂層の硬化反応率を80%以上にする加熱処理を行なう工程を備えることを特徴とする半導体装置の製造方法。
(2)半導体装置の製造方法において、(a)突出した接続端子を有する半導体チップと配線パターンの形成された基板と熱硬化性接着フィルムを準備する工程、(b)半導体チップの突出した接続端子を有する面に熱硬化性接着フィルムを貼り付けて接着樹脂層を形成する工程、(c)半導体チップの突出した接続端子と基板表面の配線パターンを位置合わせした後、加熱・加圧した状態で超音波振動を印加することにより半導体チップの突出した接続端子と基板表面の配線パターンを電気的に接続するとともに半導体チップと基板を接着樹脂層にて接着する工程、(d)接着樹脂層の硬化反応率を80%以上にする加熱処理を行なう工程を備えることを特徴とする半導体装置の製造方法。
(3)半導体装置の製造方法において、工程(b)の後、個片の半導体チップに分割する工程を備えることを特徴とする(2)に記載の半導体装置の製造方法。
(4)半導体装置の製造方法において、工程(c)の前に、接着樹脂層が形成された基板、または接着樹脂層が形成された半導体チップを加熱処理する工程を備えることを特徴とする(1)〜(3)いずれかに記載の半導体装置の製造方法。
(5)半導体装置の製造方法において、工程(d)の加熱処理が、少なくとも2段階以上の加熱処理であることを特徴とする(1)〜(4)いずれかに記載の半導体装置の製造方法。
(6)半導体装置の製造方法において、熱硬化性接着フィルムが、50〜250℃のいずれかの温度で粘度が4000Pa・s以下となる熱硬化性接着フィルムである(1)〜(5)いずれかに記載の半導体装置の製造方法。
(7)(1)〜(6)いずれかに記載の半導体装置の製造方法で製造された半導体装置。
The present invention is characterized by the following.
(1) In the method for manufacturing a semiconductor device, (a) a step of preparing a semiconductor chip having protruding connection terminals, a substrate on which a wiring pattern is formed, and a thermosetting adhesive film, (b) a thermosetting adhesion to the substrate surface. A step of forming an adhesive resin layer by attaching a film; (c) by aligning the protruding connection terminals of the semiconductor chip and the wiring pattern on the substrate surface, and then applying ultrasonic vibration in a heated and pressurized state. A step of electrically connecting the protruding connection terminal of the semiconductor chip and the wiring pattern on the surface of the substrate and bonding the semiconductor chip and the substrate with an adhesive resin layer; and (d) setting the curing reaction rate of the adhesive resin layer to 80% or more. A method for manufacturing a semiconductor device, comprising a step of performing a heat treatment.
(2) In the method of manufacturing a semiconductor device, (a) a step of preparing a semiconductor chip having a protruding connection terminal, a substrate on which a wiring pattern is formed, and a thermosetting adhesive film, (b) a protruding connection terminal of the semiconductor chip A process of forming an adhesive resin layer by attaching a thermosetting adhesive film to the surface having a surface, (c) after aligning the protruding connection terminals of the semiconductor chip and the wiring pattern of the substrate surface, in a heated and pressurized state A step of electrically connecting the protruding connection terminal of the semiconductor chip and the wiring pattern on the substrate surface by applying ultrasonic vibration and bonding the semiconductor chip and the substrate with an adhesive resin layer; (d) curing of the adhesive resin layer; A method for manufacturing a semiconductor device, comprising a step of performing a heat treatment to increase a reaction rate to 80% or more.
(3) The method of manufacturing a semiconductor device according to (2), further comprising a step of dividing the semiconductor device into individual semiconductor chips after the step (b).
(4) The method for manufacturing a semiconductor device includes a step of heat-treating the substrate on which the adhesive resin layer is formed or the semiconductor chip on which the adhesive resin layer is formed before the step (c) ( A method for manufacturing a semiconductor device according to any one of 1) to (3).
(5) In the method of manufacturing a semiconductor device, the heat treatment in the step (d) is a heat treatment of at least two stages or more, wherein the method of manufacturing a semiconductor device according to any one of (1) to (4) .
(6) In the method for manufacturing a semiconductor device, the thermosetting adhesive film is a thermosetting adhesive film having a viscosity of 4000 Pa · s or less at any temperature of 50 to 250 ° C. (1) to (5) A method for manufacturing the semiconductor device according to
(7) A semiconductor device manufactured by the method for manufacturing a semiconductor device according to any one of (1) to (6).
本発明によって、超音波振動による金属接合を利用して熱硬化性接着フィルムを介して1秒以下の短時間でチップと基板を接続することが可能であるとともに、チップと基板の間隙に液状樹脂を充填するアンダーフィル工程を省略することが可能となり、高い接続信頼性を実現する半導体装置および高い生産性を実現する半導体装置の製造方法を提供することができる。 According to the present invention, it is possible to connect a chip and a substrate in a short time of 1 second or less through a thermosetting adhesive film using metal bonding by ultrasonic vibration, and a liquid resin is provided in the gap between the chip and the substrate. It is possible to omit the underfill process for filling the semiconductor device, and to provide a semiconductor device that realizes high connection reliability and a method for manufacturing a semiconductor device that realizes high productivity.
工程(a)の基板において、突出した接続端子を有する半導体チップと電気的に接続される基板は、通常の回路基板でもよく、また半導体チップでもよい。回路基板の場合、配線パターンは、ガラスエポキシ、ポリイミド、セラミックなどの絶縁基板表面に形成された銅などの金属層の不要な個所をエッチング除去して形成することもでき、絶縁基板表面にめっきによって形成することもできる。また、配線パターンは単一の金属で構成されている必要はなく、金、銀、銅、ニッケル、インジウム、パラジウム、スズ、鉛、ビスマスなど複数の金属成分を含んでいてもよいし、これらの金属層が積層された構造をしていてもよい。また、基板が、半導体チップの場合、配線パターンは通常アルミニウムで構成されるが、その表面に、金、銀、銅、ニッケル、インジウム、パラジウム、スズ、鉛、ビスマスなどの金属層をめっきによって形成してもよい。 In the substrate of the step (a), the substrate electrically connected to the semiconductor chip having the protruding connection terminal may be a normal circuit substrate or a semiconductor chip. In the case of a circuit board, the wiring pattern can also be formed by etching away unnecessary portions of a metal layer such as copper formed on the surface of an insulating substrate such as glass epoxy, polyimide, or ceramic. It can also be formed. Moreover, the wiring pattern does not need to be composed of a single metal, and may contain a plurality of metal components such as gold, silver, copper, nickel, indium, palladium, tin, lead, and bismuth. You may have the structure where the metal layer was laminated | stacked. When the substrate is a semiconductor chip, the wiring pattern is usually made of aluminum, but a metal layer such as gold, silver, copper, nickel, indium, palladium, tin, lead, or bismuth is formed on the surface by plating. May be.
工程(a)の突出した接続端子を有する半導体チップにおいて、半導体チップの突出した接続端子は、金ワイヤを用いて形成される金スタッドバンプ、金属ボールを半導体チップの電極に熱圧着や超音波併用熱圧着によって固定したもの、及びめっきや蒸着によって形成されたものでもよい。突出した接続端子は単一の金属で構成されている必要はなく、金、銀、銅、ニッケル、インジウム、パラジウム、スズ、鉛、ビスマスなど複数の金属成分を含んでいてもよいし、これらの金属層が積層された構造をしていても良い。また、突出した接続端子を有する半導体チップは、突出した接続端子を有する半導体ウエハの状態でもかまわない。 In the semiconductor chip having the projecting connection terminal in the step (a), the projecting connection terminal of the semiconductor chip is formed by using a gold stud bump or a metal ball formed by using a gold wire on the electrode of the semiconductor chip by thermocompression bonding or ultrasonic wave. Those fixed by thermocompression bonding and those formed by plating or vapor deposition may be used. The protruding connection terminal does not need to be made of a single metal, and may contain a plurality of metal components such as gold, silver, copper, nickel, indium, palladium, tin, lead, and bismuth. You may have the structure where the metal layer was laminated | stacked. Further, the semiconductor chip having the protruding connection terminal may be in the state of a semiconductor wafer having the protruding connection terminal.
工程(a)の熱硬化性接着フィルムにおいて、熱硬化性接着フィルムに含まれる熱硬化性成分としては、エポキシ樹脂、ビスマレイミドトリアジン樹脂、ポリイミド樹脂、シアノアクリレート系樹脂、フェノール樹脂、不飽和ポリエステル樹脂、メラミン樹脂、尿素樹脂、ポリイソシアネート樹脂、フラン樹脂、レゾルシノール樹脂、キシレン樹脂、ベンゾグアナミン樹脂、ジアリルフタレート樹脂、シロキサン変性エポキシ樹脂、シロキサン変性ポリアミドイミド樹脂、ベンゾシクロブテン樹脂、あるいは未加硫(未架橋)な天然ゴム、ニトリルゴム、ブタジエンゴム、シリコーンゴム、イソブチレンゴムなどを用いることができる。これらの樹脂は、共重合体系や混合系であってもよい。 In the thermosetting adhesive film of the step (a), the thermosetting component contained in the thermosetting adhesive film includes an epoxy resin, a bismaleimide triazine resin, a polyimide resin, a cyanoacrylate resin, a phenol resin, and an unsaturated polyester resin. , Melamine resin, urea resin, polyisocyanate resin, furan resin, resorcinol resin, xylene resin, benzoguanamine resin, diallyl phthalate resin, siloxane modified epoxy resin, siloxane modified polyamideimide resin, benzocyclobutene resin, or unvulcanized (uncrosslinked) Natural rubber, nitrile rubber, butadiene rubber, silicone rubber, isobutylene rubber and the like can be used. These resins may be a copolymer system or a mixed system.
また、熱硬化性接着フィルムは、上記熱硬化性成分と反応するフェノール系、イミダゾール系、ヒドラジド系、三フッ化ホウ素−アミン錯体、スルホニウム塩、アミンイミド、ポリアミンの塩、ジシアンジアミドなどの硬化剤、接着強度を増大させるカップリング剤、シリカや金属酸化物などの無機系フィラー、フィルム形成性をより容易にするためにフェノキシ樹脂などの熱可塑性樹脂を含んでいてもよい。 In addition, thermosetting adhesive films are phenolic, imidazole, hydrazide, boron trifluoride-amine complexes, sulfonium salts, amine imides, polyamine salts, dicyandiamide and other hardeners that react with the thermosetting components. A coupling agent that increases the strength, an inorganic filler such as silica or a metal oxide, and a thermoplastic resin such as a phenoxy resin may be included in order to make film formation easier.
熱硬化性接着フィルムの粘度は、50〜250℃のいずれかの温度で4000Pa・s以下であることが好ましく、4000Pa・sを超えると半導体チップの突出した接続端子と配線パターンの間に樹脂が残存して接続不良を起こす場合がある。より好ましくは3000Pa・s以下であり、1000Pa・s以下であることが特に好ましい。 The viscosity of the thermosetting adhesive film is preferably 4000 Pa · s or less at any temperature of 50 to 250 ° C. If it exceeds 4000 Pa · s, the resin is present between the protruding connection terminal of the semiconductor chip and the wiring pattern. It may remain and cause poor connection. More preferably, it is 3000 Pa · s or less, and particularly preferably 1000 Pa · s or less.
粘度は市販の動的粘弾性測定装置を用いて測定することが可能であり、測定は全自動で行なわれる。所定の温度に加熱した恒温槽内で、試料を2枚の平行プレートにはさみ、片方のプレートに微小な正弦波状のひねり歪みを付加した時、他方のプレートに発生する応力と歪から弾性率および粘度を算出する。一般に測定周波数は0.5〜10Hzであり、高分子材料は粘弾性体として挙動するため、弾性成分に由来する貯蔵弾性率と粘性成分に由来する損失弾性率が得られる。粘度をη(Pa・s)、測定周波数をf(Hz)、損失弾性率G”(Pa)とすると、粘度は一般式(I)で与えられる。 The viscosity can be measured using a commercially available dynamic viscoelasticity measuring apparatus, and the measurement is performed fully automatically. When a sample is sandwiched between two parallel plates in a thermostatic chamber heated to a predetermined temperature, and a minute sinusoidal twist distortion is applied to one plate, the elastic modulus and strain are determined from the stress and strain generated on the other plate. Viscosity is calculated. Generally, the measurement frequency is 0.5 to 10 Hz, and the polymer material behaves as a viscoelastic body, so that a storage elastic modulus derived from an elastic component and a loss elastic modulus derived from a viscous component are obtained. When the viscosity is η (Pa · s), the measurement frequency is f (Hz), and the loss elastic modulus G ″ (Pa), the viscosity is given by the general formula (I).
工程(b)において、熱硬化性接着フィルムを基板表面の半導体チップが搭載される領域に貼り付けるには、個片に切り出した接着フィルムを貼り付け領域に配置し、加熱・加圧によって貼り付けてもよい。接着フィルムを貼り付ける位置や面積は半導体チップが搭載される領域内では任意であるが、半導体チップの突出した接続端子と電気的に接続される配線パターンの少なくとも一部を覆うように貼り付けることが好ましい。 In step (b), in order to apply the thermosetting adhesive film to the area where the semiconductor chip on the substrate surface is mounted, place the adhesive film cut into individual pieces in the application area and apply it by heating and pressing. May be. The position and area for attaching the adhesive film is arbitrary within the area where the semiconductor chip is mounted, but it is attached so as to cover at least part of the wiring pattern electrically connected to the protruding connection terminal of the semiconductor chip. Is preferred.
工程(b)において、突出した接続端子を有する半導体チップに熱硬化性接着フィルムを貼り付けるには、個片に切り出した接着フィルムを加熱・加圧によって貼り付けても良い。また、突出した接続端子を有する半導体ウエハの状態で熱硬化性接着フィルムをロールラミネータなどで貼り付けた(工程(b))後、ダイシングすることによって接着フィルムが貼り付き、かつ突出した接続端子を有する半導体チップとして個片に切り出しても良い。 In the step (b), in order to affix the thermosetting adhesive film to the semiconductor chip having the protruding connection terminals, the adhesive film cut into pieces may be affixed by heating and pressing. Also, after sticking the thermosetting adhesive film with a roll laminator or the like in the state of a semiconductor wafer having protruding connection terminals (step (b)), the adhesive film is adhered by dicing, and the protruding connection terminals are The semiconductor chip may be cut into individual pieces.
熱硬化性接着フィルムを、基板表面の半導体チップが搭載される領域あるいは突出した接続端子を有する半導体チップに貼り付けた後、そのまま半導体チップと基板を接続してもよいが、接着フィルム中の揮発成分を減少させて、半導体チップと基板の間にボイドと呼ばれる気泡が発生するのを抑制するために、工程(c)の前に、接着フィルムを貼り付けた状態で加熱処理することが好ましい。 After the thermosetting adhesive film is attached to the semiconductor chip on the surface of the substrate where the semiconductor chip is mounted or the protruding connection terminal, the semiconductor chip and the substrate may be connected as they are. In order to reduce the components and suppress the generation of bubbles called voids between the semiconductor chip and the substrate, it is preferable to perform heat treatment with an adhesive film attached before step (c).
なお、突出した接続端子を有する半導体ウエハの状態で熱硬化性接着フィルムを貼り付けた場合、熱硬化性接着フィルムが貼り付けられた半導体チップとして個片に切り出してから加熱処理してもよく、個片に切り出す前に加熱処理してもかまわない。また、工程(c)の前に、加熱処理することによって熱硬化性接着フィルムの粘度が低下するために配線パターンへの埋め込み性が改善され、気泡巻き込みによるボイド発生を低減することができる。 In addition, when a thermosetting adhesive film is attached in the state of a semiconductor wafer having protruding connection terminals, it may be heat-treated after being cut into pieces as a semiconductor chip to which the thermosetting adhesive film is attached, Heat treatment may be performed before cutting into individual pieces. Moreover, since the viscosity of a thermosetting adhesive film falls by heat-processing before a process (c), the embedding property to a wiring pattern is improved and the void generation | occurrence | production by bubble entrainment can be reduced.
工程(c)の前に、加熱処理を行なう際には、使用する熱硬化性接着フィルムの硬化反応開始温度より低い温度、あるいは反応開始時間よりも短い時間で処理することが望ましい。硬化反応開始温度は、DSC(Differential Scanning Calorimeter、示差走査熱分析)で得られるチャートにおいて、発熱ピークに到達する前の発熱曲線の接線とベースラインの交点から求めてもよいし、粘度と加熱温度の関係をプロットして粘度が上昇し始める温度を求めてもよい。硬化反応開始時間は、所定の温度で加熱処理した試料の処理時間とDSCで得られる発熱量の関係をプロットして、発熱量が減少し始めるまでの時間を求めてもよいし、粘度と処理時間の関係をプロットして、粘度が上昇し始めるまでの時間を求めてもよい。 When performing the heat treatment before the step (c), it is desirable to perform the treatment at a temperature lower than the curing reaction start temperature of the thermosetting adhesive film to be used or shorter than the reaction start time. The curing reaction start temperature may be obtained from the intersection of the tangent line and the baseline of the exothermic curve before reaching the exothermic peak in the chart obtained by DSC (Differential Scanning Calorimeter), or the viscosity and the heating temperature. The temperature at which the viscosity starts to rise may be obtained by plotting the above relationship. The curing reaction start time may be obtained by plotting the relationship between the processing time of the sample heat-treated at a predetermined temperature and the calorific value obtained by DSC, and obtaining the time until the calorific value starts decreasing, or the viscosity and processing The time until the viscosity starts to rise may be obtained by plotting the time relationship.
工程(c)において、半導体チップと基板を電気的に接続するには、基板をステージに固定し、半導体チップを超音波振動方向に平行に取り付ける接合ヘッドに固定し、その接合ヘッドを上から押し付ける機構を有する装置を用いる。このような装置は市販されている。 In the step (c), in order to electrically connect the semiconductor chip and the substrate, the substrate is fixed to the stage, the semiconductor chip is fixed to the bonding head attached in parallel to the ultrasonic vibration direction, and the bonding head is pressed from above. A device having a mechanism is used. Such devices are commercially available.
加熱・加圧した状態で超音波振動を印加する場合、半導体チップと基板を接続する際の条件は、接続温度:50〜250℃、圧力:0.1〜10MPa、超音波の周波数:20〜200kHz、振動の振幅:0.01μm以上、加圧時間:0.1秒以上、超音波の印加時間:0.05秒以上であり、加圧と超音波印加のタイミングは加圧時間内に超音波印加を開始し、加圧時間内に超音波印加を終了することを満たしていれば、任意のタイミングで印加すればよい。これにより、半導体チップの突出した接続端子と基板表面の配線パターンを金属接合によって電気的に接続するとともに半導体チップと基板を接着樹脂層にて接着することが可能になる。 When applying ultrasonic vibration in a heated and pressurized state, the conditions for connecting the semiconductor chip and the substrate are as follows: connection temperature: 50-250 ° C., pressure: 0.1-10 MPa, ultrasonic frequency: 20- 200 kHz, amplitude of vibration: 0.01 μm or more, pressurization time: 0.1 second or more, application time of ultrasonic wave: 0.05 second or more, and the timing of pressurization and ultrasonic application exceeds the pressurization time. Application of the sound wave may be performed at an arbitrary timing as long as the application of the sound wave is satisfied and the application of the ultrasonic wave is completed within the pressurization time. Thereby, it is possible to electrically connect the protruding connection terminal of the semiconductor chip and the wiring pattern on the surface of the substrate by metal bonding, and bond the semiconductor chip and the substrate with the adhesive resin layer.
接続温度が50℃未満であると、バンプと配線パターンの間に接着樹脂が残存し、未接続となったり、接続抵抗が高くなるおそれがある。接続温度が250℃を超えると、半導体チップと基板との熱膨張係数差に由来する熱応力が増大し、接続部にダメージが発生するおそれがある。また樹脂基板の場合、250℃を超えると、基板が軟化して、超音波振動が吸収されてしまい金属接合できなくなるおそれがある。より好ましくは50〜200℃の範囲である。 If the connection temperature is less than 50 ° C., the adhesive resin remains between the bump and the wiring pattern, and there is a possibility that the connection is not connected or the connection resistance is increased. When the connection temperature exceeds 250 ° C., the thermal stress derived from the difference in thermal expansion coefficient between the semiconductor chip and the substrate increases, and the connection portion may be damaged. In the case of a resin substrate, if the temperature exceeds 250 ° C., the substrate is softened and ultrasonic vibrations are absorbed, which may prevent metal bonding. More preferably, it is the range of 50-200 degreeC.
圧力が0.1MPa未満であると、対向する接続端子間に樹脂が残存し、未接続となったり、あるいは接続抵抗が高くなるおそれがあり、圧力が10MPaを超えると、接続端子や配線が破壊されるおそれがある。より好ましくは、0.3〜4.0MPaの範囲である。 If the pressure is less than 0.1 MPa, the resin may remain between the connecting terminals facing each other, which may result in disconnection or increase in connection resistance. If the pressure exceeds 10 MPa, the connection terminals and wiring are destroyed. There is a risk of being. More preferably, it is the range of 0.3-4.0 MPa.
超音波の周波数が20kHz未満であると、接続端子や配線が破壊されるおそれがあり、周波数が200kHzを超えると、接続部に超音波振動が伝達されず、対向する接続端子間に樹脂が残存し、未接続となったり、あるいは金属接合が不充分なために接続抵抗が高くなるおそれがある。より好ましくは、40〜100kHzの範囲である。 If the frequency of the ultrasonic wave is less than 20 kHz, the connection terminals and wiring may be destroyed. If the frequency exceeds 200 kHz, ultrasonic vibrations are not transmitted to the connection part, and the resin remains between the connection terminals facing each other. However, there is a possibility that the connection resistance becomes high due to the lack of connection or insufficient metal bonding. More preferably, it is the range of 40-100 kHz.
超音波振動の振幅が0.01μm未満であると、対向する接続端子間に樹脂が残存し、未接続となったり、あるいは金属の拡散が不充分なために接続抵抗が高くなったり、接続信頼性が低下するおそれがある。より好ましくは、0.1〜10μmの範囲である。 If the amplitude of the ultrasonic vibration is less than 0.01 μm, the resin remains between the connecting terminals facing each other and is not connected, or the diffusion resistance of the metal is insufficient, resulting in an increase in connection resistance or connection reliability. May decrease. More preferably, it is the range of 0.1-10 micrometers.
加圧時間が0.1秒未満であると、対向する接続端子間に樹脂が残存し、未接続となったり、あるいは接続抵抗が高くなったり、接続信頼性が低下するおそれがあり、また、加圧時間が長くなると生産性が低下することから、加圧時間の短縮が好ましく、10秒以内がよい。 If the pressurization time is less than 0.1 seconds, the resin may remain between the connecting terminals facing each other, may not be connected, or the connection resistance may increase, connection reliability may decrease, When the pressurization time is lengthened, the productivity is lowered. Therefore, the pressurization time is preferably shortened, and is preferably within 10 seconds.
超音波の印加時間が0.05秒未満であると、金属表面の有機物や酸化物の除去が不充分のため、金属接合が不充分であり、接続抵抗が高くなったり、接続信頼性が低下する場合がある。また、振幅を大きくした場合や周波数を低くした場合、印加時間を長くすると、接続端子や配線が破壊されるおそれがある。より好ましくは5秒以内であり、5秒を超えると生産性が低下するおそれもある。 If the application time of the ultrasonic wave is less than 0.05 seconds, the metal surface is insufficiently removed due to insufficient removal of organic substances and oxides on the metal surface, resulting in insufficient metal bonding, high connection resistance, and low connection reliability. There is a case. Further, when the amplitude is increased or the frequency is decreased, if the application time is lengthened, the connection terminal or the wiring may be destroyed. More preferably, it is within 5 seconds, and if it exceeds 5 seconds, the productivity may be lowered.
工程(d)において、半導体チップの突出した接続端子と基板表面の配線パターンを電気的に接続した後、接着樹脂層の硬化反応率が80%以上になるように加熱処理することによって、高い接続信頼性を確保することができる。硬化反応率が90%以上になるように加熱処理することがより好ましい。 In step (d), after electrically connecting the protruding connection terminals of the semiconductor chip and the wiring pattern on the surface of the substrate, heat treatment is performed so that the curing reaction rate of the adhesive resin layer becomes 80% or more, thereby achieving high connection. Reliability can be ensured. It is more preferable to perform heat treatment so that the curing reaction rate is 90% or more.
接着樹脂層の硬化反応率が80%以上になるように加熱処理するには、ヒートステージ上に放置してもよいし、加熱オーブン中に放置してもよい。この加熱処理工程は複数の半導体装置について一括で行なうことが可能であり、生産性の低下にはつながらない。 In order to perform the heat treatment so that the curing reaction rate of the adhesive resin layer becomes 80% or more, it may be left on a heat stage or left in a heating oven. This heat treatment step can be performed for a plurality of semiconductor devices at once, and does not lead to a decrease in productivity.
加熱処理は硬化開始温度よりも高い温度で行なうことが好ましい。しかし、半導体チップと基板を接続した直後では、接着樹脂層の硬化反応率は80%未満であるため、硬化開始温度よりも高い温度で、最初から加熱処理すると、半導体チップと基板との熱膨張係数差に由来する熱応力が接続部に集中して、接続部にダメージが発生する恐れがある。したがって硬化開始温度よりも低い温度から加熱を開始して、少なくとも2段階以上の加熱温度で処理することがより好ましい。なお、硬化反応開始温度は、前述したように、DSCから求めることができる。 The heat treatment is preferably performed at a temperature higher than the curing start temperature. However, immediately after connecting the semiconductor chip and the substrate, the curing reaction rate of the adhesive resin layer is less than 80%. Therefore, if the heat treatment is performed from the beginning at a temperature higher than the curing start temperature, the thermal expansion between the semiconductor chip and the substrate will occur. There is a possibility that the thermal stress derived from the coefficient difference is concentrated on the connection portion and damage is generated in the connection portion. Therefore, it is more preferable to start the heating at a temperature lower than the curing start temperature and to perform the treatment at a heating temperature of at least two stages. The curing reaction start temperature can be obtained from DSC as described above.
熱硬化性樹脂の硬化反応率の測定は、DSC(示差走査熱分析)による方法を用いることができる。DSCは測定温度範囲内で、発熱、吸熱のない標準試料との温度差を打ち消すように熱量を供給または除去するゼロ位法を測定原理とするものであり、測定装置が市販されており、全自動で測定を行なうことができる。熱硬化性樹脂の反応は発熱反応であり、一定の昇温速度で試料を加熱していくと、試料が反応し反応熱が発生する。その発熱量をチャートに出力し、ベースラインを基準として発熱曲線とベースラインで囲まれた領域の面積を発熱量とする。測定は室温から硬化反応が完了する温度を充分カバーする範囲で行なう。例えば、エポキシ樹脂の場合、室温から250℃まで5〜20℃/分の昇温速度で測定し、上記した発熱量を求める。熱硬化性樹脂の硬化反応率は次のようにして求める。まず、未硬化試料の全発熱量を測定し、これをA(J/g)とする。次に、測定試料の発熱量を測定し、これをBとする。測定試料の硬化反応率C(%)は、一般式(II)で与えられる。 For the measurement of the curing reaction rate of the thermosetting resin, a method by DSC (differential scanning thermal analysis) can be used. DSC is based on the zero principle method of supplying or removing the amount of heat so as to cancel out the temperature difference from the standard sample that does not generate heat or endotherm within the measurement temperature range. Measurement can be performed automatically. The reaction of the thermosetting resin is an exothermic reaction, and when the sample is heated at a constant temperature increase rate, the sample reacts to generate reaction heat. The amount of heat generation is output to a chart, and the area of the region surrounded by the heat generation curve and the base line is defined as the amount of heat generation based on the baseline. The measurement is performed in a range that sufficiently covers the temperature at which the curing reaction is completed from room temperature. For example, in the case of an epoxy resin, measurement is performed at a temperature increase rate of 5 to 20 ° C./min from room temperature to 250 ° C., and the above-described calorific value is obtained. The curing reaction rate of the thermosetting resin is determined as follows. First, the total calorific value of the uncured sample is measured, and this is defined as A (J / g). Next, the calorific value of the measurement sample is measured, and this is defined as B. The curing reaction rate C (%) of the measurement sample is given by the general formula (II).
また、熱硬化性樹脂としてエポキシ樹脂を用いた場合には、可視レーザ励起のラマン分光計や近赤外レーザ励起のラマン分光計等で測定したエポキシ基のラマンスペクトルのピーク強度や面積強度を用いて反応硬化率を評価することもできる(例えば、特開2000−178522号公報)。 In addition, when an epoxy resin is used as the thermosetting resin, the peak intensity or area intensity of the Raman spectrum of the epoxy group measured with a visible laser-excited Raman spectrometer or near-infrared laser-excited Raman spectrometer is used. It is also possible to evaluate the reaction hardening rate (for example, JP 2000-178522 A).
(1)配線基板の準備
ガラスエポキシ銅張積層板の銅層の表面にドライフィルムレジストをラミネートし、配線パターンの形状に光を透過するフォトマスクを重ねて紫外線を照射し、現像液で現像することによってエッチングレジストを形成した。塩化第二鉄を主成分とするエッチング液で処理し、エッチングレジストを剥離した後、無電解めっきで厚さ5μmのニッケル層および厚さ0.05μmの金層を形成することによって、ガラスエポキシ基板1の表面に配線パターン2が形成された配線基板3を準備した(図1の(a)参照)。
(2)突出した接続端子を有する半導体チップの準備
半導体チップ4のアルミ電極5上に金ワイヤを用いて金スタッドバンプ6を形成した半導体チップを準備した(図1の(b)参照)。
(3)熱硬化性接着フィルムの準備
フェノキシ樹脂(東都化成株式会社製 製品名YP50S)100gと多官能エポキシ樹脂(ジャパンエポキシレジン株式会社製 製品名EP180S65、エポキシ当量212)150gとを酢酸エチル583gに溶解した溶液中にマイクロカプセル型潜在性硬化剤を含有する液状エポキシ樹脂(エポキシ当量185)250gを加えて攪拌し、次いで溶融シリカ(平均粒径0.5μm)を樹脂組成物100重量部に対して100重量部、微粒子シリカ(平均粒径0.01μm)を樹脂組成物100重量部に対して2重量部を分散させて熱硬化性接着樹脂ワニスを作製した。このワニスをセパレータフィルム7(デュポン株式会社製 製品名テフロンフィルム)の表面にロールコータで塗布した後、70℃のオーブン中で10分間乾燥することによって、熱硬化性接着フィルム8を作製した。この熱硬化性接着フィルム8の反応開始温度は110℃であり、150℃での溶融粘度は3400Pa・sを示した。
(4)熱硬化性接着フィルムの貼り付け
セパレータフィルム7の表面に形成された熱硬化性接着フィルム8を半導体チップとほぼ同じ大きさに切り出し、接着フィルム8が配線パターン3の少なくとも一部を覆うように配置し、熱圧着装置(図示せず)によって貼り付けた(図1の(c)参照)。
(5)加熱処理(プレ加熱)
セパレータフィルム7を剥離した後、熱硬化性接着フィルム8を貼り付けた配線基板3を100℃に加熱したヒートステージ(図示せず)上に1分間放置した(図1の(d)参照)。
(6)接続
熱硬化性接着フィルム8が貼り付けられた配線基板3を超音波接合装置のステージ9に固定し、金スタッドバンプ6と配線パターン2が対向するように半導体チップ4を接合ヘッド9に固定し、位置合わせを行なった。ステージ10を50℃、接合ヘッド9を150℃に加熱した状態で、半導体チップ4を圧力1.8MPaで配線基板3に押し付けながら、周波数50kHz、振幅2.5μmに調整した超音波振動を0.5秒間半導体チップ4に印加して、金スタッドバンプ6と配線パターン2を電気的に接続した(図1の(e)及び(f)参照)。
(7)加熱処理(アフターキュア)
150℃に加熱したオーブン中に2時間放置することによって半導体装置11を作製した(図1の(g)参照)。
(1) Preparation of wiring board A dry film resist is laminated on the surface of the copper layer of the glass epoxy copper clad laminate, a photomask that transmits light is superimposed on the shape of the wiring pattern, and ultraviolet light is applied to develop with a developer. Thus, an etching resist was formed. A glass epoxy substrate is formed by treating with an etching solution containing ferric chloride as a main component, stripping the etching resist, and forming a nickel layer having a thickness of 5 μm and a gold layer having a thickness of 0.05 μm by electroless plating. A
(2) Preparation of semiconductor chip having protruding connection terminals A semiconductor chip was prepared in which gold stud bumps 6 were formed on the
(3) Preparation of thermosetting adhesive film 100 g of phenoxy resin (product name YP50S manufactured by Toto Kasei Co., Ltd.) and 150 g of polyfunctional epoxy resin (product name EP180S65 manufactured by Japan Epoxy Resin Co., Ltd., epoxy equivalent 212) are added to 583 g of ethyl acetate. In a dissolved solution, 250 g of a liquid epoxy resin (epoxy equivalent 185) containing a microcapsule-type latent curing agent was added and stirred, and then fused silica (average particle size 0.5 μm) was added to 100 parts by weight of the resin composition. A thermosetting adhesive resin varnish was prepared by dispersing 100 parts by weight and 2 parts by weight of fine particle silica (average particle size 0.01 μm) with respect to 100 parts by weight of the resin composition. After applying this varnish on the surface of the separator film 7 (product name Teflon film manufactured by DuPont Co., Ltd.) with a roll coater, the varnish was dried in an oven at 70 ° C. for 10 minutes to prepare a thermosetting
(4) Affixing the thermosetting adhesive film The thermosetting
(5) Heat treatment (preheating)
After the
(6) The
(7) Heat treatment (after cure)
The semiconductor device 11 was produced by leaving it in an oven heated to 150 ° C. for 2 hours (see (g) of FIG. 1).
(1)基板の準備
実施例1と同様の配線基板3を準備した(図1の(a)参照)。
(2)突出した接続端子を有する半導体チップの準備
実施例1と同様に半導体チップ4のアルミ電極5上に金スタッドバンプ6が形成されたものを準備した(図1の(b)参照)。
(3)熱硬化性接着フィルムの準備
球状シリカ(三菱レーヨン株式会社製 製品名QS−4)350gを分散させた2−ブタノン 235g中に固形エポキシ樹脂(ジャパンエポキシレジン株式会社製 製品名EP1004、エポキシ当量875)120g、ビスフェノールA型エポキシ樹脂(ジャパンエポキシレジン株式会社 製品名EP828、エポキシ当量185)235gを溶解した溶液に、イミダゾール系硬化剤(四国化成工業株式会社製 製品名2P4MHZ)18gを加えて熱硬化性接着樹脂ワニスを作製した。このワニスをセパレータフィルム(デュポン株式会社製 製品名テフロンフィルム)の表面にロールコータ(図示せず)を用いて塗布した後、70℃のオーブン中で10分間乾燥することによって、熱硬化性接着フィルム8を作製した。この熱硬化性接着フィルム8の反応開始温度は150℃であり、150℃での最低粘度が100Pa・s以下であり、200Pa・s以下の粘度を300秒間保持することが可能であった。
(4)熱硬化性接着フィルムの貼り付け
実施例1と同様に上記熱硬化性接着フィルム8を配線基板3に貼り付けた(図1の(c)参照)。
(5)加熱処理(プレ加熱)
セパレータフィルム7を剥離した後、熱硬化性接着フィルム8を貼り付けた配線基板3を150℃に加熱したヒートステージ(図示せず)上に3分間放置した(図1の(d)参照)。
(6)接続
実施例1と同様に半導体チップ4と配線基板3を位置合わせした後、ステージ10を50℃、接合ヘッド9を200℃に加熱した状態で、半導体チップ4を圧力0.9MPaで配線基板3に押し付けながら、周波数50kHz、振幅2.5μmに調整した超音波振動を0.5秒間半導体チップ4に印加し、金スタッドバンプ6と配線パターン2を電気的に接続した(図1の(e)及び(f)参照)。
(7)加熱処理(アフターキュア)
加熱したオーブン中に、100℃、2時間、125℃、1時間、150℃、2時間放置することによって半導体装置11を作製した(図1の(g)参照)。
(1) Preparation of substrate
(2) Preparation of semiconductor chip having protruding connection terminals A semiconductor chip having gold stud bumps 6 formed on an
(3) Preparation of thermosetting adhesive film Solid epoxy resin (product name EP1004, manufactured by Japan Epoxy Resin Co., Ltd.) in 235 g of 2-butanone in which 350 g of spherical silica (product name QS-4, manufactured by Mitsubishi Rayon Co., Ltd.) was dispersed. Equivalent 875) 120 g, bisphenol A type epoxy resin (Japan Epoxy Resin Co., Ltd., product name EP828, Epoxy Equivalent 185) 235 g dissolved in a solution of imidazole curing agent (Shikoku Kasei Kogyo Co., Ltd. product name 2P4MHZ) 18 g A thermosetting adhesive resin varnish was prepared. After applying this varnish on the surface of a separator film (product name Teflon film manufactured by DuPont Co., Ltd.) using a roll coater (not shown), it is dried in an oven at 70 ° C. for 10 minutes, whereby a thermosetting adhesive film. 8 was produced. The reaction start temperature of the thermosetting
(4) Application of thermosetting adhesive film The thermosetting
(5) Heat treatment (preheating)
After the
(6) After positioning the
(7) Heat treatment (after cure)
The semiconductor device 11 was manufactured by leaving it in a heated oven at 100 ° C. for 2 hours, 125 ° C., 1 hour, 150 ° C. for 2 hours (see FIG. 1G).
(1)基板の準備
実施例1と同様にガラスエポキシ基板12の表面に配線パターン13が形成された配線基板14を準備した(図2の(a)参照)。
(2)半導体ウエハの準備
アルミ電極15上に金ワイヤを用いて金スタッドバンプ16を形成した半導体ウエハ17を準備した(図2の(b)参照)。
(3)熱硬化性接着フィルムの準備
熱硬化性接着樹脂として、実施例1と同様の組成の熱硬化性接着樹脂ワニスを準備した後、セパレータフィルム18の表面にワニスをロールコータ(図示せず)を用いて塗布した後、70℃のオーブン中で10分間乾燥することによって、熱硬化性接着フィルム19を作製した。
(4)熱硬化性接着フィルムの貼り付け及びダイシング
半導体ウエハ17のバンプ形成面全体にセパレータフィルム18の表面に形成された熱硬化性接着フィルム19をロールラミネータ(図示せず)を用いて貼り付けた。半導体ウエハ17のバンプが形成されていない面をダイシングフィルム20に貼り付け、セパレータフィルム18を剥離した後、ダイシング装置(図示せず)を用いて、熱硬化性接着フィルム19がバンプ形成面に貼り付けられた半導体チップ21に切り出した(図2の(c)〜(e)参照)。
(5)加熱処理(プレ加熱)
熱硬化性接着フィルム19が貼り付けられた半導体チップ21を100℃に加熱したヒートステージ(図示せず)上に3分間放置した。
(6)仮固定
熱硬化性接着フィルム19が貼り付けられた半導体チップ21を100℃に加熱した位置合わせ装置(図示せず)のヘッドに固定し、位置合わせ装置のステージに配線基板14を固定した。金スタッドバンプ16と配線パターン13を位置合わせした後、圧力0.2MPaで3秒間加圧することによって、半導体チップ21を配線基板14に仮固定した(図2の(f)参照)。
(7)接続
半導体チップ21を仮固定した配線基板14を超音波接合装置のステージ22に固定し、ステージ22を50℃、接合ヘッド23を200℃に加熱した状態で、半導体チップ21を圧力1.8MPaで配線基板14に押し付けながら、周波数50kHz、振幅2.5μmに調整した超音波振動を0.5秒間半導体チップ21に印加し、金スタッドバンプ16と配線パターン13を電気的に接続した(図2の(g)参照)。
(7)加熱処理(アフターキュア)
150℃に加熱したオーブン中に2時間放置することによって半導体装置24を作製した(図2の(h)参照)。
(1) Preparation of Substrate A wiring substrate 14 having a
(2) Preparation of Semiconductor Wafer A semiconductor wafer 17 having a
(3) Preparation of thermosetting adhesive film After preparing a thermosetting adhesive resin varnish having the same composition as in Example 1 as a thermosetting adhesive resin, a varnish is applied to the surface of the separator film 18 (not shown). ) And then dried in an oven at 70 ° C. for 10 minutes to produce a thermosetting
(4) Application of thermosetting adhesive film and dicing The thermosetting
(5) Heat treatment (preheating)
The
(6) The
(7) The wiring substrate 14 to which the
(7) Heat treatment (after cure)
The
(比較例1)
実施例1において、半導体チップと配線基板を接続した後、加熱処理(アフターキュア)を行なわないで半導体装置を作製した。
(Comparative Example 1)
In Example 1, after connecting the semiconductor chip and the wiring board, a semiconductor device was manufactured without performing heat treatment (after-cure).
(比較例2)
実施例2において、半導体チップと配線基板を接続した後、加熱処理(アフターキュア)を行なわないで半導体装置を作製した。
(Comparative Example 2)
In Example 2, after connecting the semiconductor chip and the wiring board, a semiconductor device was manufactured without performing heat treatment (aftercuring).
(比較例3)
実施例1において、超音波振動を印加しないで半導体装置を作製した。
(Comparative Example 3)
In Example 1, a semiconductor device was manufactured without applying ultrasonic vibration.
(比較例4)
実施例2において、超音波振動を印加しないで半導体装置を作製した。
(Comparative Example 4)
In Example 2, a semiconductor device was manufactured without applying ultrasonic vibration.
(比較例5)
実施例2において、熱硬化性接着フィルムを用いないで金スタッドバンプ27と配線パターン28を接続した後、塩酸または水酸化ナトリウム水溶液中に浸漬することによって半導体チップ29のアルミ電極30を溶解して、半導体チップ29を除去した。配線パターン28上に残った金スタッドバンプ27について、シェアツール31を用いてシェア試験を行なった(図4の(a)〜(c)参照)。
(Comparative Example 5)
In Example 2, after connecting the
(比較例6)
実施例2において、熱硬化性接着フィルム32を用いて金スタッドバンプ33と配線パターン34を接続した後、アフターキュア処理を行なわずに、2−ブタノン中に浸漬して熱硬化性接着フィルム32を溶解し、続いて塩酸または水酸化ナトリウム水溶液中に浸漬することによって半導体チップ35のアルミ電極36を溶解して半導体チップ35を除去した。配線パターン34上に残った金スタッドバンプ33について、シェアツール37を用いてシェア試験を行なった(図5の(a)〜(d)参照)。
(Comparative Example 6)
In Example 2, after the
実施例1、実施例3、比較例1で作製した半導体装置の接着樹脂層の反応硬化率をDSCによって測定した結果、実施例1と実施例3では95%、比較例1では30%であった。また、これらの半導体装置を30℃、相対湿度60%の槽内に168時間放置した後、IRリフロー処理(265℃最大)を3回行なった結果、実施例1と実施例3で作製した半導体装置には不具合が見られなかったのに対して、比較例1で作製した半導体装置ではオープン不良が発生した(各試料5個で評価)。 As a result of measuring the reaction hardening rate of the adhesive resin layer of the semiconductor device manufactured in Example 1, Example 3, and Comparative Example 1 by DSC, it was 95% in Example 1 and Example 3, and 30% in Comparative Example 1. It was. Further, these semiconductor devices were left in a bath at 30 ° C. and a relative humidity of 60% for 168 hours and then subjected to IR reflow treatment (265 ° C. maximum) three times. As a result, the semiconductors fabricated in Example 1 and Example 3 While no defect was found in the device, an open defect occurred in the semiconductor device manufactured in Comparative Example 1 (evaluated with five samples).
実施例2と比較例2で作製した半導体装置の接着樹脂層の反応硬化率をDSCによって測定した結果、実施例2では95%、比較例2では10%未満であった。また、これらの半導体装置を30℃、相対湿度60%の槽内に168時間放置した後、IRリフロー処理(265℃最大)を3回行なった結果、実施例2で作製した半導体装置には不具合が見られなかったのに対して、比較例2で作製した半導体装置ではオープン不良が発生した(各試料5個で評価)。 As a result of measuring the reaction hardening rate of the adhesive resin layer of the semiconductor device produced in Example 2 and Comparative Example 2 by DSC, it was 95% in Example 2 and less than 10% in Comparative Example 2. In addition, these semiconductor devices were left in a bath at 30 ° C. and a relative humidity of 60% for 168 hours and then subjected to IR reflow treatment (265 ° C. maximum) three times. As a result, the semiconductor device manufactured in Example 2 was defective. On the other hand, in the semiconductor device manufactured in Comparative Example 2, an open defect occurred (evaluated with 5 samples).
比較例3で作製した半導体装置では、加熱処理(アフターキュア)前にオープン不良が発生しており、半導体チップと配線基板を電気的に接続することができなかった。 In the semiconductor device manufactured in Comparative Example 3, an open defect occurred before the heat treatment (after cure), and the semiconductor chip and the wiring board could not be electrically connected.
比較例4で作製した半導体装置では、加熱処理(アフターキュア)前にオープン不良が発生しており、半導体チップと配線基板を電気的に接続することができなかった。 In the semiconductor device manufactured in Comparative Example 4, an open defect occurred before the heat treatment (after cure), and the semiconductor chip and the wiring board could not be electrically connected.
比較例5において、熱硬化性接着フィルムを用いないで金スタッドバンプと配線パターンを接続した場合、全てのバンプが配線パターン上に転写されていた。また、転写されたバンプのシェア強度を測定すると(シェア速度200μm/s)、平均0.77Nを示し、破断モードは写真(図6の(b)参照)に示すようにバンプと配線パターンの界面剥離ではなく、金バンプ内での破断であった。一方、比較例6において、熱硬化性接着フィルムを用いて金スタッドバンプと配線パターンを接続した場合、全てのバンプが配線パターン上に転写されていた。転写されたバンプのシェア強度を測定すると(シェア速度200μm/s)、平均0.7Nを示し、その破断モードは写真(図7の(b)参照)に示すように金バンプと配線パターンの界面剥離ではなく、金バンプ内での破断であった。以上の結果から、熱硬化性接着フィルムを用いて金スタッドバンプと配線パターンを接続した場合でも、超音波振動によってバンプと配線パターンとは金属接合されていることを確認した。 In Comparative Example 5, when the gold stud bump and the wiring pattern were connected without using the thermosetting adhesive film, all the bumps were transferred onto the wiring pattern. Further, when the shear strength of the transferred bump was measured (shear speed 200 μm / s), it showed an average of 0.77 N, and the fracture mode was the interface between the bump and the wiring pattern as shown in the photograph (see FIG. 6B). It was not peeling but a break in the gold bump. On the other hand, in Comparative Example 6, when the gold stud bump and the wiring pattern were connected using the thermosetting adhesive film, all the bumps were transferred onto the wiring pattern. When the shear strength of the transferred bump was measured (shear rate 200 μm / s), it showed an average of 0.7 N, and the fracture mode was the interface between the gold bump and the wiring pattern as shown in the photograph (see FIG. 7B). It was not peeling but a break in the gold bump. From the above results, even when the gold stud bump and the wiring pattern were connected using the thermosetting adhesive film, it was confirmed that the bump and the wiring pattern were bonded to each other by ultrasonic vibration.
1、12:ガラスエポキシ基板
2、13、25、28、34:配線パターン
3、14:配線基板
4、21、29、35:半導体チップ
5、15、30、36:アルミ電極
6、16、27、33:金スタッドバンプ
7、18:セパレータフィルム
8、19、26、32:熱硬化性接着フィルム
9、22:接合ヘッド
10、23:ステージ
11、24:半導体装置
17:半導体ウエハ
20:ダイシングフィルム
31、37:シェアツール
1, 12:
Claims (7)
(a)突出した接続端子を有する半導体チップと配線パターンの形成された基板と熱硬化性接着フィルムを準備する工程、
(b)基板表面に熱硬化性接着フィルムを貼り付けて接着樹脂層を形成する工程、
(c)半導体チップの突出した接続端子と基板表面の配線パターンを位置合わせした後、加熱・加圧した状態で超音波振動を印加することにより半導体チップの突出した接続端子と基板表面の配線パターンを電気的に接続するとともに半導体チップと基板を接着樹脂層にて接着する工程、
(d)接着樹脂層の硬化反応率を80%以上にする加熱処理を行なう工程を備えることを特徴とする半導体装置の製造方法。 In a method for manufacturing a semiconductor device,
(A) a step of preparing a semiconductor chip having a protruding connection terminal, a substrate on which a wiring pattern is formed, and a thermosetting adhesive film;
(B) a step of attaching a thermosetting adhesive film to the substrate surface to form an adhesive resin layer;
(C) After aligning the protruding connection terminals of the semiconductor chip and the wiring pattern on the surface of the substrate, applying ultrasonic vibration in a heated and pressurized state, thereby applying the wiring pattern on the protruding surface of the semiconductor chip and the substrate surface. Electrically connecting the semiconductor chip and the substrate with an adhesive resin layer,
(D) A method for manufacturing a semiconductor device, comprising a step of performing a heat treatment for setting a curing reaction rate of the adhesive resin layer to 80% or more.
(a)突出した接続端子を有する半導体チップと配線パターンの形成された基板と熱硬化性接着フィルムを準備する工程、
(b)半導体チップの突出した接続端子を有する面に熱硬化性接着フィルムを貼り付けて接着樹脂層を形成する工程、
(c)半導体チップの突出した接続端子と基板表面の配線パターンを位置合わせした後、加熱・加圧した状態で超音波振動を印加することにより半導体チップの突出した接続端子と基板表面の配線パターンを電気的に接続するとともに半導体チップと基板を接着樹脂層にて接着する工程、
(d)接着樹脂層の硬化反応率を80%以上にする加熱処理を行なう工程を備えることを特徴とする半導体装置の製造方法。 In a method for manufacturing a semiconductor device,
(A) a step of preparing a semiconductor chip having a protruding connection terminal, a substrate on which a wiring pattern is formed, and a thermosetting adhesive film;
(B) a step of forming an adhesive resin layer by attaching a thermosetting adhesive film to the surface of the semiconductor chip having a protruding connection terminal;
(C) After aligning the protruding connection terminals of the semiconductor chip and the wiring pattern on the surface of the substrate, applying ultrasonic vibration in a heated and pressurized state, thereby applying the wiring pattern on the protruding surface of the semiconductor chip and the substrate surface. Electrically connecting the semiconductor chip and the substrate with an adhesive resin layer,
(D) A method for manufacturing a semiconductor device, comprising a step of performing a heat treatment for setting a curing reaction rate of the adhesive resin layer to 80% or more.
A semiconductor device manufactured by the method for manufacturing a semiconductor device according to claim 1.
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