JP2005077102A - Electrostatic capacity detector - Google Patents

Electrostatic capacity detector Download PDF

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Publication number
JP2005077102A
JP2005077102A JP2003209665A JP2003209665A JP2005077102A JP 2005077102 A JP2005077102 A JP 2005077102A JP 2003209665 A JP2003209665 A JP 2003209665A JP 2003209665 A JP2003209665 A JP 2003209665A JP 2005077102 A JP2005077102 A JP 2005077102A
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Prior art keywords
reference capacitor
capacitance
electrode
capacitance detection
thin film
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JP2003209665A
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JP4539044B2 (en
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Mitsutoshi Miyasaka
光敏 宮坂
Hiroyuki Hara
弘幸 原
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Seiko Epson Corp
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Seiko Epson Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To realize an excellent electrostatic capacity detector, in an electrostatic capacity detector for reading a surface shape having fine unevenness such as a finger print. <P>SOLUTION: This detector includes M column lines and N row lines, both arranged as a matrix of the M columns and N rows, and includes electrostatic capacity detecting elements provided at intersections thereof. The each electrostatic capacity detecting element includes a signal detecting element, a signal amplifying element and a row selecting element. The signal detecting element includes a capacity detecting electrode, a capacity detecting dielectric substance film and a reference capacitor. The signal amplifying element comprises a signal amplifying MIS type thin film semiconductor device composed of a gate electrode, a gate insulation film, and a semiconductor film, and one electrode of the reference capacitor is connected to the row wires. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【0001】
【発明の属する技術分野】
本願発明は指紋等の微細な凹凸を有する対象物の表面形状を、対象物表面との距離に応じて変化する静電容量を検出する事に依り読み取る静電容量検出装置に関する。
【0002】
【従来の技術】
従来、指紋センサ等に用いられる静電容量検出装置はセンサ電極と当該センサ電極上に設けられた誘電体膜とを単結晶硅素基板に形成していた(特開平11−118415、特開2000−346608、特開2001−56204、特開2001−133213等)。図1は従来の静電容量検出装置の動作原理を説明している。センサ電極と誘電体膜とがコンデンサの一方の電極と誘電体膜とを成し、人体が接地された他方の電極と成る。このコンデンサーの静電容量Cは誘電体膜表面に接した指紋の凹凸に応じて変化する。一方、半導体基板には静電容量Cを成すコンデンサーを準備し、此等二つのコンデンサーを直列接続して、所定の電圧を印可する。斯うする事で二つのコンデンサーの間には指紋の凹凸に応じた電荷Qが発生する。この電荷Qを通常の半導体技術を用いて検出し、対象物の表面形状を読み取っていた。
【0003】
【発明が解決しようとする課題】
しかしながら此等従来の静電容量検出装置は、当該装置が単結晶硅素基板上に形成されて居る為に、指紋センサとして用いると指を強く押しつけた際に当該装置が割れて仕舞うとの課題を有して居た。
【0004】
更に指紋センサはその用途から必然的に20mm×20mm程度の大きさが求められ、静電容量検出装置面積の大部分はセンサ電極にて占められる。センサ電極は無論単結晶硅素基板上に作られるが、膨大なエネルギーと労力とを費やして作成された単結晶硅素基板の大部分(センサ電極下部)は単なる支持体としての役割しか演じてない。即ち従来の静電容量検出装置は高価なだけでは無く、多大なる無駄と浪費の上に形成されて居るとの課題を有する。
【0005】
加えて近年、クレジットカードやキャッシュカード等のカード上に個人認証機能を設けてカードの安全性を高めるべきとの指摘が強い。然るに従来の単結晶硅素基板上に作られた静電容量検出装置は柔軟性に欠ける為に、当該装置をプラスティック基板上に作成し得ないとの課題を有している。
【0006】
そこで本発明は上述の諸事情を鑑み、その目的とする所は安定に動作し、更に製造時に不要なエネルギーや労力を削減し得、又単結晶硅素基板以外にも作成し得る優良な静電容量検出装置を提供する事に有る。
【0007】
【課題を解決するための手段】
本発明は対象物との距離に応じて変化する静電容量を検出する事に依り、此等対象物の表面形状を読み取る静電容量検出装置を薄膜半導体装置を用いてガラス基板上等に作成する。斯うした静電容量検出装置はM行N列の行列状に配置されたM本の行線とN本の列線、及び各行線と各列線との交点に設けられたM×N個の静電容量検出素子とを具備する。各静電容量検出素子は信号検出素子と信号増幅素子と列選択素子とを含む。信号検出素子は容量検出電極と容量検出誘電体膜と基準コンデンサとを含み、基準コンデンサは基準コンデンサ下部電極と基準コンデンサ誘電体膜と基準コンデンサ上部電極とから成る。一方、信号増幅素子はゲート電極とゲート絶縁膜と半導体膜とから成る信号増幅用MIS型薄膜半導体装置から成る。本発明では基準コンデンサ下部電極と列線とが電気的に接続されて居る事を特徴とする。又、列選択素子はゲート電極とゲート絶縁膜と半導体膜とから成る列選択用MIS型薄膜半導体装置から成る。列選択用MIS型薄膜半導体装置のゲート電極が列線に接続される事をも本発明の特徴となす。信号増幅用MIS型薄膜半導体装置と列選択用MIS型薄膜半導体装置とは同一導電型の半導体装置であり、両薄膜半導体装置は直列に接続される。本発明は斯うした構成にて、基準コンデンサ下部電極と列線とが電気的に接続されて居る事を特徴とする。又本発明は基準コンデンサ下部電極と列線とが電気的に接続されて居る際に、容量検出電極と基準コンデンサ上部電極とが電気的に接続されて居る事をも特徴とする。この状態で信号増幅用MIS型薄膜半導体装置のゲート電極が容量検出電極と基準コンデンサ上部電極とに接続される事をも特徴とする。
【0008】
本発明は対象物との距離に応じて変化する静電容量を検出する事に依り、此等対象物の表面形状を読み取る静電容量検出装置を薄膜半導体装置を用いてガラス基板上等に作成する。斯うした静電容量検出装置はM行N列の行列状に配置されたM本の行線とN本の列線、及び各行線と各列線との交点に設けられたM×N個の静電容量検出素子とを具備する。各静電容量検出素子は信号検出素子と信号増幅素子と列選択素子とを含む。信号検出素子は容量検出電極と容量検出誘電体膜と基準コンデンサとを含み、基準コンデンサは基準コンデンサ下部電極と基準コンデンサ誘電体膜と基準コンデンサ上部電極とから成る。一方、信号増幅素子はゲート電極とゲート絶縁膜と半導体膜とから成る信号増幅用MIS型薄膜半導体装置から成る。本発明では基準コンデンサ上部電極と列線とが電気的に接続されて居る事を特徴とする。又、列選択素子はゲート電極とゲート絶縁膜と半導体膜とから成る列選択用MIS型薄膜半導体装置から成る。列選択用MIS型薄膜半導体装置のゲート電極が列線に接続される事をも本発明の特徴となす。信号増幅用MIS型薄膜半導体装置と列選択用MIS型薄膜半導体装置とは同一導電型の半導体装置であり、両薄膜半導体装置は直列に接続される。本発明は斯うした構成にて、基準コンデンサ上部電極と列線とが電気的に接続されて居る事を特徴とする。又本発明は基準コンデンサ上部電極と列線とが電気的に接続されて居る際に、容量検出電極と基準コンデンサ下部電極とが電気的に接続されて居る事をも特徴とする。この状態で信号増幅用MIS型薄膜半導体装置のゲート電極が容量検出電極と基準コンデンサ下部電極とに接続される事をも特徴とする。
【0009】
本発明は静電容量検出素子が選択状態とされた時に信号増幅用MIS型薄膜半導体装置のドレイン電極が行線と電気的に導通される事を特徴とする。更に本発明では静電容量検出装置が出力線を含み、ある静電容量検出素子が選択状態とされた時にその静電容量検出素子内の信号増幅用MIS型薄膜半導体装置のソース電極が出力線と電気的に導通される事をも特徴とする。
【0010】
本発明は、基準コンデンサの誘電体膜と信号増幅用MIS型薄膜半導体装置のゲート絶縁膜とが同一素材にて形成されて居る事を特徴とする。此等の膜は同一層上に形成されていても良い。基準コンデンサ下部電極は信号増幅用MIS型薄膜半導体装置のドレイン領域と同一素材にて形成され得る。基準コンデンサ下部電極と信号増幅用MIS型薄膜半導体装置のドレイン領域とが同一層上に形成されて居る事をも特徴とする。基準コンデンサ上部電極は信号増幅用MIS型薄膜半導体装置のゲート電極と同一素材にて形成されて居る事を特徴とする。此等の電極は同一層上に形成されていても良い。
【0011】
本発明は基準コンデンサの電極面積をS(μm)、基準コンデンサ誘電体膜の厚みをt(μm)、基準コンデンサ誘電体膜の比誘電率をε、信号増幅用MIS型薄膜半導体装置のゲート電極面積をS(μm)、ゲート絶縁膜の厚みをtox(μm)、ゲート絶縁膜の比誘電率をεoxとして、基準コンデンサ容量Cと信号増幅用MIS型薄膜半導体装置のトランジスタ容量Cとを其々
=ε・ε・S/t
=ε・εox・S/tox
にて定義し(εは真空の誘電率)、容量検出電極の面積をS(μm)、容量検出誘電体膜の厚みをt(μm)、容量検出誘電体膜の比誘電率をεとして信号検出素子の素子容量C
=ε・ε・S/t
と定義した時に(εは真空の誘電率)、此の素子容量Cは、基準コンデンサ容量Cとトランジスタ容量Cとの和であるC+Cよりも十分に大きい事を特徴とする。更に基準コンデンサ容量Cがトランジスタ容量Cよりも十分に大きいのが理想的である。従って素子容量Cは基準コンデンサ容量C単体よりも十分に大きい事をも特徴とする。容量検出誘電体膜は静電容量検出装置の最表面に位置する事をも特徴と為す。又、本発明は測定されるべき対象物が容量検出誘電体膜に接しずに対象物距離tを以て離れて居り、対象物容量Cを真空の誘電率εと空気の比誘電率εと容量検出電極の面積Sとを用いて、
=ε・ε・S/t
と定義した時に、基準コンデンサ容量Cは対象物容量Cよりも十分に大きい事を特徴とする。此処でも基準コンデンサ容量Cがトランジスタ容量Cよりも十分に大きいのが理想的である。
【0012】
又、本発明は容量検出誘電体膜が静電容量検出装置の最表面に位置し、基準コンデンサの電極面積をS(μm)、基準コンデンサ誘電体膜の厚みをt(μm)、基準コンデンサ誘電体膜の比誘電率をε、信号増幅用MIS型薄膜半導体装置のゲート電極面積をS(μm)、ゲート絶縁膜の厚みをtox(μm)、ゲート絶縁膜の比誘電率をεoxとして、基準コンデンサ容量Cと信号増幅用MIS型薄膜半導体装置のトランジスタ容量Cとを其々
=ε・ε・S/t
=ε・εox・S/tox
にて定義し(εは真空の誘電率)、容量検出電極の面積をS(μm)、容量検出誘電体膜の厚みをt(μm)、容量検出誘電体膜の比誘電率をεとして信号検出素子の素子容量C
=ε・ε・S/t
と定義した時に(εは真空の誘電率)、此の素子容量Cは、基準コンデンサ容量Cとトランジスタ容量Cとの和であるC+Cよりも十分に大きく、且つ対象物が容量検出誘電体膜に接しずに対象物距離tを以て離れて居り、対象物容量Cを真空の誘電率εと空気の比誘電率εと容量検出電極の面積Sとを用いて、
=ε・ε・S/t
と定義した時に、基準コンデンサ容量Cが対象物容量Cよりも十分に大きい事を特徴とする。此処でも基準コンデンサ容量Cがトランジスタ容量Cよりも十分に大きいのが理想的である。従って素子容量Cは基準コンデンサ容量C単体よりも十分に大きく、且つ基準コンデンサ容量C単体が対象物容量Cよりも十分に大きい事をも特徴とする。
【0013】
【発明の実施の形態】
本発明は対象物との距離に応じて変化する静電容量を検出する事に依り、此等対象物の表面形状を読み取る静電容量検出装置を金属−絶縁膜−半導体膜から成るMIS型薄膜半導体装置にて作成する。薄膜半導体装置は通常硝子基板上に作成される為に、大面積を要する半導体集積回路を安価に製造する技術として知られ、具体的に昨今では液晶表示装置等に応用されている。従って指紋センサ等に適応される静電容量検出装置を薄膜半導体装置にて作成すると、単結晶硅素基板と云った多大なエネルギーを消費して作られた高価な基板を使用する必要がなく、貴重な地球資源を浪費する事なく安価に当該装置を作成し得る。又、薄膜半導体装置はSUFTLA(特開平11−312811やS. Utsunomiya et. al. Society for Information Display p. 916 (2000))と呼ばれる転写技術を適応する事で、半導体集積回路をプラスティック基板上に作成出来るので、静電容量検出装置も単結晶硅素基板から解放されてプラスティック基板上に形成し得るので有る。
【0014】
さて、図1に示すが如き従来の動作原理を適応した静電容量検出装置を薄膜半導体装置にて作成するのは、現在の薄膜半導体装置の技術を以てしては不可能である。二つの直列接続されたコンデンサー間に誘起される電荷Qは非常に小さい為に、高精度感知を可能とする単結晶硅素LSI技術を用いれば電荷Qを正確に読み取れるが、薄膜半導体装置ではトランジスタ特性が単結晶硅素LSI技術程には優れず、又薄膜半導体装置間の特性偏差も大きいが故に電荷Qを精確に読み取れない。そこで本発明の静電容量検出装置はM行N列の行列状に配置されたM本(Mは1以上の整数)の行線と、N本(Nは1以上の整数)の列線、及び各行線と各列線との交点に設けられたM×N個の静電容量検出素子とを具備せしめ、此等の各静電容量検出素子は信号検出素子と信号増幅素子と列選択素子とを含むとの構成とする。信号検出素子は容量検出電極と容量検出誘電体膜と基準コンデンサとを含み、基準コンデンサは更に基準コンデンサ下部電極と基準コンデンサ誘電体膜と基準コンデンサ上部電極とから成る。指紋等の対象物が容量検出誘電体膜に接したり或いは接近すると、容量検出電極には対象物との静電容量に応じて電位Vが発生する。本発明ではこの電位Vを各静電容量検出素子に設けられた信号増幅素子にて増幅し、増幅された電流又は電圧に変換する。具体的には信号増幅素子はゲート電極とゲート絶縁膜と半導体膜とから成る信号増幅用MIS型薄膜半導体装置から成る。基準コンデンサの一方の電極は列線に接続されており、他方の電極は容量検出電極と信号増幅用MIS型薄膜半導体装置のゲート電極とに接続される。例えば基準コンデンサ下部電極と列線とが電気的に接続されている場合には、基準コンデンサ上部電極が容量検出電極と電気的に接続され、更に容量検出電極と基準コンデンサ上部電極とは信号増幅用MIS型薄膜半導体装置のゲート電極に電気的に接続される。反対に基準コンデンサ上部電極と列線とが電気的に接続されている場合には、基準コンデンサ下部電極が容量検出電極と電気的に接続され、更に容量検出電極と基準コンデンサ下部電極とは信号増幅用MIS型薄膜半導体装置のゲート電極に電気的に接続される。
【0015】
斯様な構成とした際の本願発明の動作原理を図2を用いて説明する。対象物の表面形状に応じて変化する静電容量Cを有するコンデンサと、静電容量Cを持つ基準コンデンサ及びトランジスタ容量Cを有する信号増幅用MIS型薄膜半導体装置との合成容量C+Cとの間に誘起された電位Vは信号増幅用MIS型薄膜半導体装置のゲート電極(図中G)に接続され、半導体装置のゲート電位を変化させる。斯うして此の薄膜半導体装置のドレイン領域(図中D)に所定の電圧を印可すると、誘起されたゲート電位Vに応じて薄膜半導体装置のソースドレイン間に流れる電流Iは著しく変調される。ゲート電極等には電位Vに応じて電荷Qが発生しているが、此等の電荷は何処にも流れずに保存されるので、電流値Iは一定となる。それ故にドレイン電圧を高くしたり或いは測定時間を長くする等で電流Iの測定も容易になり、斯くして薄膜半導体装置を用いても対象物の表面形状を十分正確に計測し得るのである。対象物の静電容量情報を増幅した信号(電流や電圧)は出力線を介して読み取られる。対象物の静電容量を測定するには信号増幅素子を介する電流Iを計測しても良いし、斯うした電流Iに対応する信号増幅素子を介した電圧Vを測定しても良い。
【0016】
次に本発明を具現化する静電容量検出素子の回路構成を図3を用いて説明する。前述の如く各静電容量検出素子は信号増幅素子と信号検出素子と列選択素子とを必要不可欠な構成要素と為す。信号検出素子は容量検出電極と容量検出誘電体膜と基準コンデンサとを含み、基準コンデンサは基準コンデンサ下部電極と基準コンデンサ誘電体膜と基準コンデンサ上部電極とから成る。信号増幅素子はゲート電極とゲート絶縁膜と半導体膜とから成る信号増幅用MIS型薄膜半導体装置から成り、列選択素子はゲート電極とゲート絶縁膜と半導体膜とから成る列選択用MIS型薄膜半導体装置から成る。此等二種類の薄膜半導体装置は同一導電型である。更に信号増幅素子と列選択素子とは行線と出力線との間に直列接続されて設置される。一例としては列選択用N型MIS型薄膜半導体装置のドレイン電極が行線に電気的に接続され、列選択用N型MIS型薄膜半導体装置のソース電極と信号増幅用N型MIS型薄膜半導体装置のドレイン電極とが接続され、信号増幅用N型MIS型薄膜半導体装置のソース電極が出力線に電気的に接続される。電気的に接続するとは、スイッチ素子などを介して電気的に導通し得る状態に成る事を意味する。無論、信号増幅用MIS型薄膜半導体装置のソース電極が直接に出力線と接続されても良いし、列選択用MIS型薄膜半導体装置ドレイン電極が直接に行線と接続されても良い。又、トランジスタのソース電極とドレイン電極とは、構造上対称であるのでソース電極とドレイン電極とを入れ替えても良い。(即ち前述の例で「ソース電極」と云う単語と「ドレイン電極」と云う単語を入れ替えても良い。但し物理的に厳密を帰すならば、N型トランジスタでは電位の低い方がソース電極と定義され、P型トランジスタでは電位の高い方がソース電極と定義される。本例では行線が選択された状態で行線に高電位(Vdd)が付与され、信号増幅素子や列選択素子にN型トランジスタを使用しているので、信号増幅素子や列選択素子のドレイン電極が行線側に電気的に接続され、ソース電極が出力線側に接続される事になる。)更には列選択素子と信号増幅素子との位置関係を先の例と反対としても良い。即ち信号増幅素子が行線側に位置し、列選択素子が出力線側に位置しても良い。
【0017】
静電容量検出装置内に設けられる出力線は列線と同数のN本として列方向に取り出す事も可能であるし、行線と同数のM本として行方向に取り出す事も可能である。更には二列に一本の出力線を設けたり、或いは二行に一本の出力線を設けても良い。本発明では各静電容量検出素子を一つずつ選択して行くので出力線は斯様に多様な形態を有す。図3の例では出力線の数を列線と同数のN本とし、列方向に出力線を取り出している。
【0018】
基準コンデンサの一方の電極は列線に接続され、他方の電極は容量検出電極と信号増幅用MIS型半導体装置のゲート電極とに接続される。本発明では列線が選択された状態で列線には高電位が付与されるので、列線に直接接続された基準コンデンサの一方の電極には高電位(Vdd)が必ず印可され、対象物の静電容量に応じた電位が信号増幅素子のゲート電極に加わる。斯うして信号増幅用MIS型薄膜半導体装置のソースドレイン間の電気伝導度が変化し、此を検出して例えば指紋情報と云った対象物の表面凹凸情報が取得される。
【0019】
基本的には斯様な構成にて精度の良く静電容量を検出可能であるが、静電容量検出素子間の情報干渉を防いで高速にて高精度検出を実現させるには、静電容量検出素子が列選択素子と行選択素子とを含むのが好ましい。列選択素子と同様に行選択素子もゲート電極とゲート絶縁膜と半導体膜とから成る行選択用MIS型薄膜半導体装置から構成し得る。信号増幅素子を成す信号増幅用MIS型薄膜半導体装置と列選択用MIS型薄膜半導体装置と行選択用MIS型薄膜半導体装置とは総て直列に接続される。行線に加えた行選択信号で行選択素子がオン状態とされ、列線に加えられた列選択信号にて列選択素子がオン状態とされる。図3では行選択素子にN型半導体装置を用い、此のN型半導体装置ドレイン電極とゲート電極とを行線に接続してダイオード動作をさせている。ダイオード接続された行選択用N型MIS薄膜半導体装置は行線から出力線の方向が順方向になるように動作する。即ち行線に高電位の選択信号が入力された時にのみ行選択素子の電気伝導度は上がり、スイッチオン状態となる。行選択用N型薄膜半導体装置のソース電極は列選択用N型薄膜半導体装置のドレイン電極に接続され、列選択用N型薄膜半導体装置のゲート電極は列線に接続される。列線は、非選択状態では低電位(Vss:負電源電位)に在り、選択状態になると高電位(Vdd:正電源電位)が付与される。従って列選択素子は列線が選択された時にのみ電気伝導度が上がり、スイッチオン状態となる。結局、M本の行線の内で特定の行線(例えばi行目の行線)が選択され、その行線(i行目の行線)に高電位が印可される。此により選択された行線(i行目の行線)に繋がる行選択素子がオン状態になる。次にこの状態にてN本の列線の内で特定の列線(例えばj列目の列線)に選択信号が入って来ると、その列線(j列目の列線)に接続された列選択素子の電気伝導度が上がりトランジスタ・オン状態となる。この結果、選択された行線(i行目の行線)に印可された高電位が選択された列線(j列目の列線)に位置する信号増幅素子のドレイン電極に印可され、対象物の凹凸情報に応じたゲート電圧にて変調されたソースドレイン電流がi行j列に位置する信号増幅素子に発生する。斯くして選択された行(i行)と列(j列)との交点に位置する静電容量検出素子(i行j列に位置する静電容量検出素子)のみがM×N個の静電容量検出素子群の中から選択されて、その位置に於ける対象物の静電容量を測定することになる。各静電容量検出素子内に列選択素子を設けることで列選択が一意的に為され、列間の情報干渉を防げられる。同様に各静電容量検出素子内に行選択素子を設けることで行選択が一意的に為され、行間の情報干渉を防げられる訳である。列選択素子と行選択素子とを直列に設ける事に依り出力線から行線への情報逆流を防止出来、精度良く静電容量を検出出来る様になる。此等の効果を発現させるには、列選択素子と行選択素子と信号増幅素子とが直列に配置されていれば良く、それらの順番は問われない。此等三素子が行線と出力線との間に直列に配置され、行選択素子のゲート電極は行線に接続され、列選択素子のゲート電極は列線に接続され、信号増幅素子のゲート電極が容量検出電極に接続されて居る事が肝要である。この様に本発明では静電容量検出素子が行選択信号や列選択信号に依って選択状態とされた際に、信号増幅用MIS型薄膜半導体装置のドレイン電極が行線と電気的に導通され、ソース電極が出力線と電気的に導通させられる。実際には三素子の配列順序に応じて信号増幅素子と行線の間や信号増幅素子と出力線の間に行選択素子や列選択素子と言ったスイッチング素子が入り得るが、此等のスイッチング素子は選択状態では電気伝導度が高いので、信号増幅素子のドレイン電極は行線に接続される事になり、ソース電極は出力線に接続される事になる。この結果として信号増幅素子其の物の電気伝導度が行線から出力線への電流値を定める。後述する様に、対象物の凸部(例えば指紋の山)が容量検出誘電体膜に接していると信号増幅素子の電気伝導度は小さく、出力線には殆ど電流が供給されない。反対に対象物の凹部(例えば指紋の谷)が容量検出誘電体膜表面に来て薄い空気の膜が誘電体膜と対象物との間に発生すると、信号増幅素子の電気伝導度は著しく大きくなり、出力線には大電流が供給される。斯うして出力線に供給される電流(又はそれに応ずる電圧)を測定して対象物の凹凸情報を得るのである。
【0020】
各静電容量検出素子が行選択素子と列選択素子を含んでいると、上述の如くM×N個の静電容量検出素子群の中から特定の一静電容量検出素子のみを確実に選択するとの利点が認められる。その一方で、もし基準コンデンサが無ければ、信号増幅素子のトランジスタ容量と対象物の容量とが容量結合して、その容量比と信号増幅素子のドレイン電圧との積が信号増幅素子のゲート電極に印可される。所が行選択素子や列選択素子と信号増幅素子とが直列に接続されているので、信号増幅素子のドレイン電位は行線に印可される高電位(Vdd)よりも行選択素子や列選択素子が存在する分だけ下がって仕舞う。例えば行選択素子と列選択素子と信号増幅素子のオン状態に於ける電気伝導度が同程度と仮定すると、行線にVddが印可された際に信号増幅素子のドレイン電位はVddの約三分の一であるVdd/3程度に下がって仕舞う。それ故に測定対象物の静電容量が変化しても、信号増幅素子のゲート電位変化量は最大でもVdd/3程度と小さくなり、検出精度が低下したり或いはVddの値を大きくせねばならなくなる。斯うした課題を解決すべく本願発明では基準コンデンサを設け、この基準コンデンサの一方の電極を列線に直接接続させる。此に依り喩え行選択素子や列選択素子が存在しても、基準コンデンサの一方の電極には確実に高電位(Vdd)が印可され、それ故に信号増幅素子のゲート電位は最小でゼロ付近、最大でVdd付近と成り得る。即ち本発明の構成とすると、喩え行選択素子と列選択素子とが信号増幅素子と直列接続されて行線と出力線との間に設けられていても、信号増幅素子のゲート電位は負電源電位(Vss:ゼロボルト)付近から正電源電位(Vdd:高電位)付近迄測定対象物の静電容量に応じて変化し得る様になる。信号増幅素子のゲート電位が負電源電位付近にあると、信号増幅用MIS型薄膜半導体装置はオフ状態になり、信号増幅素子の電気伝導度は著しく小さくなる。反対に信号増幅素子のゲート電位が正電源電位付近になると、信号増幅用MIS型薄膜半導体装置はオン状態になり、信号増幅素子の電気伝導度は窮めて大きくなる。斯うした電気伝導度の変化を出力線経由で測定する事で対象物表面の凹凸情報を採取出来るのである。斯うした構成では列選択素子と信号増幅素子は同一導電型の薄膜半導体装置でなければならない。列線に付与した列選択信号が列選択素子のゲート電極に印可され、同時に列選択信号が基準コンデンサを介して信号増幅素子のゲート電極に印可されるからである。具体的には列選択素子と信号増幅素子とがN型半導体装置の場合、列線には非選択状態で負電源電位(接地電位、ゼロボルト)が与えられ、選択状態で正電源電位(高電位、プラスの電位、例えば+2.5Vや+3.3Vなど)が印可される。列選択素子と信号増幅素子とがP型半導体装置の場合には、列線には非選択状態で正電源電位(接地電位、ゼロボルト)が与えられ、選択状態で負電源電位(負電位、マイナスの電位、例えば−2.5Vや−3.3Vなど)が印可される。更に、行選択素子に半導体装置を用いる場合、行選択用MIS型薄膜半導体装置は列選択素子や信号増幅素子と同一の導電型であるのが好ましい。斯うすると列選択信号と行選択信号とを同じ極性とでき、信号増幅素子のドレイン電位と基準コンデンサの列線に接続した電極電位が同じ極性になり、信号増幅感度が上がるからである。例えば、行選択素子も列選択素子も信号増幅素子も総てN型半導体装置とし、行線も列線も非選択時には負電源電位に維持し、選択時には正電源電位を其々の線に付与する。或いは、行選択素子も列選択素子も信号増幅素子も総てP型半導体装置とし、行線も列線も非選択時には正電源電位に維持し、選択時には負電源電位を其々の線に付与する。
【0021】
さて、上述の構成にて本願発明の信号増幅用MIS型薄膜半導体装置が効果的に信号増幅の機能を果たす為には、信号増幅用MIS型薄膜半導体装置のトランジスタ容量Cや基準コンデンサ容量C、及び信号検出素子の素子容量Cを適切に定めねばならない。次に此等の関係を図4乃至図5を用いて説明する。
【0022】
まず、測定対処物の凸部が容量検出誘電体膜に接しており、対象物が電気的に接地されて居る状況を考える。具体的には静電容量検出装置を指紋センサとして用い、この静電容量検出装置表面に指紋の山が接している状態の検出を想定する。基準コンデンサの電極面積をS(μm)、基準コンデンサ誘電体膜の厚みをt(μm)、基準コンデンサ誘電体膜の比誘電率をε、信号増幅用MIS型薄膜半導体装置のゲート電極面積をS(μm)、ゲート絶縁膜の厚みをtox(μm)、ゲート絶縁膜の比誘電率をεoxとして基準コンデンサ容量Cと信号増幅用MIS型薄膜半導体装置のトランジスタ容量Cとを其々
=ε・ε・S/t
=ε・εox・S/tox
と定義する(εは真空の誘電率)。又、容量検出電極の面積をS(μm)、容量検出誘電体膜の厚みをt(μm)、容量検出誘電体膜の比誘電率をεとして信号検出素子の素子容量C
=ε・ε・S/t

Figure 2005077102
【0023】
〔数式1〕
Figure 2005077102
【0024】
となる。従って、素子容量Cが基準コンデンサ容量Cとトランジスタ容量Cとの和であるC+Cよりも十分に大きい時
【0025】
〔数式2〕
Figure 2005077102
【0026】
には、ゲート電圧VGT
【0027】
〔数式3〕
Figure 2005077102
【0028】
と近似され、ゲート電極には殆ど電圧が掛からない。その結果、信号増幅用MIS型薄膜半導体装置はオフ状態となり、ソースドレイン電流Iは窮めて小さくなる。結局、指紋の山に相当する対象物の凸部が静電容量検出装置に接した時に信号増幅素子が殆ど電流を流さない為には、静電容量検出素子を構成するゲート電極面積(ゲート長やゲート幅)やゲート絶縁膜材質、ゲート絶縁膜厚、基準コンデンサ電極面積(コンデンサ電極長やコンデンサ電極幅)、基準コンデンサ誘電体膜材質、基準コンデンサ誘電体膜厚、容量検出電極面積、容量検出誘電体膜材質、容量検出誘電体膜厚などを、素子容量Cが基準コンデンサ容量Cとトランジスタ容量Cとの和であるC+Cよりも十分に大きくなる様に設定せねばならない訳で有る。一般に「十分に大きい」とは10倍程度の相違を意味する。換言すれば素子容量Cは基準コンデンサ容量Cとトランジスタ容量Cとの和であるC+C
>10×(C+C
との関係を満たせば良い。この場合、VGT/Vddは0.1程度以下となり薄膜半導体装置はオン状態には成り得ない。対象物の凸部を確実に検出するには、対象物の凸部が静電容量検出装置に接した時に、信号増幅用MIS型薄膜半導体装置がオフ状態に成る事が重要である。従って電源電圧Vddに正電源を用いる場合には信号増幅用MIS型薄膜半導体装置として、ゲート電圧がゼロ近傍でドレイン電流が流れないエンハンスメント型(ノーマリーオフ型)N型トランジスタを用いるのが好ましい。より理想的には、伝達特性に於けるドレイン電流が最小値となるゲート電圧(最小ゲート電圧)をVminとして、この最小ゲート電圧が
0<0.1×Vdd<Vmin
又は
0<VGT<Vmin
との関係を満たす様な信号増幅用N型MIS薄膜半導体装置を使用する。反対に電源電圧Vddに負電源を用いる場合には信号増幅用MIS型薄膜半導体装置として、ゲート電圧がゼロ近傍でドレイン電流が流れないエンハンスメント型(ノーマリーオフ型)P型トランジスタを用いる。理想的には信号増幅用P型MIS薄膜半導体装置の最小ゲート電圧Vmin
min<0.1×Vdd<0
又は
min<VGT<0
との関係を満たす信号増幅用P型MIS薄膜半導体装置を使用する事である。斯うする事に依り対象物の凸部を、電流値Iが非常に小さいとの形態にて確実に検出し得るので有る。
【0029】
次に対象物が容量検出誘電体膜に接しずに対象物距離tを以て容量検出誘電体膜から離れて居る状況を考える。即ち測定対処物の凹部が容量検出誘電体膜上に有り、更に対象物が電気的に接地されて居る状況で有る。具体的には静電容量検出装置を指紋センサとして用いた時に、静電容量検出装置表面に指紋の谷が来て居る状態の検出を想定する。先にも述べた様に、本発明の静電容量検出装置では容量検出誘電体膜が静電容量検出装置の最表面に位置するのが望ましい。この時の等価回路図を図5に示す。容量検出誘電体膜に対象物表面が接していないので、容量検出誘電体膜と対象物表面との間には空気を誘電体とした新たなコンデンサーが形成される。此を対象物容量Cと名付け、真空の誘電率εと空気の比誘電率εと容量検出電極の面積Sとを用いて、
=ε・ε・S/t
と定義する。斯うして対象物が容量検出誘電体膜から離れた状態では、素子容量Cと対象物容量Cとが直列に接続され、更に此等のコンデンサに互いに並列接続されたトランジスタ容量Cと基準コンデンサ容量Cとが直列に接続される事になる。基準コンデンサには電圧Vddが印可され、信号増幅素子のドレイン電極にはkVddの電圧が印可される(図5)。印可電圧は静電容量に応じて四つのコンデンサー間で分割されるので、この条件下にて信号増幅用MIS型薄膜半導体装置のゲート電極に掛かる電圧(谷が来たときのゲート電圧)VGV
【0030】
〔数式4〕
Figure 2005077102
【0031】
となる。一方、本発明では対象物が静電容量検出装置に接した時にドレイン電流が非常に小さくなる様に
【0032】
〔数式2〕
Figure 2005077102
【0033】
との条件を満たすべく静電容量検出素子を作成して在るので、VGV
【0034】
〔数式5〕
Figure 2005077102
【0035】
と近似される。此処で基準コンデンサ容量Cを対象物容量Cよりも十分に大きくなる様に設定すると、
【0036】
〔数式6〕
Figure 2005077102
【0037】
ゲート電圧VGV
【0038】
〔数式7〕
Figure 2005077102
【0039】
と更に簡略化される。斯うしてkの値が1に近ければ、ゲート電圧VGVは電源電圧Vddに略等しくなる。基準コンデンサ容量Cがトランジスタ容量Cよりも十分に大きくなるよう設定しておくと、
【0040】
〔数式8〕
Figure 2005077102
【0041】
kの値の大小に関わらず、ゲート電圧VGV
【0042】
〔数式9〕
Figure 2005077102
【0043】
となり、電源電圧Vddにほぼ等しくなる。この結果、信号増幅用MIS型薄膜半導体装置をオン状態と出来、電流Iは窮めて大きくなる。指紋の谷に相当する対象物の凹部が静電容量検出装置上に来た時に信号増幅素子が大電流を通す為には、基準コンデンサ容量Cが対象物容量Cよりも十分に大きくなる様に構成付ける必要がある。先に述べた如く、10倍程度の相違が認められると一般に十分に大きいと言えるので、基準コンデンサ容量Cと対象物容量Cとが
>10×C
との関係を満たせば良い。又、kの値如何に関わらず指紋の谷等が接近した時にトランジスタがオン状態になるには基準コンデンサ容量Cがトランジスタ容量Cよりも十倍以上大きくしておけば良い。
【0044】
>10×C
此等の条件を満たすと、VGT/Vddは0.9程度以上となり薄膜半導体装置は容易にオン状態と化す。対象物の凹部を確実に検出するには、対象物の凹部が静電容量検出装置に近づいた時に、信号増幅用MIS型薄膜半導体装置がオン状態に成る事が重要である。電源電圧Vddに正電源を用いる場合には信号増幅用MIS型薄膜半導体装置としてエンハンスメント型(ノーマリーオフ型)N型トランジスタを用いており、このトランジスタの閾値電圧VthがVGVよりも小さいのが好ましい。より理想的には、
0<Vth<0.91×Vdd
との関係を満たす様な信号増幅用N型MIS薄膜半導体装置を使用する。反対に電源電圧Vddに負電源を用いる場合には信号増幅用MIS型薄膜半導体装置としてエンハンスメント型(ノーマリーオフ型)P型トランジスタを用ており、理想的には信号増幅用P型MIS薄膜半導体装置の閾値電圧VthがVGVよりも大きいのが好ましい。より理想的には、
0.91×Vdd<Vth<0
との関係を満たす信号増幅用P型MIS薄膜半導体装置を使用する事である。斯うする事に依り対象物の凹部が、電流値Iが非常に大きいとの形態にて確実に検出されるに至る。
【0045】
結局、指紋の山等に相当する対象物の凸部が静電容量検出装置に接した時に信号増幅素子が殆ど電流を通さず、同時に指紋の谷等に相当する対象物の凹部が静電容量検出装置に近づいた時に信号増幅素子が大きな電流を通して対象物の凹凸を正しく認識するには、静電容量検出素子にて容量検出誘電体膜が静電容量検出装置の最表面に位置し、信号増幅用MIS型薄膜半導体装置のゲート電極面積S(μm)やゲート絶縁膜の厚みtox(μm)、ゲート絶縁膜の比誘電率εox、基準コンデンサの電極面積S(μm)、基準コンデンサ誘電体膜の厚みt(μm)、基準コンデンサ誘電体膜の比誘電率ε、容量検出電極面積S(μm)、容量検出誘電体膜の厚みt(μm)、容量検出誘電体膜の比誘電率ε等を素子容量Cが基準コンデンサ容量Cとトランジスタ容量Cとの和であるC+Cよりも十分に大きくなる様に設定する必要があり、且つ対象物が容量検出誘電体膜に接しずに対象物距離tを以て離れて居る際に基準コンデンサ容量Cが対象物容量Cよりも十分に大きく成る様に静電容量検出装置を構成づける必要がある。更に基準コンデンサ容量Cがトランジスタ容量Cよりも十分大きいのが理想的と言える。より具体的には基準コンデンサ容量Cとトランジスタ容量Cとが
>10×C
との関係式を満たした上で、素子容量Cと基準コンデンサ容量Cと対象物容量Cとが
>10×C
>10×C
との関係を満たす様に静電容量検出装置を特徴付ける。又、電源電圧Vddに正電源を用いる場合には信号増幅用MIS型薄膜半導体装置としてエンハンスメント型(ノーマリーオフ型)N型トランジスタを用いるのが好ましく、此のN型トランジスタの最小ゲート電圧Vmin
0<0.1×Vdd<Vmin 又は0<VGT<Vmin
との関係を満たし、更に閾値電圧VthがVGVよりも小さく、具体的には
0<Vth<0.91×Vdd 又は0<Vth<VGV
との関係を満たしているエンハンスメント型N型トランジスタを用いるのが理想的である。反対に電源電圧Vddに負電源を用いる場合には信号増幅用MIS型薄膜半導体装置としてエンハンスメント型(ノーマリーオフ型)P型トランジスタを用いるのが好ましく、此のP型トランジスタの最小ゲート電圧Vmin
min<0.1×Vdd<0 又はVmin<VGT<0
との関係を満たし、更に閾値電圧VthがVGVよりも大きく、具体的には
0.91×Vdd<Vth<0 又はVGV<Vth<0
との関係を満たしているエンハンスメント型P型トランジスタを用いるのが理想的である。
【0046】
次に斯うした発明を具現化する静電容量検出素子の構造を図6を用いて説明する。本発明では行選択素子と列選択素子と信号増幅素子とがソースドレイン領域の導電型と不純物濃度とを除いて同一構造を取るので、図6には信号増幅素子と基準コンデンサとの断面構造を示す。静電容量検出素子の信号増幅素子を成す信号増幅用MIS型薄膜半導体装置はソース領域とチャンネル形成領域とドレイン領域とを含む半導体膜とゲート絶縁膜とゲート電極とを不可欠な構成要件としている。行選択素子を為す行選択用MIS型薄膜半導体装置も列選択素子を為す列選択用MIS型薄膜半導体装置もソース領域とチャンネル形成領域とドレイン領域とを含む半導体膜とゲート絶縁膜とゲート電極とを不可欠な構成要件とする。図6の構成例では信号増幅用MIS型薄膜半導体装置をNMOSで作成し、基準コンデンサ下部電極は信号増幅用MIS型薄膜半導体装置のドレイン領域と同じ素材であるN型半導体膜から成っている。基準コンデンサ下部電極も薄膜半導体装置のドレイン領域も同じ下地保護膜上に形成されている。基準コンデンサの誘電体膜は信号増幅用MIS型薄膜半導体装置のゲート絶縁膜と同一素材である酸化珪素膜から成り、共に同一層上(半導体膜上)に形成される。基準コンデンサ上部電極は信号増幅用MIS型薄膜半導体装置のゲート電極と同一素材である金属膜(具体的にはタンタル薄膜)にて形成され、ゲート絶縁膜や基準コンデンサ誘電体膜を為す酸化硅素膜上に形成されている。図6では基準コンデンサ下部電極が容量検出電極と信号増幅素子のゲート電極に接続されているが、基準コンデンサ上部電極が容量検出電極と信号増幅素子のゲート電極に接続されても無論良い。
【0047】
斯様な静電容量検出素子は前述のSUFTLA技術を用いて、プラスティック基板上に形成され得る。単結晶硅素技術に基づく指紋センサはプラスティック上では直ぐに割れて仕舞ったり、或いは十分な大きさを有さぬが為に実用性に乏しい。これに対して本願発明に依るプラスティック基板上の静電容量検出素子は、プラスティック基板上で指を被うに十分に大きい面積としても静電容量検出素子が割れる心配もなく、プラスティック基板上での指紋センサとして利用し得る。具体的には本願発明により個人認証機能を兼ね備えたスマートカードが実現される。個人認証機能を備えたスマートカードはキャッシュカード(bank card)やクレジットカード(credit card)、身分証明書(Identity card)等で使用され、此等のセキュリティーレベルを著しく高めた上で尚、個人指紋情報をカード外に流出させずに保護するとの優れた機能を有する。
【0048】
(実施例1)
ガラス基板上に薄膜半導体装置からなる静電容量検出装置を製造した上で、此の静電容量検出装置をSUFTLA技術を用いてプラスティック基板上に転写し、プラスティック基板上に静電容量検出装置を作成した。静電容量検出装置は304行304列の行列状に並んだ静電容量検出素子から構成される。行列部の大きさは20mm角の正方形である。
【0049】
基板は厚み200μmのポリエーテルスルフォン(PES)である。信号増幅用N型MIS型薄膜半導体装置も列選択用N型MIS型薄膜半導体装置も行選択用N型MIS型薄膜半導体装置も総て同じ断面構造を有する薄膜トランジスタにて作られている。薄膜トランジスタは図6に示すトップゲート型で工程最高温度425℃の低温工程にて作成される。半導体膜はレーザー結晶化にて得られた多結晶硅素薄膜でその厚みは50nmである。又、ゲート絶縁膜は化学気相堆積法(CVD法)にて形成された45nm厚の酸化硅素膜で、ゲート電極は厚み400nmのタンタル薄膜から成る。ゲート絶縁膜を成す酸化硅素膜の比誘電率はCV測定により略3.9と求められた。基準コンデンサ下部電極は信号増幅用N型MIS型薄膜半導体装置のドレイン領域と同じN型半導体膜にて形成され、基準コンデンサ誘電体膜は信号増幅用N型MIS型薄膜半導体装置のゲート絶縁膜と同じ酸化珪素膜で作られ、基準コンデンサ上部電極は信号増幅用N型MIS型薄膜半導体装置のゲート電極と同じタンタル薄膜から成る。基準コンデンサ下部電極はコンタクトホールを介して列線に接続され、上部電極は信号増幅用N型MIS型薄膜半導体装置のゲート電極と容量検出電極とに接続されている。静電容量検出素子の回路構成は図3と同一である。
【0050】
本実施例では静電容量検出装置を成す行列のピッチを66μmとし、解像度を385dpi(dots per inch)としている。この結果、容量検出電極面積は1485μmとなった。容量検出誘電体膜は厚み300nmの窒化硅素膜にて形成された。CV測定からこの窒化硅素膜の比誘電率は略7.5であったから、素子容量Cは凡そ329fF(フェムトファラッド)となる。本実施例の静電容量検出装置を指紋センサと想定すると、指紋の凹凸は50μm程度なので、静電容量検出装置表面に指紋の谷が来た時の対象物容量Cは0.26fFと計算される。一方、信号増幅用MIS薄膜半導体装置のゲート電極長Lを2μmとし、ゲート電極幅Wを2μmとしたから、トランジスタ容量Cは凡そ3.07fFとなる。又、基準コンデンサ電極面積Sを42μmとした。この結果、基準コンデンサ容量Cは32fFとなった。斯うして本実施例に示す静電容量検出素子は
>10×C
>10×C
>10×C
との関係を満たす。斯くして電源電圧Vddを3.3Vとすると、指紋の山が静電容量検出装置表面に接した時に信号増幅用MIS薄膜半導体装置のゲート電極に印可される電圧VGTは0.30Vとなり、指紋の谷が来た時に此のゲート電極に印可される電圧VGVは3.08Vとなる。本実施例にて用いた信号増幅用N型MIS型薄膜半導体装置の最小ゲート電圧Vminは0.35Vで有り、指紋の山が接した時のゲート電圧VGTの0.30Vよりも大きいために、信号増幅用N型MIS型薄膜半導体装置は完全にオフ状態となった。一方、閾値電圧Vthは1.42Vであり、指紋の谷が来た時に得られるゲート電圧VGVの3.11Vより小さいために、信号増幅用N型MIS型薄膜半導体装置は完全にオン状態となった。この結果、指紋の山が静電容量検出装置表面に接した時に信号増幅素子から出力される電流値は4.5×10−13Aと窮めて微弱となる。反対に指紋の谷が来た時には信号増幅素子から2.5×10−5Aと大きな電流が出力され、指紋等の凹凸情報を精度良く検出するに至った。
【0051】
【発明の効果】
以上詳述してきた様に、本願により高精度検出可能な静電容量検出装置を薄膜半導体装置にて作成する事が可能になった。従来の単結晶硅素基板を用いた技術では数mm×数mm程度の小さな静電容量検出装置しかプラスティック基板上に形成出来なかったが、本願発明に依るとその百倍もの面積を有する静電容量検出装置をプラスティク基板上に作成する事が実現し、しかも対象物の凹凸情報を窮めて高精度に検出出来る様になった。その結果、例えはスマートカードのセキュリティーレベルを著しく向上せしめるとの効果が認められる。又、単結晶硅素基板を用いた従来の静電容量検出装置は装置面積の極一部しか単結晶硅素半導体を利用して居らず、莫大なエネルギーと労力とを無駄に費やしていた。これに対し本願発明では斯様な浪費を排除し、地球環境の保全に役立つとの効果を有する。
【図面の簡単な説明】
【図1】従来技術に於ける動作原理を説明した図。
【図2】本願発明に於ける動作原理を説明した図。
【図3】本願発明に於ける静電容量検出素子の回路構成を説明した図。
【図4】本願発明の原理を説明した図。
【図5】本願発明の原理を説明した図。
【図6】本願発明の素子構造を説明した図。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a capacitance detection device that reads the surface shape of an object having fine irregularities such as fingerprints by detecting the capacitance that changes according to the distance from the object surface.
[0002]
[Prior art]
Conventionally, a capacitance detection device used for a fingerprint sensor or the like has formed a sensor electrode and a dielectric film provided on the sensor electrode on a single crystal silicon substrate (Japanese Patent Laid-Open Nos. 11-118415 and 2000-). 346608, JP-A-2001-56204, JP-A-2001-133213, etc.). FIG. 1 illustrates the principle of operation of a conventional capacitance detection device. The sensor electrode and the dielectric film form one electrode of the capacitor and the dielectric film, and the other body is grounded. Capacitance C of this capacitorFChanges according to the unevenness of the fingerprint in contact with the surface of the dielectric film. On the other hand, the capacitance CSIs prepared, and these two capacitors are connected in series, and a predetermined voltage is applied. As a result, a charge Q corresponding to the unevenness of the fingerprint is generated between the two capacitors. This electric charge Q was detected using ordinary semiconductor technology, and the surface shape of the object was read.
[0003]
[Problems to be solved by the invention]
However, since these conventional capacitance detection devices are formed on a single crystal silicon substrate, when the device is used as a fingerprint sensor, when the finger is pressed strongly, the device breaks down. I had it.
[0004]
Furthermore, the fingerprint sensor is inevitably required to have a size of about 20 mm × 20 mm depending on its use, and most of the capacitance detection device area is occupied by the sensor electrode. Of course, the sensor electrode is made on a single crystal silicon substrate, but most of the single crystal silicon substrate (bottom part of the sensor electrode) produced by expending enormous energy and labor plays only a role as a support. That is, the conventional capacitance detection device is not only expensive, but has a problem that it is formed on a great deal of waste and waste.
[0005]
In addition, in recent years, it is strongly pointed out that a personal authentication function should be provided on a card such as a credit card or a cash card to enhance the safety of the card. However, since a conventional capacitance detection device made on a single crystal silicon substrate lacks flexibility, there is a problem that the device cannot be made on a plastic substrate.
[0006]
In view of the above-mentioned circumstances, the present invention is intended to operate stably, further reduce unnecessary energy and labor at the time of manufacture, and excellent electrostatic capacity that can be created other than a single crystal silicon substrate. To provide a capacity detection device.
[0007]
[Means for Solving the Problems]
The present invention creates a capacitance detection device on a glass substrate or the like by using a thin film semiconductor device for detecting the surface shape of an object by detecting the capacitance that changes according to the distance to the object. To do. Such a capacitance detection device has M rows and N column lines arranged in a matrix of M rows and N columns, and M × N pieces provided at the intersections of the row lines and the column lines. And a capacitance detection element. Each capacitance detection element includes a signal detection element, a signal amplification element, and a column selection element. The signal detection element includes a capacitance detection electrode, a capacitance detection dielectric film, and a reference capacitor. The reference capacitor includes a reference capacitor lower electrode, a reference capacitor dielectric film, and a reference capacitor upper electrode. On the other hand, the signal amplifying element comprises a signal amplifying MIS type thin film semiconductor device comprising a gate electrode, a gate insulating film, and a semiconductor film. The present invention is characterized in that the reference capacitor lower electrode and the column line are electrically connected. The column selection element is composed of a column selection MIS type thin film semiconductor device comprising a gate electrode, a gate insulating film, and a semiconductor film. It is also a feature of the present invention that the gate electrode of the column selection MIS thin film semiconductor device is connected to the column line. The MIS thin film semiconductor device for signal amplification and the MIS thin film semiconductor device for column selection are semiconductor devices of the same conductivity type, and both thin film semiconductor devices are connected in series. The present invention is characterized in that the reference capacitor lower electrode and the column line are electrically connected in such a configuration. The present invention is also characterized in that when the reference capacitor lower electrode and the column line are electrically connected, the capacitance detection electrode and the reference capacitor upper electrode are electrically connected. In this state, the gate electrode of the MIS thin film semiconductor device for signal amplification is connected to the capacitance detection electrode and the reference capacitor upper electrode.
[0008]
The present invention creates a capacitance detection device on a glass substrate or the like by using a thin film semiconductor device for detecting the surface shape of an object by detecting the capacitance that changes according to the distance to the object. To do. Such a capacitance detection device has M rows and N column lines arranged in a matrix of M rows and N columns, and M × N pieces provided at the intersections of the row lines and the column lines. And a capacitance detection element. Each capacitance detection element includes a signal detection element, a signal amplification element, and a column selection element. The signal detection element includes a capacitance detection electrode, a capacitance detection dielectric film, and a reference capacitor. The reference capacitor includes a reference capacitor lower electrode, a reference capacitor dielectric film, and a reference capacitor upper electrode. On the other hand, the signal amplifying element comprises a signal amplifying MIS type thin film semiconductor device comprising a gate electrode, a gate insulating film, and a semiconductor film. The present invention is characterized in that the reference capacitor upper electrode and the column line are electrically connected. The column selection element is composed of a column selection MIS type thin film semiconductor device comprising a gate electrode, a gate insulating film, and a semiconductor film. It is also a feature of the present invention that the gate electrode of the column selection MIS thin film semiconductor device is connected to the column line. The MIS thin film semiconductor device for signal amplification and the MIS thin film semiconductor device for column selection are semiconductor devices of the same conductivity type, and both thin film semiconductor devices are connected in series. The present invention is characterized in that the reference capacitor upper electrode and the column line are electrically connected in such a configuration. The present invention is also characterized in that when the reference capacitor upper electrode and the column line are electrically connected, the capacitance detection electrode and the reference capacitor lower electrode are electrically connected. In this state, the gate electrode of the MIS thin film semiconductor device for signal amplification is connected to the capacitance detection electrode and the reference capacitor lower electrode.
[0009]
The present invention is characterized in that the drain electrode of the signal amplifying MIS thin film semiconductor device is electrically connected to the row line when the capacitance detecting element is in a selected state. Further, in the present invention, the capacitance detection device includes an output line, and when a certain capacitance detection element is selected, the source electrode of the MIS type thin film semiconductor device for signal amplification in the capacitance detection element is the output line. It is also characterized by electrical conduction.
[0010]
The present invention is characterized in that the dielectric film of the reference capacitor and the gate insulating film of the MIS thin film semiconductor device for signal amplification are formed of the same material. These films may be formed on the same layer. The reference capacitor lower electrode can be formed of the same material as the drain region of the MIS thin film semiconductor device for signal amplification. The reference capacitor lower electrode and the drain region of the signal amplifying MIS thin film semiconductor device are also formed on the same layer. The upper electrode of the reference capacitor is formed of the same material as the gate electrode of the signal amplification MIS type thin film semiconductor device. These electrodes may be formed on the same layer.
[0011]
The present invention sets the electrode area of the reference capacitor to SR(Μm2), The thickness of the reference capacitor dielectric film is tR(Μm), the dielectric constant of the reference capacitor dielectric film is εRThe gate electrode area of the MIS type thin film semiconductor device for signal amplification is ST(Μm2), The thickness of the gate insulating film is tox(Μm), the dielectric constant of the gate insulating film is εoxReference capacitor capacity CRAnd transistor capacitance C of MIS type thin film semiconductor device for signal amplificationTAnd each
CR= Ε0・ ΕR・ SR/ TR
CT= Ε0・ Εox・ ST/ Tox
0Is the dielectric constant of the vacuum), and the area of the capacitance detection electrode is SD(Μm2), The thickness of the capacitance detection dielectric film is tD(Μm), the dielectric constant of the capacitance detection dielectric film is εDAs the element capacitance C of the signal detection elementDThe
CD= Ε0・ ΕD・ SD/ TD
0Is the vacuum dielectric constant), and this element capacitance CDIs the reference capacitor capacity CRAnd transistor capacitance CTC which is the sum ofR+ CTIt is characterized by being sufficiently larger than. Furthermore, the reference capacitor capacity CRIs transistor capacitance CTIdeally it should be much larger than. Therefore, element capacitance CDIs the reference capacitor capacity CRIt is also characterized by being sufficiently larger than a single unit. The capacitance detection dielectric film is also characterized by being located on the outermost surface of the capacitance detection device. In addition, the present invention also provides an object distance t without the object to be measured contacting the capacitance detecting dielectric film.AThe object capacity CAThe dielectric constant of vacuum ε0And air relative permittivity εAAnd area S of the capacitance detection electrodeDAnd
CA= Ε0・ ΕA・ SD/ TA
Is defined as the reference capacitor capacity CRIs the object capacity CAIt is characterized by being sufficiently larger than. Again, the reference capacitor capacitance CRIs transistor capacitance CTIdeally it should be much larger than.
[0012]
In the present invention, the capacitance detection dielectric film is positioned on the outermost surface of the capacitance detection device, and the electrode area of the reference capacitor is defined as S.R(Μm2), The thickness of the reference capacitor dielectric film is tR(Μm), the dielectric constant of the reference capacitor dielectric film is εRThe gate electrode area of the MIS type thin film semiconductor device for signal amplification is ST(Μm2), The thickness of the gate insulating film is tox(Μm), the dielectric constant of the gate insulating film is εoxReference capacitor capacity CRAnd transistor capacitance C of MIS type thin film semiconductor device for signal amplificationTAnd each
CR= Ε0・ ΕR・ SR/ TR
CT= Ε0・ Εox・ ST/ Tox
0Is the dielectric constant of the vacuum), and the area of the capacitance detection electrode is SD(Μm2), The thickness of the capacitance detection dielectric film is tD(Μm), the dielectric constant of the capacitance detection dielectric film is εDAs the element capacitance C of the signal detection elementDThe
CD= Ε0・ ΕD・ SD/ TD
0Is the vacuum dielectric constant), and this element capacitance CDIs the reference capacitor capacity CRAnd transistor capacitance CTC which is the sum ofR+ CTLarger than the object distance t and the object does not contact the capacitance detection dielectric film.AThe object capacity CAThe dielectric constant of vacuum ε0And air relative permittivity εAAnd area S of the capacitance detection electrodeDAnd
CA= Ε0・ ΕA・ SD/ TA
Is defined as the reference capacitor capacity CRIs the target capacity CAIt is characterized by being sufficiently larger than. Again, the reference capacitor capacitance CRIs transistor capacitance CTIdeally it should be much larger than. Therefore, element capacitance CDIs the reference capacitor capacity CRIt is sufficiently larger than a single unit, and the reference capacitor capacity CRSingle object volume CAIt is also characterized by being sufficiently larger than.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
According to the present invention, a capacitance detecting device for reading the surface shape of an object is detected by detecting a capacitance that changes in accordance with the distance to the object, and an MIS type thin film made of a metal-insulating film-semiconductor film. Created with a semiconductor device. Since a thin film semiconductor device is usually formed on a glass substrate, it is known as a technique for manufacturing a semiconductor integrated circuit requiring a large area at a low cost. Specifically, it has recently been applied to a liquid crystal display device or the like. Therefore, when a capacitance detection device adapted to a fingerprint sensor or the like is made with a thin film semiconductor device, it is not necessary to use an expensive substrate made by consuming a great amount of energy such as a single crystal silicon substrate. Therefore, the apparatus can be produced at low cost without wasting valuable earth resources. Thin film semiconductor devices adopt a transfer technique called SUFTLA (Japanese Patent Laid-Open No. 11-312811 and S. Utsunomiya et al. Society for Information Display p. 916 (2000)), so that a semiconductor integrated circuit is formed on a plastic substrate. Since it can be made, the capacitance detecting device can be released from the single crystal silicon substrate and formed on the plastic substrate.
[0014]
Now, as shown in FIG. 1, it is impossible to produce a capacitance detecting device to which a conventional operation principle is applied using a thin film semiconductor device with the current technology of the thin film semiconductor device. Since the charge Q induced between two capacitors connected in series is very small, the charge Q can be accurately read using single crystal silicon LSI technology that enables high-precision sensing. However, the charge Q cannot be read accurately because it is not as good as single crystal silicon LSI technology and the characteristic deviation between thin film semiconductor devices is large. Therefore, the capacitance detection device of the present invention includes M (M is an integer of 1 or more) row lines and N (N is an integer of 1 or more) column lines arranged in a matrix of M rows and N columns, And M × N capacitance detection elements provided at the intersections of the row lines and the column lines, each of which includes a signal detection element, a signal amplification element, and a column selection element. Including the above. The signal detection element includes a capacitance detection electrode, a capacitance detection dielectric film, and a reference capacitor. The reference capacitor further includes a reference capacitor lower electrode, a reference capacitor dielectric film, and a reference capacitor upper electrode. When an object such as a fingerprint contacts or approaches the capacitance detection dielectric film, a potential V is generated in the capacitance detection electrode according to the capacitance with the object. In the present invention, this potential V is amplified by a signal amplifying element provided in each capacitance detecting element, and converted into an amplified current or voltage. Specifically, the signal amplifying element comprises a signal amplifying MIS thin film semiconductor device comprising a gate electrode, a gate insulating film, and a semiconductor film. One electrode of the reference capacitor is connected to the column line, and the other electrode is connected to the capacitance detection electrode and the gate electrode of the MIS thin film semiconductor device for signal amplification. For example, when the reference capacitor lower electrode and the column line are electrically connected, the reference capacitor upper electrode is electrically connected to the capacitance detection electrode, and the capacitance detection electrode and the reference capacitor upper electrode are for signal amplification. It is electrically connected to the gate electrode of the MIS type thin film semiconductor device. Conversely, when the reference capacitor upper electrode and the column line are electrically connected, the reference capacitor lower electrode is electrically connected to the capacitance detection electrode, and the capacitance detection electrode and the reference capacitor lower electrode are amplified. It is electrically connected to the gate electrode of the MIS type thin film semiconductor device.
[0015]
The operating principle of the present invention in such a configuration will be described with reference to FIG. Capacitance C that changes according to the surface shape of the objectFAnd a capacitance CRReference capacitor with transistor capacitance CTCapacitance C with MIS type thin film semiconductor device for signal amplification havingR+ CTThe potential V induced between the two is connected to the gate electrode (G in the figure) of the MIS thin film semiconductor device for signal amplification, and changes the gate potential of the semiconductor device. Thus, when a predetermined voltage is applied to the drain region (D in the figure) of this thin film semiconductor device, the current I flowing between the source and drain of the thin film semiconductor device is significantly modulated according to the induced gate potential V. A charge Q is generated in the gate electrode or the like according to the potential V. However, since these charges are stored without flowing anywhere, the current value I is constant. Therefore, the current I can be easily measured by increasing the drain voltage or lengthening the measurement time, and thus the surface shape of the object can be measured sufficiently accurately even if the thin film semiconductor device is used. A signal (current or voltage) obtained by amplifying the capacitance information of the object is read through the output line. In order to measure the capacitance of the object, the current I through the signal amplification element may be measured, or the voltage V through the signal amplification element corresponding to the current I may be measured.
[0016]
Next, a circuit configuration of a capacitance detection element embodying the present invention will be described with reference to FIG. As described above, each capacitance detection element includes a signal amplification element, a signal detection element, and a column selection element as indispensable components. The signal detection element includes a capacitance detection electrode, a capacitance detection dielectric film, and a reference capacitor. The reference capacitor includes a reference capacitor lower electrode, a reference capacitor dielectric film, and a reference capacitor upper electrode. The signal amplifying element comprises a signal amplifying MIS thin film semiconductor device comprising a gate electrode, a gate insulating film and a semiconductor film, and the column selecting element comprises a column selecting MIS thin film semiconductor comprising a gate electrode, a gate insulating film and a semiconductor film. Consists of devices. These two types of thin film semiconductor devices are of the same conductivity type. Further, the signal amplification element and the column selection element are installed in series between the row line and the output line. As an example, the drain electrode of the N-type MIS thin film semiconductor device for column selection is electrically connected to the row line, and the source electrode of the N-type MIS thin film semiconductor device for column selection and the N-type MIS thin film semiconductor device for signal amplification And the source electrode of the N-type MIS thin film semiconductor device for signal amplification are electrically connected to the output line. The term “electrically connected” means that a state is established in which electrical conduction can be achieved through a switch element or the like. Of course, the source electrode of the MIS thin film semiconductor device for signal amplification may be directly connected to the output line, or the drain electrode of the column selection MIS thin film semiconductor device may be directly connected to the row line. Further, since the source electrode and the drain electrode of the transistor are symmetrical in structure, the source electrode and the drain electrode may be interchanged. (That is, the word “source electrode” and the word “drain electrode” may be interchanged in the above example. However, in terms of physical strictness, in N-type transistors, the lower potential is defined as the source electrode. In the P-type transistor, the higher potential is defined as the source electrode, and in this example, the high potential (Vdd) And N-type transistors are used for the signal amplifying element and the column selecting element, so that the drain electrode of the signal amplifying element and the column selecting element is electrically connected to the row line side, and the source electrode is on the output line side It will be connected to. Further, the positional relationship between the column selection element and the signal amplification element may be opposite to the previous example. That is, the signal amplification element may be located on the row line side, and the column selection element may be located on the output line side.
[0017]
The number of output lines provided in the capacitance detection device can be taken out in the column direction as the same number N as the column lines, or can be taken out in the row direction as the same number M as the row lines. Furthermore, one output line may be provided in two columns, or one output line may be provided in two rows. In the present invention, since each capacitance detection element is selected one by one, the output line has such various forms. In the example of FIG. 3, the number of output lines is N, which is the same as the number of column lines, and the output lines are taken out in the column direction.
[0018]
One electrode of the reference capacitor is connected to the column line, and the other electrode is connected to the capacitance detection electrode and the gate electrode of the MIS semiconductor device for signal amplification. In the present invention, since a high potential is applied to the column line with the column line selected, one electrode of the reference capacitor directly connected to the column line has a high potential (Vdd) Is always applied, and a potential corresponding to the capacitance of the object is applied to the gate electrode of the signal amplifying element. Thus, the electrical conductivity between the source and drain of the MIS type thin film semiconductor device for signal amplification changes, and this is detected to obtain surface irregularity information of the object such as fingerprint information.
[0019]
Basically, it is possible to detect the capacitance with high accuracy with such a configuration, but in order to prevent information interference between the capacitance detection elements and realize high-precision detection at high speed, the capacitance The detection element preferably includes a column selection element and a row selection element. Similar to the column selection element, the row selection element can be constituted by a MIS type thin film semiconductor device for row selection comprising a gate electrode, a gate insulating film, and a semiconductor film. The MIS thin film semiconductor device for signal amplification, the MIS thin film semiconductor device for column selection, and the MIS thin film semiconductor device for row selection that form a signal amplification element are all connected in series. A row selection element is turned on by a row selection signal applied to the row line, and a column selection element is turned on by a column selection signal applied to the column line. In FIG. 3, an N-type semiconductor device is used as a row selection element, and this N-type semiconductor device drain electrode and gate electrode are connected to a row line to perform a diode operation. The diode-connected N-type MIS thin film semiconductor device for row selection operates so that the direction from the row line to the output line is the forward direction. That is, only when a selection signal having a high potential is input to the row line, the electrical conductivity of the row selection element is increased and the switch is turned on. The source electrode of the row selecting N-type thin film semiconductor device is connected to the drain electrode of the column selecting N-type thin film semiconductor device, and the gate electrode of the column selecting N-type thin film semiconductor device is connected to the column line. The column line has a low potential (Vss: Negative power supply potential) and high potential (Vdd: Positive power supply potential). Accordingly, the column selecting element is increased in electrical conductivity only when the column line is selected, and is switched on. Eventually, a specific row line (for example, the i-th row line) is selected from among the M row lines, and a high potential is applied to the row line (i-th row line). As a result, the row selection element connected to the selected row line (i-th row line) is turned on. Next, in this state, when a selection signal enters a specific column line (for example, the jth column line) among the N column lines, it is connected to that column line (jth column line). Further, the electrical conductivity of the column selection element is increased and the transistor is turned on. As a result, the high potential applied to the selected row line (i-th row line) is applied to the drain electrode of the signal amplifying element located on the selected column line (j-th column line), and the target A source / drain current modulated with a gate voltage corresponding to the unevenness information of the object is generated in the signal amplifying element located in i row and j column. Thus, only M × N static capacitance detection elements (capacitance detection elements located in i rows and j columns) located at the intersections of the selected rows (i rows) and columns (j columns). The capacitance of the object at the position selected from the capacitance detection element group is measured. By providing a column selection element in each capacitance detection element, column selection is uniquely performed and information interference between columns can be prevented. Similarly, by providing a row selection element in each capacitance detection element, row selection is uniquely performed and information interference between rows can be prevented. By providing the column selection element and the row selection element in series, information backflow from the output line to the row line can be prevented, and the capacitance can be detected with high accuracy. In order to exhibit these effects, the column selection element, the row selection element, and the signal amplifying element may be arranged in series, and their order is not limited. These three elements are arranged in series between the row line and the output line, the gate electrode of the row selection element is connected to the row line, the gate electrode of the column selection element is connected to the column line, and the gate of the signal amplification element It is important that the electrode is connected to the capacitance detection electrode. As described above, in the present invention, when the capacitance detecting element is selected by the row selection signal or the column selection signal, the drain electrode of the signal amplification MIS thin film semiconductor device is electrically connected to the row line. The source electrode is electrically connected to the output line. Actually, switching elements such as row selection elements and column selection elements can be inserted between the signal amplification elements and the row lines or between the signal amplification elements and the output lines depending on the arrangement order of the three elements. Since the element has a high electric conductivity in the selected state, the drain electrode of the signal amplifying element is connected to the row line, and the source electrode is connected to the output line. As a result, the electric conductivity of the signal amplification element itself determines the current value from the row line to the output line. As will be described later, when the convex portion of the object (for example, a crest of a fingerprint) is in contact with the capacitance detection dielectric film, the electric conductivity of the signal amplification element is small, and almost no current is supplied to the output line. On the other hand, if the concave portion of the object (for example, the valley of the fingerprint) comes to the surface of the capacitance detection dielectric film and a thin air film is generated between the dielectric film and the object, the electric conductivity of the signal amplification element is remarkably large. Thus, a large current is supplied to the output line. Thus, the unevenness information of the object is obtained by measuring the current (or the voltage corresponding to the current) supplied to the output line.
[0020]
When each capacitance detection element includes a row selection element and a column selection element, only one specific capacitance detection element is reliably selected from the M × N capacitance detection element group as described above. Then the advantage is recognized. On the other hand, if there is no reference capacitor, the transistor capacitance of the signal amplification element and the capacitance of the object are capacitively coupled, and the product of the capacitance ratio and the drain voltage of the signal amplification element is applied to the gate electrode of the signal amplification element. Applied. Since the row selection element or the column selection element and the signal amplifying element are connected in series, the drain potential of the signal amplifying element is a high potential (Vdd) Is lowered by the presence of row selection elements and column selection elements. For example, assuming that the electric conductivity in the ON state of the row selection element, the column selection element, and the signal amplification element is approximately the same, VddIs applied, the drain potential of the signal amplifying element is VddV, which is about one third ofdd/ Go down to about 3 and finish. Therefore, even if the capacitance of the measurement object changes, the change amount of the gate potential of the signal amplifying element is at most Vdd/ 3, and the detection accuracy decreases or VddThe value of must be increased. In order to solve such a problem, in the present invention, a reference capacitor is provided, and one electrode of the reference capacitor is directly connected to the column line. Thus, even if there is a row selection element or a column selection element, one electrode of the reference capacitor is surely at a high potential (VddTherefore, the gate potential of the signal amplifying element is at least near zero and at most VddCan be near. That is, with the configuration of the present invention, even if the row selecting element and the column selecting element are connected in series with the signal amplifying element and provided between the row line and the output line, the gate potential of the signal amplifying element is a negative power source. Potential (Vss: Zero volt) around positive power supply potential (Vdd: High potential) can be changed according to the capacitance of the measurement object. When the gate potential of the signal amplification element is in the vicinity of the negative power supply potential, the signal amplification MIS thin film semiconductor device is turned off, and the electric conductivity of the signal amplification element is significantly reduced. On the contrary, when the gate potential of the signal amplifying element is close to the positive power supply potential, the signal amplifying MIS thin film semiconductor device is turned on, and the electric conductivity of the signal amplifying element is increased. By measuring such a change in electrical conductivity via an output line, it is possible to collect unevenness information on the surface of the object. In such a configuration, the column selection element and the signal amplification element must be thin film semiconductor devices of the same conductivity type. This is because the column selection signal applied to the column line is applied to the gate electrode of the column selection element, and at the same time, the column selection signal is applied to the gate electrode of the signal amplification element via the reference capacitor. Specifically, when the column selection element and the signal amplifying element are N-type semiconductor devices, a negative power supply potential (ground potential, zero volts) is applied to the column line in a non-selected state, and a positive power supply potential (high potential) in the selected state. , A positive potential, such as +2.5 V or +3.3 V, is applied. When the column selection element and the signal amplifying element are P-type semiconductor devices, the column line is given a positive power supply potential (ground potential, zero volts) in a non-selected state, and a negative power supply potential (negative potential, negative in a selected state). For example, -2.5V or -3.3V). Further, when a semiconductor device is used as the row selection element, the row selection MIS thin film semiconductor device is preferably of the same conductivity type as the column selection element and the signal amplification element. This is because the column selection signal and the row selection signal can have the same polarity, and the drain potential of the signal amplifying element and the electrode potential connected to the column line of the reference capacitor have the same polarity, thereby increasing the signal amplification sensitivity. For example, the row selection element, the column selection element, and the signal amplifying element are all N-type semiconductor devices, and the row line and the column line are maintained at the negative power supply potential when not selected, and the positive power supply potential is applied to each line when selected. To do. Alternatively, the row selection element, the column selection element, and the signal amplifying element are all P-type semiconductor devices, and the row line and the column line are maintained at a positive power supply potential when not selected, and a negative power supply potential is applied to each line when selected. To do.
[0021]
In order to effectively perform the signal amplification function of the signal amplification MIS thin film semiconductor device of the present invention with the above-described configuration, the transistor capacitance C of the signal amplification MIS thin film semiconductor device is described.TAnd reference capacitor capacity CR, And element capacitance C of the signal detection elementDMust be determined appropriately. Next, these relationships will be described with reference to FIGS.
[0022]
First, consider a situation where the convex portion of the measurement object is in contact with the capacitance detection dielectric film and the object is electrically grounded. Specifically, it is assumed that a capacitance detection device is used as a fingerprint sensor, and that a state in which a crest of fingerprints is in contact with the surface of the capacitance detection device is assumed. The electrode area of the reference capacitor is SR(Μm2), The thickness of the reference capacitor dielectric film is tR(Μm), the dielectric constant of the reference capacitor dielectric film is εRThe gate electrode area of the MIS type thin film semiconductor device for signal amplification is ST(Μm2), The thickness of the gate insulating film is tox(Μm), the dielectric constant of the gate insulating film is εoxReference capacitor capacity CRAnd transistor capacitance C of MIS type thin film semiconductor device for signal amplificationTAnd each
CR= Ε0・ ΕR・ SR/ TR
CT= Ε0・ Εox・ ST/ Tox
0Is the dielectric constant of the vacuum). The area of the capacitance detection electrode is SD(Μm2), The thickness of the capacitance detection dielectric film is tD(Μm), the dielectric constant of the capacitance detection dielectric film is εDAs the element capacitance C of the signal detection elementDThe
CD= Ε0・ ΕD・ SD/ TD
Figure 2005077102
[0023]
[Formula 1]
Figure 2005077102
[0024]
It becomes. Therefore, the element capacitance CDIs the reference capacitor capacity CRAnd transistor capacitance CTC which is the sum ofR+ CTBig enough than
[0025]
[Formula 2]
Figure 2005077102
[0026]
Includes the gate voltage VGTIs
[0027]
[Formula 3]
Figure 2005077102
[0028]
And almost no voltage is applied to the gate electrode. As a result, the MIS thin film semiconductor device for signal amplification is turned off, and the source / drain current I is abundantly reduced. After all, when the convex portion of the object corresponding to the peak of the fingerprint is in contact with the capacitance detection device, the signal amplification element hardly flows current, so that the gate electrode area (gate length) constituting the capacitance detection element is reduced. Gate width), gate insulating film material, gate insulating film thickness, reference capacitor electrode area (capacitor electrode length and capacitor electrode width), reference capacitor dielectric film material, reference capacitor dielectric film thickness, capacitance detection electrode area, capacitance detection Dielectric film material, capacitance detection dielectric film thickness, etc.DIs the reference capacitor capacity CRAnd transistor capacitance CTC which is the sum ofR+ CTIt must be set to be sufficiently larger than this. In general, “sufficiently large” means a difference of about 10 times. In other words, element capacitance CDIs the reference capacitor capacity CRAnd transistor capacitance CTC which is the sum ofR+ CTWhen
CD> 10 × (CR+ CT)
Satisfy the relationship with. In this case, VGT/ VddIs about 0.1 or less, and the thin film semiconductor device cannot be turned on. In order to reliably detect the convex portion of the target object, it is important that the signal amplification MIS thin film semiconductor device is turned off when the convex portion of the target object contacts the capacitance detection device. Therefore, the power supply voltage VddWhen a positive power source is used, an enhancement type (normally off type) N-type transistor in which the drain current does not flow when the gate voltage is near zero is preferably used as the MIS type thin film semiconductor device for signal amplification. More ideally, the gate voltage (minimum gate voltage) at which the drain current in the transfer characteristics becomes the minimum value is VminAs this minimum gate voltage is
0 <0.1 × Vdd<Vmin
Or
0 <VGT<Vmin
An N-type MIS thin film semiconductor device for signal amplification that satisfies the above relationship is used. Conversely, the power supply voltage VddWhen a negative power supply is used, an enhancement type (normally off type) P-type transistor in which a drain current does not flow when the gate voltage is near zero is used as the MIS type thin film semiconductor device for signal amplification. Ideally, the minimum gate voltage V of the P-type MIS thin film semiconductor device for signal amplificationminBut
Vmin<0.1 × Vdd<0
Or
Vmin<VGT<0
The signal amplification P-type MIS thin film semiconductor device satisfying the relationship is used. As a result, the convex portion of the object can be reliably detected in the form that the current value I is very small.
[0029]
Next, the object distance t does not contact the capacitance detection dielectric film.AThus, let us consider a situation where the capacitor is separated from the dielectric film. That is, there is a situation in which the concave portion of the measurement object is on the capacitance detection dielectric film and the object is electrically grounded. Specifically, it is assumed that a fingerprint valley is present on the surface of the capacitance detection device when the capacitance detection device is used as a fingerprint sensor. As described above, in the capacitance detection device of the present invention, it is desirable that the capacitance detection dielectric film is located on the outermost surface of the capacitance detection device. An equivalent circuit diagram at this time is shown in FIG. Since the object surface is not in contact with the capacitance detection dielectric film, a new capacitor using air as a dielectric is formed between the capacitance detection dielectric film and the object surface. This is the object capacity CAAnd the dielectric constant ε of the vacuum0And air relative permittivity εAAnd area S of the capacitance detection electrodeDAnd
CA= Ε0・ ΕA・ SD/ TA
It is defined as Thus, when the object is away from the capacitance detection dielectric film, the element capacitance CDAnd object capacity CAAre connected in series and are further connected in parallel to these capacitors.TAnd reference capacitor capacity CRAre connected in series. The reference capacitor has a voltage VddIs applied and kV is applied to the drain electrode of the signal amplifying element.ddIs applied (FIG. 5). Since the applied voltage is divided among the four capacitors according to the electrostatic capacity, the voltage applied to the gate electrode of the MIS type thin film semiconductor device for signal amplification under this condition (gate voltage when the valley comes) VGVIs
[0030]
[Formula 4]
Figure 2005077102
[0031]
It becomes. On the other hand, in the present invention, the drain current becomes very small when the object contacts the capacitance detection device.
[0032]
[Formula 2]
Figure 2005077102
[0033]
Since the capacitance detection element has been created to satisfy the conditionGVIs
[0034]
[Formula 5]
Figure 2005077102
[0035]
Is approximated by Here, the reference capacitor capacity CRThe object capacity CAIf you set it to be sufficiently larger than
[0036]
[Formula 6]
Figure 2005077102
[0037]
Gate voltage VGVIs
[0038]
[Formula 7]
Figure 2005077102
[0039]
And is further simplified. Thus, if the value of k is close to 1, the gate voltage VGVIs the power supply voltage VddIs approximately equal to Reference capacitor capacity CRIs transistor capacitance CTIf you set it to be sufficiently larger than
[0040]
[Formula 8]
Figure 2005077102
[0041]
Regardless of the value of k, the gate voltage VGVIs
[0042]
[Formula 9]
Figure 2005077102
[0043]
Power supply voltage VddIs almost equal to As a result, the MIS thin film semiconductor device for signal amplification can be turned on, and the current I is given up and increased. In order for the signal amplifying element to pass a large current when the concave portion of the object corresponding to the valley of the fingerprint comes on the capacitance detection device, the reference capacitor capacitance CRIs the target capacity CAIt is necessary to configure it to be sufficiently larger than the above. As described above, if a difference of about 10 times is recognized, it can be generally said that the difference is large.RAnd object capacity CAToga
CR> 10 × CA
Satisfy the relationship with. In order to turn on the transistor when the valley of the fingerprint approaches, regardless of the value of k, the reference capacitor capacitance CRIs transistor capacitance CTIt should be 10 times larger than this.
[0044]
CR> 10 × CT
If these conditions are met, VGT/ VddBecomes about 0.9 or more, and the thin film semiconductor device is easily turned on. In order to reliably detect the concave portion of the target object, it is important that the signal amplification MIS thin film semiconductor device is turned on when the concave portion of the target object approaches the capacitance detection device. Power supply voltage VddIn the case of using a positive power supply, an enhancement type (normally-off type) N-type transistor is used as the signal amplification MIS type thin film semiconductor device, and the threshold voltage V of this transistor is used.thIs VGVIs preferably smaller. More ideally,
0 <Vth<0.91 × Vdd
An N-type MIS thin film semiconductor device for signal amplification that satisfies the above relationship is used. Conversely, the power supply voltage VddWhen a negative power supply is used, an enhancement type (normally-off type) P-type transistor is used as the signal amplification MIS type thin film semiconductor device. Ideally, the threshold voltage V of the signal type P type MIS thin film semiconductor device is used.thIs VGVIs preferably larger. More ideally,
0.91 × Vdd<Vth<0
The signal amplification P-type MIS thin film semiconductor device satisfying the relationship is used. As a result, the concave portion of the object is reliably detected in a form that the current value I is very large.
[0045]
In the end, when the convex part of the object corresponding to the fingerprint crest etc. is in contact with the capacitance detection device, the signal amplification element hardly conducts current, and at the same time the concave part of the object corresponding to the fingerprint trough etc. In order for the signal amplification element to correctly recognize the unevenness of the object through a large current when approaching the detection device, the capacitance detection dielectric film is positioned on the outermost surface of the capacitance detection device and the signal is detected. Gate electrode area S of MIS type thin film semiconductor device for amplificationT(Μm2) And gate insulating film thickness tox(Μm), dielectric constant ε of gate insulating filmox, Reference capacitor electrode area SR(Μm2) Reference capacitor dielectric film thickness tR(Μm), relative permittivity ε of the reference capacitor dielectric filmR, Capacitance detection electrode area SD(Μm2), Thickness t of the capacitance detection dielectric filmD(Μm), dielectric constant ε of the capacitance detection dielectric filmDEtc., element capacitance CDIs the reference capacitor capacity CRAnd transistor capacitance CTC which is the sum ofR+ CTMust be set to be sufficiently larger than the object distance, and the object distance t does not contact the capacitance detection dielectric film.AThe reference capacitor capacitance C whenRIs the target capacity CAIt is necessary to configure the capacitance detection device so as to be sufficiently larger than the above. Furthermore, the reference capacitor capacity CRIs transistor capacitance CTIt is ideal that it is sufficiently larger than that. More specifically, the reference capacitor capacity CRAnd transistor capacitance CTToga
CR> 10 × CT
The element capacitance CDAnd reference capacitor capacity CRAnd object capacity CAToga
CD> 10 × CR
CR> 10 × CA
Characterize the capacitance detection device to satisfy the relationship. Power supply voltage VddIn the case of using a positive power supply, an enhancement type (normally off type) N-type transistor is preferably used as the MIS type thin film semiconductor device for signal amplification, and the minimum gate voltage V of this N-type transistor is used.minIs
0 <0.1 × Vdd<Vmin  Or 0 <VGT<Vmin
And the threshold voltage VthIs VGVSmaller, specifically
0 <Vth<0.91 × Vdd  Or 0 <Vth<VGV
It is ideal to use an enhancement type N-type transistor that satisfies the above relationship. Conversely, the power supply voltage VddIn the case of using a negative power supply, an enhancement type (normally off type) P-type transistor is preferably used as the MIS type thin film semiconductor device for signal amplification, and the minimum gate voltage V of this P-type transistor is used.minIs
Vmin<0.1 × Vdd<0 or Vmin<VGT<0
And the threshold voltage VthIs VGVLarger, specifically
0.91 × Vdd<Vth<0 or VGV<Vth<0
It is ideal to use an enhancement type P-type transistor that satisfies the relationship
[0046]
Next, the structure of a capacitance detecting element embodying such an invention will be described with reference to FIG. In the present invention, the row selection element, the column selection element, and the signal amplifying element have the same structure except for the conductivity type and impurity concentration of the source / drain region. FIG. 6 shows the cross-sectional structure of the signal amplifying element and the reference capacitor. Show. A signal amplifying MIS thin film semiconductor device that constitutes a signal amplifying element of a capacitance detecting element has a semiconductor film including a source region, a channel forming region, and a drain region, a gate insulating film, and a gate electrode as indispensable components. Both the row selection MIS thin film semiconductor device serving as a row selection element and the column selection MIS thin film semiconductor device serving as a column selection element include a semiconductor film including a source region, a channel formation region, and a drain region, a gate insulating film, and a gate electrode. Is an essential component. In the configuration example of FIG. 6, the signal amplification MIS thin film semiconductor device is made of NMOS, and the reference capacitor lower electrode is made of an N type semiconductor film which is the same material as the drain region of the signal amplification MIS thin film semiconductor device. The lower electrode of the reference capacitor and the drain region of the thin film semiconductor device are formed on the same base protective film. The dielectric film of the reference capacitor is made of a silicon oxide film that is the same material as the gate insulating film of the MIS thin film semiconductor device for signal amplification, and both are formed on the same layer (on the semiconductor film). The upper electrode of the reference capacitor is formed of a metal film (specifically, a tantalum thin film) that is the same material as the gate electrode of the MIS thin film semiconductor device for signal amplification, and a silicon oxide film serving as a gate insulating film and a reference capacitor dielectric film Formed on top. In FIG. 6, the reference capacitor lower electrode is connected to the capacitance detection electrode and the gate electrode of the signal amplifying element, but it goes without saying that the reference capacitor upper electrode is connected to the capacitance detection electrode and the gate electrode of the signal amplification element.
[0047]
Such a capacitance detection element can be formed on a plastic substrate using the above-described SUFTLA technology. A fingerprint sensor based on single-crystal silicon technology is not practical because it breaks immediately on a plastic or does not have a sufficient size. On the other hand, the capacitance detection element on the plastic substrate according to the present invention does not have to worry about the capacitance detection element being cracked even if the area is sufficiently large to cover the finger on the plastic substrate, and the fingerprint on the plastic substrate. It can be used as a sensor. Specifically, a smart card having a personal authentication function is realized by the present invention. Smart cards equipped with a personal authentication function are used for cash cards, credit cards, identity cards, etc., and with their security level remarkably increased, It has an excellent function of protecting information without leaking out of the card.
[0048]
(Example 1)
After manufacturing a capacitance detection device made of a thin film semiconductor device on a glass substrate, the capacitance detection device is transferred onto a plastic substrate using SUFTLA technology, and the capacitance detection device is placed on the plastic substrate. Created. The capacitance detection device is composed of capacitance detection elements arranged in a matrix of 304 rows and 304 columns. The size of the matrix portion is a 20 mm square.
[0049]
The substrate is polyethersulfone (PES) having a thickness of 200 μm. The N-type MIS thin film semiconductor device for signal amplification, the N-type MIS thin film semiconductor device for column selection, and the N-type MIS thin film semiconductor device for row selection are all made of thin film transistors having the same cross-sectional structure. The thin film transistor is a top gate type shown in FIG. 6 and is manufactured in a low temperature process with a maximum process temperature of 425 ° C. The semiconductor film is a polycrystalline silicon thin film obtained by laser crystallization and has a thickness of 50 nm. The gate insulating film is a 45 nm thick silicon oxide film formed by chemical vapor deposition (CVD), and the gate electrode is a 400 nm thick tantalum thin film. The relative dielectric constant of the silicon oxide film constituting the gate insulating film was determined to be approximately 3.9 by CV measurement. The reference capacitor lower electrode is formed of the same N-type semiconductor film as the drain region of the signal amplification N-type MIS thin film semiconductor device, and the reference capacitor dielectric film is formed of a gate insulating film of the signal amplification N-type MIS thin film semiconductor device. The reference capacitor upper electrode is made of the same silicon oxide film and is made of the same tantalum thin film as the gate electrode of the signal amplification N-type MIS thin film semiconductor device. The lower electrode of the reference capacitor is connected to the column line through a contact hole, and the upper electrode is connected to the gate electrode and the capacitance detection electrode of the signal amplification N-type MIS thin film semiconductor device. The circuit configuration of the capacitance detection element is the same as in FIG.
[0050]
In this embodiment, the pitch of the matrix forming the capacitance detection device is 66 μm, and the resolution is 385 dpi (dots per inch). As a result, the capacitance detection electrode area is 1485 μm.2It became. The capacitance detection dielectric film was formed of a silicon nitride film having a thickness of 300 nm. Since the relative dielectric constant of this silicon nitride film was about 7.5 from CV measurement, the element capacitance CDIs approximately 329 fF (femtofarad). Assuming that the electrostatic capacity detection device of this embodiment is a fingerprint sensor, the unevenness of the fingerprint is about 50 μm.AIs calculated to be 0.26 fF. On the other hand, since the gate electrode length L of the MIS thin film semiconductor device for signal amplification is 2 μm and the gate electrode width W is 2 μm, the transistor capacitance CTIs approximately 3.07 fF. Reference capacitor electrode area SR42 μm2It was. As a result, the reference capacitor capacity CRBecame 32 fF. Thus, the capacitance detecting element shown in this embodiment is
CD> 10 × CR
CR> 10 × CT
CR> 10 × CA
Satisfaction with the relationship. Thus, the power supply voltage VddIs 3.3 V, the voltage V applied to the gate electrode of the signal amplification MIS thin film semiconductor device when the peak of the fingerprint contacts the surface of the capacitance detection device.GTBecomes 0.30V, and the voltage V applied to this gate electrode when the valley of the fingerprint comesGVBecomes 3.08V. Minimum gate voltage V of the N-type MIS thin film semiconductor device for signal amplification used in this exampleminIs 0.35V, and the gate voltage V when the peak of the fingerprint touchesGTTherefore, the signal amplification N-type MIS thin film semiconductor device was completely turned off. On the other hand, the threshold voltage VthIs 1.42 V, and the gate voltage V obtained when the valley of the fingerprint comesGVTherefore, the N-type MIS thin film semiconductor device for signal amplification is completely turned on. As a result, the current value output from the signal amplifying element when the crest of fingerprint touches the surface of the capacitance detection device is 4.5 × 10.-13Give up with A and become weak. On the other hand, when a fingerprint valley comes, 2.5 × 10-5A large current A was output, leading to accurate detection of unevenness information such as fingerprints.
[0051]
【The invention's effect】
As described above in detail, the present application makes it possible to produce a capacitance detection device capable of highly accurate detection using a thin film semiconductor device. In the conventional technology using a single crystal silicon substrate, only a small capacitance detecting device of about several mm × several mm can be formed on a plastic substrate. It was possible to create a device on a plastic substrate, and it was possible to detect the unevenness information of an object with high accuracy. As a result, for example, the effect of significantly improving the security level of the smart card is recognized. In addition, the conventional capacitance detection device using a single crystal silicon substrate uses a single crystal silicon semiconductor for only a very small part of the device area, and wastes enormous energy and labor. On the other hand, the present invention eliminates such waste and has the effect of helping to preserve the global environment.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating an operation principle in a conventional technique.
FIG. 2 is a diagram illustrating an operation principle in the present invention.
FIG. 3 is a diagram illustrating a circuit configuration of a capacitance detection element according to the present invention.
FIG. 4 is a diagram illustrating the principle of the present invention.
FIG. 5 is a diagram illustrating the principle of the present invention.
FIG. 6 is a diagram illustrating an element structure of the present invention.

Claims (2)

対象物との距離に応じて変化する静電容量を検出する事に依り、該対象物の表面形状を読み取る静電容量検出装置に於いて、
該静電容量検出装置はM行N列の行列状に配置されたM本の行線とN本の列線、及び該行線と該列線との交点に設けられた静電容量検出素子とを具備し、
該静電容量検出素子は信号検出素子と信号増幅素子と列選択素子とを含み、
該信号検出素子は容量検出電極と容量検出誘電体膜と基準コンデンサとを含み、
該基準コンデンサは基準コンデンサ下部電極と基準コンデンサ誘電体膜と基準コンデンサ上部電極とから成り、
該信号増幅素子はゲート電極とゲート絶縁膜と半導体膜とから成る信号増幅用MIS型薄膜半導体装置から成り、
該基準コンデンサ下部電極と該列線とが電気的に接続されて居る事を特徴とする静電容量検出装置。
In the capacitance detection device that reads the surface shape of the object by detecting the capacitance that changes according to the distance to the object,
The capacitance detection device includes M row lines and N column lines arranged in a matrix of M rows and N columns, and capacitance detection elements provided at intersections of the row lines and the column lines. And
The capacitance detection element includes a signal detection element, a signal amplification element, and a column selection element,
The signal detection element includes a capacitance detection electrode, a capacitance detection dielectric film, and a reference capacitor,
The reference capacitor includes a reference capacitor lower electrode, a reference capacitor dielectric film, and a reference capacitor upper electrode.
The signal amplifying element comprises a MIS thin film semiconductor device for signal amplification comprising a gate electrode, a gate insulating film, and a semiconductor film,
The capacitance detecting device, wherein the reference capacitor lower electrode and the column line are electrically connected.
対象物との距離に応じて変化する静電容量を検出する事に依り、該対象物の表面形状を読み取る静電容量検出装置に於いて、
該静電容量検出装置はM行N列の行列状に配置されたM本の行線とN本の列線、及び該行線と該列線との交点に設けられた静電容量検出素子とを具備し、
該静電容量検出素子は信号検出素子と信号増幅素子と列選択素子とを含み、
該信号検出素子は容量検出電極と容量検出誘電体膜と基準コンデンサとを含み、
該基準コンデンサは基準コンデンサ下部電極と基準コンデンサ誘電体膜と基準コンデンサ上部電極とから成り、
該信号増幅素子はゲート電極とゲート絶縁膜と半導体膜とから成る信号増幅用MIS型薄膜半導体装置から成り、
該基準コンデンサ上部電極と該列線とが電気的に接続されて居る事を特徴とする静電容量検出装置。
In the capacitance detection device that reads the surface shape of the object by detecting the capacitance that changes according to the distance to the object,
The capacitance detection device includes M row lines and N column lines arranged in a matrix of M rows and N columns, and capacitance detection elements provided at intersections of the row lines and the column lines. And
The capacitance detection element includes a signal detection element, a signal amplification element, and a column selection element,
The signal detection element includes a capacitance detection electrode, a capacitance detection dielectric film, and a reference capacitor,
The reference capacitor includes a reference capacitor lower electrode, a reference capacitor dielectric film, and a reference capacitor upper electrode.
The signal amplifying element comprises a MIS thin film semiconductor device for signal amplification comprising a gate electrode, a gate insulating film, and a semiconductor film,
The capacitance detecting device, wherein the reference capacitor upper electrode and the column line are electrically connected.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04231803A (en) * 1990-05-18 1992-08-20 Philips Gloeilampenfab:Nv Fingerprint detecting apparatus
JPH04233619A (en) * 1990-06-29 1992-08-21 Philips Gloeilampenfab:Nv Touch sensor array
JPH11316105A (en) * 1998-03-09 1999-11-16 St Microelectronics Inc Capacitive distance sensor
JP2001311752A (en) * 1999-10-26 2001-11-09 Citizen Watch Co Ltd Electrostatic capacity detecting device
JP2001523349A (en) * 1998-03-05 2001-11-20 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Fingerprint sensing device with capacitive matrix and system incorporating such device
JP2003028606A (en) * 2001-07-11 2003-01-29 Sony Corp Capacitance detector and fingerprint collation apparatus using the same
JP2005098979A (en) * 2003-09-05 2005-04-14 Seiko Epson Corp Electrostatic capacitance detecting apparatus and driving method thereof

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04231803A (en) * 1990-05-18 1992-08-20 Philips Gloeilampenfab:Nv Fingerprint detecting apparatus
JPH04233619A (en) * 1990-06-29 1992-08-21 Philips Gloeilampenfab:Nv Touch sensor array
JP2001523349A (en) * 1998-03-05 2001-11-20 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Fingerprint sensing device with capacitive matrix and system incorporating such device
JPH11316105A (en) * 1998-03-09 1999-11-16 St Microelectronics Inc Capacitive distance sensor
JP2001311752A (en) * 1999-10-26 2001-11-09 Citizen Watch Co Ltd Electrostatic capacity detecting device
JP2003028606A (en) * 2001-07-11 2003-01-29 Sony Corp Capacitance detector and fingerprint collation apparatus using the same
JP2005098979A (en) * 2003-09-05 2005-04-14 Seiko Epson Corp Electrostatic capacitance detecting apparatus and driving method thereof

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