JP2005045817A - 増幅システムにおけるダイナミック・レンジの縮小及び線形性の改善を行うシステムおよび方法 - Google Patents
増幅システムにおけるダイナミック・レンジの縮小及び線形性の改善を行うシステムおよび方法 Download PDFInfo
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- JP2005045817A JP2005045817A JP2004216350A JP2004216350A JP2005045817A JP 2005045817 A JP2005045817 A JP 2005045817A JP 2004216350 A JP2004216350 A JP 2004216350A JP 2004216350 A JP2004216350 A JP 2004216350A JP 2005045817 A JP2005045817 A JP 2005045817A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3223—Modifications of amplifiers to reduce non-linear distortion using feed-forward
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/331—Sigma delta modulation being used in an amplifying circuit
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- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
- Transmitters (AREA)
Abstract
【解決手段】 入力信号をクリッピングし、入力信号に伴うピークを低減させる。ピーク低減入力信号の増幅に先だって(例えば、プリディストーション)またはその後(例えば、ディジタル相互相殺)に、補正信号をピーク低減信号と合成する。クリッピングした入力信号に伴う信号歪みおよび/またはOOBエミッションを除去する補正信号を計算し、アンチ(反)ピーク信号を入力信号と合成することによって、入力信号に伴うピークを低減させる。
【選択図】 図1
Description
Claims (10)
- 増幅システムであって、
入力信号に伴うピークを低減し、ピーク低減入力信号を供給するピーク低減要素と、
前記ピーク低減入力信号の補正に対応する補正信号を発生する補正信号発生器と、
前記ピーク低減入力信号を増幅し、増幅ピーク低減出力信号を供給する電力増幅器と、
前記ピーク低減入力信号および前記増幅ピーク低減出力信号の内1つと、前記補正信号とを加算し、前記信号歪みおよびアウトオブバンド(OOB)エミッションの内少なくとも1つを実質的に除去した最終増幅出力信号を供給する加算器と、
を備えた増幅システム。 - 請求項1記載のシステムにおいて、前記ピーク低減要素が、クリッピング・フィルタであるシステム。
- 請求項1記載のシステムであって、更に、前記ピーク低減入力信号から、前記信号歪みおよびOOBエミッションの内少なくとも1つの少なくとも一部を除去するプリディストーション要素を備えているシステム。
- 請求項1記載のシステムにおいて、更に、前記ピーク低減入力信号をディジタル・ドメインからアナログ・ドメインに変換し、アナログ・ピーク低減入力信号を前記電力増幅器に供給する第1ディジタル‐アナログ変換器(DAC)と、前記補正信号をディジタル・ドメインからアナログ・ドメインに変換し、アナログ補正信号を供給する第2DACとを備えているシステム。
- 請求項4記載のシステムにおいて、前記第1および第2DACの少なくとも1つはデルタ・シグマDACであり、前記入力信号および前記補正信号の内少なくとも1つを、所望の無線送信周波数において直接的にアナログ・ドメインに変換するシステム。
- 請求項1記載のシステムにおいて、前記ピーク低減要素は、アンチピーク信号を前記入力信号に付加して、前記ピーク低減信号および前記補正信号を供給し、最終的な送信に先だって前記アンチピーク信号を除去するシステム。
- 請求項1記載のシステムであって、更に、前記補正信号の増幅に関与する相殺増幅器を備えているシステム。
- 請求項1記載のシステムにおいて、更に、
対象信号およびピーク低減入力信号の内一方を複数のサブバンドに分離するチャネライザと、
前記複数のサブバンドの内対応するサブバンドに伴う利得、位相、およびオフセットの内少なくとも1つを修正し、前記サブバンドに伴う歪みおよびOOBエミッションの内少なくとも1つを軽減する、複数の修正要素と、
前記複数のサブバンドを再合成して統合信号を形成し、これを前記電力増幅器に供給する統合器と、
を備えているシステム。 - 請求項1記載のシステムにおいて、該増幅システムは、線形増幅システム、包絡線除去および再現(EER)増幅器、非線形要素を有する線形増幅(LINC)増幅器、包絡線追跡増幅器、およびドハティ増幅器の内の1つであるシステム。
- 請求項1記載の増幅システムを備えている送信機。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/625,367 US7042287B2 (en) | 2003-07-23 | 2003-07-23 | System and method for reducing dynamic range and improving linearity in an amplication system |
Publications (1)
Publication Number | Publication Date |
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JP2005045817A true JP2005045817A (ja) | 2005-02-17 |
Family
ID=33490882
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2004216350A Pending JP2005045817A (ja) | 2003-07-23 | 2004-07-23 | 増幅システムにおけるダイナミック・レンジの縮小及び線形性の改善を行うシステムおよび方法 |
Country Status (4)
Country | Link |
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US (2) | US7042287B2 (ja) |
EP (1) | EP1501187B1 (ja) |
JP (1) | JP2005045817A (ja) |
DE (1) | DE602004012671T2 (ja) |
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WO2011001576A1 (ja) * | 2009-07-01 | 2011-01-06 | パナソニック株式会社 | 送信回路及び通信機器 |
JP2012142840A (ja) * | 2011-01-05 | 2012-07-26 | Mitsubishi Electric Corp | 歪み補償回路装置 |
US8254496B2 (en) | 2007-11-05 | 2012-08-28 | Nec Corporation | Power amplifier and radio wave transmitter having the same |
JP2014110565A (ja) * | 2012-12-03 | 2014-06-12 | Fujitsu Ltd | 無線通信装置、ドハティ増幅器及び無線通信装置の制御方法 |
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2003
- 2003-07-23 US US10/625,367 patent/US7042287B2/en not_active Expired - Lifetime
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2004
- 2004-07-22 DE DE602004012671T patent/DE602004012671T2/de active Active
- 2004-07-22 EP EP04017347A patent/EP1501187B1/en not_active Expired - Fee Related
- 2004-07-23 JP JP2004216350A patent/JP2005045817A/ja active Pending
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2005
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Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006025213A1 (ja) * | 2004-08-30 | 2006-03-09 | Matsushita Electric Industrial Co., Ltd. | ピーク電力抑圧装置およびピーク電力抑圧方法 |
US8254496B2 (en) | 2007-11-05 | 2012-08-28 | Nec Corporation | Power amplifier and radio wave transmitter having the same |
WO2011001576A1 (ja) * | 2009-07-01 | 2011-01-06 | パナソニック株式会社 | 送信回路及び通信機器 |
US8396432B2 (en) | 2009-07-01 | 2013-03-12 | Panasonic Corporation | Transmitter circuit and communication apparatus |
JP2012142840A (ja) * | 2011-01-05 | 2012-07-26 | Mitsubishi Electric Corp | 歪み補償回路装置 |
JP2014110565A (ja) * | 2012-12-03 | 2014-06-12 | Fujitsu Ltd | 無線通信装置、ドハティ増幅器及び無線通信装置の制御方法 |
Also Published As
Publication number | Publication date |
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US20050129140A1 (en) | 2005-06-16 |
EP1501187B1 (en) | 2008-03-26 |
DE602004012671T2 (de) | 2009-05-07 |
US7042287B2 (en) | 2006-05-09 |
US7057455B2 (en) | 2006-06-06 |
DE602004012671D1 (de) | 2008-05-08 |
US20050017800A1 (en) | 2005-01-27 |
EP1501187A1 (en) | 2005-01-26 |
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