JP2005024281A - Encoder - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an encoder capable of reducing variations of processing times for acquiring phase values. <P>SOLUTION: The encoder is constituted in such a way that an interpolation circuit 3 may compute the amplitude ratio Q of two-phase pseudo sine wave signals by a dividing circuit 33 and perform subdivision processing for reading information on a phase angle θ from an inverse tangent function reference circuit 35 with Q as index information. The interpolation circuit 3 skips the computation of Q by the dividing circuit 33 and reference processing by the inverse tangent function reference circuit 35 as exception handling in the case that θ=0°, 45°, 90°, 135°, 180°, 225°, 270°, or 315° and outputs the information on the univocally determined phase angle θ to an interpolation value selecting/updating/holding circuit 36 via a delay circuit 34. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an encoder.
[0002]
[Prior art]
An encoder is known as a detector for obtaining displacement (rotation) information of a motor or the like. The encoder generates a two-phase pseudo sine wave signal having a phase difference of 90 degrees from each other in accordance with the displacement. Finer displacement information can be obtained by finely subdividing the period of the pseudo sine wave signal that is the periodic signal (see Patent Document 1). In Patent Document 1, a table storing the value (phase value) of an arc tangent function corresponding to the amplitude ratio (tangent function) of a two-phase pseudo sine wave signal is prepared in advance and output from an encoder 2. A technique for obtaining an arc tangent function, that is, an interpolated phase value, by calculating an amplitude ratio from a phase signal and referring to a table using the amplitude ratio as an index is disclosed.
[0003]
[Patent Document 1]
JP-A-8-145719 [0004]
[Problems to be solved by the invention]
Since the amplitude ratio of the two-phase pseudo sine wave signal is periodically divided by 0, it is necessary to avoid the calculation of the amplitude ratio when the divisor is 0. In this case, the processing time until the phase value is obtained varies depending on the presence / absence of the amplitude ratio calculation processing.
[0005]
The present invention provides an encoder that reduces variations in processing time for obtaining a phase value.
[0006]
[Means for Solving the Problems]
The present invention includes a pseudo sine wave signal generating unit that generates two pseudo sine wave signals having a predetermined phase difference according to a displacement of a movable object, and an interpolation unit that interpolates the period of the pseudo sine wave signal. Applied to the encoder, equal division means for equally dividing the period of the pseudo sine wave signal into a plurality of parts, calculation means for calculating the interpolation value within the equally divided range, and the phase of the pseudo sine wave signal are equally divided When the phase is within the range, the interpolation value calculated by the calculation means is the phase angle, and when the phase of the pseudo sine wave signal is at the boundary of the equally divided range, the boundary value is the phase angle. In addition, the interpolation means includes control means for instructing time adjustment corresponding to the calculation time by the calculation means.
The encoder may further include output means for outputting information indicating the phase angle. In this case, the time adjustment is performed by delaying the time until the information is output by the output means when the boundary value is the phase angle. It is characterized by giving.
The equal division means divides one cycle into at least eight divisions, and the calculation means includes a division process in which the quotient is less than one.
The equal dividing means is characterized in that the period of the pseudo sine wave signal is equally divided into a plurality of periods with the phase of either one of the two pseudo sine wave signals set to 0 degree.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
FIG. 1 is a diagram showing a main configuration of an encoder device according to an embodiment of the present invention. The encoder device detects the rotation angle of a rotary motor (not shown) using an optical encoder and controls the rotation of the motor. In FIG. 1, the encoder device includes a displacement information generation unit 1, A / D converters 2 </ b> A and 2 </ b> B, and an interpolation circuit 3. The displacement information generation unit 1 generates a pseudo sine wave signal for detecting the displacement of a motor (not shown). A / D converters 2A and 2B convert the pseudo sine wave signal from an analog signal to a digital signal. The interpolation circuit 3 detects the displacement of the motor at predetermined intervals using the pseudo sine wave signal after digital conversion, and transmits a displacement detection value to a motor control circuit (not shown). The motor control circuit drives and controls a motor (not shown) according to the displacement detection value, and controls the rotation speed of the motor.
[0008]
The displacement information generation unit 1 includes a light emitting element 11, a rotating disk 12, a light receiving element 13, and an amplifier circuit 14. For example, the rotary disk 12 is arranged with its center aligned with a rotation shaft of a motor (not shown). The disk 12 is provided with a plurality of slits 12a along the outer periphery. The light emitting element 11 and the light receiving element 13 are respectively disposed so as to sandwich the slit 12a of the disk 12 therebetween. The light emitted from the light emitting element 11 is applied to the slit 12 a of the disk 12, and the light passing through the slit 12 a is received by the light receiving element 13. The light receiving element 13 outputs a detection signal according to the intensity of the received light.
[0009]
When the rotating disk 12 rotates with the rotation of a motor (not shown), the light received by the light receiving element 13 repeats the state of passing through the slit 12a and the state of being blocked between the slits. repeat. Such a signal that repeats strong and weak is called a pseudo sine wave signal. The pseudo sine wave signal is amplified by the amplifier circuit 14 and output to the A / D converters 2A and 2B.
[0010]
The light receiving element 13 is configured to output two detection signals having a phase difference of 90 degrees, for example. That is, the light receiving element 13 is constituted by two light receiving elements 13a and 13b (not shown) arranged at an interval of Δh / 4, where Δh is an interval between the slits 12a provided on the disk 12. . Thereby, a detection signal (referred to as B phase) from the light receiving element 13b whose phase is delayed by 360/4 = 90 degrees with respect to a detection signal (referred to as A phase) from the light receiving element 13a is obtained.
[0011]
FIG. 2 is a diagram illustrating signal waveforms of the detection signal sigA from the light receiving element 13a and the detection signal sigB from the light receiving element 13b. In FIG. 2, the horizontal axis represents the phase angle θ of the pseudo sine wave signal, and the vertical axis represents the light reception level. The phase angle θ corresponds to the displacement of the actuator (in this case, the amount of rotation of the motor). The phase angle θ of 360 degrees corresponds to the interval Δh between the slits 12a. Therefore, when the motor rotates by one slit interval, the pseudo sine wave signal fluctuates for one cycle. When the detection signal sigB is expressed by sin θ, the detection signal sigA is expressed by cos θ.
[0012]
The A / D converter 2A converts the A-phase pseudo sine wave signal (ie, the detection signal sigA), and the A / D converter 2B converts the B-phase pseudo sine wave signal (ie, the detection signal sigB) from an analog signal to a digital signal. To do. The converted digital signals are respectively sent to the interpolation circuit 3.
[0013]
The interpolation circuit 3 performs an interpolation process on the digitized pseudo sine wave signal to detect the rotation amount (rotation angle) of the motor with a resolution finer than the period of the pseudo sine wave signal. The detection result is sent to a motor control circuit (not shown), and is used by the motor control circuit to determine a control amount for the motor.
[0014]
The present invention is characterized by an interpolation process performed by the interpolation circuit 3.
[0015]
FIG. 3 is a diagram for explaining the details of the interpolation circuit 3. The interpolation circuit 3 includes a subtraction circuit 31, an interpolation control circuit 32, a division circuit 33, a delay circuit 34, an arctangent function reference circuit 35, and an interpolation value selection / update / hold circuit 36.
[0016]
The subtraction circuit 31 removes direct current (DC) components from the input A-phase and B-phase digital signals. The pseudo sine wave signal actually input to the interpolation circuit 3 is a periodic signal having a maximum value of 5.0 V and a minimum value of 0.0 V, for example, due to the characteristics of the amplifier circuit 14 in the previous stage. This periodic signal oscillates around an analog reference potential (in this case, 2.5 V). The subtraction circuit 31 subtracts a value corresponding to the DC component (2.5 V) from the A-phase and B-phase digital signals, thereby obtaining a voltage signal oscillating around 0 V as shown in FIG. Extraction of AC component). As a result, the A-phase and B-phase pseudo sine wave signals are added with a + sign in an area larger than 0V and are added with a − sign in an area smaller than 0V.
[0017]
The interpolation control circuit 32 performs the following three processes.
1. Periodically divide the pseudo sine wave signal.
2. Determine the divisor and dividend for calculating the amplitude ratio (tangent function) of the two-phase pseudo sine wave signal.
3. Exception processing is performed when the above calculation 2 is not performed.
[0018]
Next, 1 to 3 will be described.
1. Periodic Division of Pseudo Sine Wave Signal FIG. 4 is a diagram for explaining division processing by the interpolation control circuit 32. Generally, one period of the pseudo sine wave signal is divided into the following four when attention is paid to the signs of the A-phase and B-phase signal values.
(A) Region of 0 <θ <90 degrees where the sign of the A phase is positive and the sign of the B phase is negative (b) Region of 90 <θ <180 degrees where the signs of both the A phase and the B phase are positive ( c) Region of 180 <θ <270 degrees where the sign of the A phase is negative and the sign of the B phase is positive (d) Region of 270 <θ <360 degrees where the signs of both the A phase and the B phase are negative ]
On the other hand, when paying attention to the magnitude relationship between the absolute values of the A-phase and B-phase signal values, one period of the pseudo sine wave signal is divided into the following four. The symbols | and | indicate absolute values.
(E) | B-phase signal value |> | A-phase signal value | of 315 <θ <45 degrees region (f) | A-phase signal value |> | B-phase signal value | of 45 < Region <g of θ <135 degrees (g) | B-phase signal value |> | A-phase signal value | of 135 <θ <225 degrees region (h) | A-phase signal value |> | B-phase signal 225 <θ <315 degrees region with value |
By combining the classifications (a) to (d) and the classifications (e) to (h), one period of the pseudo sine wave signal is divided into the following eight.
Region (1). Region region of 0 <θ <45 degrees where the above (a) and (e) are established {circle around (2)}. Region region 45 <θ <90 degrees where the above (a) and (f) hold (3). 90 <θ <135 degrees region where (b) and (f) above hold (4). Area region of 135 <θ <180 degrees where the above (b) and (g) are established (5). 180 <θ <225 degrees region region (6) where (c) and (g) above are established. Region region of 225 <θ <270 degrees where (c) and (h) are satisfied (7). 270 <θ <315 degrees region region (8) where (d) and (h) are established. Region where 315 <θ <360 degrees in which the above (d) and (a) hold true
When the A-phase and B-phase digital signals from which the AC component has been extracted from the subtraction circuit 31 are input, the interpolation control circuit 32 sets the phase angle θ to any of the above regions (1) to (8). Determine if it is compatible. Thereby, any one area | region can be selected among the area | regions of the 45 degree range which divided | segmented 1 period of the pseudo sine wave signal (for example, A phase) into eight. When the phase angle θ corresponds to the boundary of each region, exception processing described later is performed. The selected 45-degree range region is further subdivided by a division circuit 33 and an arctangent function reference circuit 35 described later.
[0022]
2. The divisor and dividend determination interpolation circuit 32 for calculating the amplitude ratio has the following function when the determined area is any one of the above-mentioned areas (1), (4), (5) and (8). The phase signal value | is set as the divisor and the | A phase signal value | is set as the dividend, and the divisor and the dividend are sent to the division circuit 33, and information indicating the determination region is inserted into the interpolation value selection / update / hold circuit. Send to 36. Since the division number 8 in one cycle can be expressed by 3 bits in the case of binary data, the information indicating the determination area is transmitted as 3-bit data.
[0023]
On the other hand, when the determined region is any one of the above-mentioned region (2), region (3), region (6), and region (7), the interpolation control circuit 32 uses the | A phase signal value | | B-phase signal value | is set as a dividend, and the divisor and the dividend are sent to the division circuit 33, and information indicating the determination region is sent to the interpolation value selection / update / hold circuit 36.
[0024]
3. The exception processing interpolation control circuit 32 is such that the A-phase and B-phase digital signals input from the subtraction circuit 31 do not correspond to any of the areas {circle around (1)} to {circle around (8)}, that is, the A-phase and B-phase digital signals. When any of the signals is 0 or the absolute values of the A-phase and B-phase digital signals are equal (| B-phase signal value | = | A-phase signal value |), the division circuit 33 is instructed to skip the division process. Is output to the arc tangent function reference circuit 35, the instruction indicating the phase angle θ is sent to the delay circuit 34, and the exception value is processed to the interpolation value selection / update / hold circuit 36. Is output. The phase angle θ at the time of exception processing is obtained as follows.
[0025]
Exception (1). When the A-phase signal value | = 0 and the B-phase sign is negative, θ = 0 degree exception {circle around (2)}. When the sign of the A phase is positive, the sign of the B phase is negative, and | the signal value of the A phase | = | the signal value of the B phase | When the sign of the A phase is positive and the signal value of the B phase | = 0, θ = 90 degrees exception {circle around (4)}. When the signs of both A phase and B phase are positive, and | A phase signal value | = | B phase signal value |, θ = 135 degrees exception (5). When the signal value of A phase | = 0 and the sign of B phase is positive, θ = 180 degrees exception {circle around (6)}. When the sign of the A phase is negative, the sign of the B phase is positive, and the signal value of the A phase | = | the signal value of the B phase | When the sign of the A phase is negative and the signal value of the B phase | = 0, θ = 270 degrees exception (8). When the signs of both A phase and B phase are negative, and | A phase signal value | = | B phase signal value |, θ = 315 degrees.
In the case of the exceptions (1) to (8), the phase angle θ is uniquely determined, and therefore the above-described region of the 45 degree range does not need to be further subdivided. Therefore, the interpolation control circuit 32 sends information indicating the phase angle θ at the time of exception processing to the interpolation value selection / update / hold circuit 36 via the delay circuit 34.
[0027]
The division circuit 33 and the arctangent function reference circuit 35 subdivide the selected 45-degree range. The division circuit 33 calculates the amplitude ratio of the two-phase pseudo sine wave signal using the divisor and the dividend input from the interpolation control circuit 32. Since the divisor and the dividend are determined so that the relationship of (divisor)> (dividend) is established by the interpolation control circuit 32, the quotient Q falls within the range of 0 <Q <1. The division circuit 33 sends information indicating the quotient Q to the arc tangent function reference circuit 35 as index information.
[0028]
The arctangent function reference circuit 35 is configured by a known table reference circuit. The inverse tangent function reference circuit 35 stores in advance a value (subdivision data) of the phase angle θ corresponding to the amplitude ratio (tan θ) of the two-phase pseudo sine wave signal (θ = tan−1Q). Thus, when the index information (Q) is input to the arctangent function reference circuit 35, information indicating the phase angle θ is output from the arctangent function reference circuit 35. The arc tangent function reference circuit 35 is configured to be subdivided in the range of 0 <θ <45 degrees. As described above, after determining one of the areas (1) to (8), Since the subdivision is performed, it is possible to interpolate the entire region for one period only by providing the arctangent function reference circuit 35 with the subdivision data for 1/8 period. That is, the arctangent function reference circuit 35 for 1/8 period can be shared by eight equally divided areas. Information indicating the phase angle θ output from the arctangent function reference circuit 35 is sent to the interpolation value selection / update / hold circuit 36.
[0029]
When the information indicating the phase angle θ is input from the interpolation control circuit 32, the delay circuit 34 outputs the information indicating the phase angle θ to the interpolation value selection / update / hold circuit 36 after a predetermined time has elapsed. The predetermined time (delay time) is determined in advance so as to correspond to the sum of both processing times by the division circuit 33 and the arctangent function reference circuit 35. By providing the delay circuit 34, information indicating the phase angle θ at the time of exception processing is input to the interpolation value selection / update / hold circuit 36 after the A-phase and B-phase digital signals are input to the interpolation control circuit 32. Elapsed time until input and information indicating the subdivided phase angle θ after the A-phase and B-phase digital signals are input to the interpolation control circuit 32 are the interpolation value selection / update / hold circuit 36. It is possible to make the elapsed time until input to the same. The delay circuit 34 is composed of, for example, a shift register circuit.
[0030]
When the interpolation value selection / update / hold circuit 36 receives an exception processing instruction from the interpolation control circuit 32, the interpolation value selection / update / holding circuit 36 selects the information of the phase angle θ input from the delay circuit 34, and executes the exception processing from the interpolation control circuit 32. When the command is not received, information on the phase angle θ input from the arctangent function reference circuit 35 is selected. Since the information of the phase angle θ input from the arctangent function reference circuit 35 is information in the range of 0 <θ <45 degrees, the interpolation value selection / update / hold circuit 36 is input from the interpolation control circuit 32. The phase angle in one whole period is calculated using information indicating the determined determination area.
[0031]
For example, when the region (1) is determined, the phase angle θ is calculated based on information input from the arctangent function reference circuit 35. When the region (6) is determined, the phase angle θ is calculated by adding 225 degrees to the information input from the arctangent function reference circuit 35.
[0032]
The interpolated value selection / update / hold circuit 36 sends information on the calculated phase angle θ to a motor control circuit (not shown) via a communication circuit (not shown). The interpolation value selection / update / hold circuit 36 holds the phase angle information sent to the motor control circuit (not shown) until new phase angle information is input from the arctangent function reference circuit 35 and the delay circuit 34. It is configured as follows.
[0033]
According to the embodiment described above, the following effects can be obtained.
(1) The interpolation circuit 3 calculates the amplitude ratio Q of the two-phase pseudo sine wave signal, and performs subdivision processing for reading out the information of the phase angle θ from the arctangent function reference circuit 35 using Q as index information. The interpolation circuit 3 further includes exception (1) (θ = 0 degrees), exception (2) (θ = 45 degrees), exception (3) (θ = 90 degrees), exception (4) (θ = 135 degrees). , Exception (5) (θ = 180 degrees), exception (6) (θ = 225 degrees), exception (7) (θ = 270 degrees) and exception (8) (θ = 315 degrees) As an exceptional process, the calculation of Q and the reference process of the arctangent function reference circuit 35 are skipped, and the uniquely determined information of the phase angle θ is output to the interpolation value selection / update / hold circuit 36 via the delay circuit 34. I made it. As a result, the information indicating the phase angle θ after the A-phase and B-phase digital signals are input to the interpolation control circuit 32 in the case where the subdivision processing is performed and the case where the exception processing is performed is the interpolation value selection / update. -Variation in time until output to the holding circuit 36 can be suppressed. As a result, the interpolated value selection / update / hold circuit 36 can send phase angle information to a motor control circuit (not shown) at a predetermined interval while suppressing temporal variations, so that a deviation (speed) in motor speed control can be obtained. Ripple) can be reduced.
[0034]
(2) When calculating the amplitude ratio Q, the divisor and the dividend are determined so that Q is less than 1. Therefore, the division circuit 33 can be easily configured without requiring a floating-point operation, and the division processing time is shortened. can do. For this reason, there is little variation in processing time for each division process. Furthermore, by suppressing the range of Q to less than 1, the circuit scale of the arctangent function reference circuit 35 that refers to Q as index information can be made smaller than when the index range is wide.
[0035]
(3) Since the subdivision process is performed after determining which one of the areas {circle over (1)} to {circle around (8)} corresponds to one period, the inverse tangent function reference circuit 35 is supplied with 1/8 period. It is possible to interpolate the entire region for one period only by providing the segmentation data. As a result, the circuit scale of the arctangent function reference circuit 35 can be reduced.
[0036]
In the above description, an example has been described in which one cycle is divided into areas {circle around (1)} to {circle around (8)}, but the number of areas to be divided may be 16. In this case, a pseudo sine wave signal having a phase intermediate between the two-phase pseudo sine wave signals is generated by using a known resistance dividing circuit.
[0037]
The correspondence between each component in the claims and each component in the embodiment of the invention will be described. For example, a motor corresponds to the movable object. The pseudo sine wave signal generating means is configured by the displacement information generating unit 1, for example. The interpolation means is constituted by an interpolation circuit 3, for example. The equally dividing means and the control means are constituted by an interpolation control circuit 32, for example. The output means is constituted by an interpolation value selection / update / hold circuit 36, for example. The time adjustment corresponds to the delay by the delay circuit 34. The arithmetic means is constituted by, for example, a division circuit 33 and an arctangent function reference circuit 35. In addition, as long as the characteristic function of this invention is not impaired, each component is not limited to the said structure.
[0038]
【The invention's effect】
In the encoder according to the present invention, it is possible to reduce variations in processing time for obtaining a phase value.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating a main configuration of an encoder device according to an embodiment of the present invention.
FIG. 2 is a diagram showing a two-phase detection signal waveform;
FIG. 3 is a diagram illustrating details of an interpolation circuit.
FIG. 4 is a diagram illustrating division processing by an interpolation control circuit.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Displacement information generation part, 2A, 2B ... A / D converter,
3 ... interpolation circuit, 11 ... light emitting element,
12 ... Rotating disk, 13 ... Light receiving element,
14 ... amplifier circuit, 31 ... subtractor circuit,
32 ... interpolation control, 33 ... division circuit,
34 ... Delay circuit, 35 ... Inverse tangent function reference circuit,
36. Interpolation value selection / update / hold circuit

Claims (4)

Pseudo sine wave signal generating means for generating two pseudo sine wave signals having a predetermined phase difference according to the displacement of the movable object;
Interpolating means for interpolating the period of the pseudo sine wave signal,
The interpolating means includes
Equal division means for equally dividing the period of the pseudo sine wave signal into a plurality of parts;
A computing means for computing an interpolated value within the equally divided range;
When the phase of the pseudo sine wave signal is in the equally divided range, the interpolation value calculated by the calculating means is a phase angle, and the phase of the pseudo sine wave signal is in the equally divided range And a control means for instructing a time adjustment corresponding to a calculation time by the calculation means, when the boundary value is a phase angle. The encoder according to claim 1, wherein
Output means for outputting information indicating the phase angle;
The encoder according to claim 1, wherein the time adjustment gives a delay to the time until the information is output by the output means when the boundary value is a phase angle. The encoder according to claim 1 or 2,
The equal division means divides one cycle into at least eight divisions,
The encoder includes a division process in which a quotient is less than 1. The encoder according to any one of claims 1 to 3,
The encoder is characterized in that the equal division means equally divides the period of the pseudo sine wave signal into a plurality of parts based on the phase of either one of the two pseudo sine wave signals being 0 degrees.

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