JP2004363191A - Chemical mechanical polishing slurry for organic film, method of chemically/mechanically polishing organic film, and method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of polishing an organic film, such as a resist film or the like, stably in a short time, restraining a dishing phenomenon from occurring in the film so as to keep its surface superior. <P>SOLUTION: The method is to chemically and mechanically polish the organic film deposited on a semiconductor substrate. The method is characterised by being provided with the processes of making the semiconductor substrate (32) with the organic film deposited thereon bear against a polishing cloth (31) which is pasted on a turntable (30) and has a compressive modulus of 100 to 600 MPA, while the semiconductor substrate (32) with the organic film is rotated at a relative speed of 0.17 to 1.06 m/sec to the polishing cloth (31); and feeding a polishing slurry (37) which has functional groups selected out of anion, cation, amphoteric, and non-ion functional groups, contains resin particles which are 0.05 to 5 μm in primary particle diameter, and has a pH of 2 to 8, onto the polishing cloth (31) to polish the organic film. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a chemical mechanical polishing slurry, a polishing method using the same, and a method for manufacturing a semiconductor device. In particular, the present invention relates to a chemical mechanical polishing slurry for an organic film such as a resist film, a polishing method using the same, and The present invention relates to a method for manufacturing a semiconductor device.
[0002]
[Prior art]
In a manufacturing process of a semiconductor device, a photoresist film is used as a sacrificial film to form a desired structure. For example, after forming a trench in a semiconductor substrate or a hole in an insulating film, a photoresist is applied to form a sacrificial film. The desired structure can be obtained by recessing or peeling off the sacrificial film. Such a method is used, for example, in the manufacture of a semiconductor memory device having a trench capacitor to form a buried strap that electrically connects a storage node electrode and a cell transistor diffusion layer. Further, in a process of forming a Cu dual damascene structure (Cu DD structure), the present invention is also useful for a via-hole first forming (Via first DD) process.
[0003]
In any case, the thickness of the photoresist film is required to be uniform over the entire wafer. However, when a resist is buried in a trench or a hole having a high pattern density, the resist volume on the dense pattern decreases. For this reason, a variation of the order of several hundred nm occurs between the resist film thickness on the dense pattern and the resist film thickness on the sparse pattern or on the field.
[0004]
The variation in the thickness of the resist is further enlarged in a recess to be formed later, and deteriorates the device shape. Further, it causes a decrease in the depth of focus and a decrease in yield.
[0005]
In order to solve the problem caused by the variation in the resist film thickness, a method of flattening a photoresist by a chemical mechanical polishing method after applying the resist has been proposed (for example, see Patent Document 1). However, CMP for a photoresist film has the following problems.
[0006]
In the conventional resist CMP, the resist polishing time is long, and the stability of the polishing time is low. This problem is particularly apparent when CMP is performed on a thick film resist of about 3 μm. Specifically, the polishing time is as long as 200 to 270 seconds, and the stability is poor.
[0007]
Further, it is difficult to suppress dishing, and the uniformity in the wafer surface is poor. If the in-plane uniformity of the dishing is low, the subsequent recess depth varies, making it difficult to obtain a desired shape uniformly within the wafer surface. For example, when forming the buried strap, the variation in the recess depth is directly connected to the variation in the collar oxide film, resulting in the resistance variation of the buried strap.
[0008]
In polishing a resist film whose hardness has been increased by baking at a high temperature, inorganic particles such as silica and alumina are used as abrasive particles in order to secure a practical process margin and productivity. In this case, there is a problem that the inorganic particles are likely to remain in the trench, deteriorating the surface state, and the remaining particles serve as a mask in a recess process after the CMP.
[0009]
A method using resin particles as abrasive particles has been proposed (for example, see Patent Document 2). In this case, the polishing target is a film made of an alloy containing Al as a main component such as pure Al, AlSiCu alloy, AlCu alloy, a silicon oxide film, a silicon nitride film, an amorphous silicon film, a polycrystalline silicon film, and a single crystal silicon. Film. Therefore, the slurry is prepared so as to be optimal for polishing an inorganic film such as a metal film or a silicon film.
[0010]
[Patent Document 1]
JP 2001-77064 A
[0011]
[Patent Document 2]
Patent No. 3172008
[0012]
[Problems to be solved by the invention]
An object of the present invention is to provide a slurry that can stably and chemically polish an organic film such as a resist film in a short time while suppressing dishing and maintaining a good surface.
[0013]
Another object of the present invention is to provide a method for stably polishing an organic film such as a resist film in a short time while suppressing dishing and maintaining a good surface.
[0014]
Still another object of the present invention is to provide a method for manufacturing a semiconductor device, which can stably form a resist buried structure having high flatness and uniformity in a short time.
[0015]
[Means for Solving the Problems]
The chemical mechanical polishing slurry for an organic film according to one embodiment of the present invention has a functional group selected from anionic, cationic, amphoteric, and nonionic functional groups, and has a primary particle diameter of 0.05 μm. It is characterized by containing resin particles of not less than 5 μm and not more than 2 and not more than 8 in pH.
[0016]
The method for chemically and mechanically polishing an organic film according to one embodiment of the present invention is a method for chemically and mechanically polishing an organic film deposited on a semiconductor substrate,
A semiconductor substrate having the organic film is rotated at a relative speed of 0.17 to 1.06 m / sec with respect to the polishing cloth on a polishing cloth having a compression modulus of 100 to 600 MPa attached to a turntable. Abutting while contacting, and
The method further comprises a step of supplying the aforementioned chemical mechanical polishing slurry for an organic film onto the polishing cloth to polish the organic film.
[0017]
A method for manufacturing a semiconductor device according to one embodiment of the present invention includes a step of forming a recess in a semiconductor substrate as a base or an insulating film deposited over the semiconductor substrate;
Forming a resist film on the entire surface of the base on which the concave portion is formed,
Polishing the resist film chemically and mechanically by the method described above, and selectively embedding the resist film in the concave portion, and
A step of recessing the resist film buried in the recess to a predetermined depth.
[0018]
A method of manufacturing a semiconductor device according to another aspect of the present invention includes a step of forming a hole in an insulating film deposited on a semiconductor substrate,
Forming a first resist film on the entire surface of the insulating film;
A step of chemically and mechanically polishing the first resist film by the method described above to selectively bury the first resist film in the holes;
Forming a second resist film on the first resist film after the chemical mechanical polishing,
Forming an intermediate layer on the second resist film;
Forming a third resist film on the intermediate layer; and
A step of pattern-exposing the third resist film.
[0019]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0020]
The resin particles contained in the chemical mechanical polishing slurry for an organic film according to the embodiment of the present invention include methacrylic resin such as PMMA (polymethyl methacrylate), PST (polystyrene) resin, urea resin, melamine resin, and polyacetal resin. And a particle selected from the group consisting of polycarbonate resin. In particular, PMMA or PST resin is preferable because it has hardness and elasticity suitable for CMP.
[0021]
When the primary particle diameter of the resin particles is less than 0.05 μm, the particles easily penetrate into the recesses in which the organic film is embedded, that is, the trenches provided in the semiconductor substrate or the holes provided in the insulating film, and the dishing occurs. Tend to expand. On the other hand, if it exceeds 5 μm, it becomes difficult to control the dispersibility of the particles, and the slurry tends to settle. Therefore, in the embodiment of the present invention, the primary particle diameter of the resin particles is limited to 0.05 μm or more and 5 μm or less. In addition, the primary particle diameter of the resin particles is preferably 0.1 μm or more and 3.0 μm or less.
[0022]
At least one functional group selected from anionic, cationic, amphoteric, and nonionic functional groups is introduced into the surface of such resin particles. Examples of the anionic functional group include a carboxylic acid type, a sulfonic acid type, a sulfate ester type and a phosphate ester type, and examples of the cationic functional group include an amine salt type and a quaternary ammonium salt type. Is mentioned. Examples of the amphoteric functional groups include alkanolamide type, carboxybetaine type, and glycine type, and examples of the nonionic functional group include ether type and ester type. A carboxyl group is particularly preferred because of easy production of the particles.
[0023]
In order to stably disperse the resin particles, the absolute value of the ζ potential is preferably equal to or more than a predetermined value. Specifically, it is desired that the absolute value of the ζ potential is about 20 mV or more. This can be achieved by setting the ratio of the functional groups to about 0.05 mol / L or more. In some cases, two or more functional groups may be present at the same time. Since the functional group is present on the surface of the resin particles, the dispersibility can be enhanced by the electric repulsion between the resin particles without adding a surfactant.
[0024]
For example, in the case of a resin particle having a carboxyl group (COOH) as a functional group on the surface, the carboxyl group becomes COOH → COO in the slurry. ⁻ + H ⁺ And the surface of the resin particles is negatively charged. For this reason, it is possible to prevent the particles from aggregating due to the electric repulsion, enhance the dispersibility, and prolong the life.
[0025]
PMMA particles having a carboxyl group (COOH) on the surface can be synthesized, for example, by the following method. First, methyl methacrylate, methacrylic acid, divinylbenzene, ammonium lauryl sulfate and ammonium persulfate are placed in a flask together with a sufficient amount of ion-exchanged water. This is heated to 70 to 80 ° C. with stirring in a nitrogen gas atmosphere, and polymerized for 6 to 8 hours. Thus, PMMA particles having a carboxyl group on the surface and a primary particle diameter of about 0.15 to 0.25 μm are obtained. By changing the reaction temperature, time, and other production conditions, the primary particle size of the resin particles can be controlled within the range of 0.05 to 5 μm.
[0026]
By dispersing the resin particles having a functional group on the surface as described above in water, the chemical mechanical polishing slurry for an organic film according to the embodiment of the present invention can be obtained. As the water, ion-exchanged water, pure water, or the like can be used. The resin particles are preferably dispersed in the slurry to a concentration of about 0.01 to 30 wt%. If the content is less than 0.01 wt%, it becomes difficult to polish the organic film at a sufficiently high rate. On the other hand, if it exceeds 30 wt%, SiN, SiO ₂ There is a possibility that the selection ratio with the insulating film such as the above cannot be obtained.
[0027]
An additive such as an oxidizing agent, an organic acid or a surfactant may be added to the slurry in a commonly used amount, if necessary.
[0028]
However, the slurry according to the embodiment of the present invention has a pH of 2 or more and 8 or less. When the pH is less than 2, functional groups such as COOH are not easily dissociated, and dispersibility deteriorates. On the other hand, when the pH exceeds 8, chemical damage to an organic film such as a resist film increases, and dishing increases.
[0029]
By appropriately blending a pH adjuster, the pH can be adjusted to the above range. As the pH adjuster, for example, nitric acid, phosphoric acid, hydrochloric acid, sulfuric acid, citric acid and the like can be used.
[0030]
Since the chemical mechanical polishing slurry for an organic film according to the embodiment of the present invention contains resin particles having a predetermined particle size, it can be suitably used for chemical mechanical polishing of an organic film. In particular, since a functional group is present on the surface of the resin particles, the dispersibility can be increased by the electric repulsion between the particles without separately adding a surfactant. Ensuring the dispersibility of the resin particles is a very important factor from the viewpoint of polishing characteristics and storage stability. If the particles are not well dispersed, coarse particles may form and cause scratching. Alternatively, the slurry turns into a hard cake, and storage stability deteriorates. Since the functional groups are present on the surface of the resin particles, such a disadvantage does not occur in the slurry according to the embodiment of the present invention.
[0031]
Moreover, since the pH of the slurry according to the embodiment of the present invention is defined within a predetermined range, the functional groups on the surface of the resin particles are sufficiently dissociated without causing any chemical damage to the organic film to be polished. Can be done.
[0032]
The polishing of the organic film using the slurry according to the embodiment of the present invention can be performed, for example, as follows. As shown in FIG. 1, while rotating the turntable 30 on which the polishing cloth 31 is stuck at 10 to 50 rpm, the top ring 33 holding the semiconductor substrate 32 is moved to 200 to 600 gf / cm. ² Abrasion load. The rotation speed of the top ring 33 can be set to 5 to 60 rpm. However, it is preferable to determine the rotation speeds of the turntable 30 and the top ring 33 so that the relative speed of the semiconductor substrate 32 to the rotation speed of the polishing pad 31 is in the range of 0.17 to 1.06 m / sec. This will be described later. The slurry 37 is supplied onto the polishing cloth 31 from the slurry supply nozzle 35 at a flow rate of 100 to 300 cc / min. FIG. 1 also shows a water supply nozzle 34 and a dresser 36.
[0033]
As the polishing cloth 31, a hard polishing pad having a compression modulus in the range of 100 to 600 MPa is used. When the compression modulus is less than 100 MPa, it cannot be mechanically removed because the hardness is smaller than the resist film to be polished. On the other hand, if it exceeds 600 MPa, scratches tend to occur on the surface of the organic film after polishing. Therefore, for example, it is preferable to use IC1000 (manufactured by Rodale Nitta) having a compression modulus of about 290 MPa. The IC 1000 may be supported by Suba 400 (manufactured by Rodale Nitta) having a compression modulus of 6 MPa or less. However, when a soft pad having a compression modulus of 6 MPa or less such as Suba400 or Politex is used alone, the resist film is removed when polishing is performed for 120 seconds using the slurry according to the embodiment of the present invention. Can not.
[0034]
The slurry according to the embodiment of the present invention exerts its effect sufficiently by being used for polishing under such conditions, and does not cause any deterioration of the surface shape such as dishing, and stably in a short time, the organic film such as a resist film. Can be polished.
[0035]
The chemical mechanical polishing slurry for an organic film according to the embodiment of the present invention was prepared by the following method.
[0036]
(Slurry 1)
First, 92 parts by weight of styrene, 4 parts by weight of methacrylic acid, 4 parts by weight of hydroxyethyl acrylate, 0.1 part by weight of ammonium lauryl sulfate, 0.5 part by weight of ammonium persulfate, and 400 parts by weight of ion-exchanged water were placed in a 2 liter flask. Housed. The temperature was raised to 70 ° C. while stirring in a nitrogen gas atmosphere, and the polymerization was carried out for 6 hours. As a result, PST particles having a carboxyl group and a primary particle diameter of 0.2 μm were obtained.
[0037]
The PST particles were dispersed in pure water at a concentration of 1% by weight, and the pH was adjusted to 3 by adding nitric acid to obtain a slurry 1.
[0038]
(Slurry 2)
First, 94 parts by weight of methyl methacrylate, 1 part by weight of methacrylic acid, 5 parts by weight of hydroxymethyl methacrylate, 0.03 parts by weight of ammonium lauryl sulfate, 0.6 parts by weight of ammonium persulfate, and 400 parts by weight of ion-exchanged water Housed in a 2 liter flask. The temperature was raised to 70 ° C. while stirring in a nitrogen gas atmosphere, and the polymerization was carried out for 6 hours. As a result, PMMA particles having a carboxyl group and a primary particle diameter of 0.3 μm were obtained.
[0039]
The PMMA particles were dispersed in pure water at a concentration of 1 wt%, and the pH was adjusted to 3 by adding phosphoric acid to obtain a slurry 2.
[0040]
Each of the slurries contains resin particles having a primary particle diameter of 0.05 to 5 μm having a functional group on the surface, and the pH is adjusted to a value between 2 and 8. Therefore, an organic film such as a resist film can be polished in a short time without causing any shape deterioration on the polished surface.
[0041]
(Embodiment 1)
In the present embodiment, a process for forming a buried strap for electrically connecting a storage node electrode and a cell transistor diffusion layer will be described.
[0042]
2 to 4 show a method of forming a buried strap.
[0043]
First, as shown in FIG. 2A, a trench 14 is formed by photolithography and dry etching on a semiconductor substrate 11 on which a pad oxide film 12 and a pad nitride film 13 are sequentially deposited. A buried plate electrode 15 is formed below the trench peripheral surface by diffusing an n-type impurity.
[0044]
A capacitor dielectric film 16 is deposited on the inner periphery of the buried plate electrode 15 thus formed, and an As-doped polysilicon film (hereinafter, referred to as a storage node) 17 serving as a storage node electrode is deposited on the capacitor dielectric film. I do. The storage node 17 fills the trench 14. Next, the storage node 17 is etched back to a desired depth, ₃ PO ₄ The capacitor dielectric film 16 on the side wall of the trench 14 is removed by etching using a solution such as the one described above to obtain a structure shown in FIG. Thereafter, a thermal oxide film (not shown) is formed on the semiconductor substrate.
[0045]
Further, as shown in FIG. 2C, a collar oxide film 18 is deposited on the upper inner wall of the trench 14 in which the storage node 17 is not buried. The collar oxide film 18 has a function of electrically insulating the buried plate electrode 15 from a diffusion layer (not shown) of the cell transistor. Thereafter, the color oxide film 18 on the storage node is removed by dry etching in order to make contact between a polysilicon film described later and the storage node 17.
[0046]
Next, after forming a resist film 19 on the entire surface as shown in FIG. 3D, the resist film is subjected to CMP and planarized as shown in FIG. 3E to expose the surface of the pad nitride film 13. For polishing the resist film 19, the method according to the embodiment of the present invention is applied.
[0047]
Specifically, IC1000 (manufactured by Rodale Nitta) was used as a polishing cloth, and the slurry according to the embodiment of the present invention was used as follows. As shown in FIG. 1, while rotating the turntable 30 on which the polishing cloth 31 is stuck at 30 rpm, the top ring 33 holding the semiconductor substrate 32 is moved to 500 gf / cm. ² Abrasion load. The rotation speed of the top ring 33 was set to 32 rpm, and the slurry 37 was supplied onto the polishing pad 31 from the slurry supply nozzle 35 at a flow rate of 150 cc / min. The slurry 1 described above was used as the slurry. Since the diameter of the trench provided in the substrate is 0.14 μm, in the present embodiment, the primary particle diameter of the resin particles contained in the slurry is about 140% of the trench diameter.
[0048]
Further, as shown in FIG. 3F, the resist film 19 is recessed by a CDE (Chemical Dry Etching) method to a depth necessary for making contact with a cell transistor diffusion layer (not shown).
[0049]
4G, a part of the collar oxide film 18 is removed to expose a part of the semiconductor substrate 11 in the trench 14 as shown in FIG. The surface of the color oxide film 18 exists below the surface of the resist film 19 as shown, and an opening 20 of a buried strap is formed.
[0050]
After removing the resist film 19 as shown in FIG. 4 (h), as shown in FIG. 4 (i), polysilicon for making contact between the diffusion layer (not shown) of the cell transistor and the storage node 17 is formed. A film 21 is deposited. The polysilicon film 21 fills the opening 20 of the buried strap. Thereby, a buried strap is formed.
[0051]
In the present embodiment, since the recess is performed after the resist film 19 is planarized in advance, the resist film can be recessed at a uniform depth. Therefore, the thickness of the color oxide film 18 after the etch back does not vary.
[0052]
Variations in the thickness of the color oxide film cause variations in the resistance value of the buried strap, which causes a reduction in yield. For this reason, it is necessary to suppress the variation to 30 nm or less.
[0053]
Conventionally, the color oxide film has been etched back by recessing without flattening the resist film. When the resist is buried in the trench, a change occurs in the resist coating thickness at the cell array end, and the resist coating thickness decreases in the order of the field portion, the cell array end, and the center of the cell portion. For example, when a resist is buried in a trench having an opening diameter of 0.14 μm and a depth of 1.2 μm, a difference of about 120 nm occurs between the film thicknesses of the resist in the field portion and the center of the cell portion. As a result, since the depth of the resist varies, the film thickness after the etch back of the color oxide film varies. Specifically, the thickness of the color oxide film has a variation of about 130 nm, causing a breakdown of the process.
[0054]
In the embodiment of the present invention, since the resist film 19 before the recess is flattened by CMP to have a uniform film thickness, the thickness variation of the color oxide film 18 can be reduced to 30 nm or less.
[0055]
Here, the resist CMP according to the embodiment of the present invention will be described in detail.
[0056]
Polishing of the resist CMP proceeds by a mechanism different from metal CMP such as Cu or W. Metal CMP is generally performed by forming a fragile protective film on the surface of a metal film to be polished and removing the fragile protective film with abrasive particles composed of inorganic particles. On the other hand, in the resist CMP, the removal of the resist film mainly progresses by stripping off the resist film by a mechanical polishing force of a polishing pad or abrasive particles. In CMP in which such mechanical elements are extremely strong, maintaining a high friction between the wafer and the polishing pad is extremely important for obtaining a high polishing rate.
[0057]
Normal CMP, eg SiO ₂ In -CMP, both the pad surface and the polished surface are hydrophilic. For this reason, the coefficient of friction therebetween during polishing is in the boundary lubrication region of the so-called Stribeck diagram regardless of the rotation speed of the polishing pad or the relative speed of the wafer. When the rotational speed ω of the wafer is equal to the rotational speed Ω of the polishing pad, the relative speed v of the wafer is given by the product of the distance R from the center of the table to the center of the wafer and the rotational speed Ω of the polishing pad ( v = RΩ). Therefore, according to the normal Preston's formula, the polishing speed tends to increase as the rotation speed of the polishing pad increases.
[0058]
This will be described with reference to the Stribeck diagram shown in FIG. In the graph of FIG. 5, the horizontal axis represents the load characteristics, and the vertical axis represents the friction coefficient (arbitrary unit).
[0059]
For example, SiO ₂ In the case of (1), the boundary lubrication region is formed when the rotation speed of the polishing pad is within a wide range from 10 rpm to 100 rpm. When the distance R between the center of the polishing pad and the center of the wafer is calculated as 170 mm, the relative speeds of the wafer are 0.17 m / s and 1.57 m / s, respectively, in the case of the rotation speed described above.
[0060]
On the other hand, in the case of resist CMP for polishing a resist film that is a hydrophobic material, the situation is greatly different, and the polishing speed increases as the relative speed of the wafer decreases. This is considered to be because the pad surface after polishing becomes hydrophobic. A large amount of flake-like resist shavings are generated on the pad surface after resist polishing. The shavings accumulate on the pad surface each time polishing is repeated, rendering the pad surface hydrophobic. As a result, since both the pad surface and the wafer surface become hydrophobic, the friction coefficient sharply decreases at a certain relative speed or more. This state is the liquid lubrication region in the Stribeck diagram shown in FIG. 5, and the contact between the wafer and the pad is almost zero. In this case, the polishing rate of the resist film becomes very low.
[0061]
In performing resist CMP, the distance R between the center of the polishing pad and the center of the wafer was set to 170 mm using a 200 mm wafer, and the rotational speed Ω of the polishing pad was changed to examine the effect of the relative speed on the state of friction. As a result, it was a boundary lubrication region at 10 rpm to 60 rpm, and a liquid lubrication region at over 70 rpm. In order to achieve resist CMP in the boundary lubrication region, the relative velocity v of the wafer needs to be in the range of 0.17 m / sec to 1.06 m / sec.
[0062]
FIG. 6 is a graph showing the relationship between the CMP time and the resist removal area ratio. The resist removal area ratio is defined as 0% when the resist film is present on the entire surface before CMP and 100% when there is no remaining resist after CMP. Here, a 3 μm-thick resist film was examined. The graph of FIG. 6 shows three types of results having different relative speeds of the wafer. Curves a, b and c are the results when the relative speed of the wafer is 0.53 m / s, 1.24 m / s and 1.57 m / s, respectively. The rotation speeds of the polishing pad at these relative speeds are 30 rpm, 70 rpm, and 100 rpm, respectively. As described above, when the resist CMP is performed at a relative speed of 70 rpm or more, that is, 1.24 m / s or more, the resist enters the liquid lubrication region of the Stribeck diagram, and the friction coefficient decreases. Therefore, as shown by the curve b, it takes a long time of 270 seconds or more to complete the CMP, and the polishing rate is extremely low.
[0063]
On the other hand, at a relative speed of 30 rpm, ie 0.53 m / s, the friction is kept high to enter the region of boundary lubrication. As shown by the curve a, polishing is completed in only about 20 seconds.
[0064]
As shown by the curve c, in the case of 1.57 m / s, which is the liquid lubrication area, the resist removal area ratio is only about 15% after polishing for 270 seconds.
[0065]
The graph in FIG. 7 shows the relationship between the relative speed and the resist removal area ratio when polishing is performed for 45 seconds. If the relative speed is in the range of 0.17 m / sec to 1.06 m / sec, a resist removal area ratio of 80% or more can be achieved by polishing for 45 seconds.
[0066]
Further, the graph of FIG. 8 shows the relationship between the CMP time and the table torque current. The curve d is the result when the relative speed is 0.53 m / s (rotation speed 30 rpm), and the curve e is the result when the relative speed is 1.24 m / s (rotation speed 70 rpm). As shown by the curve d, when the relative speed is 0.53 m / s, a table torque current exceeding 18 A can be obtained in only about 25 seconds. There is a positive correlation between the table torque current and the friction between the wafer and the polishing pad. In this case, the stability of the polishing time is high. Even if about 20 wafers are polished, the polishing time is 60 hours. It was constant for about a second.
[0067]
On the other hand, when the relative speed is 1.24 m / s, as shown by the curve e, the table torque current remains at about 15 A after polishing for 180 seconds. In this case, the polishing required a long time and the stability of the polishing time was low. When about 20 wafers were polished, the polishing time varied between 200 seconds and 270 seconds.
[0068]
In order to secure a sufficient polishing rate, the load during CMP is 200 to 600 gf / cm. ² Is preferably within the range. 200gf / cm ² If it is less than 3, it is easy to enter the liquid lubrication region of the Streckeck diagram, and it becomes difficult to maintain the friction. On the other hand, 600 gf / cm ² Exceeding the range makes it difficult for the slurry to be supplied to the surface to be polished, which may lower the polishing rate and increase scratches.
[0069]
It is desirable that the particle size of the resin particles in the slurry according to the embodiment of the present invention be determined according to the opening diameter of the trench in which the resist is embedded. Hereinafter, this will be described in detail.
[0070]
FIG. 9 shows a state of the abrasive particles in the trench portion. Opening diameter d of trench _t Is 2 μm.
[0071]
For example, when a slurry containing 1 wt% of silica particles having a primary particle diameter of 0.035 μm is used as the slurry, the silica particle size is significantly smaller than the trench diameter. Therefore, as shown in FIG. 9A, the silica particles 23 penetrate into the trenches and advance dishing. On the other hand, when the resin particles 24 having a certain size are used, as shown in FIG. 9B, dishing does not proceed because it is difficult to enter the trench.
[0072]
The relationship between the wafer position and the dishing amount in each case shown in FIG. 9 is shown in the graph of FIG. In FIG. 10, the curves f and g are the cases of FIGS. 9B and 9A, respectively. As shown by the curve g, when silica particles having a small particle diameter are used, the resist dishing exceeds 50 nm and the in-plane uniformity is poor. In addition, the dishing shape becomes distorted and deteriorates the shape after the recess. In addition, the silica particles that have entered the trench cannot easily be removed and tend to remain. In this case, it becomes a mask at the time of the registry recess, and causes a variation in the recess depth.
[0073]
On the other hand, in the case of resin particles having a large particle diameter, dishing is suppressed to about 25 nm as shown by the curve f. Even if the resin particles remain in the trench, the resin particles can be removed by a recess (CDE) because the resin particles are the same organic material as the resist. Therefore, the risk due to residual particles is extremely small. Further, there is an advantage that the polishing force on the SiN film is small, and the polishing speed of the SiN can be suppressed to 1/10 as compared with the silica particles.
[0074]
FIG. 11 shows the relationship between the particle size / trench size ratio and the dishing amount. Dishing on the order of 40 nm is acceptable as it has substantially no effect. Therefore, the particle size / trench size ratio is preferably set to 70% or more. When the particle size / trench size ratio exceeds 200%, the dishing amount remains at a constant level of about 15%. In addition, for the reasons described above, the primary particle diameter of the resin particles is limited to 5 μm or less. In consideration of these, it is desired to determine the upper limit of the particle size / trench size ratio.
[0075]
FIG. 12 shows the relationship between the size of the resin particles and the dishing amount. The size here is the primary particle diameter. When the size is 0.05 μm or more, the dishing amount can be suppressed to 40 nm or less.
[0076]
As described above, by the method according to the embodiment of the present invention, it is possible to form dishing and a resist-embedded structure with a small variation in a short time. Therefore, when applied to the formation of a buried strap, resistance variation can be significantly reduced.
[0077]
The slurry and the polishing method according to the embodiment of the present invention can be applied to not only a photoresist film but also an organic film such as an organic SOG.
[0078]
(Embodiment 2)
In the present embodiment, a process of forming a Cu dual damascene (DD) wiring, particularly, a formation of a wiring pattern in a via-hole forming process will be described.
[0079]
13 and 14 are process cross-sectional views illustrating a method of forming a wiring pattern using a multilayer resist method in a via hole tip formation DD process.
[0080]
First, as shown in FIG. 13A, a stopper film 41, a first insulating film 42, and a second insulating film 43 are sequentially formed on a semiconductor substrate 40 by a CVD method, a spin coating method, or the like. On the semiconductor substrate 40, an element and a lower layer wiring (not shown) are formed. A hole 44 is formed in the first insulating film 42 and the second insulating film 43 by RIE, and a first resist film 45 is deposited thereon. The first resist film 45 plays a role of an etching mask and an anti-reflection film.
[0081]
On the first resist film 45, SOG or SiO ₂ An intermediate layer 46 and a second resist film 47 are sequentially formed, and the second resist film 47 is patterned by lithography as shown in FIG.
[0082]
Next, after the intermediate layer 46 is processed by dry etching as shown in FIG. 13C using a halogen gas or the like, the first resist is formed as shown in FIG. The film 45 is etched. At this time, the second resist film 47 on the intermediate layer 46 is also removed by etching at the same time.
[0083]
Subsequently, the wiring groove 48 is etched as shown in FIG. At this time, the intermediate layer 46 is also removed at the same time. After that, the first resist film 45 embedded in the hole is peeled off together with the first resist film 45 on the second insulating film 43 to form a via hole 49 as shown in FIG. .
[0084]
After removing the stopper film 41 in the via hole 49, a Cu film is formed by a plating method or a sputtering method via a barrier metal film (not shown) made of TaN or the like. Further, Cu on the field is removed by performing CMP, and a Cu dual damascene (DD) wiring having a Cu wiring 50 shown in FIG. 14G is formed.
[0085]
In such a conventional method, when the first resist film 45 is formed, the resist is absorbed into a pattern having a high via density (hereinafter, referred to as a dense via), and the thickness of the first resist film 45 varies. Had occurred. Specifically, a variation of about 100 nm occurs between the resist film thickness on the dense via and the resist film thickness on the field portion or a pattern with a low via density (hereinafter, referred to as a sparse via). Was. This difference in film thickness is not alleviated by the intermediate layer 46 and the second resist film 47 formed thereon, but rather tends to increase by about 30 nm.
[0086]
As a result, the best focus between the sparse via portion and the dense via portion during resist patterning does not match, and shifts by about 0.1 μm. FIG. 15 shows the focus dependency of the resist film thickness. FIGS. 15A and 15B show the focus dependency of the resist film thickness in the sparse via portion (0.14 μm / 15 μm) and the dense via portion (0.14 μm / 0.14 μm), respectively. These graphs show the results for three types of exposure doses, and the curves are 45 mJ / cm in order from the top. ² , 41mJ / cm ² , 37mJ / cm ² Corresponds to the amount of exposure. Regardless of the exposure amount, there is a deviation of about 0.1 μm in the best focus between the sparse via portion and the dense via portion. This is an amount corresponding to the resist film thickness difference. When there is no via hole (reference process), there is no variation in the resist film thickness. Therefore, as shown in FIG. 16A (sparse via portion) and FIG. 16B (dense via portion). There is no pattern dependence of the best focus.
[0087]
FIG. 17 shows a margin curve obtained by performing ED Tree analysis. FIGS. 17A and 17B show the results for the reference process and the conventional example, respectively. Further, the result of the embodiment of the present invention described later is shown in FIG. 17 (c). Comparing the depth of focus with an exposure margin of 5%, in the case of the conventional example, it is 0.3 μm as shown in FIG. 17B, whereas in the reference process, it is shown in FIG. As shown, the depth of focus is 0.4 μm. In the conventional example, the depth of focus at the exposure margin of 5% is lost by 0.1 μm, and the process margin is reduced.
[0088]
In the embodiment of the present invention, after the first resist film 45 is formed, a resist CMP is performed to planarize the first resist film 45 so that the film thickness becomes uniform. Thereafter, a second resist film, an intermediate layer, and a third resist film are sequentially formed to reduce a difference in film thickness, thereby reducing a loss of depth of focus depending on a via density.
[0089]
FIG. 18 is a process sectional view illustrating a part of the method for manufacturing the semiconductor device according to the embodiment of the present invention.
[0090]
First, as shown in FIG. 18A, a stopper film 41 made of SiC was formed to a thickness of 50 nm on a semiconductor substrate 40 on which elements and lower wirings (not shown) were formed. Further, a 400 nm-thick first insulating film 42 (black diamond, manufactured by Applied Materials) and a 100 nm-thick second insulating film 43 (SiO 2 ₂ ) Were sequentially deposited, and via holes 44 having an opening diameter of 140 nm were formed in these insulating films. A first resist film 45 having a thickness of 0.3 μm was deposited on the entire surface, and the first resist film 45 on the second insulating film 43 was removed and left selectively in the hole 44.
[0091]
The removal of the first resist film 45 on the second insulating film 43 was performed by CMP using the slurry according to the embodiment of the present invention. Specifically, the semiconductor substrate 32 was held while rotating the turntable 30 to which the polishing cloth 31 was attached at 30 rpm as shown in FIG. 1 using IC1000 (manufactured by Rodale Nitta) as the polishing cloth. 500 gf / cm top ring 33 ² Abrasion load. The rotation speed of the top ring 33 was set to 33 rpm, and the slurry 37 was supplied onto the polishing pad 31 from the slurry supply nozzle 35 at a flow rate of 150 cc / min. The relative speed of the wafer is about 0.53 m / s. The slurry 1 described above was used as the slurry. In the present embodiment, the primary particle diameter of the resin particles contained in the slurry is about 140% of the opening diameter of the hole.
[0092]
As a result of polishing for 60 seconds, resist dishing in the hole 44 having an opening diameter of 0.14 μm was 10 nm or less, and loss of the second insulating film 43 could be suppressed to almost zero.
[0093]
Next, as shown in FIG. 18B, a second resist film 51, an intermediate layer 52, and a third resist film 53 are sequentially deposited by the above-described method to form a third resist film 53. Is patterned.
[0094]
Since the first resist film 45 is planarized by CMP, the difference in the resist film thickness between the dense via portion and the sparse via portion after patterning is improved to almost zero. FIGS. 19A and 19B show the dependence of the resist film on the light exposure amount for the sparse via portion and the dense via portion, respectively. These show that the best focus is not substantially at the via density. The depth of focus at the exposure margin of 5% is 0.4 μm as shown in FIG. 17C, which is the same level as that of the reference process. As described above, by performing the resist CMP to make the film thickness uniform, it is possible to expand the focus margin of lithography.
[0095]
Note that, in the normal three-layer resist process, a high-temperature bake treatment at 300 ° C. or higher is performed to increase the etching resistance of the first resist film. The high-temperature bake treatment makes the hardness of the resist film larger than the hardness of the resin particles, and also makes the resin film brittle, so that the resin particles cannot be polished well and may peel off. If alumina particles harder than the high-temperature baked resist film are used as abrasive particles, such a resist film can also be removed. I have to be prepared.
[0096]
Therefore, it is preferable that after the first resist film is baked at a low temperature of 100 ° C. to 200 ° C., for example, about 150 ° C., CMP is performed with the slurry according to the embodiment of the present invention. If the temperature is lower than 100 ° C., the adhesiveness of the resist decreases, and it becomes difficult to suppress the peeling during the CMP. On the other hand, when the temperature exceeds 200 ° C., the resist film may be hardened more than the resin particles and may not be removed. Since the baking is performed at a low temperature, the first resist film can be removed using the slurry according to the embodiment of the present invention. After that, a second resist film is formed, and a high-temperature bake of about 300 to 350 ° C. is performed, thereby improving the etching resistance. If the temperature is lower than 300 ° C., it is difficult to secure a selectivity in dry etching. On the other hand, if the temperature exceeds 350 ° C., oxygen may be released, and resist ashing may not be performed.
[0097]
Since polishing can be performed using the slurry according to the embodiment of the present invention containing resin particles, dishing on the polished surface is reduced, and there is no possibility that particles remain.
[0098]
(Embodiment 3)
In the present embodiment, a method for forming a Cu dual damascene (DD) wiring using a registry method will be described.
[0099]
The conventional method will be described with reference to FIG.
[0100]
First, as shown in FIG. 20A, an insulating film 61 is formed on a semiconductor substrate 60 on which elements (not shown) are formed, and a lower Cu wiring 62 is buried. On this, a stopper film 63 and an interlayer insulating film 64 are sequentially deposited, and a via hole 65 is formed in the interlayer insulating film by lithography and dry etching (RIE). Further, a first resist film 66 is formed on the entire surface.
[0101]
Next, as shown in FIG. 20B, the first resist film 66 is etched back by a CDE method to be recessed to a predetermined depth.
[0102]
Subsequently, as shown in FIG. 20C, an antireflection film 67 and a second resist film 68 are sequentially deposited, and a wiring groove 69 is patterned in the second resist film 68. Further, the anti-reflection film 67 and the insulating film 64 are etched by RIE to form a wiring groove 69.
[0103]
After that, the first resist film 66 embedded in the via hole 65 is removed, and a Cu DD structure is formed by metal film formation and CMP as described in the second embodiment.
[0104]
The conventional technique has the following problems. When forming the first resist film 66 on the interlayer insulating film 64 provided with the via hole 65, the resist is consumed in the hole 65. For this reason, as shown in FIG. 20A, the resist film thickness in the dense via portion 72 becomes smaller by about 100 nm than in the sparse via portion 71 or on the field.
[0105]
In the subsequent recess step, the variation in the film thickness of the resist further increases, and the resist film thickness of the dense via portion 72 becomes the thinnest as shown in FIG.
[0106]
When the wiring groove 69 is processed, the resist film 66 in the dense via portion 72 cannot withstand and damages the lower wiring, as shown in FIG. Also, the thickness of the antireflection film 67 varies due to the variation in the resist film thickness 66 embedded in the via hole 65. The thickness of the anti-reflection film 67 in the dense via portion 72 is reduced, and the dense via portion 72 is over-etched when the anti-reflection film is etched. As a result, the wiring groove 69 of the dense via portion 72 becomes deeper than the sparse via portion 71, and the wiring resistance after metal film formation / CMP becomes uneven and becomes obvious.
[0107]
In the embodiment of the present invention, after the first resist film 66 is formed, the resist CMP is performed to secure the flatness so that the film thickness of the first resist film 66 becomes uniform, and then the recess is performed.
[0108]
21 to 22 are process cross-sectional views illustrating a part of the method for manufacturing a semiconductor device according to the embodiment of the present invention.
[0109]
First, as shown in FIG. 21A, SiO 2 is formed on a semiconductor substrate 60 on which elements (not shown) are formed. ₂ Was deposited to a thickness of 400 nm to form an insulating film 61, and the lower Cu wiring 62 was buried by a conventional method. Further, a stopper film 63 (film thickness: 50 nm) made of SiC and SiO ₂ An interlayer insulating film 64 (thickness: 1 μm) made of was sequentially deposited. After forming a via hole 65 having an opening diameter of 140 nm in the interlayer insulating film 64, a first resist film 66 was deposited on the entire surface. After that, the first resist film 66 on the interlayer insulating film 64 was removed and left selectively in the via hole.
[0110]
The removal of the first resist film 66 on the interlayer insulating film 64 was performed by CMP using the slurry according to the embodiment of the present invention. Specifically, using IC1000 / Suba400 (manufactured by Rodale Nitta) as a polishing cloth, as shown in FIG. 1, the semiconductor substrate 32 is rotated while the turntable 30 to which the polishing cloth 31 is attached is rotated at 30 rpm. 500 gf / cm of the held top ring 33 ² Abrasion load. The rotation speed of the top ring 33 was set to 33 rpm, and the slurry 37 was supplied onto the polishing pad 31 from the slurry supply nozzle 35 at a flow rate of 150 cc / min. The relative speed of the wafer is about 0.53 m / s. As the slurry, the above-mentioned slurry 2 was used. In the present embodiment, the primary particle diameter of the resin particles contained in the slurry is about 210% of the opening diameter of the via hole.
[0111]
As a result of polishing for 60 seconds, the dishing of the first resist film 66 was 10 nm or less, and the loss of the interlayer insulating film 64 could be suppressed to almost zero. Next, the first resist film 66 in the via hole 65 was etched back to a predetermined depth. The thickness of the first resist film 66 after the recess was substantially uniform as shown in FIG. 21B, and the variation was suppressed to 20 nm or less.
[0112]
Since the thickness of the first resist film 66 after the recess is substantially uniform, the antireflection film 67 can also be formed with a uniform film thickness as shown in FIG. Further, a second resist film 68 is formed, and a wiring groove 69 is patterned in the second resist film 68, the antireflection film 67, and the interlayer insulating film 64.
[0113]
Subsequently, as shown in FIG. 22D, the first resist film 66, the antireflection film 67, and the second resist film 68 were removed. After removing the stopper film 63 in the via hole, Cu was buried in the wiring groove 69 and the via hole via a barrier metal film (not shown) made of TaN or the like. Further, by performing the CMP, the Cu DD wiring 73 is formed as shown in FIG.
[0114]
Since the first resist film is planarized by CMP prior to the recess, it is possible to form the Cu DD wiring with significantly reduced etching damage to the lower layer wiring or variation in the depth of the wiring groove.
[0115]
【The invention's effect】
As described in detail above, according to one embodiment of the present invention, an organic film such as a resist film can be stably chemically and mechanically polished in a short time while suppressing dishing and maintaining a good surface. A slurry is provided. According to another aspect of the present invention, there is provided a method for stably polishing an organic film such as a resist film in a short time while suppressing dishing and maintaining a good surface. According to still another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, capable of stably forming a resist buried structure having high flatness and uniformity in a short time.
[0116]
By using the present invention, a process margin in lithography can be expanded and a semiconductor manufacturing process with a high yield can be constructed, and its industrial value is enormous.
[Brief description of the drawings]
FIG. 1 is a schematic diagram showing a state of CMP.
FIG. 2 is a process sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.
FIG. 3 is a sectional view showing a step following FIG. 2;
FIG. 4 is a sectional view showing a step following FIG. 3;
FIG. 5 is a graph showing a Stribeck diagram.
FIG. 6 is a graph showing a relationship between a CMP time and a resist removal area ratio.
FIG. 7 is a graph showing a relationship between a relative speed and a resist removal area ratio.
FIG. 8 is a graph showing a relationship between a CMP time and a table torque current.
FIG. 9 is a schematic view showing a state of abrasive particles in a trench portion.
FIG. 10 is a graph showing a relationship between a wafer position and a dishing amount.
FIG. 11 is a graph showing a relationship between a particle size / trench size ratio and a dishing amount.
FIG. 12 is a graph showing a relationship between an abrasive particle size and a dishing amount.
FIG. 13 is a process cross-sectional view illustrating a method of forming a wiring pattern using a multilayer resist method.
FIG. 14 is a sectional view showing a step following FIG. 13;
FIG. 15 is a graph showing the focus dependency of the resist film thickness.
FIG. 16 is a graph showing the focus dependence of the resist film thickness.
FIG. 17 is a graph showing a margin curve.
FIG. 18 is a process sectional view illustrating a part of a method of manufacturing a semiconductor device according to another embodiment of the present invention.
FIG. 19 is a graph showing the focus dependency of a resist film thickness.
FIG. 20 is a process cross-sectional view showing a process of forming a Cu dual damascene by a registry.
FIG. 21 is a process sectional view illustrating a part of a method of manufacturing a semiconductor device according to still another embodiment of the present invention.
FIG. 22 is a sectional view showing a step following FIG. 21;
[Explanation of symbols]
11 semiconductor substrate, 12 Pad oxide film, 13 Pad nitride film, 14 trench, 15 plate electrode, 16 capacitor dielectric film, 17 storage node, 18 color oxide film, 19 resist film, 20 Opening of buried strap, 21 polysilicon, 23 silica particles, 24 resin particles, 30 turntable, 31 polishing cloth, 32 semiconductor substrate, 33 top ring, 34 water supply nozzle, 35 slurry Supply nozzle, 36 dresser, 37 slurry, 40 semiconductor substrate, 41 stopper film, 42 first insulating film, 43 second insulating film, 44 hole, 45 first resist film, 46 ... intermediate layer, 47 ... second resist film, 48 ... wiring groove, 49 ... via hole, 50 ... Cu wiring, 51 ... second resist film, 52 ... intermediate layer, 5 ... Third resist film, 60 semiconductor substrate, 61 insulating film, 62 Cu wiring, 63 stopper film, 64 interlayer insulating film, 65 via hole, 66 first resist film, 67 antireflection Film 68 second resist film 69 69 wiring groove 70 damage to lower layer wiring 71 sparse via portion 72 dense via portion 73 Cu wiring

Claims (11)

It has a functional group selected from anionic, cationic, amphoteric, and nonionic functional groups, contains resin particles having a primary particle diameter of 0.05 μm or more and 5 μm or less, and has a pH of 2 or more and 8 or less. A chemical mechanical polishing slurry for an organic film, comprising: The chemistry for an organic film according to claim 1, wherein the resin particles are at least one selected from the group consisting of a methacrylic resin, a polystyrene resin, a urea resin, a melamine resin, a polyacetal resin, and a polycarbonate resin. Mechanical polishing slurry. The functional group includes carboxylic acid type, sulfonic acid type, sulfate ester type, phosphate ester type, amine salt type, quaternary ammonium salt type, ether type, ester type, alkanolamide type, carboxybetaine type, and glycine type. 3. The chemical mechanical polishing slurry for an organic film according to claim 1, wherein the slurry is at least one selected from the group consisting of functional groups. A method of chemically and mechanically polishing an organic film deposited on a semiconductor substrate,
A semiconductor substrate having the organic film is rotated at a relative speed of 0.17 to 1.06 m / sec with respect to the polishing cloth on a polishing cloth having a compression modulus of 100 to 600 MPa attached to a turntable. And a step of supplying the chemical-mechanical polishing slurry for an organic film according to any one of claims 1 to 3 onto the polishing cloth to polish the organic film. A chemical mechanical polishing method for an organic film, comprising: The organic film is formed on a base having a concave portion, and a primary particle diameter of the resin particles in the chemical mechanical polishing slurry for the organic film is 70% or more of an opening diameter of the concave portion. A method for chemically and mechanically polishing an organic film according to claim 4. The method according to claim 4, wherein the semiconductor substrate is brought into contact with the polishing pad at a pressure of 200 to 600 gf / cm ² . Forming a recess in a semiconductor substrate as a base or an insulating film deposited on the semiconductor substrate,
Forming a resist film on the entire surface of the base on which the concave portion is formed,
A step of chemically and mechanically polishing the resist film by the method according to any one of claims 4 to 6, and selectively embedding the resist film in the concave portion, and
A method of manufacturing a semiconductor device, comprising a step of recessing a resist film buried in the recess to a predetermined depth. The recess is a trench provided in a semiconductor substrate as a base,
Forming a plate electrode on a lower side surface in the trench after forming the trench and before forming the resist film; forming a capacitor dielectric film on an inner periphery of the plate electrode; Forming a storage node electrode on the film, etching back the storage node electrode and the capacitor dielectric film, and forming a collar oxide film on an upper inner wall in the trench,
8. The method according to claim 7, further comprising a step of etching back the color oxide film after recessing the resist film. The recess is a hole formed in an interlayer insulating film as a base, the resist film is a lower resist film,
A step of sequentially forming an antireflection film and an upper resist film on the interlayer insulating film after the lower resist film is recessed; and forming the interlayer insulating film, the antireflection film and the upper resist film so as to reach the lower resist film. Forming a wiring groove, removing the lower resist film, the antireflection film and the upper resist film, and embedding a conductive material in the hole and the wiring groove. The method of manufacturing a semiconductor device according to claim 7. Forming holes in the insulating film deposited on the semiconductor substrate,
Forming a first resist film on the entire surface of the insulating film;
7. a step of chemically and mechanically polishing the first resist film by the method according to claim 4 to selectively bury the first resist film in the hole;
Forming a second resist film on the first resist film after the chemical mechanical polishing,
Forming an intermediate layer on the second resist film;
A method of manufacturing a semiconductor device, comprising: forming a third resist film on the intermediate layer; and pattern-exposing the third resist film. After forming the first resist film, baking at a temperature of 100 ° C. or more and 200 ° C. or less before chemical mechanical polishing,
The method according to claim 10, further comprising a step of baking at a temperature of 300 ° C. or more and 350 ° C. or less after forming the second resist film.

Images