JP2004356654A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To increase the ratio of a mounting area in the state that a substrate is compacted. <P>SOLUTION: This semiconductor device has a through hole 15 passing from a first surface to a second surface. The semiconductor device includes a substrate 12 having a plurality of external electrodes 28 separated from the through hole, a first semiconductor element 16 having a first main surface with a plurality of first electrodes 30, and a second semiconductor element 18 having a second main surface with a plurality of second electrodes 32. The semiconductor device has an opening 17 for housing the second semiconductor element. The first semiconductor element has a first main surface opposed to the first surface of the substrate mounted on the substrate to coat the opening. The second semiconductor element is mounted on the first semiconductor element housed in the opening. A first wiring 14a electrically connected to the first electrode of the first semiconductor element is provided on the first surface of the substrate. A second wiring 14b electrically connected to external electrodes is provided on the second surface of the substrate. A third wiring 14c is provided in the through hole. The first wiring and the second wiring are electrically connected via a third wiring. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device.

  As a conventional semiconductor mounting structure, there is a BGA (Ball Grid Array) type semiconductor device disclosed in a document (Nikkei Electronics, 1994, 2.14, p. 59-).

  In this BGA type semiconductor device, one semiconductor element is mounted on a substrate (printed substrate), and an electrode portion provided on an upper surface of the semiconductor element is electrically connected to a wiring of the printed substrate by a metal wire. ing. Then, a sealing resin for protecting the semiconductor element from an external environment is provided on the substrate including the semiconductor element.

  On the other hand, on the back surface of the printed board, a plurality of conductive bumps (metal bumps) are connected to conductor portions (wirings) of the board. Therefore, it is possible to connect the BGA type semiconductor device to another circuit via the metal bump.

In the conventional BGA type semiconductor device, the mounting area of the mounting substrate can be made close to the area of the semiconductor element by providing the gang bond connection electrode bumps on the back surface of the printed circuit board. Therefore, the semiconductor device itself can be made compact.

  However, in the conventional BGA type semiconductor device, if a plurality of semiconductor elements are to be mounted on a printed board, the area of the mounting board is required by the area of the semiconductor element, and the area of the mounting board becomes large. . Therefore, in the conventional BGA type semiconductor device, the mounting area of the mounting substrate is limited by the area of the semiconductor element, so that the number of semiconductor elements cannot be increased.

  In addition, since the connection between the semiconductor element and the substrate is joined using a metal wire (bonding wire), the connection locations are individually connected. For this reason, there is a problem that it takes a long time to perform the connection work and the work efficiency is poor.

  Therefore, realization of a semiconductor mounting structure capable of mounting a large number of semiconductor elements and a mounting method with good workability without increasing the area of the mounting substrate has been desired.

  The semiconductor device includes a first surface, a second surface facing the first surface, and a through hole penetrating from the first surface to the second surface. A substrate provided with a plurality of external electrodes separated from the hole, a first semiconductor element having a first main surface on which a plurality of first electrodes are formed, and a plurality of second electrodes formed; A second semiconductor element having a second main surface, and an opening for accommodating the second semiconductor element is provided on the first surface side of the substrate, and the first semiconductor element has: The first main surface is mounted on the substrate such that the first main surface faces the first surface of the substrate and covers the opening, and the second semiconductor element has a second main surface formed of the first semiconductor element of the first semiconductor element. The first semiconductor element is mounted on the first semiconductor element so as to face the main surface and housed in the opening, and the first power of the first semiconductor element is placed on the first surface of the substrate. A first wiring electrically connected to the external electrode; a second wiring electrically connected to the external electrode on the second surface of the substrate; and a third wiring in the through hole. Is provided, and the first wiring and the second wiring are electrically connected by a third wiring.

As described above, since the two semiconductor elements are stacked in the direction perpendicular to the upper surface of the substrate, the ratio of the mounting area (the area of the semiconductor element ÷ the area of the mounting substrate) can be increased as compared with the related art. Therefore, it is possible to mount two semiconductor elements on the mounting board while the mounting board is downsized.

With such a configuration, a part of one of the semiconductor elements forming the stacked body including the two semiconductor elements can be accommodated in the opening, so that the mounting height of the semiconductor element can be reduced. Can be reduced.

  In practicing the present invention, it is preferable that one semiconductor element is electrically connected to the substrate via the second conductive bump.

  As described above, in the present invention, since the semiconductor element and the substrate are electrically connected by the second conductive bumps, when connecting the two, a plurality of connection portions are formed in one operation step by, for example, thermocompression bonding. It is possible to connect at the same time.

  In practicing the present invention, preferably, two sets of stacks are provided, and these stacks are preferably stacked and firmly fixed while being insulated from each other.

  As described above, by using two sets of stacked bodies and fixing each of the stacked bodies with an insulating material, for example, an adhesive, four semiconductor elements are stacked, so that the mounting area ratio is further increased. growing.

  In practicing the present invention, it is preferable that one semiconductor element of each of the stacked bodies is individually and electrically connected to an electrically isolated portion of the substrate. As described above, since one semiconductor element of the two sets of stacks is connected to each of the electrically isolated portions of the substrate, it is possible to individually drive the stacks individually.

  According to the semiconductor device of the present invention, the stacked body composed of the two semiconductor elements is stacked on the upper surface side of the substrate in a direction perpendicular to the upper surface of the substrate, so that stacking can be realized and the mounting can be performed as compared with the conventional case. The ratio of the area can be increased. Also, since the mounting substrate can be made small, the device can be made compact.

  Further, since the substrate is provided with an opening for accommodating a part of the stacked body, the mounting height can be reduced.

  Further, one semiconductor element of the stacked body and the wiring portion of the substrate are firmly connected using the second conductive bump. Since the second conductive bump is used as described above, a plurality of connection portions can be simultaneously bonded by one operation by thermocompression bonding. Therefore, work efficiency is improved.

  Further, since two sets of stacks are provided and these stacks are stacked while being insulated from each other, it is possible to further increase the ratio of the mounting area as compared with the case where two semiconductor elements are stacked.

Further, according to the method of manufacturing a semiconductor device of the present invention, the two semiconductor elements are joined to each other by thermocompression bonding via the first conductive bumps. For this reason, it is possible to join a plurality of places in one process, and the work efficiency is improved.

  One semiconductor element of the stack and the substrate are electrically connected to each other using the second conductive bump. For this reason, for example, since both can be bonded via the second conductive bumps by a thermocompression bonding method or a heating method, bonding can be performed at a plurality of locations in one process.

Hereinafter, embodiments of a semiconductor device and a method of manufacturing the same according to the present invention will be described with reference to the drawings. It should be noted that the drawings merely schematically show the size, shape and arrangement of each component to the extent that the present invention can be understood, and therefore, the present invention is not limited to the illustrated examples. Absent. In this embodiment, a BGA type semiconductor device will be described as an example of a semiconductor device.

[Structure of BGA type semiconductor device of first embodiment]
With reference to FIG. 1, the main structure of the BGA type semiconductor device according to the first embodiment of the present invention will be described. FIG. 1 is a cross-sectional view illustrating the structure of the BGA type semiconductor device according to the first embodiment.

In the first embodiment, a stacked body including a substrate 10 and two semiconductor elements 16 and 18 stacked on the upper surface of the substrate 10, that is, on the first surface side in a direction perpendicular to the upper surface of the substrate 10. It has 100. Then, the two semiconductor elements 16 and 18
They are electrically firmly connected to each other via the conductive bumps 20. Here, one semiconductor element 16 is called a first semiconductor element, and the other semiconductor element 18 is called a second semiconductor element.

In the first embodiment, a printed wiring board is used as the board 10. This substrate 1
As for 0, wiring (for example, copper (Cu) wiring) 14 is formed on the surface of the insulating plate 12 as is well known, and the upper wiring 14a of the wiring 14, that is, the first wiring and the lower wiring 14b, that is, The second wiring is connected by the wiring 14c of the through-hole portion 15, that is, the third wiring. A groove 17 for accommodating a part of the stack 100, that is, an opening is formed on the upper surface of the substrate 10, that is, the first surface. It is preferable that the depth of the groove 17 be somewhat larger than the value obtained by adding the thickness of the second semiconductor element 18 and the height of the first conductive bump 20. The reason is that when the depth of the groove is too small, when the first semiconductor element 16 is connected to the substrate, the second semiconductor element 18 hits the bottom surface of the groove 17 so that the two are not connected and the first semiconductor element 16 is not connected. This is for the purpose of preventing from floating from the substrate 10.

Further, the surface of the substrate 10, that is, the first surface and the back surface, that is, the region other than the bonding portion of the wiring 14 with the second metal bump and the bonding portion with the external electrode on the second surface is covered with the solder resist 24.
It is covered with.

  In the first embodiment, the two semiconductor elements 16 and 18, that is, the first and second semiconductor elements are stacked in a direction perpendicular to the upper surface of the substrate 10.

Further, the first semiconductor element 16 is provided with a plurality of electrodes 30, that is, a first electrode, and the second semiconductor element 18 is also provided with a plurality of electrodes 32, that is, a second electrode. . Then, the surface other than the electrode 30 of the first semiconductor element 16 and the electrode 32 of the second semiconductor element 18 is covered with a protective film (passivation (PV) film) 19.

  The electrode 30 of the first semiconductor element 16 and the electrode 32 of the second semiconductor element 18 are electrically and firmly connected via the first conductive bumps 20, respectively. Here, the electrodes 30 and 32 of the first and second semiconductor elements and the first conductive bump 20 are joined by thermocompression bonding.

  A plurality of, in this example, six, first conductive bumps 20 are provided between the first semiconductor element 16 and the second semiconductor element 18. The first conductive bumps 20 are, for example, solder (Sn-Pb) bumps. Here, the first conductive bumps 20 are solder bumps. Instead of the solder bumps, gold (Au) bumps, Al bumps, copper (Cu) bumps, and Ag-Sn bumps, which are generally well known, are used. Alternatively, an anisotropic conductor bump may be used. In this embodiment, the first conductive bumps 20 are also referred to as first metal bumps.

  Further, a plurality of second conductive bumps 22 are provided on the electrodes 34 and 36 in one and the other outer peripheral regions of the first semiconductor element 16. Here, an example in which two second conductive bumps 22 are connected is shown. The material of the second conductive bumps 22 is the same material (solder) as the first metal bumps 20 described above. Here, the second conductive bumps 22 are also referred to as second metal bumps.

  In the first embodiment, the second metal bump 22 is bonded to the upper surface wiring 14a of the substrate 10 by thermocompression. Therefore, the first semiconductor element 16 and the substrate 10 are electrically connected.

  Further, in this BGA type semiconductor device, a sealing resin 26 is provided in order to protect the first and second semiconductor elements 16 and 18 from the external environment as in the conventional case.

An external electrode 28 is provided on the lower surface wiring 14 b of the substrate 10, that is, on the lower surface of the substrate 10. Here, a metal bump is used as the external electrode 28.

[Method of Manufacturing Semiconductor Device of First Embodiment]
Next, a method of manufacturing the BGA type semiconductor device according to the first embodiment will be described with reference to FIGS. 2 (A), (B) and (C) of FIG.
FIG. 10 is a view showing a cross section for explaining the manufacturing method of the BGA type semiconductor device of the embodiment.

  First, metal bumps 20 and 22 are formed on the electrodes 30, 34 and 36 on the first semiconductor element 16. Thereafter, the first semiconductor element 16 and the second semiconductor element 18 are crossed, and the metal bump 20 on the electrode 30 side of the first semiconductor element 16 and the electrode 32 side of the second semiconductor element 18 are made to face each other (( A)). Thereafter, the metal bumps 20 of the first semiconductor element 16 and the electrodes 32 of the second semiconductor element 18 are simultaneously bonded in one process by thermocompression bonding (FIG. 2B).

  Such a method of bonding the first and second semiconductor elements 16 and 18 to each other by thermocompression bonding is herein referred to as chip-chip (Chip-Chip) bonding.

  In this embodiment, six first metal bumps 20 and two second metal bumps 22 are formed. A protective film (PV film) 19 is formed on the surface of the first semiconductor element 16 on the electrode 20 side and on the surface of the second semiconductor element 18 on the electrode 32 side.

  Next, the second metal bumps 22 and the substrate 10 are electrically joined by, for example, a thermocompression bonding method (FIG. 2C). Such a process is called flip-chip bonding.

  In the first embodiment, a groove 17 for inserting a part of the stack 100 is formed in a part of the upper surface of the substrate 10 by milling, for example. Here, the depth of the groove 17 is set so that the second semiconductor element 18 does not contact the bottom surface of the groove 17, and the size of the groove 17 (length and width of the groove 17) is determined by the second semiconductor element 18. It is formed in a size that can be stored.

  Next, the second semiconductor element 18 is housed in the groove 17, and the second metal bump 22 of the first semiconductor element 16 is mounted on the wiring 14 of the substrate 10. Thereafter, the second metal bumps 22 and the wirings 14 are electrically joined by a thermocompression bonding method. Here, the connection between the second metal bumps 22 and the wirings 14 is performed using a thermocompression bonding method, but may be performed using a spot laser heating method or a reflow atmosphere heating method.

  Next, the stacked body 100 is sealed using a sealing resin (for example, epoxy resin) (not shown). Thereafter, a metal bump (not shown) is bonded to the wiring 14 on the back surface of the substrate 10 by using, for example, a bump mounting reflow atmosphere heating method. In addition, a solder resist 24 is formed in advance on a portion other than the metal bump attachment portion of the wiring 14 of the substrate 10.

  Through the above-described steps, the BGA type semiconductor device of the first embodiment is completed.

  According to the BGA type semiconductor device structure of the first embodiment, since the stacked body 100 including the first and second semiconductor elements 16 and 18 is mounted on the upper side of the substrate 10, stacking can be realized and As compared with the above, the ratio of the mounting area can be increased. That is, although the number of semiconductor elements is one in the past, in this embodiment, since two semiconductor elements are overlapped, the ratio of the mounting area is doubled.

  Further, since the substrate 10 is provided with the groove 17 to accommodate a part of the stacked body 100, the mounting height can be reduced.

Further, according to the method for manufacturing this device, the first semiconductor element 16 and the second semiconductor element 18 are joined by thermocompression bonding via the first metal bumps 20. Therefore, a plurality of connection portions can be electrically joined in one operation step, so that the operation efficiency is improved.

[Structure of BGA type semiconductor device of reference example]
A BGA type semiconductor device according to a reference example will be described with reference to FIG. FIG. 3 is a cross-sectional view for explaining the main structure of the BGA type semiconductor device of the reference example.

In this example, the electrodes 34 and 36 of the first semiconductor element 16 and the wiring 14 of the substrate 10 are connected by using the point that the stacked body 100 is directly mounted on the upper surface of the substrate 10 and the conductive wires 39. This is different from the first embodiment.

  In this example, the solder resist 24 is formed on the upper surface of the substrate 10 except for the connection wiring portion. On the solder resist 24, the above-described stacked body 100 is firmly bonded via an insulating layer 38. Here, an adhesive is used for the insulating layer 38.

  Further, the electrodes 34 and 36 of the first semiconductor element 16 and the wiring 14 of the substrate 10 are connected using conductive wires 39, respectively. Here, for example, a bonding wire is used as the conductive wire. The other configuration is the same as the configuration of the first embodiment, and the detailed description is omitted here.

Next, when the BGA type semiconductor device of this example is mounted, first, a solder resist 24 is formed on the upper surface of the substrate 10 except for the wiring 14 at a portion to which the stacked body 100 is connected.

  Next, an adhesive is applied onto the solder resist 24, and a stacked body including the first and second semiconductor elements 16 and 18 formed on the solder resist 24 by the same method as in the above-described first embodiment. 100 is adhered. At this time, the first semiconductor element 16 is disposed on the substrate 10 side, that is, on the lower side.

  After bonding the first semiconductor element 16 and the solder resist 24, the electrodes 34 and 36 of the first semiconductor element 16 and the wiring 14 of the substrate 10 are electrically connected by the bonding wires 39. Subsequent steps are performed in the same manner as the steps of the first embodiment.

In this example, the stacked body 100 including the first and second semiconductor elements 16 and 18 is directly adhered to the upper side of the substrate 10, so that the ratio of the mounting area is increased as compared with the related art, and the first embodiment is performed. Since there is no need to form the groove 17 in the substrate 10 unlike the embodiment, there is an advantage that the thickness of the substrate 10 can be reduced.

[Structure of BGA type semiconductor device of second embodiment]
Next, a main structure of a BGA type semiconductor device according to a second embodiment of the present invention will be described with reference to FIGS. FIG. 4 is a perspective view for explaining a main structure of the BGA type semiconductor device according to the second embodiment, and FIG. 5 is a cross-sectional view taken along a line XX in FIG. It is a figure showing a section. FIG. 4 shows the internal configuration of the apparatus transparently for clarity.

In this example, two stacked bodies 100 and 200 are vertically stacked on the upper surface of the substrate 10. That is, here, in addition to the stack 100 described above, another stack 200 is provided. In this example, one stack 100 is referred to as a first stack, and the other stack 200 is referred to as a second stack.

  In the second stacked body 200, the third semiconductor element 40 and the fourth semiconductor element 42 are orthogonally coupled. A third metal bump 44 is used for coupling the two 40 and 42. The first semiconductor element 16 and the third semiconductor element 40 are firmly fixed (joined) using an adhesive 46 in a state where they are insulated from each other.

  Further, the first semiconductor element 16 and the wiring 14 of the substrate 10 are electrically connected via the second metal bump 22 as in the first embodiment.

  Further, the electrodes 48 and 50 of the third semiconductor element 40 and the wiring 14 of the substrate 10 are connected by bonding wires 39. Other configurations are the same as those of the first embodiment. Therefore, detailed description is omitted here.

[Manufacturing method according to second embodiment]
Next, a method of manufacturing a BGA type semiconductor device according to a second embodiment of the present invention will be described with reference to FIGS. 6A and 6B, and FIGS. 7A and 7B
FIGS. 8A and 8B are process diagrams for describing a method of manufacturing the BGA type semiconductor device according to the second embodiment.

In the second embodiment, a PV film 19 is formed in a region other than the electrodes 30, 34, and 36 of the first semiconductor element 16 in advance, and a PV film 19 is formed in a region other than the electrode 32 of the second semiconductor element 18 in advance. 1
9 is formed in advance. In addition, the first semiconductor element 16 has the first
A metal bump 20 and a second metal bump 22 are formed in advance.

Next, in a Chip-Chip bonding step, the first semiconductor element 16 and the second semiconductor element 18 are first attached to the first metal bump 2 in the same manner as in the manufacturing method of the first embodiment described above.
0 and cross each other and joined by thermocompression bonding. Thus, the first semiconductor element 1
6 and the second semiconductor element 18 are formed (FIG. 6A).
.

Next, in a flip-chip bonding step, the second metal bumps 22 provided on the electrodes 34 and 36 of the first semiconductor element 16 and the wiring 14 of the substrate 10 are connected by a thermocompression bonding method or the like (see FIG. )). In this example, a groove 17 for accommodating a part of the first stack 100 is formed in the substrate 10. The steps up to this point are the same as in the first embodiment.

  Next, the third semiconductor element 40 and the fourth semiconductor element 42 are joined by thermocompression bonding using the third metal bumps 44 formed on the electrodes 47 of the third semiconductor element 40 in advance. Also at this time, the PV film 19 is formed on one surface of the third and fourth semiconductor elements 40 and 42 other than the bonding surfaces of the electrodes 43, 47, 48 and 50 in advance.

  Next, the third semiconductor element 40 and the fourth semiconductor element 42 are joined to cross each other. In this way, a second stacked body 200 including the third semiconductor element 40 and the fourth semiconductor element 42 is formed (FIG. 7A).

Next, on the upper surface of the first semiconductor element 16, the second stacked body 200 is insulated from each other,
Stack and firmly bond (FIG. 7B). In this example, the first semiconductor element 1
The adhesive 46 is applied to the upper surface of the sixth stack 6, and thereafter, the third semiconductor element 40 and the first semiconductor element 16 of the second stack 200 are bonded to each other.

  Next, in a wire bonding step, the electrodes 48 and 50 of the third semiconductor element 40 are electrically connected to the wirings 14 of the substrate 10 using the bonding wires 39 (FIG. 8A). Here, the solder resist 24 is previously formed in a region other than the connection portion between the second metal bump 22 and the bonding wire 39 of the wiring 14 of the substrate 10.

The following steps are performed by a known technique. That is, the sealing resin 26 is formed on the substrate 10 so as to cover the first and second stacked bodies 100 and 200 (FIG. 8B). Thereafter, a metal bump (FIG. 5) is bonded to the wiring 14 formed on the back surface of the substrate 10 by, for example, thermocompression bonding. Through the series of steps described above, the BGA type semiconductor device of this example is completed.

In this example, first, second, third, and fourth semiconductor elements 16, 18,
Since 40 and 42 are stacked, the ratio of the mounting area is further increased as compared with the first embodiment and the first reference example. That is, in this case, since four semiconductor elements are stacked, the ratio of the mounting area is about four times as compared with the conventional case. Further, since the groove 17 is formed in the substrate 10, the mounting height is reduced. Also, the first semiconductor element 16 and the substrate 10,
In addition, the third semiconductor element 40 and the substrate 10 are electrically isolated and individually connected. That is, in each of the stacked bodies, the first semiconductor element 16 is electrically connected to the substrate 10 inside the through-hole portion 15 via the second metal bump 22 with the solder resist 24 interposed therebetween. A third semiconductor element 40 is electrically connected via a bonding wire 39 on the substrate 10 outside the substrate. Therefore, the first and second stacks 100 and 200
Can be individually driven.

In the example described above, a BGA type semiconductor device has been described as an example, but the present invention is not limited to this semiconductor device at all, and a COB (chip-on-board:
It can also be applied to Chip on Board mounting or bare chip mounting.

FIG. 3 is a cross-sectional view used for describing a configuration example of a semiconductor device. 6A to 6C are cross-sectional views for explaining a method for manufacturing a semiconductor device. FIG. 3 is a cross-sectional view used for describing a configuration example of a semiconductor device. FIG. 4 is a perspective view provided for describing a configuration example of a semiconductor device. FIG. 3 is a cross-sectional view used for describing a configuration example of a semiconductor device. (A)-(B) is a manufacturing process diagram provided for explaining a method of manufacturing a semiconductor device. (A)-(B) is a manufacturing process figure following FIG. (A)-(B) is a manufacturing process figure following FIG.

Explanation of reference numerals

10: Printed wiring board 12: Insulating plate 14: Wiring 15: Through hole 16: First semiconductor element 17: Groove 18: Second semiconductor element 20: First metal bump 22: Second metal bump 24: Solder resist 26: Sealing resin 28: External electrode 30, 32, 34, 36, 43, 47, 48, 50: Electrode 38: Adhesive 39: Bonding wire 40: Third semiconductor element 42: Fourth semiconductor element 44: Third metal bump 46: adhesive 100: first stack 200: second stack

Claims (12)

A first surface, a second surface facing the first surface, and a through hole penetrating from the first surface to the second surface, wherein the through hole is provided on the second surface. A substrate provided with a plurality of external electrodes separated from the hole,
A first semiconductor element having a first main surface on which a plurality of first electrodes are formed;
A second semiconductor element having a second main surface on which a plurality of second electrodes are formed,
An opening for accommodating the second semiconductor element is provided on the first surface side of the substrate;
The first semiconductor element is mounted on the substrate such that the first main surface faces the first surface of the substrate and covers the opening.
The second semiconductor element is mounted on the first semiconductor element such that the second main surface faces the first main surface of the first semiconductor element, and is housed in the opening. ,
A first wiring that is electrically connected to the first electrode of the first semiconductor element is provided on the first surface of the substrate;
A second wiring electrically connected to the external electrode is provided on the second surface of the substrate,
A third wiring is provided in the through hole,
The semiconductor device according to claim 1, wherein the first wiring and the second wiring are electrically connected by the third wiring.   A part of the plurality of first electrodes of the first semiconductor element is connected to the first wiring by a second conductive bump, and a remaining part of the plurality of first electrodes is The semiconductor device according to claim 1, wherein the first conductive bump is electrically connected to the second electrode of the second semiconductor element.   The semiconductor device according to claim 1, wherein the opening is sealed with a resin.   The semiconductor device according to claim 1, wherein the first and second semiconductor elements are sealed with a resin.   The semiconductor device according to claim 1, wherein the second semiconductor element is housed in the opening so as to be separated from a bottom surface of the opening.   The depth of the opening part is larger than the total of the thickness of the second semiconductor element and the thickness of the first conductive bump, The depth according to any one of claims 2 to 5, wherein 13. The semiconductor device according to claim 1.   The semiconductor device according to claim 1, wherein the first semiconductor element has a protective film exposing the first electrode.   The semiconductor device according to claim 1, wherein the second semiconductor element has a protective film exposing the second electrode. A first surface, a second surface facing the first surface, an opening provided in the first surface, a through-hole penetrating from the first surface to the second surface. A first wiring provided in a region of the first surface where the opening is not provided, a second wiring provided in the second surface, and provided in the through hole; A third wiring connecting the first and second wirings, and a substrate having an external electrode connected to the second wiring apart from the through hole;
A first semiconductor element connected to the first wiring and mounted on the substrate by a second conductive bump;
A semiconductor device, comprising: a second semiconductor element mounted on the first semiconductor element by a first conductive bump and disposed in the opening of the substrate.   The semiconductor device according to claim 9, wherein the first and second semiconductor elements are sealed with a resin. A first surface, a second surface facing the first surface, an opening provided in the first surface, a through-hole penetrating from the first surface to the second surface. A first wiring provided in a region of the first surface where the opening is not provided, a second wiring provided in the second surface, and provided in the through hole; A third wiring connecting the first and second wirings, and a substrate having an external electrode connected to the second wiring apart from the through hole;
A first semiconductor element connected to the first wiring by a second conductive bump and mounted over the opening of the substrate, the first semiconductor by a first conductive bump; A first stack having a second semiconductor element mounted on the element and disposed in the opening of the substrate;
A third semiconductor element mounted on the first semiconductor element and a third conductive bump;
A second stack having a fourth semiconductor element mounted on the third semiconductor element;
A semiconductor device comprising: an electrode of the third semiconductor element to which the third conductive bump is not connected; and a bonding wire for electrically connecting the first wiring of the substrate.   The semiconductor device according to claim 11, wherein the first, second, third, and fourth semiconductor elements are sealed with a resin.

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