JP2004342754A - Method and device for detecting timing of cleaning and semiconductor manufacturing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To detect the timing of cleaning that is carried out in a semiconductor processing chamber with high accuracy. <P>SOLUTION: A voltage is applied to a resistance wire 7 arranged in a processing chamber 3, the resistance of the resistance wire is calculated from the value of a current flowing through the resistance wire, and then the timing of cleaning is determined in accordance with the correlation of the resistance value of the resistance wire with the thickness of a film attached to the inner wall of the processing chamber. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a cleaning processing timing detection method, a cleaning processing timing detection device, and a semiconductor manufacturing apparatus. More specifically, the present invention relates to a method for detecting a timing of a cleaning process for detecting a timing of a cleaning process for a semiconductor processing chamber, a device for detecting a timing of a cleaning process, and a semiconductor manufacturing apparatus.
[0002]
[Prior art]
In the manufacture of semiconductors, generally, a film is formed on a wafer or an etching process is performed using a plasma processing apparatus such as an etching apparatus or a plasma CVD apparatus.
[0003]
By the way, when a plasma is generated using a plasma CVD apparatus and an SiO2 film or the like is formed on the wafer surface, the film adheres and deposits on the inner wall of the chamber. Conventionally, the film adhered to the inner wall of the chamber is easily peeled off when the film thickness exceeds a certain thickness. Each time the number of processed wafers reaches a predetermined number, or every time a predetermined processing time elapses, the inside of the chamber is cleaned by plasma cleaning means to remove a film in the chamber and suppress generation of dust. I have.
[0004]
However, the film deposition rate of the film deposited on the inner wall of the chamber is not constant depending on the process conditions and the state of the plasma CVD apparatus, and the amount of the film deposited on the inner wall of the chamber is not constant even after a certain period of time. In fact, excessive cleaning was performed to prevent the generation of dust.
[0005]
Conventionally, in order to cope with such a problem that it is necessary to perform excessive cleaning, a transmission window is provided in a linear arrangement on each of opposite wall surfaces of a chamber in a plasma processing apparatus. A plasma processing apparatus that emits laser light from the other transmission window to the other transmission window and detects the light intensity of the laser light emitted from the other transmission window to detect a cleaning processing timing of the film attached to the chamber wall. Has been proposed (for example, see Patent Document 1).
[0006]
[Patent Document 1]
JP-A-11-140655 (Page 3-5, FIG. 1)
[0007]
[Problems to be solved by the invention]
However, for example, when a highly corrosive gas such as hydrogen bromide for etching ITO (indium-tin-based transparent electrode film) is used, the transmission window through which the laser enters and exits becomes cloudy, and the desired value is obtained. As described above, it is difficult to input a laser into the chamber, and similarly, it is also difficult to detect the light emitted from the inside of the chamber. Therefore, it is difficult to accurately measure the film attached to the chamber wall. there were. That is, it has been difficult to accurately detect the timing of the cleaning process of the film attached to the chamber wall.
[0008]
SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and provides a method for detecting a cleaning process timing, a device for detecting a cleaning process timing, and a semiconductor device capable of accurately detecting a cleaning process timing in a semiconductor processing chamber. The purpose is to provide.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, a method of detecting a cleaning process timing according to the present invention is a method of detecting a timing of a cleaning process in a semiconductor processing chamber, the method comprising the steps of: And a step of determining the timing of the cleaning process in accordance with the correlation between the resistance value of the resistance wire and the thickness of the film deposited inside the semiconductor processing chamber.
[0010]
Here, the timing of the cleaning process can be accurately detected by determining the timing of the cleaning process in accordance with the correlation between the resistance value of the resistance wire and the thickness of the film deposited inside the semiconductor processing chamber.
[0011]
The method for detecting a cleaning process timing according to the present invention is the method for detecting a timing of a cleaning process for a semiconductor processing chamber, the method comprising: measuring a current flowing through a resistance wire disposed inside the semiconductor processing chamber. And determining the timing of the cleaning process according to the correlation between the current value flowing through the resistance wire and the degree of vacuum in the semiconductor processing chamber.
[0012]
Here, the timing of the cleaning process can be accurately detected by determining the timing of the cleaning process according to the correlation between the current value flowing through the resistance wire and the degree of vacuum in the semiconductor processing chamber.
[0013]
According to another aspect of the present invention, there is provided a cleaning processing timing detecting apparatus for detecting a cleaning processing timing of a semiconductor processing chamber. And a calculating means for calculating the resistance value of the resistance wire and determining the timing of the cleaning process in accordance with the correlation between the resistance value of the resistance wire and the thickness of the film deposited inside the semiconductor processing chamber. Prepare.
[0014]
Here, while calculating the resistance value of the resistance wire, the timing of the cleaning process is determined by an arithmetic unit that determines the timing of the cleaning process according to the correlation between the resistance value of the resistance wire and the thickness of the film deposited inside the semiconductor processing chamber. Can be accurately detected.
[0015]
According to the cleaning processing timing detection device of the present invention, in the cleaning processing timing detection device for detecting the cleaning processing timing of the semiconductor processing chamber, a resistance line disposed inside the semiconductor processing chamber and a current flowing through the resistance line are provided. And a calculating means for determining the timing of the cleaning process according to the correlation between the value of the current flowing through the resistance wire and the degree of vacuum in the semiconductor processing chamber.
[0016]
Here, the timing of the cleaning process can be accurately detected by the arithmetic unit that determines the timing of the cleaning process according to the correlation between the current value flowing through the resistance wire and the degree of vacuum in the semiconductor processing chamber.
[0017]
In order to achieve the above object, a semiconductor manufacturing apparatus according to the present invention includes a semiconductor processing chamber, a resistance wire disposed inside the semiconductor processing chamber, and a resistance value of the resistance wire. A cleaning processing timing detecting device having a calculating means for determining a timing of the cleaning processing in accordance with a correlation between the resistance value of the line and the film thickness of the film adhered inside the semiconductor processing chamber.
[0018]
Here, the resistance value of the resistance wire disposed inside the semiconductor processing chamber and the resistance value of the resistance wire are calculated, and the cleaning process is performed according to the correlation between the resistance value of the resistance wire and the thickness of the film attached to the inside of the semiconductor processing chamber. The timing of the cleaning processing can be accurately detected by the cleaning processing timing detecting device having the calculating means for determining the timing.
[0019]
Further, the semiconductor manufacturing apparatus of the present invention includes a semiconductor processing chamber, a resistance wire disposed inside the semiconductor processing chamber, an ammeter for measuring a current flowing through the resistance wire, a current value flowing through the resistance wire, An operation means for determining a timing of the cleaning process in accordance with a correlation with the degree of vacuum in the semiconductor processing chamber.
[0020]
Here, a resistance wire disposed inside the semiconductor processing chamber, an ammeter for measuring the current flowing through the resistance wire, and the timing of the cleaning process according to the correlation between the current value flowing through the resistance wire and the degree of vacuum in the semiconductor processing chamber. The timing of the cleaning processing can be accurately detected by the cleaning processing timing detection device having the determining means.
[0021]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a schematic diagram for explaining an example of a parallel plate type reactive ion etching apparatus (hereinafter referred to as an RIE apparatus) which is an example of a semiconductor manufacturing apparatus to which the present invention is applied. The apparatus 1 is configured such that a reaction gas is introduced by a gas supply unit 4 into a process chamber 3 evacuated by an exhaust unit 2. Further, a lower electrode 6 is mounted in the process chamber via an insulating material 5 so as to maintain insulation from the metal process chamber.
Further, a resistance wire 7 is disposed in the process chamber, and a current flowing when a voltage is applied from the power supply 8 to the resistance wire is measured by an ammeter 9, and the resistance of the resistance wire is calculated from the current value measured by the ammeter. Calculation means 10 is provided for calculating the value and detecting the timing of the cleaning process based on the calculated resistance value.
[0022]
In the RIE apparatus configured as described above, when plasma etching is performed using the corrosive gas supplied from the gas supply unit, the reaction product adheres to the inner wall of the process chamber and simultaneously the resistance wire disposed in the process chamber. The timing of the cleaning process can be detected by the calculating means based on the correlation between the resistance value of the resistance wire measured in advance and the thickness of the reaction product adhering to the inner wall of the process chamber. .
That is, when the resistance wire is initially placed in the process chamber, the resistance wire shows a predetermined resistance value because molecules in the process chamber collide with the surface of the resistance wire. Reaction products adhere to the wire, reducing the number of times molecules in the process chamber directly impact the surface of the wire and increasing the resistance of the wire. Therefore, by previously measuring the correlation between the resistance value of the resistance wire and the film thickness of the reaction product adhering to the inner wall of the process chamber, the reaction product adhering to the inner wall of the process chamber is calculated from the calculated resistance value of the resistance wire. Since the film thickness of the object can be ascertained, the timing of the cleaning process can be detected.
[0023]
FIG. 2 is a schematic diagram for explaining another example of the parallel plate type RIE apparatus which is another example of the semiconductor manufacturing apparatus to which the present invention is applied. The RIE apparatus shown here is the same as the RIE apparatus described above. Similarly to the example, the reaction chamber is configured so that the reaction gas is introduced by the gas supply unit into the process chamber evacuated by the exhaust unit, and the lower electrode is attached to the process chamber via an insulating film. I have.
In addition, the resistance wire 7 is arranged in the process chamber, and three external resistance wires 11 are arranged outside the process chamber. A Wheatstone bridge circuit is formed by the resistance wire, the external resistance wire, and the galvanometer 12. .
[0024]
In the RIE apparatus configured as described above, since a Wheatstone bridge circuit is formed, a trace amount of a reaction product adheres to the resistance wire disposed in the process chamber by performing plasma etching, and the resistance value is reduced. Can be accurately detected by the galvanometer even if the value fluctuates slightly, so that the cleaning processing timing can be detected more accurately.
[0025]
FIG. 3 is a schematic diagram for explaining still another example of the parallel plate type RIE apparatus of the semiconductor manufacturing apparatus to which the present invention is applied. The RIE apparatus shown here is an example of the above-described RIE apparatus and RIE. As in another example of the apparatus, a reaction gas is introduced by a gas supply unit into a process chamber evacuated by an exhaust unit, and a lower electrode is provided in the process chamber via an insulating film. Installed. Further, similarly to another example of the above-described RIE apparatus, a Wheatstone bridge circuit is formed by a resistance wire, an external resistance wire, and a galvanometer.
Further, a Baratron vacuum gauge 13 for measuring the degree of vacuum in the process chamber, which is hardly affected by a reaction product attached in the process chamber, is provided.
[0026]
In the RIE apparatus configured as described above, before plasma etching is performed, that is, in a state where no reaction product is attached to the resistance wire, the degree of vacuum in the process chamber as shown in FIG. By obtaining a correlation with the current value flowing through the resistance wire arranged in the process chamber, a reaction product adheres to the resistance wire arranged in the process chamber by performing plasma etching, and the resistance is reduced as described above. By grasping the timing when the resistance value of the wire rises and the correlation between the degree of vacuum in the process chamber and the current value flowing through the resistance wire is lost, the timing of the cleaning process can be detected by the arithmetic means.
[0027]
Here, in the above description, the process chamber of the RIE apparatus has been described as an example of the semiconductor processing chamber. However, the semiconductor processing chamber for detecting the timing of the cleaning process is not limited to the process chamber, and cleaning is required. Any area may be used as long as it is a region, for example, a load lock chamber for loading and unloading a substrate to be subjected to an etching process or the like in a process chamber, a substrate transfer chamber connecting the load lock chamber and the process chamber, No problem.
[0028]
Further, the resistance wire may be of any type as long as the value of a current flowing by applying a voltage can be measured, but the resistance wire arranged in the process chamber is not limited to the substrate in the process chamber. Particular attention must be paid to the use of a resistance wire made of a material that does not contaminate it.
[0029]
【The invention's effect】
As described above, the cleaning processing timing detecting method, the cleaning processing timing detecting device, and the semiconductor manufacturing apparatus according to the present invention can accurately detect the cleaning processing timing.
[0030]
Further, since the timing of the cleaning process can be accurately detected, excessive cleaning is not required, and the cleaning cycle can be optimized, so that productivity can be improved.
[0031]
Further, in the method for detecting a cleaning process timing, the device for detecting a cleaning process timing, and the semiconductor manufacturing apparatus according to the present invention, the timing of the cleaning process is detected by applying a voltage to a resistance wire and detecting a current flowing through the resistance wire. The timing of the cleaning process can be detected without using expensive equipment such as a mass spectrometer.
[Brief description of the drawings]
FIG. 1 is a schematic diagram illustrating an example of an RIE apparatus to which the present invention is applied.
FIG. 2 is a schematic diagram for explaining another example of the RIE apparatus to which the present invention is applied.
FIG. 3 is a schematic diagram for explaining still another example of the RIE apparatus to which the present invention is applied.
FIG. 4 is a graph showing a correlation between a degree of vacuum in a process chamber and a current value flowing through a resistance wire.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 RIE apparatus 2 Exhaust means 3 Process chamber 4 Gas supply means 5 Insulation material 6 Lower electrode 7 Resistance wire 8 Power supply 9 Ammeter 10 Calculation means 11 External resistance wire 12 Galvanometer 13 Baratron vacuum gauge

Claims (9)

In a method for detecting a timing of a cleaning process for detecting a timing of a cleaning process of a semiconductor processing chamber,
Calculating a resistance value of a resistance wire disposed inside the semiconductor processing chamber;
Determining a timing of a cleaning process in accordance with a correlation between the resistance value of the resistance wire and a thickness of a film adhered to the inside of the semiconductor processing chamber. In a method for detecting a timing of a cleaning process for detecting a timing of a cleaning process of a semiconductor processing chamber,
Measuring a current flowing through a resistance wire disposed inside the semiconductor processing chamber;
A method for detecting a timing of a cleaning process, comprising a step of determining a timing of a cleaning process according to a correlation between a current value flowing through the resistance wire and a degree of vacuum in the semiconductor processing chamber. The change in the resistance value of the resistance wire is detected using a galvanometer connected to a Wheatstone bridge circuit configured by the resistance wire and a resistor disposed outside the semiconductor processing chamber. 3. The method of detecting a cleaning process timing according to claim 1 or 2. In a cleaning processing timing detection device that detects the timing of cleaning processing of a semiconductor processing chamber,
A resistance wire disposed inside the semiconductor processing chamber;
Calculating means for calculating a resistance value of the resistance wire and determining a timing of a cleaning process according to a correlation between the resistance value of the resistance wire and a film thickness of a film adhered inside the semiconductor processing chamber. Characteristic cleaning device detection device. In a cleaning processing timing detection device that detects the timing of cleaning processing of a semiconductor processing chamber,
A resistance wire disposed inside the semiconductor processing chamber;
An ammeter for measuring a current flowing through the resistance wire;
A cleaning processing timing detecting device, comprising: a calculating unit that determines a cleaning processing timing according to a correlation between a current value flowing through the resistance wire and a degree of vacuum in the semiconductor processing chamber. 6. The cleaning processing timing detecting device according to claim 4, wherein the resistance wire forms a Wheatstone bridge circuit together with a resistor disposed outside the semiconductor processing chamber. A semiconductor processing room;
A resistance wire disposed inside the semiconductor processing chamber and a resistance value of the resistance wire are calculated, and cleaning is performed according to a correlation between the resistance value of the resistance wire and a film thickness of a film attached to the inside of the semiconductor processing chamber. A semiconductor manufacturing apparatus, comprising: a cleaning processing timing detection device having a processing means for determining processing timing. A semiconductor processing room;
A resistance wire disposed inside the semiconductor processing chamber, an ammeter for measuring a current flowing through the resistance wire, and a timing of a cleaning process according to a correlation between a current value flowing through the resistance wire and a degree of vacuum in the semiconductor processing chamber. A semiconductor manufacturing apparatus comprising: a cleaning processing timing detection device having a calculation means for determining the timing. 9. The semiconductor manufacturing apparatus according to claim 7, wherein the resistance wire forms a Wheatstone bridge circuit together with a resistance disposed outside the semiconductor processing chamber.

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