JP2004320377A - Ofdm receiver and its controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the power consumption of a low noise amplifier LNA, a frequency converter CV, an intermediate frequency amplifier IFA and a local oscillator LO forming a tuner, an A/D converter ADC, etc. to cut the power consumption of the entire receiver without deteriorating the receiving performance of an OFDM receiver 1. <P>SOLUTION: The instantaneous C/N of a received signal is estimated to switch the operation mode to a low noise mode in a tuner according to the estimated instantaneous C/N of the received signal, when the instantaneous C/N deteriorates below a C/N threshold. If the instantaneous C/N does not deteriorate below the C/N threshold, the mode is switched to a power save mode in the tuner to reduce the power consumption of each part in the tuner. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【００３３】
（ａ）チューナー構成：省電力モードで働かせる場合は、切替えスイッチＳＷ１，２をチューナーＢ側に切替える。入力信号は、低雑音増幅器ＬＮＡを通らないで直接周波数変換器ＣＶに入るので利得は低くなるが、消費電力は小さくて済む。低雑音モードで働かせる場合は、切替えスイッチＳＷ１，２をチューナーＡ側に切替える。入力信号は、低雑音増幅器ＬＮＡを通るので、利得は高くなるが、消費電力は、比較的大きくなる。
【００３４】
（ｂ）低雑音増幅器ＬＮＡ：省電力モードで働かせる場合は、制御信号ＳＥＬ１をＨにして、入力端子・出力端子間をバイパスさせ低利得にすることもできる。低雑音モードで働かせる場合は、制御信号ＳＥＬ３をＨにしてトランジスタＱ３をオンする。これにより、負荷抵抗Ｒ３が接続され増幅率は比較的大きくなり、高利得になる。
（ｃ）中間周波増幅器ＩＦＡ：省電力モードで働かせる場合は、制御信号ＳＥＬ１をＨにして、入力端子・出力端子間をバイパスさせ低利得にする。低雑音モードで働かせる場合は、制御信号ＳＥＬ３をＨにしてトランジスタＱ７をオンする。これにより、負荷抵抗Ｒ５が接続され増幅率は比較的大きくなり、高利得になる。
【００３５】
（ｄ）局部発振器ＬＯ：省電力モードで働かせる場合は、プリスケーラ、可変分周器、位相比較器、基準発振器の電源をオフにし、切替えスイッチＳＷ３で、電圧制御型発振器ＶＣＯが、周波数オフセット値により周波数制御が行なわれるようにする。低雑音モードで働かせる場合は、プリスケーラ、可変分周器、位相比較器、基準発振器の電源をオンにし、切替えスイッチＳＷ３で位相比較器の出力により周波数制御が行なわれるようにする。
【００３６】
（ｅ）電圧制御型発振器ＶＣＯ：省電力モードで働かせる場合は、制御電圧信号Ｖｃｏｎｔ２を下げる。これにより、負荷電流Ｉが減り消費電力は小さくなるが、出力周波数信号に含まれる位相雑音は多くなる。低雑音モードで働かせる場合は、制御電圧信号Ｖｃｏｎｔ２を上げる。これにより、出力周波数信号に含まれる位相雑音は少なくなるが、負荷電流Ｉが増え消費電力は大きくなる。
（ｆ）Ａ／Ｄ変換器：省電力モードで働かせる場合は、制御信号ＰＤＮ１，ＰＤＮ２をＬにして、２ビット削減して８ビットで動作させる。これにより、消費電力は小さくなるが、変換の精度は低下する。低雑音モードで働かせる場合は、制御信号ＰＤＮ１，ＰＤＮ２をＨにして、すべてのステージを使って１０ビットで動作させる。これにより、変換精度は向上するが、消費電力は多くなる。
【００３７】
―モード選択基準―
次に、省電力モードと低雑音モードとの選択基準を説明する。
モード選択は、受信信号のＣ／Ｎ又は各サブチャンネルの変調方式若しくは伝送モード（シンボル長）に基づいて行う。
図１２は、受信信号の瞬時Ｃ／Ｎとビット誤り率との関係を示すグラフである。ビット誤り率が所要のしきい値以下であれば、後段の誤り訂正により実用上はエラーフリーの伝送が可能になる。
【００３８】
破線Ａは、チューナーＡを選択し、低雑音増幅器ＬＮＡを高利得に設定し、中間周波増幅器ＩＦＡを高利得に設定し、局部発振器ＬＯを高安定に設定し、電圧制御型発振器ＶＣＯの位相雑音が小さくなるように設定し、Ａ／Ｄ変換器をフルスケールに設定した場合の瞬時Ｃ／Ｎとビット誤り率の特性を示す。この条件を「低雑音モード」という。
破線Ｂは、チューナーＢを選択し、低雑音増幅器ＬＮＡを低利得に設定し、中間周波増幅器ＩＦＡを低利得に設定し、局部発振器ＬＯを低安定に設定し、電圧制御型発振器ＶＣＯの位相雑音が大きくなるように設定し、Ａ／Ｄ変換器をダウンスケールに設定した場合の瞬時Ｃ／Ｎとビット誤り率の特性を示す。この条件を「省電力モード」という。
【００３９】
省電力モードで、ビット誤り率が所要のしきい値と等しくなる瞬時Ｃ／ＮをＣ／Ｎ０で示している。受信機の伝搬路推定部４によって推定された瞬時Ｃ／ＮがＣ／Ｎ０以上となる領域では、低雑音モード、省電力モードのいずれを選択してもビット誤り率がしきい値以下となるので、消費電力の少ない省電力モードを選択する。瞬時Ｃ／ＮがＣ／Ｎ０以下となる領域では、省電力モードを選択するとビット誤り率がしきい値を超えるので、低雑音モードを選択する。
【００４０】
図１３は、変調方式、シンボル長と、動作モードとの関係を示すグラフである。変調多値数の少ないＱＰＳＫが選択された場合や、シンボル長として短いモード（２５０μｓ）が選択された場合は、図１３の白地で示すように、受信機を安定度は低いが消費電力の小さな省電力モードで動作させる。一方、変調多値数の多い６４ＱＡＭ又は長いシンボル長のモードが選択された場合は、図１３のクロスハッチングで示すように、局部発振器ＬＯを、消費電力は大きいが安定度の高い低雑音モードで動作させる。それ以外の図１３の破線ハッチングで示す領域では、省電力モード、低雑音モードのいずれかで動作させる。省電力モード、低雑音モードのどちらを選定するかは、実際に受信機を運用してから決定することが好ましい。
【００４１】
―切替えタイミング―
図１４は、モード切替えタイミングを説明するためのグラフである。図１４（ａ）は、伝搬路推定部４によって推定された瞬時Ｃ／Ｎの時間経過を示し、図１４（ａ）は、ＯＦＤＭ信号のガード期間ＧＩとシンボル期間ｄａｔａの関係を示す。
瞬時Ｃ／Ｎが閾値Ｃ／Ｎ０を越えた時点がシンボル期間中である場合、省電力モードに切替えるとデータの欠落が生じるおそれがあるので、図１４（ｃ）に示すように、次のガード期間ＧＩまで待って、省電力モードに切替える。瞬時Ｃ／Ｎが閾値Ｃ／Ｎ０を下回った時点がシンボル期間中である場合、低雑音モードに切替えるとデータの欠落が生じるおそれがあるので、図１４（ｃ）に示すように、次のガード期間ＧＩまで待って、低雑音モードに切替える。
【００４２】
このように、ガード期間中にモードを切替えることにより、データの連続性を保つことができる。
―モード切替えの効果―
図１５は、フェージング伝搬路における瞬時Ｃ／Ｎの変化と、瞬時消費電力との関係を模式的に示すグラフである。瞬時Ｃ／Ｎがしきい値Ｃ／Ｎ０を超える場合は省電力モードが選択され、瞬時Ｃ／Ｎがしきい値Ｃ／Ｎ０以下に低下した場合、低雑音モードに切替えられる。瞬時消費電力は、省電力モード時は低下し、低雑音モード時は上昇するが、瞬時Ｃ／Ｎは変動しており、しきい値Ｃ／Ｎ０以下なる時間率は１より低いので、平均的には、消費電力を削減することが可能となる。
【００４３】
以上で、本発明の実施の形態を説明したが、本発明の実施は、前記の形態に限定されるものではない。例えば、低雑音モード、省電力モードの２段階の切替え以外に、標準的な消費電力のモード（標準モード）を設定して、低雑音モード、標準モード、省電力モードの３段階に切替えることも考えられる。本発明では一般に、消費電力量に応じた複数段階のモードを設けることが可能である。その他、本発明の範囲内で種々の変更を施すことが可能である。
【００４４】
【実施例】
移動型のＯＦＤＭ受信機１を想定して、平均消費電力と、平均ビット誤り率のシミュレーションを行った。サブチャンネルの変調方式はＤＱＰＳＫとした。電波の伝搬路特性はレイリーフェージング型を仮定し、モード切替えの閾値Ｃ／Ｎ０を１０ｄＢとした。省電力モード時は、低雑音モード時の０．５倍の消費電力であるとした。
【００４５】
図１６は、平均の消費電力特性と、時間平均Ｃ／Ｎとの関係を示すグラフである。時間平均Ｃ／Ｎが高いほど省電力モードの時間率が高いため、平均の消費電力は省電力モードの消費電力に近くなっている。時間平均Ｃ／Ｎが低いほど低雑音モードの時間率が高いため、平均の消費電力は低雑音モードの消費電力に近くなっている。時間平均Ｃ／Ｎがモード切替えの閾値１０ｄＢであれば、省電力モード時と低雑音モード時との時間比率は０．５となるため、平均の消費電力は省電力モードの消費電力と低雑音モードの消費電力との中間の値になっている。
【００４６】
図１７は、平均ビット誤り率と、時間平均Ｃ／Ｎとの関係を示すグラフである。破線は、省電力モードのみで運用した場合の平均ビット誤り率、実線は低雑音モードのみで運用した場合の平均ビット誤り率を示す。点線は、モード切替えの閾値Ｃ／Ｎ０を１０ｄＢとして省電力モードと低雑音モードとを切替える本発明の方式を採用した場合の、平均ビット誤り率を示す。
グラフから分かるように、低雑音モードのみで運用した場合の平均ビット誤り率は、低雑音モードのみで運用した場合の平均ビット誤り率と比べて３ｄＢ劣化している。しかし、本発明の方式の平均ビット誤り率は、低雑音モードのみで運用した場合の平均ビット誤り率とほとんど変わりないことが分かる。
【００４７】
【発明の効果】
以上のように本発明によれば、受信特性が劣化するおそれのない場合は、チューナー部内を比較的消費電力は大きいが低雑音のモードから雑音は多くても比較的消費電力の少ないモードに切り替ることにより、チューナー部内各部の瞬時的な消費電力を抑制することができる。したがって、時間平均的にみても、チューナー部内の消費電力を低減し、これにより受信機全体の消費電力を削減することができる。
【図面の簡単な説明】
【図１】本実施の形態におけるＯＦＤＭ受信機１の構成を示すブロック図である。
【図２】ダイレクトコンバージョン切替え型のチューナー部２の詳細な構成を示すブロック図である。
【図３】ダイレクトコンバージョン切替え型のチューナー部２の詳細な構成を示すブロック図である。
【図４】伝搬路推定部４のＣ／Ｎ推定機能を説明するための図である。
【図５】低雑音増幅器ＬＮＡの回路図である。
【図６】中間周波増幅器ＩＦＡの回路図である。
【図７】ＰＬＬシンセサイザで構成される局部発振器ＬＯのブロック図である。
【図８】電圧制御型発振器ＶＣＯの回路図である。
【図９】制御電圧信号Ｖｃｏｎｔ２と出力周波数信号に含まれる位相雑音との関係を示すグラフである。
【図１０】Ａ／Ｄ変換器のブロック図である。
【図１１】Ａ／Ｄ変換器のビット数切替え方法を説明するための図である。
【図１２】受信信号のＣ／Ｎに基づくモード選択方法を説明するためのグラフである。
【図１３】変調方式、シンボル長と、動作モードとの関係を示すグラフである。
【図１４】モード切替えタイミングを説明するためのグラフである。
【図１５】フェージング伝搬路における瞬時Ｃ／Ｎの変化と、瞬時消費電力との関係を模式的に示すグラフである。
【図１６】平均の消費電力特性と、時間平均Ｃ／Ｎとの関係を示すグラフである。
【図１７】平均ビット誤り率と、時間平均Ｃ／Ｎとの関係を示すグラフである。
【符号の説明】
１ ＯＦＤＭ受信機
２ チューナー部
３ ＯＦＤＭ復調部
４ 伝搬路推定部
５ 制御部
１１ 差動増幅器
ＡＤＣ Ａ／Ｄ変換器
ＢＰＦ パンドパスフィルタ
ＣＶ 周波数変換器
ＩＦＡ 中間周波増幅器
ＬＮＡ 低雑音増幅器
ＬＯ 局部発振器
ＳＷ１，２，３ 切替えスイッチ
ＶＣＯ 電圧制御型発振器[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an OFDM receiver for receiving an OFDM signal and a control device therefor.
[0002]
[Prior art]
In terrestrial digital broadcasting of television, an orthogonal frequency division multiplex (OFDM) system is adopted as a carrier modulation system.
In OFDM, since a guard period GI is provided, there is an advantage that it is strong against fading. However, when the propagation conditions of radio waves are very poor, C / N (Carrier-to-Noise ratio) of a received signal deteriorates. Therefore, the bit error rate increases. Therefore, the tuner unit is required to have high performance such as high gain and low noise.
[0003]
In OFDM, one symbol length is a maximum of 1 msec, which is a very long symbol compared to other digital transmissions. In this case, since the local oscillator in the receiver needs to generate a sine wave having a constant frequency over the symbol length, the local oscillator is required to have low phase noise and high stability.
Further, when 64 QAM (Quadrature Amplitude Modulation) having a large number of modulation values is adopted as a modulation method of each sub-channel, a low noise amplifier (Low Noise Amplifier) in a receiver, a frequency conversion unit, a low-pass filter, an intermediate frequency It is necessary to keep the thermal noise generated by the amplifier low. Further, it is necessary to increase the quantization bit width of an A / D (Analog-to-Digital) converter.
[0004]
[Patent Document 1] JP-A-2002-16578
[0005]
[Problems to be solved by the invention]
When the C / N of the received signal is degraded, when a long symbol length is used, or when a scheme with a large number of modulation levels is adopted, excellent reception performance is required as described above. However, otherwise, a sufficiently practical signal can be obtained by error correction or the like without excessively improving the reception performance.
On the contrary, a local oscillator having high stability, a low-noise amplifier having small thermal noise, an A / D converter having a large quantization bit width, and the like consume large amounts of power, thereby increasing the power consumption of the entire receiver.
[0006]
In particular, when the receiver is mounted on a portable terminal device, the battery capacity of the portable terminal device is limited, and thus reducing the power consumption of the receiver is a major issue.
Therefore, the present invention reduces the power consumption of a low-noise amplifier, a frequency converter, an intermediate frequency amplifier, a local oscillator, an A / D converter, and the like that constitute a tuner in accordance with the reception conditions, thereby reducing the overall receiver. An object of the present invention is to provide an OFDM receiver that can reduce power consumption and a control device thereof.
[0007]
[Means for Solving the Problems]
The OFDM receiver according to the present invention has a tuner unit having a function of converting a received signal into an intermediate frequency and amplifying the signal, a function of converting the signal into a quadrature signal, and a function of converting the signal into a digital signal, and a signal output from the tuner unit. An OFDM demodulator for demodulating a digital orthogonal signal into a symbol sequence for each sub-channel using a fast Fourier transform algorithm, a channel estimator for estimating the instantaneous C / N of a received signal, and a channel estimator. If the instantaneous C / N deteriorates below the C / N threshold according to the estimated instantaneous C / N of the received signal, the tuner section is switched to a mode with relatively large power consumption but low noise, and the instantaneous C / N is switched. If N is not deteriorated below the C / N threshold, the mode in the tuner unit is switched to a mode in which the noise is large but the power consumption is relatively small, so that the components in the tuner unit are turned off. In which and a suppressing control portion power (claim 1).
[0008]
According to the above configuration, when the instantaneous C / N deteriorates below the C / N threshold according to the instantaneous C / N of the received signal estimated by the propagation path estimating unit, the power consumption in the tuner unit is relatively low. When the mode is switched to the mode with large noise but low noise, but the instantaneous C / N is not deteriorated below the C / N threshold, the mode in the tuner section is switched to the mode with relatively low power consumption even though the noise is large. It is possible to suppress instantaneous power consumption of each part in the unit. Therefore, the power consumption in the tuner section can be reduced on a time average basis, and the power consumption of the entire receiver can be reduced.
[0009]
The propagation path estimating unit estimates an instantaneous C / N of a received signal using information on a known symbol for amplitude and phase synchronization included in a specific sub-channel and orthogonal distance between the received symbol and the received symbol. (Claim 2).
The C / N threshold for the mode switching may be set based on whether or not the bit error rate at the time of selecting a mode that consumes much noise but consumes relatively little power is an allowable error rate (claim 3). .
[0010]
Further, the OFDM receiver of the present invention has a tuner unit having a function of converting a received signal into an intermediate frequency and amplifying the signal, a function of converting the signal into a quadrature signal, a function of converting the signal into a digital signal, and an output from the tuner unit. An OFDM demodulator that demodulates the digital orthogonal signal obtained into a symbol sequence for each sub-channel using a fast Fourier transform algorithm, and determines a sub-channel modulation method based on a received signal, and determines the determined sub-channel. According to the modulation level of the modulation method, when the modulation level is large, the inside of the tuner section is switched to a mode with relatively large power consumption but low noise, and when the modulation level is small, the inside of the tuner section is switched. A control unit that suppresses power consumption of each unit in the tuner unit by switching to a mode that consumes much noise but consumes relatively little power. It is (claim 4).
[0011]
The OFDM receiver has a characteristic that it is susceptible to noise when the modulation scheme of the subchannel has a large number of modulation levels. Can be switched to a mode that is resistant to noise and consumes relatively much power even though the noise is large. Therefore, it is possible to reduce the power consumption in the tuner section, thereby reducing the power consumption of the entire receiver.
Further, the OFDM receiver of the present invention has a tuner unit having a function of converting a received signal into an intermediate frequency and amplifying the signal, a function of converting the signal into a quadrature signal, a function of converting the signal into a digital signal, and an output from the tuner unit. An OFDM demodulation unit for demodulating the digital orthogonal signal obtained into a symbol sequence for each sub-channel using a fast Fourier transform algorithm, and determining a transmission mode (symbol length) based on the received signal, and determining the determined symbol. Depending on the length, if the symbol length is a long value, the mode inside the tuner unit is switched to a mode with relatively large power consumption but low noise, and if the symbol length is a short value, the noise inside the tuner unit is large even if the symbol length is a long value. By switching to a mode that consumes relatively little power, a control unit that suppresses power consumption of each unit in the tuner unit is provided. Section 5).
[0012]
The OFDM receiver has a characteristic that stability is required when the symbol length is long, so that the mode is switched to a low noise mode with relatively large power consumption. However, when the symbol length is short, the stability requirement is required. Since it is moderate, it is possible to switch to a mode that consumes much noise and consumes relatively little power. Therefore, it is possible to reduce the power consumption in the tuner section, thereby reducing the power consumption of the entire receiver.
When the power consumption of the tuner unit is switched according to one of the modes with relatively large power consumption but low noise, and the mode with large noise and relatively low power consumption, any element of the tuner unit can be selected as a switching target. This is illustrated in the following embodiment of the present invention. Specifically, tuners having different performances are prepared and switched (claim 6), the performance of the low noise amplifier or the intermediate frequency amplifier of the tuner section is selected by a control signal (claims 7 and 8), and the tuner section is switched. Switching the frequency stability of the local oscillator (Claim 9), switching the frequency stability of the voltage-controlled oscillator in the local oscillator of the tuner unit (Claim 10), and changing the number of conversion bits of the A / D converter in the tuner unit. Switching (claim 11).
[0013]
It is preferable that the timing of the mode switching be performed during the guard period of the OFDM signal so that the impact of the switching does not deteriorate the demodulated signal (claim 12).
The control device of the OFDM receiver according to the thirteenth to fifteenth aspects independently defines the control part of the OFDM receiver according to the first, fourth, and fifth aspects.
[0014]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
-Overall configuration of OFDM receiver-
FIG. 1 is a block diagram illustrating a configuration of an OFDM receiver 1 according to the present embodiment. The signal input from the receiving antenna is input to the tuner 2 where it is converted to an intermediate frequency, amplified, converted to quadrature signals I and Q, converted to digital signals, and output from the tuner 2. The output digital I and Q signals are input to the OFDM demodulation unit 3. The OFDM demodulation unit 3 demodulates the received signal into a symbol for each original sub-channel by using a fast Fourier transform (FFT) algorithm. The demodulated symbol sequence is input to an image signal processing unit (not shown), subjected to predetermined image processing, and displayed on a television screen.
[0015]
The propagation path estimating unit 4 uses a known symbol (QAM determination symbol) for amplitude and phase synchronization included in a specific sub-channel to calculate the instantaneous C / N (Carrier-to-Noise ratio) of the received signal. presume.
Further, the control unit 5 demodulates a subchannel signal for transmitting TMMC (Transmission Multiplexing Configuration Control) information that defines a modulation scheme and multiplexing information, and determines a modulation scheme (64QAM, 16QAM, QPSK) of the subchannel. Further, the control unit 5 determines the transmission mode (symbol length) of the signal input to the receiver.
[0016]
The control unit 5 controls the power consumption of each unit in the tuner unit 2 according to the determination result of the transmission mode and the modulation method, and the estimated C / N of the received radio wave. This control method will be described below.
All or part of the functions of the control unit 5 are realized by a computer of the OFDM receiver 1 executing a program recorded on a predetermined medium such as a CD-ROM or a hard disk.
[0017]
-Configuration of each part of OFDM receiver 1 and control method of power consumption-
FIG. 2 is a block diagram showing a detailed configuration of the tuner unit 2 of the direct conversion switching type.
The tuner section 2 includes two tuners A and B. These tuners A and B are switched to one of the input side switch SW1 and the output side switch SW2. Tuner A includes a low-noise amplifier LNA, a frequency converter CV, a band-pass filter BPF, and an intermediate-frequency amplifier IFA. Tuner B includes a frequency converter CV, a band-pass filter BPF, and an intermediate-frequency filter excluding the low-noise amplifier LNA. It consists of a frequency amplifier IFA. The output of the tuner A or B is converted by a frequency converter CV into analog I and Q signals by orthogonal sine wave signals, passed through a low-pass filter LPF, and converted into digital signals by an A / D converter, and each is OFDM demodulated. 3 is input.
[0018]
A signal of a predetermined frequency is sent from a local oscillator LO constituted by a PLL synthesizer or the like to the frequency converter CV, and frequency conversion from a high frequency to an intermediate frequency is performed.
The input-side switch SW1 and the output-side switch SW2 are composed of FET elements and the like, and can be switched by turning on and off the gate voltage of the FET elements.
[0019]
FIG. 3 is a block diagram showing a detailed configuration of the direct conversion switching type tuner unit 2. The difference from the tuner unit 2 in FIG. 2 is that the output of the tuner A or B is frequency-converted in a subsequent frequency converter CV, converted into a digital signal by an A / D converter, and then Hilbert-converted to digital I, That is, the Q signal is directly obtained. The configuration of the tuners A and B is the same as that of FIG.
[0020]
2 and 3, when the input switch SW1 and the output switch SW2 are switched to the tuner A side by the control signal CNT1, unnecessary power of the tuner B is cut off by an interlocking switch (not shown). I have to. When switching to the tuner B side, unnecessary power to the tuner A is turned off by an interlocking switch (not shown). The power consumption of the tuner A is greater than the power consumption of the tuner B due to the presence of the low-noise amplifier LNA.
[0021]
When the signal is switched to the tuner A side, the input signal passes through the low-noise amplifier LNA and is therefore amplified to a large extent, but the power consumption is relatively large. When the input signal is switched to the tuner B side, the input signal directly enters the frequency converter CV without passing through the low-noise amplifier LNA, so that the amplification factor decreases. However, power consumption is small.
FIG. 4 is a diagram for explaining the C / N estimation function of the propagation path estimating unit 4. FIG. 4A illustrates a distance dk between a received symbol rk and a QAM determination symbol Sk on the I and Q planes. It shows the situation. Here, the subscript k represents each symbol. (B) is a functional block diagram of the propagation path estimation unit 4. The propagation path estimation unit 4 finds a QAM decision unit for finding a QAM decision symbol Sk, and finds a distance dk between the QAM decision symbol Sk and the received symbol rk. It has a distance calculation unit and an averaging unit that adds each distance with respect to the subscript k to obtain an average.
[0022]
FIG. 5 is a circuit diagram of the low noise amplifier LNA. The low noise amplifier LNA includes an input terminal IN, four transistors Q1 to Q4, and an output terminal OUT. The transistor Q1 performs amplification, the transistors Q2 and Q3 connect the load resistors R2 and R3, respectively, and the transistor Q4 is for bypassing between the input terminal and the output terminal. Note that there is a relationship of R2 <R3.
The control signal CNT3 includes three control signals SEL1 to SEL3. When the transistor Q4 is turned on by SEL1, the input terminal and the output terminal are bypassed and the amplification factor becomes 1. At this time, SEL2 and SEL3 are set to low to reduce current consumption. When SEL1 is set to low and the transistor Q2 is turned on by the control signal SEL2, the load resistance R2 is connected, and the amplification factor is larger than 1, but relatively small. When SEL1 is set to low and the transistor Q3 is turned on by the control signal SEL3, the load resistance R3 is connected and the amplification factor is relatively large.
[0023]
In order to reduce power consumption, a mode that consumes much noise but consumes relatively little power (referred to as a power saving mode) is selected. For this purpose, the control signal SEL1 is selected. Since the power consumption may be large, when it is desired to increase the amplification factor, a mode with relatively large power consumption but low noise (called a low noise mode) is selected. At this time, the control signal SEL3 is selected.
FIG. 6 is a circuit diagram of the intermediate frequency amplifier IFA. The intermediate frequency amplifier IFA has an input terminal IN, four transistors Q5 to Q8, and an output terminal OUT. The transistor Q5 performs amplification, the transistors Q6 and Q7 connect the load resistors R4 and R5, respectively, and the transistor Q8 is for bypassing between the input terminal and the output terminal. Note that there is a relationship of R4 <R5.
[0024]
The control signal CNT4 is composed of three control signals SEL1 to SEL3. When the transistor Q8 is turned on by the control signal SEL1, the input terminal and the output terminal are bypassed, and the amplification factor becomes 1. At this time, SEL2 and SEL3 are set to low to reduce current consumption. When SEL1 is set to low and the transistor Q6 is turned on by the control signal SEL2, the load resistor R4 is connected, and the amplification factor is larger than 1, but relatively small. When SEL1 is set to low and the transistor Q7 is turned on by the control signal SEL3, the load resistance R5 is connected and the amplification factor is relatively large.
[0025]
To reduce power consumption, select the power saving mode. For this purpose, the control signal SEL1 is selected. If it is desired to increase the amplification factor because the power consumption may be large, select the low noise mode. At this time, the control signal SEL3 is selected.
FIG. 7 is a block diagram of a local oscillator LO constituted by a PLL synthesizer. The local oscillator LO includes a reference oscillator, a low-pass filter LPF, a voltage-controlled oscillator VCO, a prescaler for capturing an output frequency signal, a variable frequency divider, a frequency signal output from the variable frequency divider, and a frequency signal of the reference oscillator. A phase comparator for comparing phases, and a changeover switch SW3 for switching an output of the phase comparator and a frequency offset value provided from the OFDM demodulation unit 3 are provided.
[0026]
When operating in the power saving mode, the power of the prescaler, the variable frequency divider, the phase comparator, and the reference oscillator surrounded by a broken line is turned off. In this case, the frequency offset value is selected by the changeover switch SW3. The frequency control of the voltage controlled oscillator VCO is performed based on the frequency offset value.
When operating in the low noise mode, the power of the prescaler, the variable frequency divider, the phase comparator, and the reference oscillator surrounded by a broken line is turned on. In this case, the changeover switch SW3 selects the output of the phase comparator. Thereby, it operates as a normal PLL.
[0027]
FIG. 8 is a circuit diagram of the voltage controlled oscillator VCO. The control voltage signal from the low-pass filter LPF in FIG. 7 is represented by Vcont1. This voltage controlled oscillator VCO oscillates a signal having a frequency corresponding to the control voltage signal Vcont1. The signal is supplied to the differential amplifier 11, and a frequency signal is extracted from the differential amplifier 11.
The transistor Q9 connected to the power supply terminal is for flowing the load current I. The magnitude of load current I changes according to control voltage signal Vcont2 applied to the gate of transistor Q9. On the other hand, the relationship between the control voltage signal Vcont2 and the phase noise included in the output frequency signal is as shown in FIG. As can be seen from FIG. 9, generally, as the control voltage signal Vcont2 increases, the phase noise tends to decrease.
[0028]
Therefore, when operating in the power saving mode, when the control voltage signal Vcont2 is lowered, the load current I decreases and the power consumption decreases. However, the phase noise included in the output frequency signal increases.
When operating in the low noise mode, increasing the control voltage signal Vcont2 reduces the phase noise included in the output frequency signal. However, the load current I increases and the power consumption increases.
[0029]
FIG. 10 is a block diagram of the A / D converter. The A / D converter has nine conversion stages from stage 1 to stage 9. The input analog signals Vin + and Vin− are input from the preceding stage, and are converted into 2-bit digital signals in each stage. A delay element D is inserted into the output section of each of the stages 1 to 8, so that the converted signal from each stage is input to the digital correction at the same time.
Normally, the power consumption of the former stage is larger due to higher accuracy, so that the power consumption is reduced by making the two stages 1 and 2 of the former stage through according to the reception state. As a result, when operating in the power saving mode, the number of stages is 7, and the number of output bits of each stage is 2, so that an analog signal is digitally converted by 2 × 7−7 + 1 = 8 bits. When operating in a normal low noise mode, the number of stages is 9, and the number of output bits of each stage is 2, so that an analog signal is digitally converted by 2 × 9−9 + 1 = 10 bits.
[0030]
The control signal CNT5 for making the stages 1 and 2 through includes two control signals PDN1 and PDN2.
FIG. 11A is a configuration diagram of the stages 1 and 2 of the A / D converter, and FIG. 11B is a configuration diagram of the stages 3 to 9 of the A / D converter.
In the stage 1, the control signal PDN1 turns off the sample and hold circuit and the AD converter of the stage 1 and turns on the switches SW1 and SW2 to make the stage 1 through. In stage 2, the same operation is performed using the control signal PDN2.
[0031]
Since the control signal PDN is not applied to the stages 3 to 9, the configuration of the stages 3 to 9 is the same in the power saving mode and the low noise mode.
In summary, when operating in the power saving mode, the first two stages 1 and 2 are made through to reduce the number of bits by 2 and operate with 8 bits. When operating in low noise mode, all stages are used to operate at 10 bits.
The relationship between the tuner configuration, the control of the low noise amplifier LNA, the intermediate frequency amplifier IFA, the local oscillator LO, the voltage controlled oscillator VCO, the A / D converter, and the power consumption described above is summarized in Table 1 below. Become like
[0032]
[Table 1]

[0033]
(A) Tuner configuration: To operate in the power saving mode, the changeover switches SW1 and SW2 are switched to the tuner B side. Since the input signal directly enters the frequency converter CV without passing through the low noise amplifier LNA, the gain is low, but the power consumption is small. When operating in the low noise mode, the changeover switches SW1 and SW2 are switched to the tuner A side. Since the input signal passes through the low noise amplifier LNA, the gain is high, but the power consumption is relatively high.
[0034]
(B) Low-noise amplifier LNA: When operating in the power-saving mode, the control signal SEL1 may be set to H to bypass the input terminal and the output terminal, thereby reducing the gain. When operating in the low noise mode, the control signal SEL3 is set to H to turn on the transistor Q3. As a result, the load resistance R3 is connected, the amplification factor becomes relatively large, and the gain becomes high.
(C) Intermediate frequency amplifier IFA: When operating in the power saving mode, the control signal SEL1 is set to H to bypass the input terminal and the output terminal, thereby reducing the gain. When operating in the low noise mode, the control signal SEL3 is set to H to turn on the transistor Q7. As a result, the load resistance R5 is connected, the amplification factor becomes relatively large, and the gain becomes high.
[0035]
(D) Local oscillator LO: When operating in the power saving mode, the power of the prescaler, the variable frequency divider, the phase comparator, and the reference oscillator is turned off, and the changeover switch SW3 causes the voltage controlled oscillator VCO to operate according to the frequency offset value. Frequency control is performed. When operating in the low noise mode, the power of the prescaler, the variable frequency divider, the phase comparator, and the reference oscillator is turned on, and the frequency is controlled by the output of the phase comparator by the changeover switch SW3.
[0036]
(E) Voltage controlled oscillator VCO: When operating in the power saving mode, the control voltage signal Vcont2 is lowered. As a result, the load current I decreases and the power consumption decreases, but the phase noise included in the output frequency signal increases. When operating in the low noise mode, the control voltage signal Vcont2 is increased. As a result, the phase noise included in the output frequency signal decreases, but the load current I increases and the power consumption increases.
(F) A / D converter: When operating in the power saving mode, the control signals PDN1 and PDN2 are set to L, and the operation is performed with 8 bits after reducing 2 bits. This reduces power consumption but reduces conversion accuracy. When operating in the low noise mode, the control signals PDN1 and PDN2 are set to H, and all the stages are used to operate with 10 bits. Thereby, the conversion accuracy is improved, but the power consumption is increased.
[0037]
-Mode selection criteria-
Next, selection criteria for the power saving mode and the low noise mode will be described.
Mode selection is performed based on the C / N of the received signal or the modulation method or transmission mode (symbol length) of each subchannel.
FIG. 12 is a graph showing the relationship between the instantaneous C / N of the received signal and the bit error rate. If the bit error rate is equal to or lower than the required threshold, practically error-free transmission becomes possible by error correction at the subsequent stage.
[0038]
The broken line A indicates that the tuner A is selected, the low noise amplifier LNA is set to high gain, the intermediate frequency amplifier IFA is set to high gain, the local oscillator LO is set to high stability, and the phase noise of the voltage controlled oscillator VCO is set. Is set to be small, and the characteristics of the instantaneous C / N and the bit error rate when the A / D converter is set to full scale are shown. This condition is called “low noise mode”.
The dashed line B indicates that the tuner B is selected, the low noise amplifier LNA is set to low gain, the intermediate frequency amplifier IFA is set to low gain, the local oscillator LO is set to low stability, and the phase noise of the voltage controlled oscillator VCO is set. Is set to be large, and the characteristics of the instantaneous C / N and the bit error rate when the A / D converter is set to downscale are shown. This condition is called “power saving mode”.
[0039]
The instantaneous C / N at which the bit error rate becomes equal to the required threshold value in the power saving mode is indicated by C / N0. In a region where the instantaneous C / N estimated by the channel estimator 4 of the receiver is equal to or greater than C / N0, the bit error rate is equal to or less than the threshold value regardless of whether the low noise mode or the power saving mode is selected. Therefore, select the power saving mode with low power consumption. In a region where the instantaneous C / N is equal to or less than C / N0, if the power saving mode is selected, the bit error rate exceeds the threshold, so the low noise mode is selected.
[0040]
FIG. 13 is a graph showing the relationship between the modulation mode, the symbol length, and the operation mode. When QPSK with a small number of modulation levels is selected or when a short symbol length mode (250 μs) is selected, as shown by a white background in FIG. 13, the receiver has low stability but low power consumption. Operate in power saving mode. On the other hand, when 64QAM with a large number of modulation levels or a mode with a long symbol length is selected, as shown by cross-hatching in FIG. 13, the local oscillator LO is switched to a low noise mode with high power consumption but high stability. Let it work. In the other areas indicated by broken-line hatching in FIG. 13, the operation is performed in either the power saving mode or the low noise mode. It is preferable to determine whether to select the power saving mode or the low noise mode after actually operating the receiver.
[0041]
-Switching timing-
FIG. 14 is a graph for explaining the mode switching timing. FIG. 14A shows the time lapse of the instantaneous C / N estimated by the channel estimator 4, and FIG. 14A shows the relationship between the guard period GI and the symbol period data of the OFDM signal.
If the instantaneous C / N exceeds the threshold value C / N0 during the symbol period, switching to the power saving mode may cause loss of data. Therefore, as shown in FIG. After waiting until the period GI, the mode is switched to the power saving mode. If the instant when the instantaneous C / N falls below the threshold value C / N0 is during the symbol period, switching to the low noise mode may cause data loss, so the next guard as shown in FIG. After waiting until the period GI, the mode is switched to the low noise mode.
[0042]
As described above, by switching the mode during the guard period, data continuity can be maintained.
―Effects of mode switching―
FIG. 15 is a graph schematically showing a relationship between a change in instantaneous C / N in a fading propagation path and instantaneous power consumption. When the instantaneous C / N exceeds the threshold C / N0, the power saving mode is selected. When the instantaneous C / N falls below the threshold C / N0, the mode is switched to the low noise mode. Although the instantaneous power consumption decreases in the power saving mode and increases in the low noise mode, the instantaneous C / N fluctuates, and the time rate at which the threshold C / N0 or less is lower than 1 is lower than the average. , Power consumption can be reduced.
[0043]
The embodiments of the present invention have been described above, but the embodiments of the present invention are not limited to the above embodiments. For example, in addition to the two-stage switching between the low-noise mode and the power-saving mode, a standard power-consumption mode (standard mode) may be set to switch the low-noise mode, the standard mode, and the power-saving mode into three stages. Conceivable. In the present invention, it is generally possible to provide a plurality of modes according to the power consumption. In addition, various changes can be made within the scope of the present invention.
[0044]
【Example】
Assuming the mobile OFDM receiver 1, a simulation of the average power consumption and the average bit error rate was performed. The modulation method of the sub-channel was DQPSK. The propagation path characteristics of the radio wave are assumed to be Rayleigh fading type, and the mode switching threshold C / N0 is set to 10 dB. In the power saving mode, the power consumption is assumed to be 0.5 times that in the low noise mode.
[0045]
FIG. 16 is a graph showing the relationship between the average power consumption characteristic and the time average C / N. The higher the time average C / N is, the higher the time rate of the power saving mode is. Therefore, the average power consumption is closer to the power consumption of the power saving mode. Since the lower the time average C / N is, the higher the time rate of the low noise mode is, the average power consumption is closer to the power consumption of the low noise mode. If the time average C / N is 10 dB, the time ratio between the power saving mode and the low noise mode is 0.5, so the average power consumption is the power consumption of the power saving mode and the low noise. The value is intermediate with the power consumption of the mode.
[0046]
FIG. 17 is a graph showing the relationship between the average bit error rate and the time average C / N. The broken line indicates the average bit error rate when operated only in the power saving mode, and the solid line indicates the average bit error rate when operated only in the low noise mode. The dotted line indicates the average bit error rate when the mode of the present invention in which the mode switching threshold C / N0 is set to 10 dB and the mode is switched between the power saving mode and the low noise mode is adopted.
As can be seen from the graph, the average bit error rate when operating only in the low noise mode is 3 dB lower than the average bit error rate when operating only in the low noise mode. However, it can be seen that the average bit error rate of the method of the present invention is almost the same as the average bit error rate when operated only in the low noise mode.
[0047]
【The invention's effect】
As described above, according to the present invention, when there is no possibility that the reception characteristics are degraded, the mode in the tuner section is switched from a mode with relatively large power consumption but low noise to a mode with relatively low power consumption even though the noise is large. Thus, the instantaneous power consumption of each section in the tuner section can be suppressed. Therefore, even when viewed on a time average, the power consumption in the tuner section can be reduced, thereby reducing the power consumption of the entire receiver.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of an OFDM receiver 1 according to the present embodiment.
FIG. 2 is a block diagram showing a detailed configuration of a tuner unit 2 of a direct conversion switching type.
FIG. 3 is a block diagram showing a detailed configuration of a tuner unit 2 of a direct conversion switching type.
FIG. 4 is a diagram for explaining a C / N estimation function of a propagation path estimation unit 4;
FIG. 5 is a circuit diagram of a low noise amplifier LNA.
FIG. 6 is a circuit diagram of the intermediate frequency amplifier IFA.
FIG. 7 is a block diagram of a local oscillator LO constituted by a PLL synthesizer.
FIG. 8 is a circuit diagram of a voltage controlled oscillator VCO.
FIG. 9 is a graph showing a relationship between a control voltage signal Vcont2 and phase noise included in an output frequency signal.
FIG. 10 is a block diagram of an A / D converter.
FIG. 11 is a diagram for explaining a bit number switching method of the A / D converter.
FIG. 12 is a graph for explaining a mode selection method based on C / N of a received signal.
FIG. 13 is a graph showing a relationship between a modulation scheme, a symbol length, and an operation mode.
FIG. 14 is a graph for explaining mode switching timing.
FIG. 15 is a graph schematically showing a relationship between a change in instantaneous C / N in a fading propagation path and instantaneous power consumption.
FIG. 16 is a graph showing a relationship between an average power consumption characteristic and a time average C / N.
FIG. 17 is a graph showing a relationship between an average bit error rate and a time average C / N.
[Explanation of symbols]
1 OFDM receiver
2 Tuner section
3 OFDM demodulation unit
4 Channel estimation unit
5 control part
11 Differential amplifier
ADC A / D converter
BPF Pand pass filter
CV frequency converter
IFA IF amplifier
LNA low noise amplifier
LO local oscillator
SW1,2,3 switch
VCO voltage controlled oscillator

Claims (15)

A tuner unit having a function of converting a received signal to an intermediate frequency and amplifying it, a function of converting it to a quadrature signal, and a function of converting it to a digital signal,
An OFDM demodulation unit for demodulating the digital orthogonal signal output from the tuner unit into a symbol sequence for each original sub-channel using a fast Fourier transform algorithm;
A channel estimator for estimating the instantaneous C / N of the received signal;
If the instantaneous C / N deteriorates below the C / N threshold in accordance with the instantaneous C / N of the received signal estimated by the propagation path estimating unit, the tuner unit is set to a mode with relatively large power consumption but low noise. Switching, when the instantaneous C / N is not deteriorated below the C / N threshold, control for suppressing power consumption of each section in the tuner section by switching the mode in the tuner section to a mode in which noise is large and power consumption is relatively small. And an OFDM receiver. The propagation path estimating unit estimates an instantaneous C / N of a received signal using information on a known symbol for amplitude and phase synchronization included in a specific sub-channel and orthogonal distance between the received symbol and the received symbol. 2. The OFDM receiver according to claim 1, wherein 2. The OFDM according to claim 1, wherein the C / N threshold value of the mode switching is set based on whether or not a bit error rate at the time of selecting a mode having a large noise and a relatively low power consumption is an allowable error rate. Receiving machine. A tuner unit having a function of converting a received signal to an intermediate frequency and amplifying it, a function of converting it to a quadrature signal, and a function of converting it to a digital signal,
An OFDM demodulation unit for demodulating the digital orthogonal signal output from the tuner unit into a symbol sequence for each original sub-channel using a fast Fourier transform algorithm;
The modulation scheme of the sub-channel is determined based on the received signal, and according to the modulation level of the modulation scheme of the determined sub-channel, if the modulation level is large, the power consumption in the tuner unit is relatively large, but When the mode is switched to a low-noise mode and the number of modulation levels is small, a control unit that suppresses the power consumption of each unit in the tuner unit by switching to a mode with relatively large power consumption even if the noise is large in the tuner unit is provided. An OFDM receiver, characterized in that: A tuner unit having a function of converting a received signal to an intermediate frequency and amplifying it, a function of converting it to a quadrature signal, and a function of converting it to a digital signal,
An OFDM demodulation unit for demodulating the digital orthogonal signal output from the tuner unit into a symbol sequence for each original sub-channel using a fast Fourier transform algorithm;
The transmission mode (symbol length) is determined based on the received signal, and if the symbol length is a long value according to the determined symbol length, the mode in the tuner unit is switched to a mode with relatively large power consumption but low noise. When the symbol length is a short value, the control unit switches the mode in the tuner unit to a mode with relatively high power consumption even if the noise is large, thereby suppressing the power consumption of each unit in the tuner unit. OFDM receiver. The tuner section has two types of tuners, a high-performance tuner A and a low-performance tuner B. The control section has a relatively large power consumption but a low noise mode. The OFDM receiver according to any one of claims 1 to 5, wherein one of the tuners A and B is selectively switched according to one of the modes consuming less power. The control unit selectively switches the performance of the low-noise amplifier of the tuner unit according to one of a mode with relatively large power consumption but low noise, and a mode with large noise and relatively low power consumption. An OFDM receiver according to any one of claims 1 to 5. The control unit selectively switches the performance of the intermediate frequency amplifier of the tuner unit according to one of a mode with relatively large power consumption but low noise, and a mode with large noise and relatively low power consumption. An OFDM receiver according to any one of claims 1 to 5. 2. The controller according to claim 1, wherein the controller switches the frequency stability of the local oscillator of the tuner according to one of a mode in which power consumption is relatively large but low noise and a mode in which noise is large and power consumption is relatively small. An OFDM receiver according to any one of claims 1 to 5. The control unit controls the frequency stability of the voltage-controlled oscillator in the local oscillator of the tuner unit according to one of a mode in which power consumption is relatively large but low noise, and a mode in which noise is large and power consumption is relatively small. The OFDM receiver according to any one of claims 1 to 5, wherein the degree is switched. The control unit switches the number of conversion bits of the A / D converter in the tuner unit according to one of a mode in which power consumption is relatively large and low noise, and a mode in which noise is large and power consumption is relatively small. An OFDM receiver according to any one of claims 1 to 5. The OFDM receiver according to any one of claims 1 to 11, wherein the control unit performs mode switching during a guard period of an OFDM signal. If the instantaneous C / N deteriorates below the C / N threshold in accordance with the instantaneous C / N of the received signal of the OFDM receiver, the tuner section of the OFDM receiver is set to a mode with relatively large power consumption but low noise. When the switching and the instantaneous C / N are not deteriorated below the C / N threshold, the power consumption of each section in the tuner section is suppressed by switching the mode in the tuner section to a mode that consumes much noise but consumes relatively little power. A control device for an OFDM receiver. The modulation scheme of the sub-channel is determined based on the received signal of the OFDM receiver, and if the modulation level is large according to the determined modulation level of the sub-channel modulation scheme, the tuner section of the OFDM receiver is used. Is switched to a mode with relatively large power consumption but low noise. A control device for an OFDM receiver, characterized in that the control is suppressed. The transmission mode (symbol length) is determined based on the received signal of the OFDM receiver, and if the symbol length is a long value according to the determined symbol length, the power consumption in the tuner section of the OFDM receiver is relatively low. If the mode is switched to a large but low-noise mode and the symbol length is a short value, the mode in the tuner section is switched to a mode with relatively high power consumption even though the noise is large, thereby suppressing the power consumption of each section in the tuner section. Characteristic control device for OFDM receiver.

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