JP2004318067A - Image display device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent lowering of aperture ratio when a thin film transistor and a photodetector are provided in the same pixel. <P>SOLUTION: In the respective pixels arranged like a matrix on a transparent substrate 15, the active layer 11 of the photodetector is arranged in piles to the active layer 10 of the thin film transistor via an insulating film 17 so that a light shielding layer to the active layer 10 of the thin film transistor for controlling voltage of a transparent electrode 4 can be commonly used. Specifically, the gate electrode 8 of the thin film transistor and the active layer 11 of the photodetector are oppositely arranged sandwiching the active layer 10 of the thin film transistor. More specifically, the active layer 11 of the photodetector is arranged right under the active layer 10 of the thin film transistor or the active layer 11 of the photodetector is arranged right above the active layer 10 of the thin film transistor. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an image display device provided with a thin film transistor having an active layer of a polycrystalline silicon film and a light receiving element for a light input function for each pixel, and a method of manufacturing the same.

  2. Description of the Related Art In recent years, demand for a display device using liquid crystal has been activated as a thin, low-power-consumption, high-quality image display device. As a switching element for controlling a transparent electrode provided for each pixel and a switching element used for forming a driving circuit for driving liquid crystal, a thin film transistor having an active layer of a polycrystalline silicon film is used. It has attracted attention because it has higher electron mobility than a thin film transistor made of a crystalline silicon film and can form a pixel with higher definition, and furthermore, a pixel portion and a driver circuit can be integrally formed on an insulating transparent substrate.

  In an image display device using a thin film transistor having an active layer of a polycrystalline silicon film, light from a backlight device arranged on the back side of a transparent substrate causes a light leakage current in the thin film transistor arranged in each pixel. Display performance is degraded. To solve this problem, for example, an image display device described in Patent Document 1 is known. This image display device has a configuration in which an amorphous silicon film is formed on a transparent substrate below an active layer of a polycrystalline silicon film of a thin film transistor via an insulating film. Then, the light from the backlight device to the thin film transistor is shielded by the amorphous silicon film, the amount of light irradiated to the active layer of the thin film transistor is suppressed, and the deterioration of display quality due to light leak current is prevented. .

  By the way, an image display device having a light receiving element in each pixel has been developed in order to provide an optical input function such as a light pen input function, a scanner reading function, and a fingerprint sensor function. In this case, a thin film transistor and a light receiving element for controlling the transparent electrode are disposed in each pixel, but it is desirable that the thin film transistor shields light from the backlight device in order to prevent a light leak current. On the other hand, it is desirable that the light receiving element generates a large amount of photocurrent, so that it is not desirable to shield the light. As described above, two elements having different requirements for light shielding coexist in one pixel, and it is necessary to provide an appropriate configuration in consideration of this point.

As such a configuration, for example, an image display device described in Patent Document 2 is known. In this image display device, an amorphous silicon film is provided as a light-shielding layer under an active layer of a polycrystalline silicon film of a thin film transistor for controlling a voltage of a transparent electrode, and the amorphous silicon film is formed in the same layer as the amorphous silicon film. In this configuration, an amorphous silicon film of a thin film transistor for forming a light receiving element is provided, and a gate electrode of the thin film transistor formed of a polycrystalline silicon film and a gate electrode of the thin film transistor formed of an amorphous silicon film are provided in the same layer. In this image display device, since the light absorption coefficient of the amorphous silicon film is larger than that of the polycrystalline silicon film, the light receiving performance of the light receiving element is improved by forming the light receiving element with the amorphous silicon film. In addition, by arranging an amorphous silicon film for light shielding under the active layer of the polycrystalline silicon film, the driving capability of the thin film transistor for controlling the voltage of the transparent electrode is improved.
JP-A-7-176748 JP-A-10-90655

  However, when an amorphous silicon film as a light shielding layer and an amorphous silicon film as a light receiving element are arranged in parallel on the same layer as in the image display device of Patent Document 2, the light receiving element is provided. There is a problem in that the area of the light transmitting portion of the transparent electrode is reduced by that much, and the aperture ratio of light transmission is reduced.

  The present invention has been made in view of the above, and an object of the present invention is to provide an image display device capable of preventing a decrease in aperture ratio when a thin film transistor and a light receiving element are provided in the same pixel. It is in.

  Another object of the present invention is to provide a method for manufacturing the image display device.

  An image display device according to a first aspect of the present invention is configured such that a thin film transistor having an active layer of a polycrystalline silicon film provided in each of a plurality of pixels arranged in a matrix on a transparent substrate also serves as a light shielding layer for the thin film transistor. And an array substrate provided with a light receiving element provided on the thin film transistor with an insulating film interposed therebetween, and a counter substrate disposed to face the array substrate via a display layer.

  In the present invention, a light receiving element is provided so as to overlap a thin film transistor with an insulating film interposed therebetween so as to serve also as a light shielding layer for the thin film transistor, so that incident light is blocked by the light receiving element so that the thin film transistor is not irradiated. In addition, a reduction in the area of the transparent electrode due to the provision of a light receiving element in each pixel is prevented.

  An image display device according to a second aspect of the present invention is characterized in that a gate electrode of the thin film transistor and an active layer of the light receiving element are opposed to each other with an active layer of the thin film transistor interposed therebetween.

  In the present invention, light incident on the active layer of the thin film transistor is blocked by the active layer of the light receiving element.

  An image display device according to a third aspect of the invention is characterized in that an active layer of the light receiving element is disposed immediately below an active layer of the thin film transistor.

  According to the present invention, light to be incident on the display layer from the array substrate side is shielded from the thin film transistor by the active layer of the light receiving element disposed immediately below the active layer of the thin film transistor. Light coming from the light is blocked.

  An image display device according to a fourth aspect of the present invention is characterized in that an active layer of the light receiving element is disposed immediately above an active layer of the thin film transistor.

  In the present invention, light incident on the display layer from the counter substrate side is shielded from the thin film transistor by the active layer of the light receiving element disposed immediately above the active layer of the thin film transistor.

  According to a fifth aspect of the present invention, in the image display device, the active layer of the light receiving element is an amorphous silicon film.

  In the present invention, since the active layer of the light receiving element is made of an amorphous silicon film, the light absorptivity can be made about 10 times that of the polycrystalline silicon film.

  According to a sixth aspect of the present invention, in the image display device, the amorphous silicon film has a thickness in a range of 500 ° to 1000 °.

  In the present invention, by setting the thickness of the amorphous silicon film in the range of 500 ° to 1000 °, the optical density thereof can be set to about 1 in the visible light region. It can be suppressed to about 1, and the light receiving element can sufficiently function as a light shielding layer.

  In an image display device according to a seventh aspect of the present invention, the active layer of the light receiving element has a p-type amorphous silicon film laminated on one end of the amorphous silicon film, and the other of the amorphous silicon film. A pn junction is formed by laminating an n-type amorphous silicon film on one end.

  According to an eighth aspect of the present invention, in the image display apparatus according to the seventh aspect, the amorphous silicon film is i-type and a pin junction is formed.

  According to a ninth aspect of the present invention, in the image display device, the active layer of the light receiving element is formed by stacking a p-type amorphous silicon film and an n-type amorphous silicon film to form a pn junction. .

  According to a tenth aspect of the present invention, in the image display device according to the ninth aspect, an i-type amorphous silicon film is disposed between the p-type amorphous silicon film and the n-type amorphous silicon film. A pin junction is formed.

  According to the seventh to tenth aspects of the present invention, the active layer of the light receiving element is a stacked pin junction or pn junction of an amorphous silicon film, so that the junction area of the amorphous silicon film is not a stacked type. Since it is several hundred times larger than that of the amorphous silicon film, the amorphous silicon film can generate a photocurrent approximately 1000 times that of the polycrystalline silicon film.

  An image display device according to an eleventh aspect of the present invention is characterized in that the light receiving element is a diode.

  In the present invention, since the light receiving element is a diode, a larger amount of photocurrent flows as compared with the thin film transistor, so that the performance as the light receiving element can be further improved.

  A twelfth image display device according to the present invention is characterized in that a source electrode and a drain electrode in an active layer of the thin film transistor and a source electrode and a drain electrode in an active layer of the light receiving element are arranged in the same layer.

  An image display device according to a thirteenth aspect of the present invention is arranged such that a portion between the source electrode and the drain electrode in the active layer of the thin film transistor and a portion between the source electrode and the drain electrode in the active layer of the light receiving element are substantially orthogonal to each other. A thin film transistor and the light receiving element are arranged.

  According to the present invention, by arranging the portion between the source electrode and the drain electrode in the active layer of the thin film transistor and the portion between the source electrode and the drain electrode in the active layer of the light receiving element so as to be substantially orthogonal to each other, The source electrode of each element does not overlap, and the drain electrode of the thin film transistor and the light receiving element do not overlap, eliminating the need to increase the area of the lower active layer. I have.

  A fourteenth method of manufacturing an image display device according to the present invention includes the steps of: forming a thin film transistor on a transparent substrate via an insulating film when manufacturing an array substrate that is disposed to face a counter substrate via a display layer; Forming a light receiving element directly above the thin film transistor via an insulating film.

  A fifteenth method of manufacturing an image display device according to the present invention is a method of forming a light receiving element on a transparent substrate via an insulating film when manufacturing an array substrate opposed to a counter substrate via a display layer. And a step of forming a thin film transistor directly above the light receiving element via an insulating film.

  In a sixteenth aspect of the present invention, in the method for manufacturing an image display device, the step of forming the light receiving element includes the step of forming an amorphous silicon film and the step of forming an n-type amorphous silicon on one end of the amorphous silicon film. Forming a film and forming a p-type amorphous silicon film on the other end of the amorphous silicon film.

  In a seventeenth aspect of the method for manufacturing an image display device according to the present invention, in the step of forming the light receiving element, a step of forming an n-type amorphous silicon film and a step of forming a p-type Forming an amorphous silicon film.

In the method for manufacturing an image display device according to an eighteenth aspect of the present invention, in the step of forming the n-type amorphous silicon film, the step of forming the n-type amorphous silicon film may be performed in a vacuum by PE-CVD using a mixed gas of SiH ₄ , PH ₃ and H ₂ The film is characterized by being formed.

According to a nineteenth aspect of the invention, in the method of manufacturing an image display device, the step of forming the p-type amorphous silicon film is performed by a PE-CVD method using a mixed gas of SiH ₄ , B ₂ H ₆ , and H _2. The film is formed in a vacuum.

  According to the image display device and the manufacturing method according to the present invention, it is possible to prevent a decrease in aperture ratio when a thin film transistor and a light receiving element are provided in the same pixel.

  Hereinafter, an image display device according to an embodiment of the present invention will be described with reference to the drawings.

[First Embodiment]
The image display device according to the present embodiment is configured by providing a liquid crystal layer as a display layer in a gap between an array substrate and an opposing substrate arranged opposite thereto.

  In the display area on the array substrate, a plurality of signal lines and scanning lines are wired so as to intersect, and pixels are arranged at each intersection so as to form a matrix.

  The configuration of each pixel on the array substrate will be described with reference to the plan view of FIG. 1 and the cross-sectional view of FIG. A first insulating film 16 is formed on a transparent substrate 15 made of glass, and an amorphous silicon film 11 serving as an active layer of a light receiving element is formed thereon. The amorphous silicon film 11 has a p region, an i region, and an n region.

  A second insulating film 17 is formed on the insulating film 16 and the amorphous silicon film 11. An n-type polycrystalline silicon film 10 serving as an active layer of a thin film transistor is formed on the insulating film 17 immediately above the amorphous silicon film 11.

  Gate insulating film 18 is formed on insulating film 17 and polycrystalline silicon film 10. The gate electrode 8 of the thin film transistor is formed on the gate insulating film 18 directly above the polycrystalline silicon film 10, and the electrode 5 of the first auxiliary capacitance and the lower electrode 14 of the second auxiliary capacitance are formed in the same layer.

  An interlayer insulating film 19 is formed on the gate insulating film 18, the electrode 5, the gate electrode 8, and the lower electrode 14. The transparent electrode 4 and the upper electrode 13 of the second storage capacitor are formed on the interlayer insulating film 19. Further, the source electrode 6 of the light receiving element is formed so as to be connected to the p region of the amorphous silicon film 11 through contact holes formed in the interlayer insulating film 19, the gate insulating film 18, and the insulating film 17. The drain electrode 12 of the light receiving element is connected to the n region of the amorphous silicon film 11 through a contact hole formed in the interlayer insulating film 19, the gate insulating film 18, and the insulating film 17, and the upper electrode 13 of the second storage capacitor. Formed to connect to Further, the source electrode 7 and the drain electrode 9 of the thin film transistor are formed so as to be connected to the source region and the drain region of the polycrystalline silicon film 10 through contact holes formed in the interlayer insulating film 19 and the gate insulating film 18, respectively. The source electrode 6 and the drain electrode 12 of the light receiving element and the source electrode 7 and the drain electrode 9 of the thin film transistor are formed in the same layer. Note that the backlight device is disposed on the back side of the transparent substrate 15.

  As described above, in the present image display device, the active layer of the amorphous silicon film 11 is provided immediately below the active layer of the polycrystalline silicon film 10 of the thin film transistor for controlling the voltage of the transparent electrode 4 via the insulating film 17. This is a configuration in which a light receiving element is formed. That is, the amorphous silicon film 11 is formed so as to also serve as a light-blocking layer that blocks light from the backlight device with respect to the thin film transistor and an active layer of the light-receiving element.

  It is desirable that the amorphous silicon film 11 of the light receiving element has a thickness in the range of 500 ° to 1000 °. For example, the amorphous silicon film 11 from which hydrogen has been eliminated can achieve an optical density value OD of 1.0 in the visible light region if the film thickness is about 1000 °. With this value, the thin film transistor can be used as a light shielding film for suppressing a light leakage current. Note that the optical density value OD is represented by the following equation.

OD = -log ₁₀ T (1)
Here, T is a value obtained by averaging the transmittance T (λ) of the light from the backlight device at each wavelength λ over the entire wavelength region of the spectrum.

  The light receiving element is constituted by a pn junction type or pin junction type diode. For example, n-type ion doping is performed on a half region of the amorphous silicon film 11, and p-type ion doping is performed on the other half region. A pn junction is formed when no non-doped region is provided between the n-type region and the p-type region, and a pin junction is formed when a non-doped region is provided.

  When the light receiving element is formed of a diode, as described in the section of the prior art, if the light receiving element is formed of a thin film transistor formed of an amorphous silicon film, the gate electrode is formed separately from the gate electrode of the thin film transistor formed of a polycrystalline silicon film. It is necessary to form it, and the structure becomes complicated, and the number of manufacturing steps increases. It is also for improving the performance as a light receiving element. In other words, in the case of a field effect type thin film transistor, a reverse bias voltage and a forward bias voltage are always mixed in the voltage gradient from the source electrode to the drain electrode, but in the case of a diode, the forward bias voltage or the reverse bias voltage is used. Only one of them exists. For this reason, the charge generated by light is more likely to flow through the diode, and if the light receiving element is formed of an amorphous silicon film having the same thickness and area, a larger amount of photocurrent flows through the diode, and This is because the performance is improved. Further, the transmittance of the amorphous silicon film hardly changes depending on the ion doping, so that the light receiving element constituted by the diode functions sufficiently as a light shielding film.

  Next, the configuration of the image display device of the comparative example will be described. As shown in the plan view of FIG. 3, in the image display device of the comparative example, the amorphous silicon film 21 as a light shielding layer for the thin film transistor for controlling the voltage of the transparent electrode and the amorphous silicon film 11 of the light receiving element are the same. This is a configuration provided in parallel on one layer. Therefore, the area of the light transmitting portion of the transparent electrode 24 is reduced by the provision of the light receiving element. In FIG. 3, the same components as those in FIG. 1 and components that can be treated as having the same name even though they are not the same components are denoted by the same reference numerals as those in FIG. 1, and redundant description is omitted here.

  In contrast to the comparative example having such a configuration, in the present image display device shown in FIGS. 1 and 2, the amorphous silicon film 11 is formed so as to also serve as a light-shielding layer for a thin film transistor and an active layer of a light-receiving element. In addition, it is possible to prevent a decrease in the area of the transparent electrode 4 due to the provision of the light receiving element, and to prevent a decrease in the aperture ratio of light transmission.

  Next, a method for manufacturing an array substrate in the present image display device will be described with reference to FIGS.

First, a first insulating film 16 is formed on a transparent substrate 15. The insulating film 16 is a silicon nitride film having a thickness of 500 °. An amorphous silicon film is formed on the surface of the insulating film 16 in a vacuum using a PE-CVD (plasma chemical vapor deposition) method. By performing heat treatment at 500 ° C., hydrogen is eliminated from the amorphous silicon film. The thickness of the amorphous silicon film is 1000 °. The amorphous silicon film 11 is formed in an island shape as shown in FIG. 2 by performing continuous processing by a CDE (chemical dry etching) method using a mixed gas of CF ₄ and O ₂ .

  Subsequently, a second insulating film 17 is formed on the insulating film 16, a region corresponding to half of the amorphous silicon film 11 is covered with a resist, and a region not covered with the resist is ion-doped with phosphorus P. After removing the resist, a region corresponding to the other half is covered with the resist, and a region not covered with the resist is ion-doped with boron B. At this time, if the regions where the first and second resists are not overlapped with each other and a region where ion doping is not provided at a sufficient interval are not provided, an active layer of a pn junction type light receiving element is formed. . On the other hand, in the case where the first and second resist positions are overlapped with each other to provide a region that is not ion-doped, an active layer of a pin junction type light receiving element is formed.

Subsequently, an amorphous silicon film to be an active layer of the thin film transistor is continuously formed in a vacuum using a PE-CVD method. The film thickness is 500 °. Thereafter, heat treatment is performed at 500 ° C. to remove hydrogen. An amorphous silicon film is formed in an island shape by performing continuous processing by a CDE method using a mixed gas of CF ₄ and O ₂ . The polycrystalline silicon film 10 is formed by polycrystallizing the amorphous silicon film by an ELA (excimer laser annealing) method. Here, the laser irradiation power can be applied to the amorphous silicon film on the insulating film 17 so that the amorphous silicon film can be polycrystallized without causing ablation. Is within a range that does not adversely affect.

  Subsequently, a gate insulating film 18 is formed on the insulating film 17. Subsequently, after the film is formed on the gate insulating film 18 by sputtering using MoW (molybdenum tungsten alloy), the gate electrode 8 and the electrode 5 of the first auxiliary capacitor are processed by MoW using CDE. , The scanning line 3 and the lower electrode 14 of the second storage capacitor are formed. The thickness of MoW is 2500 °.

Next, phosphorus P serving as a donor is implanted into the polycrystalline silicon film 10 using an ion doping method. The implantation conditions are an acceleration voltage of 70 KeV and a dose of 1E16 / cm ² . Here, phosphorus P is not implanted into a region located immediately below the gate electrode 8 in the entire region of the polycrystalline silicon film 10 because the gate electrode 8 serves as a self-alignment mask. Note that the phosphorus P does not reach the amorphous silicon film 11 on the first insulating film 16 so that it does not affect the amorphous silicon film 11.

  Subsequently, an interlayer insulating film 19 is formed at a deposition temperature of 400 ° C. At this time, the impurities implanted into the polycrystalline silicon film 10 are activated, and a drain region and a source region of the thin film transistor are formed. Note that the interlayer insulating film 19 is an oxide film, and its thickness is 5000 °.

  Subsequently, in the interlayer insulating film 19, the gate insulating film 18, and the insulating film 17, a contact hole is formed in a portion communicating with the p region and the n region of the amorphous silicon film 11 by using BHF (buffered hydrofluoric acid). Then, a contact hole is made in a portion of the polycrystalline silicon film 10 which communicates with the drain region and the source region. Next, a transparent electrode 4, a source electrode 7 and a drain electrode 9 of a thin-film transistor, and a source electrode 6 and a drain of a light-receiving element are formed on the interlayer insulating film 19 by a sputtering method and processed by a wet method. The electrode 12, the upper electrode 13 of the second storage capacitor, the first signal line 1, and the second signal line 2 are formed. At this time, the source electrode 6 is connected to the signal line 2. In addition, the drain electrode 9 of the thin film transistor and the transparent electrode 4 are connected by the wiring 20, and the source electrode 7 and the signal line 1 are connected. Further, the drain electrode 12 of the light receiving element is connected to the upper electrode 13 of the second storage capacitor. The electrodes and wirings formed here have a two-layer structure of Mo (upper layer) and Al (lower layer), and the thickness of Mo is 1500 ° and the thickness of Al is 4500 °.

  Subsequently, a protective film 22 is formed on the interlayer insulating film 19 by a PE-CVD method, and a contact hole (not shown) for connecting an external terminal is opened. The protection film 22 is a silicon nitride film, and its thickness is set to 2000 °. Through the above steps, an array substrate is manufactured.

  Therefore, according to the present embodiment, the amorphous silicon film 11 is formed immediately below the active layer of the polycrystalline silicon film 10 of the thin film transistor so as to also serve as the light shielding layer for the thin film transistor and the active layer of the light receiving element. In addition, it is possible to prevent the area of the transparent electrode 4 from decreasing due to the provision of the light receiving element in each pixel, thereby preventing the aperture ratio of light transmission from decreasing.

  According to the present embodiment, the thickness of the amorphous silicon film 11 is in the range of 500 ° to 1000 ° and its optical density is about 1 in the visible light region, so that the light receiving element functions sufficiently as a light shielding layer. Can be done.

  According to the present embodiment, since the light receiving element is a pn junction type or pin junction type diode, a larger amount of photocurrent flows as compared with a transistor, so that the performance as the light receiving element can be improved. .

  The gate electrode 8 blocks light from the backlight from being incident on the p-Si active layer 11.

[Second embodiment]
In the first embodiment, the active layer 11 (amorphous silicon film) of the light receiving element is formed immediately below the active layer 10 (polycrystalline silicon film) of the thin film transistor. In this case, as shown in FIG. 4, by arranging a light input device such as a light pen 35 on the transparent substrate 15 side of the array substrate 31 so that the light receiving element can easily receive light, the activation of the light receiving element can be improved. The layer 11 can efficiently absorb light that is going to be incident on the liquid crystal layer 33 from the array substrate 31 side, and can block light to the active layer 10 of the thin film transistor.

  However, in this case, there is a problem that the external light is reflected by the wiring on the array substrate 31 to deteriorate the display performance.

  Therefore, in the second embodiment, as shown in FIG. 5, an active layer 11 of a light receiving element is formed immediately above an active layer 10 of a thin film transistor disposed on a transparent substrate 16 of an array substrate via an insulating film 16. Configuration. In this case, by arranging the light pen 35 on the opposing substrate 32 side, the light incident on the liquid crystal layer 33 from the opposing substrate 32 side is efficiently absorbed by the active layer 11 of the light receiving element, and the light for the active layer 10 of the thin film transistor is emitted. Can be shielded from light. With such a configuration, the display performance is prevented from being degraded due to the reflection of the wiring on the array substrate 31.

  Further, in the first embodiment, as shown in FIG. 4, the thin film transistor is of a top gate type in which the gate electrode 8 is disposed on the active layer 10, but in the second embodiment, it is shown in FIG. As shown, a bottom gate type in which the gate electrode 8 is disposed below the active layer 10 is used.

  As described in the first and second embodiments, the present image display device has a configuration in which a light receiving element is provided so as to overlap a thin film transistor with an insulating film 16 interposed therebetween. In particular, as shown in FIGS. 4 and 5, the configuration is such that the gate electrode 8 of the thin film transistor and the active layer 11 of the light receiving element are opposed to each other with the active layer 10 of the thin film transistor interposed therebetween.

  Next, an image display device according to the second embodiment will be specifically described.

  As shown in the plan view of FIG. 6, in the present image display device, the active layer 10 of the thin film transistor and the active layer 11 of the light receiving element are arranged so as to overlap, and the area of the transparent electrode 4 is reduced by providing the light receiving element. This is a configuration that prevents the problem.

  As shown in the cross-sectional view of FIG. 7, the active layer 11 of the light receiving element is disposed immediately above the active layer 10 of the thin film transistor. The active layer 11 of the light receiving element is an i-type amorphous silicon film. An n-type amorphous silicon film 25 is stacked on one end of the amorphous silicon film, and a p-type non-silicon film is formed on the other end. The crystalline silicon film 26 is laminated to form a pin junction. The thickness of the amorphous silicon film of the light receiving element is in the range of 500 ° to 1000 °. Then, the source electrode 6 made of aluminum (Al) is connected to the n-type amorphous silicon film 25, and the drain electrode 12 made of Al is connected to the p-type amorphous silicon film 26. To form The source electrode 7 and the drain electrode 9 of the thin film transistor and the source electrode 6 and the drain electrode 12 of the light receiving element are formed in the same layer.

  As described above, by using the stacked type as the pin junction, the bonding area of the amorphous silicon film can be increased several hundred times as compared with the case where the stacked type is not used. In addition, the amorphous silicon film has a light absorptivity of about 10 times that of the polycrystalline silicon film. As a result, the amorphous silicon film 11 has a light absorption about 1000 times that of the polycrystalline silicon film. A current can be generated.

  In FIGS. 6 and 7, the same reference numerals as those in FIGS. 1 and 2 denote the same components as those in FIGS. Description is omitted.

  Next, a method of manufacturing an array substrate according to the present embodiment will be described with reference to FIGS. First, a first insulating film 16 is formed on the transparent substrate 15 to a thickness of about 1000 to 4000 °. On top of this, a metal film of Mo-Ta, Mo-W, or the like is laminated with a thickness of about 2000 to 4000 ° by sputtering or the like, and is patterned to form a gate electrode 8 and an electrode 5 of a first auxiliary capacitance. Form. A gate insulating film 18 is formed thereon with a thickness of 3000 to 4500 ° using, for example, SiOx or SiNx.

Subsequently, an amorphous silicon film to be the active layer 10 of the thin film transistor is continuously formed in a vacuum using a PE-CVD method. The film thickness is 500 °. Thereafter, heat treatment is performed at 500 ° C. to remove hydrogen from the amorphous silicon film. Then, the amorphous silicon film is processed into an island shape by a CDE method using a mixed gas of CF ₄ and O ₂ , and is polycrystallized by an ELA method to form a polycrystalline silicon film 10.

Subsequently, a second insulating film 17 is formed, and phosphorus P serving as a donor is implanted into the polycrystalline silicon film 10 using an ion doping method. The implantation conditions are an acceleration voltage of 70 KeV and a dose of about 1E16 / cm ² . However, phosphorus P is not implanted into the region above the gate electrode 8.

Subsequently, an amorphous silicon film 11 serving as a light receiving element is formed on the second insulating film 17 in a vacuum using a PE-CVD method. The film thickness is about 2000-3000 °. Thereafter, heat treatment is performed at 500 ° C. to remove hydrogen from the amorphous silicon film 11. Then, the amorphous silicon film 11 is processed into an island shape by a CDE method using a mixed gas of CF ₄ and O ₂ .

  Subsequently, a manufacturing process of the light receiving element will be described with reference to FIG. The amorphous silicon film 11 of the light receiving element is a region that is not ion-doped, and is also called an i-layer.

As shown in FIG. 8A, first, an n-type amorphous silicon film is formed on the amorphous silicon film 11 by using a mixed gas of SiH ₄ (silane), PH ₃ (phosphine), and H _2. 25 is formed in a vacuum by PE-CVD.

Subsequently, as shown in FIG. 8B, the n-type amorphous silicon film 25 is patterned by processing by a CDE method using a mixed gas of CF ₄ and O ₂ to form an amorphous silicon film. 25 is laminated only on one end of the amorphous silicon film 11. At this time, the surface of the amorphous silicon film 11 may be slightly shaved. In this case, the thickness of the shaved portion is reduced.

Subsequently, as shown in FIG. 8C, a p-type amorphous silicon film 26 is formed thereon by a PE-CVD method using a mixed gas of SiH ₄ , B ₂ H ₆ (diborane), and H _2. Continuous film formation in vacuum.

Subsequently, as shown in FIG. 8D, the p-type amorphous silicon film 26 is patterned by performing continuous processing by a CDE method using a mixed gas of CF ₄ and O _2. The film 26 is laminated only on the other end of the amorphous silicon film 11. At this time, the surface of the amorphous silicon film 11 may be slightly shaved. In this case, the thickness of the shaved portion is further reduced.

  Thus, a pin junction type amorphous silicon film is formed. The amorphous silicon film may be slightly thinner, but there is no problem if the conditions are optimized such as forming a thicker one from the beginning.

  Subsequently, the description returns to the method of manufacturing the array substrate.

  As shown in FIG. 7, a contact hole is formed in the insulating film 17 at a position corresponding to the n-type region of the thin film transistor using BHF. Next, wiring and electrodes having a two-layer structure of Mo (upper layer) and Al (lower layer) are formed by a sputtering method, and then processed by a wet method. Note that the film thicknesses of the Mo film are 1500 ° and the Al film is 4500 °. The wiring and electrodes are specifically a source electrode 7 and a drain electrode 9 of the thin film transistor, a second signal line 2 connected to the source electrode 7 of the thin film transistor, a drain electrode 9 of the thin film transistor and a transparent electrode 4 made of ITO or the like. And the like for connecting

  On the n-type amorphous silicon film 25 of the light-receiving element, the source electrode 6 of the light-receiving element connected to the first signal line 1 is formed. Then, the drain electrode 12 of the light receiving element connected to the upper electrode 13 of the second storage capacitor is formed. The source electrode 6 and the drain electrode 12 of the light receiving element are formed in the same layer.

  Subsequently, an interlayer insulating film 19 is formed on the insulating film 17 by a PE-CVD method. The material of the interlayer insulating film 19 is SiNx, and the thickness thereof is 2000 °.

  Subsequently, a contact hole is formed in the insulating film at a position corresponding to the drain region of the thin film transistor, a transparent electrode 4 serving as a pixel electrode is formed by a sputtering method, and is processed by a wet method. Through the above steps, an array substrate is manufactured.

  Therefore, according to the present embodiment, the active layer 11 of the light receiving element is formed immediately above the active layer of the polycrystalline silicon film 10 of the thin film transistor. In addition to efficiently absorbing the light incident on the thin-film transistor 33, the light can be shielded from the active layer 10 of the thin-film transistor, and a decrease in display performance due to light reflection by wiring of the array substrate 31 is prevented. be able to.

  According to the present embodiment, since the active layer 11 of the light receiving element is made of an amorphous silicon film, the light absorptance can be made about ten times that of the polycrystalline silicon film. Further, by setting the thickness of the amorphous silicon film of the light receiving element to be in the range of 500 ° to 1000 °, the optical density can be set to about 1 in the visible light region. And the light receiving element can function sufficiently as a light shielding layer.

  According to the present embodiment, for the light receiving element, an n-type amorphous silicon film 25 is laminated on one end of the amorphous silicon film 11 and a p-type amorphous silicon film 26 is formed on the other end. By stacking and forming a pin junction, the junction area of the amorphous silicon film 11 is increased several hundred times as compared with a non-stacked type. It is possible to generate a photocurrent approximately 1000 times as large.

  According to this embodiment, since the light receiving element is a pin-junction diode, more photocurrent flows than in the thin film transistor, so that the performance as the light receiving element can be further improved. Further, if a thin film transistor is used as the light receiving element, its gate electrode must be formed independently of that of a thin film transistor having a polycrystalline silicon film as an active layer, which causes problems such as a complicated structure and an increase in manufacturing steps. However, by using a diode as the light receiving element, such a problem can be prevented.

  In the present embodiment, the light-receiving element is a stacked pin junction, but a pn junction may be formed without using the amorphous silicon film 11 as an i-type.

[Third Embodiment]
In the second embodiment, when the n-type amorphous silicon film 25 and the p-type amorphous silicon film 26 are patterned in the manufacture of the light receiving element, even the surface of the amorphous silicon film 11 is shaved. Could be Therefore, in the third embodiment, as shown in the cross-sectional view of FIG. 9, a protective layer 27 made of SiN is formed on the amorphous silicon film 11 of the light receiving element, so that the amorphous silicon film 11 Is prevented from being scraped, and an amorphous silicon film 11 having a desired thickness is obtained. In addition, the same reference numerals as those in FIG. 7 denote the same components as those in FIG. 7 or components that can be handled as the same names even if they are not the same components, and redundant description will be omitted here.

  Next, a method for manufacturing the light receiving element of the present embodiment will be described with reference to FIGS.

As shown in FIG. 10A, first, an amorphous silicon film 11 is formed on the insulating film 17 in an island shape. Subsequently, as shown in FIG. 10B, a 2000-nm-thick protective layer 27 is formed on the amorphous silicon film 11 using SiNx, and an n-type amorphous silicon film 25 is formed. The protective layer 27 is patterned so as not to remain in the region. Next, an n-type amorphous silicon film 25 is formed in a vacuum by PE-CVD using a mixed gas of SiH ₄ , PH ₃ , and H ₂ .

Subsequently, as shown in FIG. 10C, the n-type amorphous silicon film 25 is patterned by processing by a CDE method using a mixed gas of CF ₄ and O ₂ to form an amorphous silicon film. 11 so as to be laminated on one end. At this time, since the surface of the amorphous silicon film 11 is protected by the protective layer 27, it is not shaved to reduce the film thickness.

  Subsequently, as shown in FIG. 10D, the protection layer 27 is patterned so as not to remain in the region where the p-type amorphous silicon film 26 is formed.

  Subsequently, as shown in FIG. 10E, a protective layer 28 of SiNx is formed thereon. Then, as shown in FIG. 10F, the protection layer 28 is patterned so as not to remain in the region where the p-type amorphous silicon film 26 is formed. Thus, only the region of the n-type amorphous silicon film 25 is covered with the protective layer 28.

Subsequently, as shown in FIG. 11A, a p-type amorphous silicon film 26 is formed thereon by a PE-CVD method using a mixed gas of SiH ₄ , B ₂ H ₆ , and H _2. To form a continuous film.

Subsequently, as shown in FIG. 11B, the p-type amorphous silicon film 26 is patterned by performing continuous processing by a CDE method using a mixed gas of CF ₄ and O ₂ to form an amorphous silicon film. The film 11 is formed so as to be laminated on the other end. At this time, since the amorphous silicon film 11 is protected by the protection layer 27 and the n-type amorphous silicon film 25 is protected by the protection layer 28, each of the n-type amorphous silicon films 25 is cut to reduce the film thickness. There is no.

  Subsequently, as shown in FIG. 11C, the protective layer 28 is removed, and as shown in FIG. 11D, the source electrode 6 is formed on the n-type amorphous silicon film 25 with Al. At the same time, the drain electrode 12 is formed on the p-type amorphous silicon film 26.

  Thus, a pin junction type amorphous silicon film is formed. Subsequent wiring, electrode formation, protection film formation, and transparent electrode formation methods are the same as in the second embodiment.

  Therefore, according to the present embodiment, since the protective layer 27 is formed on the amorphous silicon film 11 of the light receiving element, the n-type amorphous silicon film 25 is formed on the amorphous silicon film 11. When patterning the p-type amorphous silicon film 26, it is possible to prevent the surface of the amorphous silicon film 11 from being scraped, thereby obtaining the amorphous silicon film 11 having a desired thickness.

[Fourth Embodiment]
In the second and third embodiments, the active layer of the light receiving element is formed by a stacked pin junction, but in the fourth embodiment, the active layer is formed by a stacked pn junction.

  The configuration of the image display device according to the present embodiment is the same as that of FIGS. 6 and 7 except for the configuration of the light receiving element, and thus the duplicated description is omitted here, and only the method of manufacturing the light receiving element will be described. .

As shown in FIG. 12A, an n-type amorphous silicon film 25 is formed on the insulating film 17 by a PE-CVD method using a mixed gas of SiH ₄ , PH ₃ , and H _2. The n-type amorphous silicon film 25 is patterned into an island shape by processing by a CDE method using a mixed gas of CF ₄ and O ₂ . Next, a p-type amorphous silicon film 26 is continuously formed in vacuum on the amorphous silicon film 25 by a PE-CVD method using a mixed gas of SiH ₄ , B ₂ H ₆ , and H _2. I do.

Subsequently, as shown in FIG. 12B, the p-type amorphous silicon film 26 is patterned by continuous processing by a CDE method using a mixed gas of CF ₄ and O ₂ to form an n-type amorphous silicon film. It is to be laminated only on one end of the high quality silicon film 25. In this case, there is a possibility that the surface of the n-type amorphous silicon film 25 is shaved and the film thickness is slightly reduced, but there is no problem if a thicker film is formed in advance. Thus, a pn junction type amorphous silicon film is formed.

  Subsequently, as shown in FIG. 12C, the source electrode 6 is formed on the n-type amorphous silicon film 25 using aluminum, and the drain electrode is formed on the p-type amorphous silicon film 26. The electrode 12 is formed to form a pn junction type diode. Other methods of forming wirings and electrodes, forming a protective film, and forming a transparent electrode are the same as in the second and third embodiments.

  Therefore, according to the present embodiment, the pn junction is formed by stacking the p-type amorphous silicon film and the n-type amorphous silicon film for the light receiving element, and thus the junction of the amorphous silicon film is formed. The area can be increased several hundred times as compared with the non-stacked type, and the amorphous silicon film can pass a photocurrent about 10 times that of the polycrystalline silicon film. Double photocurrent can be generated.

  According to the present embodiment, since the light receiving element is a pn junction type diode, a larger amount of photocurrent flows than the thin film transistor, so that the performance as the light receiving element can be further improved.

  Also in this embodiment, the thickness of the amorphous silicon film of the light receiving element is in the range of 500 ° to 1000 °, and the optical density thereof is about 1 in the visible light region, so that the amount of incident light is about 10 It is the same as in each of the above embodiments that the light receiving element is sufficiently functioned as a light shielding layer by suppressing the light receiving element to about 1.

  Alternatively, a pin junction may be formed by disposing an i-type amorphous silicon film between a p-type amorphous silicon film and an n-type amorphous silicon film.

[Fifth Embodiment]
In the first embodiment, the amorphous silicon film 11 of the light receiving element is formed immediately below the active layer of the polycrystalline silicon film 10 of the thin film transistor so as to serve also as a light shielding layer. However, in the fifth embodiment, With this as a basic structure, as shown in FIG. 13, an n-type amorphous silicon film 25 is laminated on one end of the amorphous silicon film 11 and another end of the amorphous silicon film 11 is formed. A p-type amorphous silicon film 26 is laminated on the substrate to form a pin junction. In FIG. 13, the same reference numerals as those in FIG. 2 denote the same components as those in FIG. 2, or components that can be handled as the same names even if they are not the same components, and redundant description will be omitted here.

  As shown in FIG. 13, in the light receiving element of this image display device, the source electrode 6 is connected to the n-type amorphous silicon film 25, and the drain electrode 12 is connected to the p-type amorphous silicon film 26. It is a pin junction type diode.

  The method of manufacturing the image display device is the same as that described in the first embodiment except for the manufacturing process of the light receiving element. The manufacturing process of the light receiving element is the same as that described with reference to FIG. 8 in the second embodiment.

  As described with reference to FIG. 8, in the manufacturing process of the light receiving element, when the n-type amorphous silicon film 25 and the p-type amorphous silicon film 26 are patterned, the amorphous silicon film 11 There is a possibility that the surface may be scraped. Therefore, as described with reference to FIG. 9 in the third embodiment, also in the present embodiment, as shown in FIG. 14, a protective layer 27 of SiNx is formed on the amorphous silicon film 11 of the light receiving element. This prevents the surface of the amorphous silicon film 11 from being scraped. The method of manufacturing the light receiving element in this case is the same as that described with reference to FIGS. 10 and 11, and a duplicate description will be omitted here.

  Therefore, according to the present embodiment, even when the amorphous silicon film 11 of the light receiving element is formed just below the active layer of the polycrystalline silicon film 10 of the thin film transistor so as to serve also as a light-shielding layer, the amorphous silicon An n-type amorphous silicon film 25 is laminated on one end of the film 11 and a p-type amorphous silicon film 26 is laminated on the other end to form a pin junction. Since the junction area of No. 11 is several hundred times larger than that of the non-stacked type, a photocurrent approximately 1000 times larger than that of the polycrystalline silicon film can be generated as a result.

  According to this embodiment, since the light receiving element is a pin-junction diode, more photocurrent flows than in the thin film transistor, so that the performance as the light receiving element can be further improved.

  In this embodiment, the light receiving element is a pin junction type diode, but may be a pn junction type diode as described in the fourth embodiment. Since the configuration and the manufacturing process in this case are the same as those described with reference to FIG. 12, the duplicate description will be omitted here.

  Also in this embodiment, the thickness of the amorphous silicon film of the optical element is in the range of 500 ° to 1000 °, and the optical density thereof is about 1 in the visible light region, so that the amount of incident light is about 10 °. It is the same as in each of the above embodiments that the light receiving element is sufficiently functioned as a light shielding layer by suppressing the light receiving element to about 1.

[Sixth Embodiment]
As described in each of the above embodiments, in order to arrange the active layer 10 of the thin film transistor and the active layer 11 of the light receiving element so as to overlap with each other with the insulating film 17 interposed therebetween, the active layer 10 is connected to the active layer disposed below. The active layer disposed on the lower side has the area of the active layer disposed on the upper side so that the source electrode and the drain electrode can be disposed on the outer side of the source electrode and the drain electrode connected to the active layer disposed on the upper side. It is necessary to make the area larger than the area of the layer, which leads to an increase in the size of the array substrate.

  Therefore, in the sixth embodiment, as shown in FIG. 15, a portion between the source electrode 7 and the drain electrode 9 in the active layer 10 of the thin film transistor and a portion between the source electrode 6 and the drain electrode 12 in the active layer 11 of the light receiving element. The thin-film transistor and the light-receiving element are arranged so that the portion is substantially orthogonal.

  With such a configuration, the source electrode and the drain electrode connected to each active layer overlap each other without making the area of the lower active layer larger than the area of the upper active layer. Therefore, the array substrate can be made smaller in size.

FIG. 2 is a plan view illustrating a configuration of one pixel in the image display device according to the first embodiment. It is sectional drawing of the AB section of FIG. FIG. 9 is a plan view illustrating a configuration of one pixel in an image display device of a comparative example. FIG. 2 is a cross-sectional view schematically illustrating a configuration of the image display device according to the first embodiment. It is a sectional view showing roughly composition of an image display device of a 2nd embodiment. It is a top view showing composition of one pixel in an image display device of a 2nd embodiment. FIG. 7 is a cross-sectional view taken along a line AB in FIG. 6. It is a figure showing a manufacturing process of a light sensing element in an image display device of a 2nd embodiment. It is a sectional view showing the composition of one pixel in the image display device of a 3rd embodiment. It is a figure showing the manufacturing process of the light sensing element in the image display device of a 3rd embodiment. FIG. 11 is a view illustrating a manufacturing process following FIG. 10. It is a figure showing the manufacturing process of the light sensing element in the image display device of a 4th embodiment. It is a sectional view showing the composition of one pixel in the image display device of a 5th embodiment. It is a sectional view showing another composition of one pixel in an image display device of a 5th embodiment. It is a top view showing composition of one pixel in an image display device of a 6th embodiment.

Explanation of reference numerals

DESCRIPTION OF SYMBOLS 1 ... 1st signal line, 2 ... 2nd signal line 3 ... Scanning line, 4 ... Transparent electrode 5 ... 1st storage capacitor electrode 6 ... Source electrode of a light receiving element 7 ... Source electrode of a thin film transistor 8 ... Gate electrode of a thin film transistor 9: drain electrode of thin film transistor 10: active layer of thin film transistor (polycrystalline silicon film)
11 Active layer of light-receiving element (amorphous silicon film)
DESCRIPTION OF SYMBOLS 12 ... Drain electrode of a light receiving element 13 ... Upper electrode of 2nd auxiliary capacitance 14 ... Lower electrode of 2nd auxiliary capacitance 15 ... Transparent substrate 16 ... First insulating film, 17 ... Second insulating film 18 ... Gate insulating film Reference numerals 19, interlayer insulating film 21 amorphous silicon film, 22 protective film 24 transparent electrode 25 n-type amorphous silicon film 26 p-type amorphous silicon film 27, 28 protective layer 31 array substrate , 32 ... Counter substrate 33 ... Liquid crystal layer, 35 ... Light pen

Claims (19)

A thin film transistor having an active layer of a polycrystalline silicon film provided in each of a plurality of pixels arranged in a matrix on a transparent substrate, and provided on the thin film transistor via an insulating film so as to double as a light shielding layer for the thin film transistor An array substrate provided with a light receiving element,
An opposing substrate disposed opposite to the array substrate via a display layer,
An image display device comprising:   2. The image display device according to claim 1, wherein a gate electrode of the thin film transistor and an active layer of the light receiving element are arranged to face each other with the active layer of the thin film transistor interposed therebetween.   The image display device according to claim 1, wherein an active layer of the light receiving element is disposed immediately below an active layer of the thin film transistor.   The image display device according to claim 1, wherein an active layer of the light receiving element is disposed immediately above an active layer of the thin film transistor.   The image display device according to claim 1, wherein the active layer of the light receiving element is an amorphous silicon film.   6. The image display device according to claim 5, wherein said amorphous silicon film has a thickness in the range of 500 to 1000 degrees.   The active layer of the light receiving element has a structure in which a p-type amorphous silicon film is laminated on one end of the amorphous silicon film and an n-type amorphous silicon film is laminated on the other end of the amorphous silicon film. The image display device according to claim 1, wherein a pn junction is formed by using the pn junction.   8. The image display device according to claim 7, wherein said amorphous silicon film is i-type and a pin junction is formed.   7. The image according to claim 1, wherein the active layer of the light receiving element has a pn junction formed by laminating a p-type amorphous silicon film and an n-type amorphous silicon film. Display device.   10. The image display device according to claim 9, wherein an i-type amorphous silicon film is arranged between the p-type amorphous silicon film and the n-type amorphous silicon film to form a pin junction. .   The image display device according to any one of claims 1 to 10, wherein the light receiving element is a diode.   12. The image display device according to claim 1, wherein a source electrode and a drain electrode in an active layer of the thin film transistor and a source electrode and a drain electrode in an active layer of the light receiving element are arranged in the same layer. .   The thin film transistor and the light receiving element are arranged such that a part between a source electrode and a drain electrode in the active layer of the thin film transistor and a part between the source electrode and the drain electrode in the active layer of the light receiving element are substantially orthogonal to each other. The image display device according to claim 1. When manufacturing an array substrate that is arranged to face the opposite substrate via the display layer,
A step of forming a thin film transistor on a transparent substrate via an insulating film,
A step of forming a light receiving element directly above the thin film transistor via an insulating film,
A method for manufacturing an image display device, comprising: When manufacturing an array substrate that is arranged to face the opposite substrate via the display layer,
A step of forming a light receiving element on a transparent substrate via an insulating film,
A step of forming a thin film transistor directly above the light receiving element via an insulating film,
A method for manufacturing an image display device, comprising: In the step of forming the light receiving element, a step of forming an amorphous silicon film,
Forming an n-type amorphous silicon film at one end of the amorphous silicon film;
Forming a p-type amorphous silicon film on the other end of the amorphous silicon film;
The method for manufacturing an image display device according to claim 14, wherein the method comprises: A step of forming an n-type amorphous silicon film in the step of forming the light receiving element;
Forming a p-type amorphous silicon film on the n-type amorphous silicon film;
The method for manufacturing an image display device according to claim 14, wherein the method comprises: 18. The film forming method according to claim 16, wherein in the step of forming the n-type amorphous silicon film, the film is formed in a vacuum by a PE-CVD method using a mixed gas of SiH ₄ , PH ₃ , and H _2. Manufacturing method of an image display device. 17. The method according to claim 16, wherein, in the step of forming the p-type amorphous silicon film, the p-type amorphous silicon film is formed in a vacuum by a PE-CVD method using a mixed gas of SiH ₄ , B ₂ H ₆ , and H _2. 19. The method for manufacturing an image display device according to any one of 18.

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