JP2004303206A - Processor, its driving method, and electronic information processing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a processor capable of further reducing power consumption of an electronic information apparatus. <P>SOLUTION: This processor 10 is operated at frequency corresponding to a frequency control signal by sending out the frequency control signal to a clock generator 20, and is operated at voltage corresponding to a voltage request signal by sending out the voltage request signal to a power circuit 30. The processor 10 controls supplied clock frequency and power supply voltage so that the processor 10 itself is operated in an operating region where energy consumption is minimum in unit data processing specified by the clock frequency, power supply voltage and power source efficiency η of a power source. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a processor having a low-power-consumption operation function and a low-power-consumption technique in an information processing device incorporating the processor.

In recent years, in the field of electronic information devices and portable information processing devices, in addition to improving the processing capability of the processors used in those devices, reducing the power consumption of the processors is particularly important for portable information devices. It is becoming important in the technical field of processing equipment.
In general, power consumption is reduced by controlling the frequency of a clock supplied to a processor and controlling the supply of a power supply voltage (for example, see Patent Documents 1 and 2). A low-power operation mode is provided as a drive mode of a conventional processor, and the power consumption of the processor is reduced as compared with the normal operation mode (non-low-power operation mode) to reduce the power consumption of the processor alone. I have. That is, in the conventional low power consumption mode, the clock frequency and the power supply voltage supplied to the processor are controlled so that the power consumption of the processor alone, that is, the heat generation amount of the processor is reduced.
JP 2001-517332 A JP-T-2002-543513

  As described above, the conventional low power consumption mode focuses on the power consumption of the processor per unit time. However, from the viewpoint of battery consumption, it is necessary to consider the total amount of power consumed over time. That is, it is necessary to consider the power consumed to complete a predetermined amount of processing. In this case, the conventional low power consumption mode does not always realize the low power consumption operation.

  When the processor is operated in the conventional low power consumption mode, the power consumption per unit time in the processor is certainly reduced. However, in this case, the efficiency of the power supply is reduced and the processing capability of the processor is reduced, so that the time required to complete a predetermined amount of processing becomes longer, and the battery consumption time increases. For this reason, even if the power consumption per unit time is reduced, the time required to complete one process becomes longer, so that the total power consumption (= power per unit time × time required for processing) May not be reduced. That is, if the rate of increase in processing time in the low power consumption mode exceeds the rate of decrease in power consumption in the low power consumption mode, it will increase from the viewpoint of battery consumption.

  The present invention has been made in view of the above problems, and has as its object to provide a processor that truly reduces the power consumption of a battery, a driving method thereof, and an electronic information device including such a processor. .

  A processor according to the present invention is a processor that operates at a frequency of a clock signal supplied from a clock oscillator, operates at a power supply voltage supplied from a power supply circuit, and can control the frequency of the clock signal and the power supply voltage. The processor controls the frequency supplied by the clock oscillator and the power supply voltage supplied by the power supply circuit so that the energy consumption for the unit data processing falls within a predetermined range including the minimum value. Energy consumption for unit data processing is defined by the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit.

  A processor configured to calculate energy consumption for the unit data processing based on the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit; and a clock oscillator configured to reduce the energy consumption to a value within a predetermined range including the minimum value. Means for controlling the frequency supplied by the power supply circuit and the power supply voltage supplied by the power supply circuit.

  The processor is configured to store, based on a table stored in the storage unit, a table that stores the consumed energy defined by the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit and predetermined data processing in association with each other. Means for controlling the frequency supplied by the clock oscillator and the power supply voltage supplied by the power supply circuit such that the energy consumption is within a predetermined range including the minimum value.

  The processor controls the frequency supplied by the clock oscillator and the power supply voltage supplied by the power supply circuit so that the energy consumption defined by the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit falls within a predetermined range including the minimum value. May be set, and a second operation mode different from the first operation mode may be provided.

  The processor may monitor the state of the battery connected to the power supply circuit, and switch the operation mode according to the state of the battery.

  The processor may change the value of the frequency and the power supply voltage set in the first operation mode according to the temperature of the power supply circuit.

  The processor operates in the first operation mode only when performing predetermined processing such as download processing, display processing of a still image, and recording processing of a captured image.

  An electronic device according to the present invention includes a clock oscillator, a power supply circuit, and the above processor.

  A method according to the present invention is a method for driving a processor that operates at a frequency of a clock signal supplied from a clock oscillator and operates at a power supply voltage supplied from a power supply circuit and that can control the frequency and the power supply voltage of the clock signal. The clock oscillator supplies the power so that the energy consumption per unit data processing, which is defined by the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit, is a minimum value or a value within a predetermined range including the minimum value. And the power supply voltage supplied by the power supply circuit.

  According to the present invention, an operation region in which energy consumption is small in unit data processing is defined by a frequency, a voltage, and a power supply efficiency of a power supply, and a processor operation process is performed in the small operation region. The power consumption of the electronic information device can be reduced as compared with the technology in which the power consumption of only the processor is reduced. As a result, for example, an effect of extending the use time of the battery can be obtained. This effect becomes more remarkable in a portable information processing device that obtains energy from a battery without directly connecting to a commercial power supply.

  Hereinafter, embodiments of a processor and a method of driving a processor according to the present invention will be described with reference to the drawings. In the drawings, components having substantially the same function are denoted by the same reference numerals.

(Embodiment 1)
FIG. 1 shows a configuration of an electronic information device according to Embodiment 1 of the present invention. The electronic information device 100 according to the present embodiment includes a processor 10, a clock oscillator 20, a power supply circuit 30, a data storage unit 50, an input operation unit 60, and a display unit 70.

  The processor 10 is an arithmetic processing device such as a CPU, and issues a frequency control signal to the clock oscillator 20. The clock oscillator 20 outputs a clock signal having a frequency according to the frequency control signal to the processor 10. The processor 10 operates (drives) using the frequency of the clock signal as the operating frequency. That is, the processor 10 typically operates at the frequency of the frequency control signal. Further, the processor 10 issues a voltage request signal to the power supply circuit 30. The power supply circuit 30 outputs a voltage according to the voltage request signal, and the processor 10 operates using the output voltage from the power supply circuit 30 as a drive voltage. The processor 10 can change at least one of the clock frequency and the power supply voltage during the operation.

  The clock oscillator 20 includes an oscillation circuit 21 and a frequency dividing circuit 22, and changes the frequency of the output clock signal CLK based on the frequency control signal received from the processor 10. The frequency dividing circuit 22 outputs a clock signal obtained by dividing the frequency of the oscillation circuit 21 by a frequency dividing ratio N given from the processor. The frequency dividing circuit 22 sets the cycle of the clock signal from the oscillation circuit 21 to 周期 cycle (N = 2) or １ ／ cycle (N = 4), for example. In the present embodiment, the frequency control signal gives a frequency division ratio N according to the required frequency. Note that a voltage controlled oscillator (VCO) that linearly varies the frequency may be used without using the frequency dividing circuit 22.

  The data storage unit 50 records various parameters used by the processor 10 in controlling power supply. Specifically, the data storage unit 50 stores a set value table 51 and a processing amount table 53. The set value table 51 stores set values of the clock frequency and the power supply voltage of the processor 10 for various operation modes. The processing amount table 53 is a table in which commands executed by the processor 10 are associated with the processing amounts (load amounts).

  The input operation unit 60 is a unit for a user of the electronic information device 100 such as a keyboard, a keypad, and a mouse to input information and instructions. The display unit 70 displays information such as characters and images.

The power supply circuit 30 generates a voltage based on a voltage request signal (V ^* ) from the processor 10 and applies the voltage to the processor 10 as a power supply voltage VDD. Therefore, the processor 10 operates at the voltage of the voltage request signal (V ^* ). When the electronic information device 100 is a portable information processing device (for example, a notebook computer, a mobile phone, a PDA, or the like), the power supply circuit 30 is electrically connected to the battery 40 and supplies energy from the battery 40. I do.

FIG. 2 shows the configuration of the power supply circuit 30. The power supply circuit 30 includes a switching element 31, a duty controller 32, an inductor 33, a diode 34, and a capacitor 35. The duty controller 32 is composed of, for example, an IC, and the switching element is, for example, an FET. The power supply circuit 30 is a DC / DC converter, and converts a constant voltage (Vin) supplied from the battery 40 into a voltage (Vout) according to a voltage request signal (V ^* ) from the processor 10. Here, the switching element 31 is typically a transistor (FET). The duty controller 32 receives the voltage request signal (V ^* ) from the processor 10, detects Vout via the voltage detector 36, and controls the switching element so that the output voltage (Vout) becomes the required voltage. 31 is turned ON / OFF.

  Here, the loss (efficiency (η)) in the power supply circuit 30 will be described. The loss in the power supply circuit 30 is roughly classified into a fixed loss and a loss caused by a load current. The fixed loss includes, for example, a drive loss of the switching element generated when the switching element 31 is driven and a loss due to consumption in the duty controller 32. On the other hand, examples of the loss caused by the load current include a conduction loss of the switching element 31, a conduction loss of the inductor 33, and a loss due to a forward voltage drop of the diode. Since the fixed loss always has a fixed value, even if the output of the power supply circuit 30 is set to zero, there is a loss due to the fixed loss, so that the loss does not become zero. In other words, even when the processor 10 is operated only to minimize the power consumption, the operation of the power supply circuit 30 at such a light load is less than the operation of the power supply circuit 30 at a heavy load due to the presence of the fixed loss. Also, the ratio of the fixed loss to the total loss increases, and as a result, the power supply circuit 30 cannot achieve high efficiency at light load, which affects the power consumption of the entire device. That is, when considering the reduction of the power consumption of the entire device, it is necessary to operate the device in a region where the energy consumption is substantially minimized in consideration of the power supply efficiency of the power supply circuit 30.

Here, the concept of the low power consumption operation in the present embodiment will be described.
In the conventional low power consumption operation focusing only on the configuration around the processor 10, the clock frequency and the power supply voltage (and, in some cases, only the frequency) are set so that the power consumption is reduced for the processing given to the processor 10. Control. In other words, the clock frequency and the power supply voltage are controlled so as to minimize the heat generation of the processor. However, when the processor 10, which is the load, is viewed from the battery, the power supply circuit 30 is not ideal, and actually has a predetermined power supply efficiency η. A loss of 30 should also be considered. That is, it is preferable to set the frequency and the voltage so that the power consumption is reduced in both the power supply circuit 30 and the processor 10.
The inventor of the present invention has proposed a method of performing a predetermined amount of data processing using a predetermined processor (here, Xscale manufactured by Intel Corporation), the power consumption, the current from the battery 40, and the total amount (consumption Power). The results are shown in Table 1 below.

In Table 1, the values of the power consumption, the battery current, the processing time, and the energy consumption are represented by relative values from which a predetermined coefficient is omitted for convenience of explanation. In Table 1, the power supply voltage (VDD) and the clock frequency (f) are determined by the specifications of the processor 10, and they are associated one-to-one. The power consumption is determined by fV ² from the drive voltage (VDD) and the clock frequency (f). The power supply efficiency (η) of the power supply circuit 30 is determined by the specifications of the power supply circuit 30 according to the power supply voltage (VDD) and the clock frequency (f). The value of the battery current can be represented by fV ² / η.

  Here, the processing time caused by the difference in frequency is determined as 400 / f. Note that the value of the processing time is shown as a relative value obtained by normalizing the processing time when the drive voltage is 1.3 [V] as a reference. The energy consumption is calculated as the product of the battery current and the processing time (relative value). FIG. 3 shows a plot of the relationship in Table 1.

  As shown in FIG. 3, even if the clock frequency (f) is reduced to the lowest level (133 MHz) in order to suppress the power consumption of the processor 10, the energy consumption is not the minimum. This is due to the effect of the power supply efficiency (η). In the case of the operation at the second lowest clock frequency (200 MHz), the lowest energy consumption value is shown. In the conventional method, the power consumption is reduced by minimizing the frequency. However, as shown in the figure, it can be seen that in such a control method, the energy consumption may not be the minimum.

  Thus, in the present embodiment, an operation mode (optimal operation mode) is provided in which an operating point at which energy consumption is minimized is found, and the processor 10 is driven in that operating point or in a predetermined operating area including the operating point. In this operation mode, the power consumption of the processor 10 alone is not always minimized. However, in consideration of the processing capability of the processor 10, the energy consumption taking the efficiency of the power supply circuit 30 into consideration is the case where the frequency is simply minimized. Can be reduced.

  That is, in the case of the electronic information device of the present embodiment, the processor 10 is driven at the above-mentioned operation point or an operation area including the same. In other words, the processor 10 has a function of performing arithmetic processing in an operation region where the energy consumption for the unit data processing is minimum or minimum. Here, the energy consumption for the unit data processing is defined by the frequency (CLK), the voltage (V), and the power supply efficiency (η) of the power supply circuit 30. Since the "unit data processing" is an operation of processing a fixed amount of data, if the clock frequency increases, the processing ends earlier, while if the clock frequency decreases, the processing ends later.

  FIG. 4A shows an example of a configuration for causing the processor 10 to realize such a function. The processor 10 includes an energy consumption calculator 10a and a drive power controller 10b. The energy consumption calculation unit 10a calculates energy consumption for unit data processing from various clock frequencies from the clock frequency, the power supply voltage, and the power supply efficiency. The drive power control unit 10b obtains an operation region (ie, frequency and power supply voltage) in which the energy consumption is small in the unit data processing from the calculated result, and obtains the obtained operation region (200 [MHz], 1 in FIG. 3). . 1 [V]), a frequency control signal and a voltage request signal are generated and output so as to drive the processor 10. Here, the “small operation area” typically refers to a point at which the calculated “energy consumption for unit data processing” is minimal (minimum) or a predetermined area including the point. For example, it refers to a region of the minimum point ± (frequency of the minimum point × 25% (preferably 10%)). In the example shown in FIG. 3, for example, the range is 200 MHz ± 50 Mz (preferably, 200 MHz ± 20 Mz).

  When the electronic information device is a portable information processing device such as a mobile phone, the operation of the arithmetic processing is often limited to a predetermined operation pattern. Thus, as illustrated in FIG. 4B, the processor 10 may include a table 10c that associates the operation pattern with the energy consumption for the operation pattern. The table 10c may be stored in a storage unit provided outside the processor 10. Then, the drive power control unit 10b of the processor 10 refers to the table 10c while monitoring the operation pattern of the electronic information device, and sets the frequency control signal and the power supply voltage so as to set the clock frequency and the power supply voltage according to the energy consumption. A voltage request signal may be generated. In other words, for a predetermined operation pattern that does not require high-speed processing, driving may be performed in the optimum power mode that minimizes energy consumption, and in another operation pattern, operation may be performed in the high-speed mode.

(Embodiment 2)
The electronic information device of the present embodiment is a processor that performs the power control described in the first embodiment, and further includes a processor that has four operation modes related to power consumption.

First, the operation mode will be described. The processor 10 of the present embodiment has four operation modes as a high-speed operation mode, an optimum power mode, a low-power mode, and a sleep mode. Each operation mode is switched based on a balance between a demand for low power consumption and a required processing capability.
"High-speed operation mode"
This is a drive mode for fully exploiting the performance of the processor 10, and is a mode in which the processor 10 is driven at a higher frequency and a higher power supply voltage than other modes. Therefore, power consumption becomes larger. The mode is switched to this mode when the processing amount is large. In the example of Table 1 and FIG. 3, the driving is performed at a clock frequency of 400 [MHz] and a driving voltage of 1.3 [V].
"Optimal power mode"
This is an operation mode in which the consumption of the battery 40 is minimized in consideration of the power consumption of both the processor 10 and the power supply circuit 30. That is, in this mode, the processor 10 is driven in the power region where the power consumption is lowest determined by the clock frequency, the power supply voltage, and the efficiency of the power supply circuit. In the example of Table 1 and FIG. 3, the driving is performed at the clock frequency of 200 [MHz] and the power supply voltage of 1.1 [V], which minimize the energy consumption.
"Low power mode"
Used when waiting for a process to be executed (for example, a command input waiting state). In this mode, the processor 10 is driven with a clock frequency and a power supply voltage lower than those in the optimum power mode. In the example of Table 1 and FIG. 3, the driving is performed at the minimum clock frequency of 133 [MHz] and the power supply voltage of 0.935 [V].
"sleep mode"
This is an operation mode when the processor is in the sleep state, in which the instantaneous value of energy consumption is minimized. The clock frequency and the power supply voltage are the same as in the low power mode, but the low power mode is executed intermittently.

  FIG. 5 shows an example of the set values of the clock frequency and the power supply voltage for each mode stored in the set value table 51.

The operation mode setting process by the processor 10 will be described with reference to the flowchart of FIG. This processing is periodically executed in a predetermined cycle.
First, the amount of processing (processing amount) to be executed by the processor 10 is determined (S11). For the processing amount (load amount), for example, the processing amount for the command to be processed is obtained by referring to the processing amount table 53. Next, it is determined whether or not the processing amount is 0 (S12). If the processing amount is 0, the operation mode is set to the sleep mode (S13).

  If the processing amount is not 0, the voltage of the battery 40 is detected, the remaining amount is detected (S14), and it is determined whether the remaining amount of the battery 40 is sufficient (S15).

  When the remaining amount is not sufficient (when the remaining amount is less than the predetermined amount), the operation mode is set to a low power mode in which the device is driven with a low power supply voltage (S16). The reason for setting the low power mode is that the remaining amount of the battery 40 is small and the battery 40 cannot supply a high power supply voltage. FIG. 7 is a diagram showing a general relationship between the remaining amount of the battery and the current (discharge current) that can be drawn from the battery. The discharge conditions in the figure are constant current discharge and a temperature of 20 ° C. As shown in the figure, since the output voltage of the battery is determined according to the remaining amount of the battery and the discharge current, it is desirable to set the operation mode in consideration of the remaining amount of the battery as described above. When the low power mode is set, the set values of the clock frequency and the power supply voltage for the low power mode are read from the set value table 51.

  On the other hand, when the remaining amount of the battery is sufficient (when it is equal to or more than the predetermined amount), it is determined whether or not the user's instruction requires high-speed processing (S17), and the user's instruction requires high-speed processing. If it is, the high-speed operation mode is set (S18), and if the user's instruction does not request high-speed processing, the optimum power mode is set (S19). The user's instruction is input via the input operation unit 60. As described above, the determination as to whether or not to set the high-speed operation mode according to the user's instruction is made when the amount of processing is large, and it may take a long time in the optimal power mode. This is because it is more convenient for the user to give priority to consumption or processing time depending on the user's intention.

  Next, control of the power supply circuit 30 by the processor 10 will be described with reference to the flowchart of FIG. This processing is executed when the operation mode is newly set or changed.

  When the operation mode is set as described above, the set values of the clock frequency and the power supply voltage are read out according to the set operation mode with reference to the set value table 51 (S31). A frequency control signal is output to the clock oscillator 20 based on the read clock frequency setting value (S32). Thus, the clock oscillator 20 outputs a clock signal having a frequency corresponding to the frequency control signal. Further, a voltage request signal is output to the power supply circuit 30 based on the read set value of the power supply voltage (S33). The power supply circuit 30 thereby outputs a power supply voltage according to the voltage request signal. Through the above processing, the processor 10 is driven in the set operation mode.

(Embodiment 3)
In the above embodiment, the operation mode is set such that the energy consumption is minimized in consideration of the efficiency η of the power supply circuit 40. However, it is known that the efficiency η of the power supply circuit 40 varies according to the ambient temperature. In the present embodiment, a method of determining a set value of the optimum power mode in consideration of a temperature change will be described.

  In order to enable setting values to be determined in consideration of temperature fluctuations, an optimum power mode setting value table 55 as shown in FIG. 9 is newly provided. The optimum power mode setting value table 55 is stored in the data storage unit 50. The optimum power mode set value table 55 manages the temperature of the power supply circuit 40, the clock frequency that gives the minimum point of energy consumption at or near the temperature, and the set value of the power supply voltage in association with each other. These values are obtained in advance by experiments.

  With reference to the flowchart of FIG. 10, a description will be given of a process of determining a set value in the optimal power mode in consideration of temperature fluctuation. First, the temperature around the power supply circuit 30 is detected using a temperature detecting element such as a thermistor (S41). Then, referring to the optimum power mode set value table 55, the set values of the clock frequency and the power supply voltage associated with the detected temperature are obtained (S42).

  As described above, by optimizing the set value according to the temperature fluctuation, it is possible to set the optimum value for the actual use environment. It is considered that the above-described optimization of the set value may be performed when the power of the electronic information device is turned on. However, the optimization may be performed periodically or each time a predetermined process appears.

(Embodiment 4)
Another example of the method of determining the set value of the optimum power mode in consideration of the temperature fluctuation will be described with reference to the flowchart of FIG. In the following, optimization is performed based on the actually measured operating power of the processor 10.

In FIG. 11, first, the operating power (P) of the processor 10 is measured (S51). The power P of the processor 10 can be measured by, for example, monitoring the input / output voltages Vin and Vout of the power supply circuit 30 that supplies power to the processor 10 and using the following equation.
P = Vin * Iin / Vout * Iout

Next, while changing the clock frequency (f), the energy consumption per unit processing amount for a plurality of frequencies is calculated by the following equation (S52).
Energy consumption per unit processing amount = Operating power (P) / clock frequency (f)

  Of the plurality of calculated energy consumptions per unit processing amount, the one with the minimum energy consumption is specified, and the clock frequency (f) at that time is determined as a set value (S53). Then, the set value of the power supply voltage (VDD) is determined based on the determined clock frequency (S54).

(Embodiment 5)
In the electronic information device of the first embodiment, the processor 10 may monitor the state of charge of the battery 40 connected to the power supply circuit 30 as shown in FIG. As shown in FIG. 7, the battery 30 has different histories depending on the conditions of use (in FIG. 7, three current value lines are clearly shown). Is preferable to operate. The state of charge of the battery 40 can be determined based on the voltage (V), current (I), and temperature (T) of the battery 40. At this time, the processor 10 controls the operation of the processor 10 according to the state of charge of the battery 40.

  In the example shown in FIG. 3, it is preferable to operate at 200 MHz from the viewpoint of power saving, but from the viewpoint of the battery state (that is, the voltage obtained from the battery state at that time), the capacity of the battery 30 is considered. Then, an operable range may be found out (or obtained in advance), and operation may be performed at a predetermined frequency within the operable range.

The discharge current is calculated based on the battery current (fV ² / η) shown in Table 1, and the capacity (charged state) (the value on the horizontal axis in FIG. 3) is obtained based on the voltage, current, and temperature of the battery 40. For example, the maximum voltage obtained at that time is obtained from FIG.

  As a result of obtaining the maximum voltage, even when the battery 40 is operating in the optimum power mode, if the state of charge of the battery 40 becomes low and it is not expected to continuously obtain the voltage required for the optimum power mode, A transition to the low power mode may be made.

(Modification)
According to the configurations of the first to fifth embodiments described above, the processor 10 is a processor that can change at least one of the operating frequency and the driving voltage during the operation, so that the power consumption at the normal level can be reduced. In addition, when the unit data amount is processed in consideration of the operating frequency (clock frequency) of the processor, the power supply voltage, and the power supply efficiency of the power supply for applying the voltage to the processor, The arithmetic processing of the processor can be performed in the operation region where the energy consumption is small. For this reason, it is possible to realize an electronic information device with lower power consumption, which has been difficult to achieve with a power-saving design focusing only on a conventional processor.

  The arithmetic processing performed in the operation area where the energy consumption is small is a non-real-time processing that does not require the completion of the processing within a predetermined time (for example, download processing, display processing of a still image, recording of a captured image). Is preferred. The reason is that real-time processing (for example, voice call processing and moving image display processing) that requires completion of processing within a predetermined time is originally considered to be slow if the processing is delayed in consideration of power consumption. This is because the processing to be performed is hindered.

  Further, in the non-real-time processing, the power consumption cannot be reduced to a frequency region lower than the frequency (200 MHz in the example of FIG. 3) at which the energy consumption is substantially minimized. The state of the CPU may be switched to a sleep mode such as.

  Note that the electronic information devices of the above embodiments include notebook computers, mobile phones, PDAs, computers, digital cameras, and other information processing devices that process information electronically. This is because, even for an electronic information device that can be connected to a commercial power source, power saving of the entire device has an effect of, for example, saving electricity costs. The effect of the present invention is more remarkable in a device (portable device) which has a built-in battery and is not connected to a commercial power supply and is carried.

  The output of the power supply circuit 30 is appropriately set by the electronic information device using the power supply circuit 30 and is, for example, 1.2 V to 15 V. As the battery 40, a suitable battery may be selected according to the electronic information device using the same. However, ignoring actual problems such as size and cost, in principle, the type of the battery 40 is not limited as long as it can supply a required voltage, and a primary battery, a secondary battery, It may be a fuel cell, a lithium ion battery, a Ni-hydrogen battery, an alkaline battery, or a manganese battery.

  As described above, the preferred examples of the present invention have been described. However, such description is not a limitation and, of course, various modifications can be made.

  INDUSTRIAL APPLICABILITY The present invention can be applied to an electronic information device including a processor capable of controlling a driving frequency and a power supply voltage, and in particular, an electronic device including a processor to which a power supply voltage is supplied from a limited power supply such as a portable information terminal. Useful for information equipment.

The figure which shows the structure of the electronic information equipment which concerns on this invention. Diagram showing the configuration of the power supply circuit Graph showing the relationship between the clock frequency and the calculated value of each energy consumption, etc. Diagram explaining the functions of the processor Diagram illustrating different processor functions Diagram showing an example of a setting value table Flowchart of operation mode setting process Graph showing an example of the relationship between dischargeable capacity and voltage for each discharge current of a battery Flow chart of power supply circuit control processing The figure which shows an example of the setting value table for optimal power modes Flowchart of determination processing of set value of optimal power mode Flowchart of another example of the process for determining the set value of the optimum power mode The figure which shows another structure of the electronic information equipment which concerns on this invention.

Explanation of reference numerals

10. Processor (arithmetic unit)
Reference Signs List 20 clock oscillator 21 frequency dividing circuit 22 oscillation circuit 30 power supply circuit 40 battery 50 data storage unit 60 input operation unit 70 display unit

Claims (9)

A processor that operates at the frequency of the clock signal supplied from the clock oscillator, operates at the power supply voltage supplied from the power supply circuit, and can control the frequency of the clock signal and the power supply voltage,
The frequency supplied by the clock oscillator so that the energy consumption for unit data processing is defined by the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit within a predetermined range including the minimum value. And a power supply voltage supplied by the power supply circuit. Means for calculating the energy consumption for the unit data processing, based on the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit,
Means for controlling a frequency supplied by the clock oscillator and a power supply voltage supplied by the power supply circuit so that the consumed energy is a value within a predetermined range including the minimum value. The processor of claim 1. The processor is a storage unit in which a table that stores the energy consumption defined by the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit in association with predetermined data processing is recorded,
Means for controlling a frequency supplied by the clock oscillator and a power supply voltage supplied by the power supply circuit, based on a table stored in the storage means, such that the consumed energy falls within a predetermined range including the minimum value. The processor according to claim 1, further comprising:   The processor is configured to control the frequency supplied by the clock oscillator and the power supply so that the energy consumption defined by the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit falls within a predetermined range including a minimum value. 2. The processor according to claim 1, comprising a first operation mode for setting a value of a power supply voltage supplied by the circuit, and a second operation mode different from the first operation mode.   The processor according to claim 4, wherein the processor monitors a state of a battery connected to the power supply circuit, and switches the operation mode according to the state of the battery.   The processor according to claim 4, wherein the processor changes the value of the frequency and the power supply voltage set in the first operation mode according to the temperature of the power supply circuit.   2. The processor according to claim 1, wherein the processor operates in the first operation mode only when performing predetermined processing such as download processing, display processing of a still image, and recording processing of a captured image. 3. . A clock oscillator,
Power supply circuit,
An electronic information device comprising: the processor according to claim 1. A method of operating a processor that operates at a frequency of a clock signal supplied from a clock oscillator, operates at a power supply voltage supplied from a power supply circuit, and controls a frequency of the clock signal and the power supply voltage,
The clock oscillator is configured such that the energy consumption for unit data processing, which is defined by the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit, is a minimum value or a value within a predetermined range including the minimum value. A method for driving a processor, comprising: controlling a supplied frequency and a power supply voltage supplied by the power supply circuit.

Images