JP2004303206A5 - - Google Patents

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Publication number
JP2004303206A5
JP2004303206A5 JP2004054270A JP2004054270A JP2004303206A5 JP 2004303206 A5 JP2004303206 A5 JP 2004303206A5 JP 2004054270 A JP2004054270 A JP 2004054270A JP 2004054270 A JP2004054270 A JP 2004054270A JP 2004303206 A5 JP2004303206 A5 JP 2004303206A5
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JP
Japan
Prior art keywords
power supply
frequency
processor
supply voltage
supplied
Prior art date
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Granted
Application number
JP2004054270A
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Japanese (ja)
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JP4360938B2 (en
JP2004303206A (en
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Publication date
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Priority to JP2004054270A priority Critical patent/JP4360938B2/en
Priority claimed from JP2004054270A external-priority patent/JP4360938B2/en
Publication of JP2004303206A publication Critical patent/JP2004303206A/en
Publication of JP2004303206A5 publication Critical patent/JP2004303206A5/ja
Application granted granted Critical
Publication of JP4360938B2 publication Critical patent/JP4360938B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Claims (9)

クロック発振器から供給されるクロック信号の周波数で動作するとともに、電源回路から供給される電源電圧で動作し、前記クロック信号の周波数及び前記電源電圧を制御可能なプロセッサであって、
前記周波数と、前記電源電圧と、前記電源回路の電源効率とによって規定される、単位データ処理に対する消費エネルギがその最小値を含む所定範囲内の値となるように、前記クロック発振器が供給する周波数及び前記電源回路が供給する電源電圧を制御する
ことを特徴とするプロセッサ。
A processor that operates at a frequency of a clock signal supplied from a clock oscillator, operates at a power supply voltage supplied from a power supply circuit, and can control the frequency of the clock signal and the power supply voltage;
The frequency supplied by the clock oscillator so that the energy consumption for unit data processing is a value within a predetermined range including the minimum value, which is defined by the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit. And a processor for controlling a power supply voltage supplied by the power supply circuit.
前記プロセッサは、前記周波数と前記電源電圧と前記電源回路の電源効率とに基づいて、前記単位データ処理に対する消費エネルギを算出する手段と、
前記消費エネルギがその最小値を含む所定範囲内の値となるように、前記クロック発振器が供給する周波数及び前記電源回路が供給する電源電圧を制御する手段と
を備えたことを特徴とする請求項1記載のプロセッサ。
The processor calculates energy consumption for the unit data processing based on the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit;
And a means for controlling a frequency supplied by the clock oscillator and a power supply voltage supplied by the power supply circuit so that the energy consumption becomes a value within a predetermined range including the minimum value. The processor according to 1.
前記プロセッサは、前記周波数と前記電源電圧と前記電源回路の電源効率とによって規定される消費エネルギと、所定のデータ処理とを関連づけて格納するテーブルが記録された記憶手段と、
該記憶手段に格納されたテーブルに基づき、前記消費エネルギがその最小値を含む所定範囲内の値となるように、前記クロック発振器が供給する周波数及び前記電源回路が供給する電源電圧を制御する手段と
を備えたことを特徴とする請求項1記載のプロセッサ。
The processor includes a storage unit in which a table for storing energy associated with predetermined data processing and energy consumption defined by the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit is recorded;
Based on the table stored in the storage means, means for controlling the frequency supplied by the clock oscillator and the power supply voltage supplied by the power supply circuit so that the energy consumption becomes a value within a predetermined range including the minimum value. The processor according to claim 1, further comprising:
前記プロセッサは、前記周波数と前記電源電圧と前記電源回路の電源効率とによって規定される消費エネルギがその最小値を含む所定範囲内の値となるように、前記クロック発振器が供給する周波数及び前記電源回路が供給する電源電圧の値を設定する第1の動作モードと、第1の動作モードと異なる第2の動作モードとを有することを特徴とする請求項1記載のプロセッサ。   The processor supplies the frequency and the power supply supplied by the clock oscillator so that the energy consumption defined by the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit is a value within a predetermined range including the minimum value. 2. The processor according to claim 1, further comprising: a first operation mode for setting a value of a power supply voltage supplied by the circuit; and a second operation mode different from the first operation mode. 前記プロセッサは、前記電源回路に接続される電池の状態をモニタし、前記電池の状態に応じて前記動作モードを切替える、ことを特徴とする請求項4記載のプロセッサ。   5. The processor according to claim 4, wherein the processor monitors a state of a battery connected to the power supply circuit and switches the operation mode according to the state of the battery. 前記プロセッサは、前記第1の動作モードにおいて設定される周波数及び電源電圧の値を前記電源回路の温度に応じて変更する、ことを特徴とする請求項4記載のプロセッサ。   5. The processor according to claim 4, wherein the processor changes a value of a frequency and a power supply voltage set in the first operation mode according to a temperature of the power supply circuit. 前記プロセッサは、ダウンロード処理、静止画の表示処理、撮影した画像の記録処理等の所定の処理を行うときにのみ前記第1の動作モードで動作する、ことを特徴とする請求項記載のプロセッサ。 5. The processor according to claim 4 , wherein the processor operates in the first operation mode only when performing predetermined processing such as download processing, still image display processing, and captured image recording processing. . クロック発振器と、
電源回路と、
請求項1ないし7のいずれか1つに記載のプロセッサと
を含むことを特徴とする電子情報機器。
A clock oscillator,
A power circuit;
An electronic information device comprising the processor according to claim 1.
クロック発振器から供給されるクロック信号の周波数で動作するとともに、電源回路から供給される電源電圧で動作し、前記クロック信号の周波数及び前記電源電圧を制御可能なプロセッサの駆動方法であって、
前記周波数と、前記電源電圧と、前記電源回路の電源効率とによって規定される、単位データ処理に対する消費エネルギが最小値又はその最小値を含む所定範囲内の値となるように、前記クロック発振器が供給する周波数及び前記電源回路が供給する電源電圧を制御する
ことを特徴とするプロセッサの駆動方法。
A method for driving a processor that operates at a frequency of a clock signal supplied from a clock oscillator, operates at a power supply voltage supplied from a power supply circuit, and can control the frequency of the clock signal and the power supply voltage,
The clock oscillator is configured such that the energy consumption for unit data processing, which is defined by the frequency, the power supply voltage, and the power supply efficiency of the power supply circuit, is a minimum value or a value within a predetermined range including the minimum value. A method for driving a processor, characterized by controlling a frequency to be supplied and a power supply voltage supplied from the power supply circuit.
JP2004054270A 2003-03-18 2004-02-27 Processor, driving method thereof, and electronic information processing apparatus Expired - Fee Related JP4360938B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004054270A JP4360938B2 (en) 2003-03-18 2004-02-27 Processor, driving method thereof, and electronic information processing apparatus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003073838 2003-03-18
JP2004054270A JP4360938B2 (en) 2003-03-18 2004-02-27 Processor, driving method thereof, and electronic information processing apparatus

Publications (3)

Publication Number Publication Date
JP2004303206A JP2004303206A (en) 2004-10-28
JP2004303206A5 true JP2004303206A5 (en) 2007-01-18
JP4360938B2 JP4360938B2 (en) 2009-11-11

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Family Applications (1)

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JP2004054270A Expired - Fee Related JP4360938B2 (en) 2003-03-18 2004-02-27 Processor, driving method thereof, and electronic information processing apparatus

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Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2877784A1 (en) * 2004-11-08 2006-05-12 Thomson Licensing Sa APPARATUS AND DEVICE WITH ELECTRIC POWER SUPPLY AND POWER SUPPLY MODULE
US20090232278A1 (en) * 2005-01-31 2009-09-17 Konica Minolta Medical & Graphic, Inc. Radiation image detector and radiation imaging system
JP4555140B2 (en) * 2005-04-22 2010-09-29 株式会社日立製作所 Compound computer apparatus and management method thereof
US7886167B2 (en) * 2006-05-11 2011-02-08 Intel Corporation Load circuit supply voltage control
JP4888087B2 (en) * 2006-11-30 2012-02-29 カシオ計算機株式会社 Mobile device
JP5138284B2 (en) * 2007-06-25 2013-02-06 京セラ株式会社 Information processing device
US7908496B2 (en) * 2007-09-29 2011-03-15 Intel Corporation Systems and methods for communicating voltage regulation information between a voltage regulator and an integrated circuit
JP2010277350A (en) * 2009-05-28 2010-12-09 Toshiba Corp Electronic device
US8271812B2 (en) * 2010-04-07 2012-09-18 Apple Inc. Hardware automatic performance state transitions in system on processor sleep and wake events
US8468373B2 (en) * 2011-01-14 2013-06-18 Apple Inc. Modifying performance parameters in multiple circuits according to a performance state table upon receiving a request to change a performance state
JP5089790B2 (en) * 2011-05-17 2012-12-05 株式会社ソニー・コンピュータエンタテインメント Power supply device and electronic device using the same
JP6119502B2 (en) * 2013-08-12 2017-04-26 富士通株式会社 Electronics
JP2015130730A (en) * 2014-01-07 2015-07-16 日本電気株式会社 Power control unit, power control method, and program
US9936147B2 (en) * 2014-03-28 2018-04-03 Varex Imaging Corporation Low power standby mode in wireless imagers
US9977439B2 (en) 2014-04-08 2018-05-22 Qualcomm Incorporated Energy efficiency aware thermal management in a multi-processor system on a chip

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