JP2004296624A

JP2004296624A - Semiconductor device

Info

Publication number: JP2004296624A
Application number: JP2003084956A
Authority: JP
Inventors: Takaaki Yokoyama; 隆昭横山; Nobuo Inoue; 信雄井上; Norio Maejima; 紀男前島
Original assignee: Sanken Electric Co Ltd
Current assignee: Sanken Electric Co Ltd
Priority date: 2003-03-26
Filing date: 2003-03-26
Publication date: 2004-10-21

Abstract

<P>PROBLEM TO BE SOLVED: To relax a stress being applied to an electronic component arranged while crosslinking from conductor to conductor. <P>SOLUTION: A first conductor (1) and a second conductor (2) have notched surfaces (6), respectively, inclining downward toward the approaching direction. Each electrode (8) of an electronic component (3) arranged while crosslinking the first conductor (1) and the second conductor (2) is bonded to the notched surfaces (6) by a metallic adhesive (5) formed of a metal having a modulus of longitudinal elasticity lower than that of the first conductor (1) and the second conductor (2) and having a lower adhesive (5a) formed thickly between the bottom face (8c) of the electrode (8) and the notched surface (6) from the corner part (8a) to the inner end part (8b) of the electrode (8). A mechanical stress being transmitted to the electronic component (3) is relaxed and attenuated well by cushion action of the lower adhesive (5a) thus preventing the electric characteristics of the electronic component (3) from deteriorating. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体装置、特に互いに間隙を空けて配置された導体の間に架橋して配置される電子部品に加わる応力を良好に緩和できる半導体装置に関する。
【０００２】
【従来の技術】
下記特許文献１に開示されるように、互いに間隙を空けて配置された導体の間にチップ抵抗素子又は積層コンデンサ等の電子部品を架橋して配置した半導体装置は公知である。特許文献１の図１は、チップ抵抗素子が一定間隔を空けて形成された配線導体（インナリード）に架橋して配置され、チップ抵抗素子の両端部が半田により配線導体に各々固着されている樹脂封止型半導体装置を示す。チップ抵抗素子は、セラミックにより形成される本体部の抵抗と、本体部の両端に形成され且つ導電性の金属により形成される一対の電極とを有し、一対の電極が配線導体の上面に半田付けされている。
【０００３】
【特許文献１】
特開平６−１２０４０６号公報（図３及び図４）
【０００４】
【発明が解決しようとする課題】
図１１に示すように、例えば、チップ抵抗素子を備えた半導体装置は、互いに間隙（３７）を空けて配置された第１の配線導体（３１）及び第２の配線導体（３２）を有するリードフレーム（３４）と、間隙（３７）を架橋して第１の配線導体（３１）と第２の配線導体（３２）との間に配置されたチップ抵抗素子（３３）とを備える。第１の配線導体（３１）及び第２の配線導体（３２）は、銅等の金属により成る帯状の金属板から構成されており、互いに対向し且つ垂直に形成された対向面（３１ｃ，３２ｃ）と、水平に形成された上面（３１ａ，３２ａ）とを有する。第１の配線導体（３１）と第２の配線導体（３２）とは、第１の配線導体（３１）の上面（３１ａ）と第２の配線導体（３２）の上面（３２ａ）とが同一の平面上に位置するように形成されることが望ましい。
【０００５】
しかしながら、この種の半導体装置における配線導体又は支持板等の導体は、銅等の金属により成る金属板に周知の打ち抜き加工を施して形成することが多い。このため、隣接する導体が同一の平面上に位置せず、若干上下に偏位して配置されることがある。上下に偏位して配置された導体の間に電子部品を半田付けすると、導体を同一平面上に位置させたとき、電子部品に過大な応力が加わる。図１１に示すように、チップ抵抗素子（３３）の両端部（３３ａ）は、配線導体（３１，３２）の上面（３１ａ，３２ａ）に直接又は肉薄の半田を介して載置されるため、配線導体（３１，３２）に加わる過大な応力が金属により形成される電極（３８）とセラミックにより形成される本体部（３９）に伝達される。このため、曲応力が集中する本体部（３９）にクラックが生じてチップ抵抗素子（３３）の電気的特性の劣化を生じることがある。また、チップコンデンサ素子に同様のクラックが発生すると、チップコンデンサ素子が短絡による不具合を起こすことがあった。このような電子部品の電気的特性の劣化は、搬送時又はタイバー切断時にも生じ、更に配線導体に限らず支持板等の導体間に架橋して配置された電子部品にも発生した。
【０００６】
上記特許文献１は、配線導体に対する応力を緩和するため、配線導体に溝を形成し、溝により配線導体に加わる応力を吸収する構造を開示する。しかしながら、配線導体と電子部品の両端部とが強固に固着され、配線導体に加わる応力が電子部品にそのまま伝わる構造では、応力は溝により良好に緩和されず、電子部品の電気的特性の劣化を防止することはできなかった。
【０００７】
そこで、本発明は、導体から導体に架橋して配置された電子部品に加わる応力を良好に緩和できる半導体装置を提供することを目的とする。
【０００８】
【課題を解決するための手段】
本発明による半導体装置は、互いに間隙（７）を空けて配置された第１の導体（１）及び第２の導体（２）と、間隙（７）を架橋して第１の導体（１）と第２の導体（２）との間に配置された電子部品（３）とを備え、半田又はろう材から成る導電性の金属製接着材（５）により第１の導体（１）と第２の導体（２）とに電子部品（３）の両端部（３ａ）に設けた電極（８）を電気的に接続する。第１の導体（１）及び第２の導体（２）の各々は、互いに接近する方向に向かって下方に低下する切欠面（６）を有し、電子部品（３）の各電極（８）は、切欠面（６）に対向する隅部（８ａ）と、切欠面（６）に対して隅部（８ａ）から内端部（８ｂ）に向かって徐々に離間する底面（８ｃ）と、隅部（８ａ）から垂直に延伸する側面（８ｄ）とを有し、金属製接着材（５）は、第１の導体（１）及び第２の導体（２）より縦弾性係数の低い金属により形成され且つ電極（８）の底面（８ｃ）と切欠面（６）との間を接着して隅部（８ａ）から内端部（８ｂ）に向かって肉厚に形成された下部接着材（５ａ）を有する。第１の導体（１）及び第２の導体（２）より小さい縦弾性係数（低いヤング率）を有する下部接着材（５ａ）が電極（８）の底面（８ｃ）と切欠面（６）との間に形成されるため、外力が加えられて第１の導体（１）及び第２の導体（２）が変形したとき、各電極（８）の底面（８ｃ）側に形成された下部接着材（５ａ）のクッション作用により、電子部品（３）に伝達される機械的応力を下部接着材（５ａ）により良好に緩和し且つ減衰して、電子部品（３）の電気的特性の劣化を防止することができる。特に、下部接着材（５ａ）は、電極（８）の内端部（８ｂ）に向かって厚さが増大するので、電子部品（３）の電極（８）が固定された付近に発生し易いクラックを有効に防止することができる。また、十分な厚さを有する下部接着材（５ａ）により第１の導体（１）と第２の導体（２）からの電子部品（３）の剥離を確実に防止できる。
【０００９】
【発明の実施の形態】
次に、本発明による半導体装置の実施の形態を図１〜図１０について説明する。
本発明による半導体装置は、互いに間隙（７）を空けて配置された第１の導体（１）及び第２の導体（２）を有する導体（４）と、間隙（７）を架橋して第１の導体（１）と第２の導体（２）との間に配置された電子部品（３）とを備え、電子部品（３）の両端部（３ａ）に設けられた電極（８）は、半田又はろう材から成る導電性の金属製接着材（５）により第１の導体（１）と第２の導体（２）とに電気的に接続される。
【００１０】
導体（４）は、例えば、半導体装置に構成される複数の配線導体を備えたリードフレームである。第１の導体（１）及び第２の導体（２）は、リードフレームの複数の配線導体を示す。本実施の形態では、第１の導体（１）及び第２の導体（２）は、銅から成る帯状の金属板から構成され、図１及び図２に示すように、間隙（７）を介して互いに対向し且つ垂直に形成された対向面（１ｃ，２ｃ）と、水平に形成された上面（１ａ，２ａ）とを有する。また、第１の導体（１）及び第２の導体（２）は、互いに接近する方向に向かって下方に低下する切欠面（６）を各々有する。
【００１１】
電子部品（３）は、チップ抵抗素子、積層コンデンサ又はダイオード等のチップ状の半導体素子であり、一定の厚さに形成された板状の本体部（９）と、本体部（９）の両端部（３ａ）に設けられたキャップ形状の一対の電極（８）とを有する。また、電子部品（３）の各電極（８）は、切欠面（６）に対向する隅部（８ａ）と、切欠面（６）に対して隅部（８ａ）から内端部（８ｂ）に向かって徐々に離間する底面（８ｃ）と、隅部（８ａ）から垂直に延伸する側面（８ｄ）とを有する。例えば、チップ抵抗素子又は積層コンデンサによる電子部品（３）では、本体部（９）がセラミック又はセラミック積層体により形成され、電極（８）が銀又は銀とパラジウムとの合金により形成される。
【００１２】
金属製接着材（５）は、銅から成る第１の導体（１）及び第２の導体（２）より縦弾性係数の小さい金属により形成され且つ電極（８）の底面（８ｃ）と切欠面（６）との間を接着して隅部（８ａ）から内端部（８ｂ）に向かって肉厚に形成された下部接着材（５ａ）と、電極（８）の側面（８ｄ）と切欠面（６）との間を接着する上部接着材（５ｂ）とを有する。本実施の形態では、金属製接着材として半田（５）を使用する。半田（５）は、例えば、すずから成る鉛フリー半田が使用される。また、鉛フリー半田以外を使用する場合であっても効果が得られる。しかしながら、鉛フリー半田（ＳｎＡｇ、ＳｎＣｕ、ＳｎＡｇＣｕ等）は、すず（Ｓｎ）の含有率が高いため、銅（Ｃｕ）から成る導体（１，２）と半田との界面に導体（１，２）よりも硬度の大きいＣｕＳｎ合金層が形成され易い。このような合金層が形成されると電子部品（３）に機械的応力が強く加わるので、本発明による半導体装置の金属製接着材（５）のクッション効果が顕著となる。
【００１３】
図１に示すように、第１の導体（１）の対向面（１ｃ）と第２の導体（２）の対向面（２ｃ）との間隔（Ｌ１）は、電子部品（３）の長さ方向の寸法（Ｌ２）よりも短く形成される。よって、電子部品（３）を第１の導体（１）と第２の導体（２）との間に架橋して半田（５）により固着することができる。図１に示す実施の形態では、間隙（７）を形成する第１の導体（１）の対向面（１ｃ）と第２の導体（２）の対向面（１ｃ）との間隔（Ｌ１）は、一対の電極（８）の内端部（８ｂ）の間に露出した電子部品（３）の本体部（９）の長さ方向の寸法（Ｌ３）に実質的に等しくしている。しかしながら、第１の導体（１）の対向面（１ｃ）と第２の導体（２）の対向面（１ｃ）との間隔（Ｌ１）と電極（８）の内端部（８ｂ）の間に露出した電子部品（３）の本体部（９）の長さ方向の寸法（Ｌ３）とは、等しくせずに適宜設定してよい。
【００１４】
電極（８）の底面（８ｃ）の長さ方向の寸法（Ｌ４）は、切欠面（６）の第１の導体（１）及び第２の導体（２）の幅方向の寸法（Ｌ５）の半分程度になっている。よって、電極（８）の内端部（８ｂ）を第１の導体（１）及び第２の導体（２）の対向面（１ｃ，２ｃ）の延長線上に位置させたとき、電極（８）の隅部（８ａ）は切欠面（６）の略中央に直接又は肉薄の半田（５）を介して接触する。また、電極（８）の側面（８ｄ）の電子部品（３）の厚さ方向の寸法（Ｔ１）は、切欠面（６）の第１の導体（１）及び第２の導体（２）の厚さ方向の寸法（Ｔ２）よりも大きく設定されている。よって、電子部品（３）を第１の導体（１）と第２の導体（２）との切欠面（６）に架橋して載置したとき、電子部品（３）の電極（８）の上面（８ｅ）は、第１の導体（１）及び第２の導体（１）の上面（１ａ，２ａ）よりも上方に突出する。
【００１５】
図１に示すように、第１の導体（１）と第２の導体（２）は、上面（１ａ，２ａ）と対向面（１ｃ，２ｃ）との交差部に切欠面（６）が形成される。切欠面（６）は、上面（１ａ，２ａ）から対向面（１ｃ，２ｃ）の略中央部に向かって下降する平面又は曲面から形成され、湾曲若しくは直線の傾斜状又は複数の段部を有する段状である。よって、第１の導体（１）及び第２の導体（２）は、対向面（１ｃ，２ｃ）と上面（１ａ，２ａ）とが切欠面（６）を介して形成される。電極（８）の底面（８ｃ）と切欠面（６）との間隔は、電子部品（３）の端部（３ａ）側で相対的に小さく、電子部品（３）の中央側に向かうにつれて相対的に大きくなっている。傾斜状又は段状に形成される切欠面（６）により、電極（８）と第１の導体（１）及び第２の導体（２）との間に半田（５）が充填される空隙が形成され、半田（５）を電極（８）の底面（８ｃ）と切欠面（６）との間に隅部（８ａ）から内端部（８ｂ）に向かって肉厚に形成することができる。電極（８）の隅部（８ａ）と切欠面（６）との間は、半田（５）を構成してもしなくてもよい。図２に示すように、本実施の形態では、切欠面（６）が第１の導体（１）及び第２の導体（２）の延伸方向全体にわたり形成され、半田（５）は、電極（８）の幅と略同等の幅で切欠面（６）に固着される。
【００１６】
図示しないが、本実施の形態の半導体装置では、半田（５）により第１の導体（１）及び第２の導体（２）に形成された切欠面（６）と電子部品（３）の電極（８）とを固着する工程に、周知のリフローによる半田付け法が使用される。切欠面（６）に電極（８）の幅と同等又は僅かに大きく形成された半田ペーストを塗布し、塗布した半田ペーストの上に電子部品（３）の電極（８）を配置する。半田ペーストは、適宜な粘性に設定され、下方に低下する切欠面（６）に沿って塗布される。また、半田ペーストを塗布する工程又は半田ペーストの上に電子部品（３）の電極（８）を配置する工程で下部接着材（５ａ）の形状が構成される。その後、半田ペーストを加熱することにより電子部品（３）の電極（８）は、切欠面（６）に固着される。本発明では、第１の導体（１）及び第２の導体（２）に切欠面（６）を形成することにより、電子部品（３）を固着する金属製接着材（５）の厚みを安定して厚く形成することができる。
【００１７】
本発明の半導体装置の構成によれば、銅により形成される第１の導体（１）及び第２の導体（２）より小さい縦弾性係数（低いヤング率）を有する半田（５）の下部接着材（５ａ）が電極（８）の底面（８ｃ）と切欠面（６）との間で肉厚に形成される。よって、外力が加えられて第１の導体（１）及び第２の導体（２）が変形したとき、各電極（８）の底面（８ｃ）側に形成された下部接着材（５ａ）のクッション作用により、電子部品（３）に伝達される機械的応力を下部接着材（５ａ）により良好に緩和し且つ減衰して、電子部品（３）の電気的特性の劣化を防止することができる。下部接着材（５ａ）は、切欠面（６）により電極（８）の内端部（８ｂ）に向かって厚さが増大するので、電子部品（３）の本体部（９）、特に、本体部（９）の電極（８）の内端部（８ｂ）付近に発生し易いクラックを有効に防止することができる。また、十分な厚さを有する下部接着材（５ａ）により第１の導体（１）と第２の導体（２）からの電子部品（３）の剥離を確実に防止する効果も有する。
【００１８】
本実施の形態では、常温常圧での第１の導体（１）及び第２の導体（２）の縦弾性係数は、半田（５）等の金属製接着材の縦弾性係数の１．５〜４０倍、好ましくは、１．７〜４０倍である。縦弾性係数の倍率が１．５に満たないと、導体（４）に対して金属製接着材（５）が硬すぎて所与のクッション作用が得られない。因みに、導体（４）を構成する金属が銅のとき、銅の縦弾性係数は、１３２００ｋｇ／ｍｍ^２であり、金属製接着材（５）が鉛フリー半田の場合の縦弾性係数は、５５００ｋｇ／ｍｍ^２程度である。しかしながら、これらの数値は、本実施の形態による半導体装置を良好に実施するための設定範囲に過ぎず、これらの設定範囲から外れた材料を使用した場合も本発明の範囲に含まれる。本発明では、第１の導体（１）及び第２の導体（２）より下部接着材（５ａ）の縦弾性係数が著しく低いので、下部接着材（５ａ）により電子部品（３）に伝達される機械的応力をより良好に緩和し且つ減衰して、電子部品（３）の電気的特性の劣化を防止することができる。また、電子部品（３）は、切欠面（６）が電極（８）の外側まで延在させるので、電極（８）の側面（８ｄ）と切欠面（６）との間にも比較的厚い半田（５）が形成される。図１に示すように、隅部（８ａ）の両側に固着される下部接着材（５ａ）と上部接着材（５ｂ）とにより二重クッション作用を生じて、更に半田（５）での応力緩和作用及び機械的接着作用を強化することができる。
【００１９】
本発明では、前記実施の形態に限定されず、種々の変更が可能である。切欠面（６）は、第１の導体（１）及び第２の導体（２）の延伸方向全体にわたり形成してもよいし、第１の導体（１）及び第２の導体（２）のうち電子部品（３）が載置される部分のみに選択的に形成してもよい。しかしながら、図３及び図４に示すように、切欠面（６）の電極（８）の幅方向の寸法（Ｗ１）は、電子部品（３）の幅（Ｗ２）よりも広く設定される。図３及び図４に示す他の実施の形態では、切欠面（６）は、電極（８）の幅方向に電極（８）の幅と同等又は僅かに大きく形成され、電極（８）は、切欠面（６）により第１の導体（１）及び第２の導体（２）に各々形成された切欠壁（６ａ）に隣接又は当接して配置される。切欠壁（６ａ）は、電極（８）の幅と同等又は僅かに大きい幅で第１の導体（１）及び第２の導体（２）の対向面（１ｃ，２ｃ）と上面（１ａ，２ａ）との角部を切除することで、切欠面（６）と共に形成される。切欠面（６）により電子部品（３）の電極（８）を第１の導体（１）と第２の導体（２）との間に架橋して配置する際の位置決定をすることができる。また、切欠壁（６ａ）により電極（８）がある程度係止されるので電子部品（３）が切欠面（６）から遊動するのを防止できる。図３は、切欠面（６）の片側のみに切欠壁（６ａ）が形成され、図４は、切欠面（６）の両側に切欠壁（６ａ）が形成された半導体装置を示す。
【００２０】
また、本発明は、図１に示す並行に配置された第１の導体（１）及び第２の導体（２）を有する導体（４）に限定されず、図５に示すように、第１の導体（１）に対して第２の導体（２）が水平方向に直角に又は傾斜して配置された構成についても適用することができる。図６に示すように、互いに間隙（７）を空けて配置された２つの支持板（２１，２２）又は図示しない配線導体と支持板との構成に本発明を適用してもよい。
【００２１】
更に、切欠面（６）は、図７に示すように、第１の導体（１）及び第２の導体（２）の上面（１ａ，２ａ）から底面（１ｂ，２ｂ）にかけて形成して対向面（１ｃ，２ｃ）を省略してもよい。図示しないが、第１の導体（１）及び第２の導体（２）を配線導体とした場合では、上面（１ａ，２ａ）を備えない切欠面（６）を形成することも可能である。切欠面（６）は、図８に示すテーパ状又は図９に示す段状に形成してもよい。段状に形成された切欠面（６）は、複数の段部による段差を有することで、電極（８）の底面（８ｃ）と第１の導体（１）及び第２の導体（２）の切欠面（６）との間に空隙が形成され、半田（５）を電極（８）の底面（８ｃ）と切欠面（６）との間に隅部（８ａ）から内端部（８ｂ）に向かって肉厚に形成することができる。また、切欠面（６）は、図１０に示すように、湾曲状、傾斜状又は段状を組み合わせて形成してもよい。
【００２２】
【発明の効果】
前記のように、本発明では、電極（８）の底面（８ｃ）側に形成された下部接着材（５ａ）のクッション作用により、電子部品（３）に伝達される機械的応力を良好に緩和し且つ減衰して、電子部品（３）の電気的特性の劣化を防止することができる。
【図面の簡単な説明】
【図１】本発明による半導体装置の断面図
【図２】配線導体の延伸方向全体にわたり切欠面が形成された本発明による半導体装置の斜視図
【図３】切欠面の片側に切欠壁を有する本発明による半導体装置の斜視図
【図４】切欠面の両側に切欠壁を有する本発明による半導体装置の斜視図
【図５】一方の導体に対して他方の導体が水平方向に直角に配置された本発明による半導体装置の斜視図
【図６】支持板に適用された本発明による半導体装置の斜視図
【図７】対向面が省略された切欠面を有する本発明による半導体装置の断面図
【図８】テーパ状の切欠面を有する本発明による半導体装置の断面図
【図９】段状の切欠面を有する本発明による半導体装置の断面図
【図１０】段状と湾曲状とが組み合わされた切欠面を有する本発明による半導体装置の断面図
【図１１】従来の半導体装置の断面図
【符号の説明】
（１）・・第１の導体、（２）・・第２の導体、（３）・・電子部品、（３ａ）・・両端部、（４）・・導体、（５）・・金属製接着材（半田）、（５ａ）・・下部接着材、（５ｂ）・・上部接着材、（６）・・切欠面、（６ａ）・・切欠壁、（７）・・間隙、（８）・・電極、（８ａ）・・隅部、（８ｂ）・・内端部、（８ｃ）・・底面、（８ｄ）・・側面、[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device, and more particularly to a semiconductor device that can satisfactorily relieve stress applied to an electronic component bridged between conductors arranged with a gap therebetween.
[0002]
[Prior art]
2. Description of the Related Art As disclosed in Patent Literature 1 below, a semiconductor device in which electronic components such as a chip resistor element or a multilayer capacitor are bridged and arranged between conductors arranged with a gap therebetween is known. In FIG. 1 of Patent Document 1, a chip resistor element is arranged so as to bridge a wiring conductor (inner lead) formed at a predetermined interval, and both ends of the chip resistor element are fixed to the wiring conductor by solder. 1 shows a resin-sealed semiconductor device. The chip resistance element has a resistance of a main body formed of ceramic, and a pair of electrodes formed on both ends of the main body and formed of a conductive metal, and the pair of electrodes is soldered on the upper surface of the wiring conductor. Is attached.
[0003]
[Patent Document 1]
JP-A-6-120406 (FIGS. 3 and 4)
[0004]
[Problems to be solved by the invention]
As shown in FIG. 11, for example, a semiconductor device provided with a chip resistance element has a lead having a first wiring conductor (31) and a second wiring conductor (32) arranged with a gap (37) therebetween. A frame (34) and a chip resistance element (33) arranged between the first wiring conductor (31) and the second wiring conductor (32) by bridging the gap (37). The first wiring conductor (31) and the second wiring conductor (32) are formed of strip-shaped metal plates made of metal such as copper, and have opposing surfaces (31c, 32c) opposing each other and formed vertically. ) And a horizontally formed upper surface (31a, 32a). The upper surface (31a) of the first wiring conductor (31) and the upper surface (32a) of the second wiring conductor (32) are the same as the first wiring conductor (31) and the second wiring conductor (32). Is desirably formed so as to be located on a plane.
[0005]
However, a conductor such as a wiring conductor or a support plate in this type of semiconductor device is often formed by performing a known punching process on a metal plate made of a metal such as copper. For this reason, the adjacent conductors may not be located on the same plane but may be slightly displaced vertically. When an electronic component is soldered between conductors that are vertically displaced, excessive stress is applied to the electronic component when the conductors are positioned on the same plane. As shown in FIG. 11, both ends (33a) of the chip resistance element (33) are placed directly or via thin solder on the upper surfaces (31a, 32a) of the wiring conductors (31, 32). Excessive stress applied to the wiring conductors (31, 32) is transmitted to the electrode (38) formed of metal and the main body (39) formed of ceramic. For this reason, cracks may occur in the main body portion (39) where the bending stress is concentrated, and the electrical characteristics of the chip resistor element (33) may deteriorate. Further, when a similar crack occurs in the chip capacitor element, the chip capacitor element may cause a short circuit. Such deterioration of the electrical characteristics of the electronic component also occurs at the time of transportation or cutting of the tie bar, and also occurs not only in the wiring conductor but also in the electronic component arranged in a bridge between conductors such as a support plate.
[0006]
Patent Document 1 discloses a structure in which a groove is formed in a wiring conductor to absorb stress applied to the wiring conductor by the groove in order to reduce stress on the wiring conductor. However, in a structure in which the wiring conductor and both ends of the electronic component are firmly fixed, and the stress applied to the wiring conductor is transmitted to the electronic component as it is, the stress is not satisfactorily relieved by the groove, and the electrical characteristics of the electronic component are deteriorated. It could not be prevented.
[0007]
Then, an object of the present invention is to provide a semiconductor device which can satisfactorily alleviate the stress applied to an electronic component arranged from a conductor to a conductor.
[0008]
[Means for Solving the Problems]
A semiconductor device according to the present invention comprises a first conductor (1) and a second conductor (2) arranged with a gap (7) therebetween, and a first conductor (1) formed by bridging the gap (7). And an electronic component (3) arranged between the first conductor (1) and the second conductor (2). An electrode (8) provided at both ends (3a) of the electronic component (3) is electrically connected to the second conductor (2). Each of the first conductor (1) and the second conductor (2) has a cutout surface (6) that decreases downward in a direction approaching each other, and each electrode (8) of the electronic component (3). A corner (8a) facing the notch surface (6), and a bottom surface (8c) gradually separating from the corner (8a) toward the inner end (8b) with respect to the notch surface (6). A side surface (8d) extending vertically from the corner (8a), and the metal adhesive (5) is made of a metal having a lower modulus of longitudinal elasticity than the first conductor (1) and the second conductor (2). And a lower adhesive material formed by bonding between the bottom surface (8c) of the electrode (8) and the cutout surface (6) to increase the thickness from the corner (8a) to the inner end (8b). (5a). A lower adhesive material (5a) having a lower modulus of longitudinal elasticity (lower Young's modulus) than the first conductor (1) and the second conductor (2) is formed on the bottom surface (8c) and the cutout surface (6) of the electrode (8). When the first conductor (1) and the second conductor (2) are deformed due to an external force applied thereto, the lower adhesive formed on the bottom (8c) side of each electrode (8) Due to the cushioning action of the material (5a), mechanical stress transmitted to the electronic component (3) is favorably alleviated and attenuated by the lower adhesive (5a), and deterioration of the electrical characteristics of the electronic component (3) is reduced. Can be prevented. In particular, since the thickness of the lower adhesive (5a) increases toward the inner end (8b) of the electrode (8), the lower adhesive (5a) is likely to be generated near the electrode (8) of the electronic component (3) to which the electrode (8) is fixed. Cracks can be effectively prevented. In addition, the lower adhesive (5a) having a sufficient thickness can reliably prevent the electronic component (3) from peeling off from the first conductor (1) and the second conductor (2).
[0009]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, an embodiment of a semiconductor device according to the present invention will be described with reference to FIGS.
A semiconductor device according to the present invention comprises a conductor (4) having a first conductor (1) and a second conductor (2) arranged with a gap (7) therebetween, and a bridge (7) formed by bridging the gap (7). An electronic component (3) is provided between the first conductor (1) and the second conductor (2), and the electrodes (8) provided at both ends (3a) of the electronic component (3) are The first conductor (1) and the second conductor (2) are electrically connected by a conductive metal adhesive (5) made of solder or brazing material.
[0010]
The conductor (4) is, for example, a lead frame including a plurality of wiring conductors configured in a semiconductor device. The first conductor (1) and the second conductor (2) indicate a plurality of wiring conductors of the lead frame. In the present embodiment, the first conductor (1) and the second conductor (2) are formed of a strip-shaped metal plate made of copper, and as shown in FIG. 1 and FIG. And has vertically opposed surfaces (1c, 2c) and a horizontally formed upper surface (1a, 2a). Further, the first conductor (1) and the second conductor (2) each have a cutout surface (6) that decreases downward in a direction approaching each other.
[0011]
The electronic component (3) is a chip-shaped semiconductor element such as a chip resistor element, a multilayer capacitor or a diode, and has a plate-shaped main body (9) formed to a constant thickness and both ends of the main body (9). And a pair of cap-shaped electrodes (8) provided in the portion (3a). Each of the electrodes (8) of the electronic component (3) has a corner (8a) facing the cutout surface (6) and a corner (8a) to an inner end (8b) with respect to the cutout surface (6). And a side surface (8d) extending vertically from the corner (8a). For example, in an electronic component (3) using a chip resistor or a multilayer capacitor, the main body (9) is formed of ceramic or a ceramic laminate, and the electrode (8) is formed of silver or an alloy of silver and palladium.
[0012]
The metal adhesive (5) is formed of a metal having a smaller longitudinal elastic modulus than the first conductor (1) and the second conductor (2) made of copper, and has a cutout surface and a bottom surface (8c) of the electrode (8). (6), a lower adhesive (5a) formed thick from the corner (8a) to the inner end (8b), a side surface (8d) of the electrode (8) and a notch. And an upper adhesive material (5b) that adheres to the surface (6). In the present embodiment, solder (5) is used as the metal adhesive. As the solder (5), for example, lead-free solder made of tin is used. Further, the effect can be obtained even when a material other than lead-free solder is used. However, since lead-free solder (SnAg, SnCu, SnAgCu, etc.) has a high tin (Sn) content, the conductors (1, 2) formed of copper (Cu) and the conductors (1, 2) A CuSn alloy layer having a higher hardness is easily formed. When such an alloy layer is formed, a mechanical stress is strongly applied to the electronic component (3), so that the cushioning effect of the metal adhesive (5) of the semiconductor device according to the present invention becomes remarkable.
[0013]
As shown in FIG. 1, the distance (L1) between the facing surface (1c) of the first conductor (1) and the facing surface (2c) of the second conductor (2) is equal to the length of the electronic component (3). It is formed shorter than the dimension (L2) in the direction. Therefore, the electronic component (3) can be bridged between the first conductor (1) and the second conductor (2) and fixed by the solder (5). In the embodiment shown in FIG. 1, the distance (L1) between the opposing surface (1c) of the first conductor (1) and the opposing surface (1c) of the second conductor (2) forming the gap (7) is The length (L3) of the main body (9) of the electronic component (3) exposed between the inner ends (8b) of the pair of electrodes (8) is substantially equal to the length (L3). However, between the distance (L1) between the opposing surface (1c) of the first conductor (1) and the opposing surface (1c) of the second conductor (2) and the inner end (8b) of the electrode (8). The length (L3) of the exposed electronic component (3) in the length direction of the main body (9) may be set as appropriate without being equal.
[0014]
The length (L4) in the length direction of the bottom surface (8c) of the electrode (8) is the length (L5) of the width (L5) of the first conductor (1) and the second conductor (2) on the cutout surface (6). It is about half. Therefore, when the inner end (8b) of the electrode (8) is positioned on an extension of the facing surface (1c, 2c) of the first conductor (1) and the second conductor (2), the electrode (8) Corner (8a) is in contact with the approximate center of the cutout surface (6) directly or via a thin solder (5). The dimension (T1) in the thickness direction of the electronic component (3) on the side surface (8d) of the electrode (8) is the same as that of the first conductor (1) and the second conductor (2) on the cutout surface (6). It is set larger than the dimension (T2) in the thickness direction. Therefore, when the electronic component (3) is placed on the cut surface (6) of the first conductor (1) and the second conductor (2) while being bridged, the electrode (8) of the electronic component (3) is The upper surface (8e) protrudes above the upper surfaces (1a, 2a) of the first conductor (1) and the second conductor (1).
[0015]
As shown in FIG. 1, the first conductor (1) and the second conductor (2) have a cutout surface (6) at the intersection of the upper surface (1a, 2a) and the opposing surface (1c, 2c). Is done. The cutout surface (6) is formed from a flat surface or a curved surface descending from the upper surface (1a, 2a) to a substantially central portion of the opposing surface (1c, 2c), and has a curved or straight slope or a plurality of steps. It is stepped. Therefore, the first conductor (1) and the second conductor (2) have the opposing surfaces (1c, 2c) and the upper surfaces (1a, 2a) formed with the cutout surface (6) therebetween. The distance between the bottom surface (8c) of the electrode (8) and the cutout surface (6) is relatively small on the side of the end (3a) of the electronic component (3), and relatively decreases toward the center of the electronic component (3). It is getting bigger. The gap (6) filled with the solder (5) between the electrode (8) and the first conductor (1) and the second conductor (2) is formed by the cutout surface (6) formed in an inclined or stepped shape. The solder (5) can be formed between the bottom surface (8c) and the cutout surface (6) of the electrode (8) to be thicker from the corner (8a) toward the inner end (8b). . The solder (5) may or may not be formed between the corner (8a) of the electrode (8) and the cutout surface (6). As shown in FIG. 2, in the present embodiment, the cutout surface (6) is formed over the entire extending direction of the first conductor (1) and the second conductor (2), and the solder (5) is provided with the electrode ( It is fixed to the notch surface (6) with a width substantially equal to the width of 8).
[0016]
Although not shown, in the semiconductor device of the present embodiment, the notch surfaces (6) formed on the first conductor (1) and the second conductor (2) by the solder (5) and the electrodes of the electronic component (3) are provided. In the step of fixing (8), a known reflow soldering method is used. A solder paste formed to be equal to or slightly larger than the width of the electrode (8) is applied to the cutout surface (6), and the electrode (8) of the electronic component (3) is arranged on the applied solder paste. The solder paste is set to have an appropriate viscosity, and is applied along the notch surface (6) which decreases downward. Further, the shape of the lower adhesive (5a) is formed in a step of applying a solder paste or a step of arranging the electrodes (8) of the electronic component (3) on the solder paste. Thereafter, the electrode (8) of the electronic component (3) is fixed to the cutout surface (6) by heating the solder paste. In the present invention, the thickness of the metal adhesive material (5) for fixing the electronic component (3) is stabilized by forming the cutout surface (6) in the first conductor (1) and the second conductor (2). It can be formed thicker.
[0017]
According to the configuration of the semiconductor device of the present invention, the lower bonding of the solder (5) having a lower longitudinal elastic modulus (lower Young's modulus) than the first conductor (1) and the second conductor (2) formed of copper. The material (5a) is formed thick between the bottom surface (8c) of the electrode (8) and the cutout surface (6). Therefore, when the first conductor (1) and the second conductor (2) are deformed by an external force, the cushion of the lower adhesive (5a) formed on the bottom surface (8c) side of each electrode (8). By the action, the mechanical stress transmitted to the electronic component (3) can be favorably alleviated and attenuated by the lower adhesive (5a), and the deterioration of the electrical characteristics of the electronic component (3) can be prevented. Since the thickness of the lower adhesive (5a) increases toward the inner end (8b) of the electrode (8) due to the cutout surface (6), the body (9) of the electronic component (3), in particular, the body It is possible to effectively prevent cracks that easily occur near the inner end (8b) of the electrode (8) in the portion (9). In addition, the lower adhesive (5a) having a sufficient thickness has an effect of reliably preventing the electronic component (3) from peeling off from the first conductor (1) and the second conductor (2).
[0018]
In the present embodiment, the modulus of longitudinal elasticity of the first conductor (1) and the second conductor (2) at normal temperature and normal pressure is 1.5 times the longitudinal modulus of elasticity of a metal adhesive such as solder (5). ４０40 times, preferably 1.7 to 40 times. If the modulus of the longitudinal elasticity is less than 1.5, the metal adhesive (5) is too hard with respect to the conductor (4), and a given cushioning effect cannot be obtained. Incidentally, when the metal constituting the conductor (4) is copper, the modulus of longitudinal elasticity of copper is 13200 kg / mm ² , and when the metal adhesive (5) is lead-free solder, the modulus of longitudinal elasticity is 5500 kg / mm ^2. a mm ² about. However, these numerical values are merely the setting ranges for satisfactorily implementing the semiconductor device according to the present embodiment, and the use of materials outside these setting ranges is also included in the scope of the present invention. In the present invention, since the longitudinal elastic modulus of the lower adhesive (5a) is significantly lower than that of the first conductor (1) and the second conductor (2), the lower adhesive (5a) is transmitted to the electronic component (3) by the lower adhesive (5a). Mechanical stress can be more favorably relieved and attenuated, thereby preventing the electrical characteristics of the electronic component (3) from deteriorating. Further, since the cutout surface (6) of the electronic component (3) extends to the outside of the electrode (8), the thickness between the side surface (8d) of the electrode (8) and the cutout surface (6) is relatively large. Solder (5) is formed. As shown in FIG. 1, the lower adhesive material (5a) and the upper adhesive material (5b) fixed to both sides of the corner (8a) produce a double cushioning effect and further reduce the stress in the solder (5). The action and the mechanical bonding action can be enhanced.
[0019]
The present invention is not limited to the above-described embodiment, and various modifications are possible. The cutout surface (6) may be formed over the entire extending direction of the first conductor (1) and the second conductor (2), or may be formed in the first conductor (1) and the second conductor (2). Of these, the electronic component (3) may be selectively formed only on the portion where the electronic component (3) is placed. However, as shown in FIGS. 3 and 4, the width (W1) of the cutout surface (6) in the width direction of the electrode (8) is set wider than the width (W2) of the electronic component (3). In another embodiment shown in FIGS. 3 and 4, the cutout surface (6) is formed in the width direction of the electrode (8) to be equal to or slightly larger than the width of the electrode (8). The first conductor (1) and the second conductor (2) are arranged adjacent to or in contact with the notch walls (6a) formed by the notch surfaces (6). The notch wall (6a) has a width equal to or slightly larger than the width of the electrode (8) and the opposing surfaces (1c, 2c) of the first conductor (1) and the second conductor (2) and the upper surface (1a, 2a). ) Is formed together with the notched surface (6) by cutting off the corner. The position of the electrode (8) of the electronic component (3) when bridging and arranging it between the first conductor (1) and the second conductor (2) can be determined by the cutout surface (6). . Further, since the electrode (8) is locked to some extent by the notch wall (6a), the electronic component (3) can be prevented from floating from the notch surface (6). FIG. 3 shows a semiconductor device in which a cutout wall (6a) is formed only on one side of a cutout surface (6), and FIG. 4 shows a semiconductor device in which cutout walls (6a) are formed on both sides of a cutout surface (6).
[0020]
Further, the present invention is not limited to the conductor (4) having the first conductor (1) and the second conductor (2) arranged in parallel as shown in FIG. The configuration in which the second conductor (2) is arranged at right angles or inclines in the horizontal direction with respect to the first conductor (1) can also be applied. As shown in FIG. 6, the present invention may be applied to a configuration of two support plates (21, 22) or a wiring conductor and a support plate (not shown) arranged with a gap (7) therebetween.
[0021]
Further, as shown in FIG. 7, the notched surface (6) is formed from the upper surface (1a, 2a) to the bottom surface (1b, 2b) of the first conductor (1) and the second conductor (2) to face each other. The plane (1c, 2c) may be omitted. Although not shown, when the first conductor (1) and the second conductor (2) are wiring conductors, it is also possible to form a notched surface (6) without the upper surface (1a, 2a). The notched surface (6) may be formed in a tapered shape shown in FIG. 8 or a step shape shown in FIG. The notch surface (6) formed in a step shape has a step due to a plurality of steps, so that the bottom surface (8c) of the electrode (8) and the first conductor (1) and the second conductor (2) are formed. A gap is formed between the cutout surface (6) and the solder (5) between the bottom surface (8c) of the electrode (8) and the cutout surface (6) from the corner (8a) to the inner end (8b). Can be formed thicker. Further, as shown in FIG. 10, the cutout surface (6) may be formed by combining curved shapes, inclined shapes, or stepped shapes.
[0022]
【The invention's effect】
As described above, in the present invention, the mechanical stress transmitted to the electronic component (3) is favorably reduced by the cushioning effect of the lower adhesive (5a) formed on the bottom surface (8c) side of the electrode (8). Therefore, the electrical characteristics of the electronic component (3) can be prevented from deteriorating.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a semiconductor device according to the present invention. FIG. 2 is a perspective view of a semiconductor device according to the present invention in which a cutout surface is formed throughout the extending direction of a wiring conductor. FIG. 3 has a cutout wall on one side of the cutout surface. FIG. 4 is a perspective view of a semiconductor device according to the present invention having cutout walls on both sides of a cutout surface. FIG. 5 is a view in which one conductor is arranged at right angles to the other in a horizontal direction. FIG. 6 is a perspective view of a semiconductor device according to the present invention applied to a support plate. FIG. 7 is a cross-sectional view of a semiconductor device according to the present invention having a cutout surface with an opposing surface omitted. FIG. 8 is a cross-sectional view of a semiconductor device according to the present invention having a tapered cutout surface. FIG. 9 is a cross-sectional view of a semiconductor device according to the present invention having a stepped cutout surface. FIG. Semiconductor according to the present invention having a cut-out surface Sectional view of the device 11 is a cross-sectional view of a conventional semiconductor device [Description of symbols]
(1) ··· First conductor, (2) ··· Second conductor, (3) ··· Electronic components, (3a) ··· Both ends, (4) ··· Conductor, (5) ··· Metal Adhesive (Solder), (5a) ··· Lower adhesive, (5b) · · · Upper adhesive, (6) · · · Notched surface, (6a) · · · Notched wall, (7) · · · gap, (8) ..Electrode, (8a) .. corner, (8b) .. inner end, (8c) .. bottom, (8d) .. side,

Claims

A first conductor and a second conductor which are arranged with a gap therebetween, and an electronic component which is arranged between the first conductor and the second conductor by bridging the gap, and A semiconductor device in which electrodes provided at both ends of the electronic component are electrically connected to the first conductor and the second conductor by a conductive metal adhesive made of a brazing material,
Each of the first conductor and the second conductor has a cutout surface that decreases downward in a direction approaching each other,
Each electrode of the electronic component has a corner portion facing the cutout surface, a bottom surface gradually separated from the corner portion toward the inner end portion with respect to the cutout surface, and a side surface extending perpendicularly from the corner portion. And having
The metal adhesive is formed of a metal having a lower modulus of longitudinal elasticity than the first conductor and the second conductor, and is bonded between the bottom surface of the electrode and the cutout surface to form an inner end portion from the corner portion. A semiconductor device having a lower adhesive material that is formed thicker toward the substrate.

2. The semiconductor device according to claim 1, wherein a longitudinal elastic coefficient of the first conductor and the second conductor is 1.5 to 40 times a longitudinal elastic coefficient of the metal adhesive. 3.

The semiconductor device according to claim 1, wherein the cutout surface is formed in a curved or straight inclined shape or a stepped shape having a plurality of steps.

4. The semiconductor device according to claim 1, wherein the metal adhesive has an upper adhesive that bonds between a side surface of the electrode and the cutout surface. 5.

The cutout surface is formed in the width direction of the electrode to be equal to or slightly larger than the width of the electrode,
5. The semiconductor device according to claim 1, wherein the electrode is arranged adjacent to or in contact with a notch wall formed in each of the first conductor and the second conductor by the notch surface. 6. .