JP2004289096A - Improvement of led efficiency using photonic crystal structure - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a light emitting diode particularly including a photonic crystal structure. <P>SOLUTION: A photonic crystal light emitting diode (PXLED) includes a periodic structure, such as a lattice of holes, formed in the semiconductor layers of an LED. The parameters of the periodic structure are such that the energy of the photons, emitted by the PXLED, lies close to a band edge of the band structure of the periodic structure. Metal electrode layers have a strong influence on the efficiency of the PXLEDs. Also, PXLEDs formed from GaN have a low surface recombination velocity and hence a high efficiency. The PXLEDs are formed with novel fabrication techniques, such as the epitaxial lateral overgrowth technique over a patterned masking layer, yielding semiconductor layers with low defect density. Inverting the PXLED to expose the pattern of the masking layer or using the Talbot effect to create an aligned second patterned masking layer allows the formation of PXLEDs with low defect density. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a light emitting diode, and more particularly, to a light emitting diode having a photonic crystal structure.
[0002]
[Prior art]
Light emitting diodes (LEDs) are a technically and economically advantageous semiconductor light source. LEDs can reliably provide high brightness light and thus have played a significant role in many applications over the past decades, including flat panel displays, traffic lights, and optical communications. Was. LEDs include a forward biased pn junction. When driven by a current, electrons and holes are injected into the junction region where they recombine and release their energy by emitting photons. The quality of an LED can be characterized, for example, by the extraction efficiency that measures the intensity of the emitted light for a given number of photons generated within the LED chip. The extraction efficiency is limited, inter alia, by the emitted photons undergoing multiple total internal reflection at the walls of the high-refractive-index semiconductor medium. As a result, the emitted photons do not escape into free space, resulting in poor extraction efficiencies, typically less than 30 percent.
[0003]
In the last three decades, various approaches have been proposed to increase the extraction efficiency of LEDs. Extraction efficiency is increased by creating appropriate geometries, including cubes, cylinders, pyramids, and domes, for example, by increasing the spatial angle at which emitted photons can escape. Can be done. However, none of these geometries can completely eliminate losses due to total internal reflection.
[0004]
A further source of loss is the reflection caused by a refractive index mismatch between the LED and the surrounding medium. Such losses could be reduced with an anti-reflective coating, but complete cancellation of reflection could only be achieved at a specific photon energy and one angle of incidence.
[0005]
J. U.S. Pat. No. 5,955,749 to Joannpoulos et al. Entitled "Light Emitting Device Utilizing Periodic Dielectric Structure" describes an approach to the problem of increasing extraction efficiency. According to U.S. Pat. No. 5,955,749, a photonic crystal is created by forming a grid of holes in the semiconductor layer of a light emitting diode. The grid of holes creates a medium with a dielectric constant that is periodically modulated and affects how light propagates through the medium. The photons of a light emitting diode can be characterized by their spectral or dispersive relationship, which describes the relationship between photon energy and wavelength. The spectrum of a photonic crystal consists of two classes. Emission class photons have energies and wavelengths that match the spectrum of free space photons, so that emission photons can escape from light emitting diodes. On the other hand, guided class photons have energies and wavelengths that do not match the spectrum of free space photons, so the guided photons are captured by light emitting diodes. The stimulating photons are similar to the photons described above that undergo total internal reflection.
[0006]
The spectrum of stimulated photons in a photonic crystal consists of energy or photonic bands, separated by band gaps, similar to the spectrum of electrons in a crystal lattice. Stimulated photons having energy in the band gap cannot propagate to the photonic crystal. In contrast, the spectrum of emitted photons is continuous and thus has no gap. The recombination process in a typical LED emits photons with well-defined energies. Therefore, if a photonic crystal is formed in an LED such that the energy of the emitted photons falls within the band gap of the photonic crystal, all of the induced photons cannot exist with such energy, so all The emitted photons are emitted as emitted photons. As mentioned above, this design increases the extraction efficiency of the LED, since all emitted photons can escape from the LED.
[0007]
To explore the utility of photonic crystals for light generation, US Pat. No. 5,955,749 provides a partial description of the theoretical structure of a photonic crystal device.
[0008]
U.S. Pat. No. 5,955,749 describes an n-type doped layer, an active layer, a p-type doped layer, and a grid of holes formed in these layers. However, the device of U.S. Pat. No. 5,955,749 is not enabled to operate and is not an LED. First, electrons are required for the photonic crystal LED (PXLED) to work well, but the electrons are not described. The fabrication of electrodes in conventional LEDs is well known in the art. However, for PXLEDs it is not clear either the fabrication of the electrodes or the effect of the electrodes on the operation of the PXLED. For example, to properly align the electrode layer mask with the hole grid, new fabrication techniques will be required. Also, the electrodes are generally considered to reduce extraction efficiency because they reflect a portion of the emitted photons back into the LED and absorb another portion of the emitted light.
[0009]
Second, US Pat. No. 5,955,749 proposes fabricating a photonic crystal light emitting device from GaAs. GaAs is certainly convenient for fabricating ordinary LEDs, and is therefore a common material. However, it is about 10 times smaller, as described by S. Tiwali in, for example, "Composite Semiconductor Device Physics" published by Academic Press (1992). ⁶ It has a high "surface recombination rate" of cm / sec. This surface recombination rate represents the rate of recombination of electrons and holes on the diode surface. Electrons and holes are present in the junction region of the LED and come from the n-type and p-type doped layers, respectively. When electrons and holes recombine across the semiconductor gap, the recombination energy is emitted in the form of photons, generating light. However, when electrons and holes recombine through the intermediate electronic state in the gap, the recombination energy is emitted in the form of heat rather than photons, reducing the luminous efficiency of the LED. In an ideal crystal, there are no states in the gap. Also, in today's high-purity semiconductor crystals, most materials have almost no state in the gap. However, there are generally many surface and defect states on the surface of a semiconductor, many in the gap. Thus, many of the electrons and holes near the surface will recombine through these surface and defect states. This surface recombination generates heat, rather than light, and significantly reduces the efficiency of the LED.
[0010]
Such problems do not result in significant efficiency losses for conventional LED structures. However, PXLEDs contain a large number of holes and thus have a much larger surface area than regular LEDs. Thus, surface recombination may be able to reduce the efficiency of the PXLED below that of the same LED without the photonic crystal structure, rendering the formation of the photonic crystal structure meaningless. GaAs is not a promising candidate for photonic crystal LED fabrication because of its high surface recombination rate. The significance of this problem is due to the fact that, to the applicant's knowledge, working LEDs with photonic crystals near the active region have not previously been reported in literature claiming extraction or improved internal efficiency using GaAs. Is reflected. In particular, US Pat. No. 5,955,749 does not describe the successful operation of a photonic crystal LED. Also, US Pat. No. 5,955,749 does not describe the effect of the photonic crystal on the light emitting process that can affect the internal efficiency of the LED.
[0011]
Although photonic crystals are promising for light extraction for the reasons described above, their design is problematic. There are several papers describing experiments on hole grids formed in semiconductor slabs. The improvement in the extraction rate at the band gap photon energy is described in "Modified Spontaneous Emission from Two-Dimensional Photonic Bandgap Crystal Slabs" (American Society of Optical Sciences B, Vol. 17, p. 1438, 2000). Reported by K. Lee et al. Lee et al. Not only show the benefits of extracting photonic crystals in luminescent designs, but also show that photonic lattices can affect spontaneous luminescence. However, Lee et al. Do not show how to form and operate a light emitting device using this design. Photonic crystal LEDs can be formed from Lie et al. Light emitting designs by including electrodes. However, the addition of electrodes will have a substantial effect on extraction and spontaneous emission. This effect is unknown and cannot be neglected in LED design. Since Lee et al.'S design does not include such electrodes, the overall characteristics of the LED formed from that design are not clear. This raises questions about the usefulness of Lee's design.
[0012]
[Problems to be solved by the invention]
Therefore, there is a need for new designs to make working photonic crystal LEDs. This need includes the introduction of new materials with sufficiently low surface recombination rates. This need also extends to designs that offset expected adverse effects such as reduced natural luminescence and reflections from the electrodes. Finally, there is a need to describe techniques for fabricating photonic crystal LEDs, including fabrication of electrodes.
[0013]
[Means for Solving the Problems]
According to the present invention, a photonic crystal light emitting diode is provided. The PXLED includes an n-type doped layer, a light emitting active layer, a p-type doped layer, and electrodes for the n-type and p-type doped layers. The photonic crystal is formed as a periodic structure in the active layer or in one of the doped layers, extending near or through the active layer. In one embodiment, the periodic structure is a two-dimensional lattice of holes. The holes can have a circular, square or hexagonal cross section. The holes can be filled with air or a dielectric. In another embodiment, the periodic structure is periodic only in one dimension, an example being a set of parallel grooves. In another embodiment, the dielectric constant of the PXLED can change in one or two directions in the plane of the semiconductor layer. In another embodiment, the thickness of the selected layer can vary in one or two directions in the plane of the semiconductor layer.
[0014]
Parameters characterizing the hole grid include the lattice constant, the hole diameter, the hole depth, and the dielectric constant of the dielectric in the hole. In some embodiments, these parameters are chosen such that the wavelength of the emitted light is near the edge of the energy band of the photonic crystal due to the high density of photons near the edge of the band. . Recombination energy can be emitted much more efficiently through photons with a higher density of states. Thus, in embodiments of the present invention that emit light having energy near the edge of the band, the emitted power may exceed the power emitted by the same LED without periodic structure by up to about eight times. it can. This improvement can be related to the presence of a metal electrode layer in embodiments of the present invention that increases the efficiency of the PXLED and increases its emitted power.
[0015]
Embodiments of the present invention are formed from III-nitrogen compounds that include nitrogen and a Group III element such as gallium, aluminum, or indium. III-Nitrogen compounds have a surface recombination rate lower than one-tenth of GaAs, according to M. Volodick et al., Published in the Journal of the Japan Society of Applied Physics (Vol. 87, p. 3497, 2000). Used in As described above, when the surface recombination speed is low, the efficiency of the PXLED can be increased as compared with the efficiency of a normal LED having no photonic crystal structure, and the “GaN PXLED” is aimed at improving the light generation efficiency. It is a technically and economically viable candidate.
[0016]
In addition, "GaN LEDs" are the main candidates for generating light in the blue and green regions of the spectrum, so increasing their efficiency is highly desirable. Finally, the formation of photonic crystals can substantially improve the efficiency of "GaN LEDs", since the external quantum efficiency of "GaN LEDs" is often near 10%. As used herein, external quantum efficiency is the product of internal quantum efficiency and extraction efficiency.
[0017]
The new structure of the PXLED uses new fabrication techniques. In some methods of the invention, an n-type doped layer, an active layer overlying the n-type doped layer, a p-type doped layer overlying the active layer, and a p-type electrode layer overlying the p-type doped layer The PXLED is fabricated by forming In some embodiments, the n-type doped layer, the active layer, and the p-type doped layer can include one or more layers. Next, a patterned mask layer is formed having an opening and overlies the p-type doped layer. The p-type electrode layer and the underlying semiconductor layer are removed through the openings in the mask layer to form a grid of holes with a well-defined cross-section. Finally, the mask layer is removed and an n-type electrode layer is deposited on the n-type doped layer.
[0018]
In some methods of the present invention, a PXLED is made by forming a patterned mask layer having openings on a substrate. Next, an n-type doped layer overlying the mask layer, an active layer overlying the n-type doped layer, a p-type doped layer overlying the active layer, and a p-type electrode layer over the p-type doped layer are formed. To do so, an epitaxial lateral overgrowth technique (ELOG) is used. ELOG technology creates a semiconductor layer with a low defect density and improves the performance and reliability of the PXLED. A second substrate is formed on the electrode layer, and the first substrate is removed to expose the mask layer. Next, the semiconductor layer is at least partially removed through openings in the mask layer to form a hole grid. Finally, a mask layer is used as a p-type electrode layer and an n-type electrode layer is formed on the n-type doped layer.
[0019]
In some methods of the present invention, a PXLED is made by forming a first mask layer on a substrate. Next, an epitaxial lateral overgrowth technique is used to form an n-type doped layer overlying the mask layer, an active layer overlying the n-type doped layer, and a p-type doped layer overlying the active layer. Used. Next, a second patterned mask layer overlying the p-type doped layer is formed using the "Talbot" effect, utilizing the diffraction of light across the openings in the first mask layer. Next, the semiconductor layer is at least partially removed through openings in the first mask layer to form a hole grid. Finally, electrode layers are formed for both the n-type doped layer and the p-type doped layer.
[0020]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 shows an embodiment of a photonic crystal LED (PXLED) 100. The first electrode layer 104 is formed from a substantially reflective metal. In some embodiments, the first electrode layer 104 also serves as a substrate. In some embodiments, the first electrode layer 104 can be overlaid on the substrate. Many different metals can be used to form the first electrode layer 104, including Au, Al, Ag, and heavily doped semiconductors. The n-type doped layer 108 overlies the first electrode layer 104. Active layer 112 overlies n-type doped layer 108. P-type doped layer 116 overlies active layer 112. Finally, the second electrode layer 120 overlies the p-type doped layer 116. The semiconductor layers 108, 112, and 116 are often referred to as epi layers 124. Throughout this application, the term “layer” can refer to either a single semiconductor layer or a multilayer structure, wherein the individual layers in the multilayer are characterized by dopant concentration, alloy composition, or some other physical property. Are different.
[0021]
The active layer 112 includes a junction region where the electrons of the n-type doped layer 108 recombine with the holes of the p-type doped layer 116 and emit recombination energy in the form of photons. The active layer 112 can include a quantum well structure to optimize photon generation. Many different quantum well structures are described in the literature, for example, by GB String Fellow and M. George Crawford in "High Brightness Light Emitting Diodes" published by the Associated Press in 1997. is there.
[0022]
PXLED photonic crystals are made by forming a periodic structure in the LED. The periodic structure may include a periodic variation in the thickness of the p-type doped layer 116 with alternating maximum and minimum values. One example is a planar grid of holes 122-i, where the integer i points to the holes. In the present embodiment, the holes 122-i are through holes, and are formed in the n-type doped layer 108, the active layer 112, and the p-type doped layer 116. In some embodiments, holes 122-i are formed in p-type doped layer 116 and active layer 112. In some embodiments, holes 122-i are formed only in p-type doped layer 116 and extend to near active layer 112. For example, holes 122-i may extend from active layer 112 within one wavelength of emitted light in p-type doped layer 116. In some embodiments, the ratio of the period of the periodic structure to the wavelength of the emitted light in air ranges from about 0.1 to about 5. In embodiments where the period to wavelength ratio is in the range of 0.1 to 5, photonic crystal formation can have a significant effect on the efficiency of the PXLED 100.
[0023]
The holes 122-i can have a circular, square, hexagonal, and some other type of cross section. Also, the holes 122-i may be made of air or a dielectric constant ε different from the dielectric constant of the _h Can be filled with a dielectric material. Possible dielectrics include silicon oxide.
[0024]
FIG. 2 shows another embodiment of the present invention. The PXLED 100 is formed on a host substrate 102, an n-type doped layer 108 overlies the host substrate 102, an active layer 112 overlies the n-type doped layer 108, and a p-type doped layer 116 overlies the active layer 112. , And the second electrode layer 120 overlaps the p-type doped layer 116. In this embodiment, the n-electrode layer 104 is formed overlying the area of the n-type doped layer 108 remote from the photonic crystal, making the fabrication of the n-electrode layer 104 technically simple. The fabrication of such an embodiment is described in full herein, for example, in D.E. This is described in U.S. Pat. No. 6,307,218 B1 entitled "Electrode Structure for Light Emitting Devices" to Steigerwald et al.
[0025]
FIG. 3 shows a photonic crystal structure formed as a triangular lattice of holes 122-i. This grid has a diameter d of the hole 122-i, a lattice constant a indicating the distance between the centers of the nearest neighbor holes, a depth w of the hole (for example, as shown in FIG. 1), and a grid. Dielectric constant ε of dielectric _h Characterized by The PXLED parameters a, d, w, and ε _h Affects the density of the states of the bands, especially the density of the states at the band edges of the spectrum of the photonic crystal.
[0026]
The grid structure of the grid of holes 122-i also affects efficiency. In various embodiments, holes 122-i form squares, hexagons, honeycombs, and other known two-dimensional lattices.
[0027]
FIG. 4 shows the efficiency of the particular embodiment of FIG. Although the efficiency indicator will be described with reference to the specific embodiment of FIG. 1, in similar embodiments, the efficiency indicator exhibits similar behavior. In this particular embodiment of FIG. 1, the epi layer 124 is made from AlGaInN by using a stoichiometry of a suitably selected alloy of the elements Al, Ga, In, and N. The n-type doped layer 108 is doped with silicon, and the p-type doped layer 116 is doped with manganese. The n-doped layer 108 and the p-doped layer 116 are designed for efficient carrier injection into the active layer 112. The active layer 112 includes an InGaN layer, forms a quantum well, and is sandwiched between n-type InGaN layers having a lower In concentration. The wavelength λ of the emitted light can be adjusted by appropriately selecting the In concentration and the thickness of the quantum well. The first and second electrode layers 104 and 120 are formed of a highly reflective, low loss material, including Ag, Al, and Au-based electrode materials. The grid is a triangular grid as shown in FIG. The total thickness of the epi layer 124 is between 0.375a and 2a and the hole diameter d is 0.72a. The first electrode 104 has a thickness of a or more, and the second electrode 120 has a thickness of 0.03a. The position of the active layer 112 is 0.0625 a away from the center of the epi layer 124 and is close to the first electrode layer 104. The efficiency of the PXLED 100 is sensitive to the position of the active layer 112.
[0028]
FIG. 4 shows two indicators of efficiency of the above-described specific embodiment of FIG. The solid line indicates the relative light emission, and the broken line indicates the extraction efficiency. Relative light output is defined as the ratio of the total power emitted by a LED with a photonic crystal structure in the form of light divided by the total power emitted by the same LED without a periodic structure. The index of efficiency is shown in FIG. 4 normalized by c / a as a function of the photon frequency ν, where c is the speed of light in air and a is the lattice spacing. The photon frequency ν and the photon energy E are related by the known relationship E = hν where h is Planck's constant. As shown in FIG. 4, the relative light emission amount shows a maximum value near the value of ν / (c / a) = 0.70. The relative light emission of the PXLED 100 is about eight times as large as the relative light emission of the same LED having no photonic crystal structure. The extraction efficiency of PXLED 100 is relatively flat as a function of frequency. The overall efficiency of the PXLED 100 is proportional to the product of these quantities, and if the parameters of the PXLED 100 are properly selected, forming a photonic crystal in the LED will increase the overall efficiency, and thus the output output. Is shown.
[0029]
In this embodiment, the grating is designed such that at or near the frequency of the emitted light, a maximum of the relative light output, and thus the overall efficiency, occurs. In the embodiment of FIG. 4, the maximum value of the relative light emission occurs near the frequency ν = 0.7 (c / a). Therefore, in a PXLED in which the active layer emits light having a wavelength of λ, the local maximum value of the relative light emission is substantially equal to the frequency of the emitted light when the lattice spacing a of the photonic crystal is about 0.7λ. Will match. Here, the relationship λν = c is used to link wavelength λ and frequency ν. For example, when the wavelength λ of the emitted light is 530 nm, the lattice spacing is 371 nm.
[0030]
Analysis of the band structure and corresponding density of states has shown that the above power enhancement occurs at energy near the band edge. The photon density is high near the band edge. The ratio of spontaneous emission is proportional to the density of states. Therefore, when the state density is large, the ratio of spontaneous emission is improved. Thus, embodiments are designed such that the energy of the emitted light is near the band edge, thereby increasing the efficiency of the PXLED. Further, the PXLED parameters a, d, w, and ε _h And the design of the electrode layers can also be selected to improve the extraction efficiency, maximizing the overall efficiency of the PXLED. The efficiency of PXLEDs has been shown to be quite sensitive to the presence of the electrode layer and its design.
[0031]
In other embodiments, typical values for the lattice spacing are between about 0.1λ and about 10λ, preferably between about 0.1λ and about 4λ. Typical values for the hole diameter d are between about 0.1a and about 0.5a. Typical values for the hole depth w are between zero and the total thickness of the epi layer 124. Finally, ε _h Is generally between 1 and about 16.
[0032]
In embodiments where the epi layer 124 has a total thickness of about 2a or more, the maximum of the relative light emission is as small as two to three times. In these embodiments, the maximum value is less affected by the presence or absence of the electrode layers 104 and 120.
[0033]
In embodiments where the electrode layer has sufficient dissipative properties, such as a sufficiently large imaginary part of the refractive index n, the design parameters may differ significantly from the values described above. The efficiency of the amount of light emitted depends on the polarization of the emitted light. However, PXLEDs with a honeycomb lattice of holes can emit light with luminous efficiency that is insensitive to polarization.
[0034]
FIG. 5A shows two indicators of efficiency of the embodiment of FIG. Although the efficiency indicator will be described with reference to the specific embodiment of FIG. 2, in similar embodiments, the efficiency indicator exhibits similar behavior. In the embodiment of FIG. 2, the epi layer 124 is only partially removed at the holes 122-i. The depth of the holes 122-i is 2a in this particular embodiment. In this particular embodiment of FIG. 3, the total thickness of the epi layer 124 is greater than about 2a, for example, 6a. The hole filled with air has a diameter d of about 0.72a and the depth of the hole is about 2a. Similar results apply to hole diameters ranging from about 0.3a to about a. The second electrode layer 120 has a thickness of about 0.09a, and the active layer 112 is formed with a thickness of about 0.5a.
[0035]
FIG. 5A shows two indicators of efficiency of the above-described specific embodiment of FIG. Again, the solid line shows the relative light emission and the dashed line shows the extraction efficiency. Similar to FIG. 4, the relative light emission shows an improvement with a maximum value of about 2.7 at a frequency of about ν = 0.325 (c / a). Further, in this embodiment, unlike FIG. 4, the extraction speed also varies as a function of frequency. In particular, the extraction rate shows a wide maximum in the range of 0.3 (c / a) to 0.45 (c / a) and near 0.65 (c / a).
[0036]
FIG. 5B shows the product of the two quantities, extraction efficiency and relative luminescence, in FIG. 5A. As mentioned above, the overall efficiency of a PXLED is proportional to this product. As shown in FIG. 5B, the emitted power of this embodiment is again greater than that of the corresponding LED without the photonic crystal structure.
[0037]
According to FIG. 5B, the overall efficiency is maximum at a normalized frequency of about ν = 0.325 (c / a) and about ν = 0.63 (c / a). Therefore, in the PXLED in which the active layer emits light having the wavelength λ, the local maximum value of the relative light emission amount is such that the lattice spacing a of the photonic crystal is about a = 0.325λ or about a = 0.63λ. In that case, it will substantially coincide with the frequency of the emitted light. Again, the relationship λν = c is used to link wavelength λ and frequency ν. For example, if the emitted wavelength λ is 530 nm, the lattice spacing can be appropriately selected to be about 172 nm or about 334 nm.
[0038]
Some embodiments exhibit resonant behavior at certain frequencies. At these resonance frequencies, the emission pattern may be different from the emission at other frequencies. For example, near the frequency ν / (c / a) = 0.54, the embodiment of FIG. 2 emits its output almost toward the second electrode layer instead of the first electrode layer, Produces minimal extraction efficiency. The existence of this minimum again emphasizes the importance of the electrode layer. This effect can be used to design PXLEDs that emit a large portion of the generated light in a selected direction.
[0039]
In embodiments where the electrode layers 104 and 120 have substantial dissipative properties, such as a large imaginary part of the refractive index n, the design parameters may differ significantly from the values described above.
[0040]
Periodic structures are created by creating a variation in the dielectric constant of one or more selected semiconductor layers in a direction perpendicular to the plane of those layers, in addition to the already formed two-dimensional periodic structure. Can be three-dimensional. This can be achieved, for example, by forming several structural layers with two different alloy mixtures alternately in the selected semiconductor layer.
[0041]
In some embodiments, the periodic structure is a variation in the thickness of one or more selected semiconductor layers. The periodic structure can include a thickness variation along one direction in the plane of the semiconductor layer, but also extends along a second direction without variation to form a substantially set of parallel grooves. I do. The two-dimensional periodic variations in thickness include various grids of recesses.
[0042]
This embodiment and the further embodiments below are described such that the n-type doped layer is deposited first and the p-type doped layer is formed overlying the n-type doped layer, but the p-type doped layer Are first deposited and an n-type doped layer is formed overlying the p-type doped layer and having an inverse architecture is also understood to be within the scope of the present invention.
[0043]
As mentioned above, semiconductors having a low surface recombination rate are promising candidates for forming PXLEDs. Electrons and holes that recombine at the surface through the mid-gap state emit their energy in the form of heat rather than light. Thus, the surface acts as a current sink, reducing the efficiency of the PXLED. The reduction in efficiency is significant for PXLEDs made of semiconductors with fast surface recombination rates, such as GaAs. In fact, the efficiency of a GaAs PXLED may be reduced below that of a GaAs PXLED with the same architecture but no photonic crystal structure. For these reasons, a great advantage cannot be obtained even if the PXLED is made of GaAs.
[0044]
In contrast, forming a photonic crystal structure in a GaN LED can significantly increase the efficiency of a GaN LED because GaN has a much lower surface recombination rate than GaAs.
[0045]
Thus, in embodiments of the present invention, epi layer 124 is formed from a semiconductor with a low surface recombination rate. Suitable options include III-nitride compound semiconductors formed from nitrogen and Group III elements such as gallium. The advantage of this choice is that the surface recombination rate of GaAs is about 10 ⁶ cm / sec, while the surface recombination rate of GaN is about 3 × 10 ⁴ cm / sec. Due to the slow surface recombination rate, the surface recombination process is much weaker in GaN than in GaAs. In addition, the diffusion distance of the carriers in GaN is also much shorter than GaAs. Therefore, the number of carriers diffusing on the surface during LED traversal is much lower in GaN than in GaAs. The low number of carriers reaching the surface by diffusion makes the already weak surface recombination process even weaker.
[0046]
III-nitrogen compound LEDs can also be formed using AlGaN, InGaN, or a combination thereof.
[0047]
New structures for PXLEDs can be made in new ways. 6A to 6D show a method for manufacturing a PXLED.
[0048]
FIG. 6A illustrates the steps of forming a PXLED 100 on a host substrate 102, which may be, for example, sapphire. The n-type doped layer 108, the active layer 112, the p-type doped layer 116, and the second electrode layer 120 are formed using a normal deposition technique. The mask layer 128 is formed so as to overlap with the second electrode layer 120.
[0049]
FIG. 6B illustrates an opening in the mask layer 128 using high resolution lithography techniques such as electron beam lithography, nanoimprint lithography, deep x-ray lithography, interferometry lithography, high temperature embossing, or microcontact printing. Shown is the step of patterning the 130-i grid.
[0050]
FIG. 6C illustrates the step of at least partially removing the epi layer 124 corresponding to the lattice of the openings 130-i in the mask layer 128. In FIG. 6C, the n-type doped layer 108 is only partially removed. Nearly vertical walls can be achieved using dry etching techniques. Damage caused by dry etching can be mitigated by subsequent brief wet chemical etching, annealing, a combination thereof, or other surface passivation techniques.
[0051]
FIG. 6D illustrates the step of removing the mask layer 128. This step exposes the second electrode layer 120 and can therefore be used to provide electrical contact with the p-type doped layer 116. Finally, the first electrode layer 104 is formed on the region of the n-type doped layer 108 where the p-type doped layer 116 and the active layer 112 have been removed. In some embodiments, the n-type doped layer 108 has already been partially removed in that region as well. The first electrode layer 104 can be formed in a region of the n-type doped layer 108 replaced with a photonic crystal structure, which facilitates its manufacture. The lateral compact shape related to the formation of the first electrode layer 104 is described in D.A. This is described in U.S. Pat. No. 6,307,218 B1 entitled "Electrode Structure for Light-Emitting Devices" to Steigerwald et al.
[0052]
In the LED, current flows between the first electrode layer 104 and the second electrode layer 120. In the above-described embodiment, the first electrode layer 104 and the second electrode layer 120 are formed in a horizontally removed area, so that the current flow includes a substantially horizontal path.
[0053]
In some embodiments, the host substrate 102 is a good conductor, so the first electrode layer 104 can be deposited directly on the host substrate 102. In these embodiments, the path of the current is substantially vertical across the epi layer 124.
[0054]
Some embodiments generate most of the generated light through the host substrate 102, while other embodiments generate most of the light through the side opposite the host substrate 102, which may be referred to as the top of the LED. . In a substrate-emitting PXLED, the host substrate 102 is formed from a substantially transparent material, and the second electrode layer 120 is formed from a substantially reflective or opaque material. In a top emitting PXLED, the host substrate 102 is formed from a substantially reflective or opaque material. In some embodiments, a reflective layer is deposited on the host substrate 102.
[0055]
FIG. 6E illustrates that in some embodiments where the host substrate 102 is a conductor, the first electrode layer 104 can be formed on the side of the host substrate 102 opposite the epi layer 124. In these embodiments, the current path is substantially vertical across the entire PXLED 100.
[0056]
7A to 7F show another method of manufacturing a PXLED. This epitaxial lateral overgrowth (ELOG) technique may be useful for III-Nitride based semiconductor structures such as, for example, GaN based LEDs. GaN semiconductors have an abnormally large concentration of defects including cracks and dislocations. Such a high defect concentration may lead to poor reliability, reduced efficiency, and reduced brightness. Many of the defects are aggregated by the surface of the growth substrate. ELOG technology reduces this defect concentration and greatly reduces the harmful effects described above.
[0057]
FIG. 7A shows a step of forming a mask layer 128 on the first substrate 102. The grating of openings 130-i may be applied to the mask layer 128 by high resolution lithography techniques such as electron beam lithography, nanoimprint lithography, deep x-ray lithography, interferometry lithography, high temperature embossing, or microcontact printing. Can be formed.
[0058]
FIG. 7B shows a step of forming an n-type doped layer 108 overlying the first substrate 102 and the mask layer 128. The active layer 112 is formed so as to overlap on the n-type doped layer 108, and the p-type doped layer 116 is formed so as to overlap on the active layer 112. A feature of the ELOG technique is that the growth of the n-type doped layer 108 starts from the first substrate 102 mainly through the lattice of the openings 130-i. Thus, the growing n-type doped layer 108 extends laterally into the region 138-i, rather than growing directly above the mask layer 128.
[0059]
Defects are generally agglomerated by the first substrate 102, and thus will primarily originate from the grid of openings 130-i. As the growth of n-type doped layer 108 extends into region 138-i, defects and dislocations terminate and tend to disappear from each other in the overgrown region. Therefore, the defect concentration will be higher in the defect-rich region 134-i directly above the lattice of the opening 130-i, while the defect concentration will be higher than that of the defect between the lattices of the opening 130-i. In a small area 138-i, it is low.
[0060]
FIG. 7C illustrates forming a bonding layer 121 and a second substrate 142 overlying the p-type doped layer 116. The bonding layer 121 bonds the epi layer 124 to the second substrate 142.
[0061]
FIG. 7D illustrates removing the first substrate 102 from the epi layer 124 using a laser lift-off or etching technique.
[0062]
FIG. 7E shows the step of forming holes 122-i by an etching procedure using the mask layer 128. For example, dry etching can be used to ensure that the walls of holes 122-i are substantially vertical. The openings 130-i in the mask layer 128 are aligned with the defect-rich regions 134-i. Therefore, regions having a high defect density are removed by the etching step. Therefore, only the epi layer 124 formed in the region 138-i with few defects remains by this etching step, and the PXLED 100 having a low defect density and thus high quality is obtained.
[0063]
FIG. 7F shows the step of removing the mask layer 128 and forming the first electrode layer 104 over the region 138-i having few defects. The first electrode layer 104 can be formed by, for example, oblique deposition. This technique minimizes the deposition of contact material inside the holes 122-i. The second electrode layer 120 may be formed in a horizontally removed area.
[0064]
In some embodiments, the mask layer 128 itself can serve as the first electrode layer 104. In these embodiments, the mask layer 128 is not removed.
[0065]
In a substrate-emitting PXLED, the bonding layer 121 is substantially transparent and can be formed, for example, from indium tin oxide (ITO). The second substrate 142 is also substantially transparent and is formed, for example, from sapphire, silicon carbide, or glass. The first electrode layer 104 is substantially reflective or opaque, and is formed of, for example, Ag, Al, or Au.
[0066]
In the top-emitting PXLED, at least one of the bonding layer 121 and the second substrate 142 is substantially reflective or opaque. The tie layer 121 or the second substrate 142 can be made reflective, for example, by forming an overlying, substantially reflective layer.
[0067]
8A to 8G show a related method of making a PXLED. The steps shown in FIGS. 8A to 8D are the same as those in FIGS. 7A to 7D.
[0068]
FIG. 8E shows the step of forming the photosensitive layer 148. The transparency of the mask layer 128 is low. To take advantage of this property, a negative photosensitive layer 148 is deposited on the surface from which the first substrate 102 has been removed. A negative photosensitive layer 148 is deposited over the mask layer 128 and the defect-rich regions 134-i. Next, when light is irradiated through the second substrate 142, the light reaches the photosensitive layer 148 across the epi layer 124. The negative photosensitive layer 148 changes its chemical composition when exposed to incident light. This change in chemical composition can remove the negative photosensitive layer 148 that is not exposed to light and overlies the mask layer 128, while at the same time keeping it in place overlying the defect-rich region 134-i. it can. Next, the mask layer 128 is similarly removed. This procedure creates a planar grid of aligned mask layers 148-i overlying the defect-rich regions 134-i.
[0069]
Next, the first electrode layer 104 is deposited so as to overlap the planar lattice of the aligned mask layers 148-i.
[0070]
FIG. 8F shows the next stage of partially removing the first electrode layer 104 by lift-off of the planar grating of the aligned mask layer 148-i. This step exposes n-type doped layer 108 in regions 134-i with more defects, but still covers n-type doped layer 108 in regions 138-i with less defects. I've been left.
[0071]
FIG. 8G shows the formation of holes 122-i by etching, which leaves the first electrode layer 104 in place, but removes the exposed epilayer 124 in regions 138-i with fewer defects. . At this stage, the first electrode layer 104 is used as an etch mask. Epi layer 124 can be completely or partially removed to form holes 122-i. In some embodiments, the walls of holes 122-i are made substantially vertical using dry etching. After this stage, the remaining portion of first electrode layer 104 is electrically coupled to n-type doped layer 108 only.
[0072]
Because of the ELOG technique, the grid of openings 130-i in the mask layer 128 is aligned with the defect-rich regions 134-i. Thus, the etching step of FIG. 8G substantially removes the defect-rich region 134-i, leaving the defect-poor region 138-i substantially in place. In this way, LEDs fabricated by ELOG have a low defect density and reduce the aforementioned harmful effects, including poor reliability, reduced efficiency, and reduced brightness.
[0073]
In the next step, a second electrode layer 120 is formed over the region of the p-type doped layer 116 that has been replaced with a photonic crystal structure, facilitating its fabrication.
[0074]
In a substrate-emitting PXLED, the bonding layer 121 is substantially transparent and is formed, for example, from indium tin oxide (ITO). The second substrate 142 is also substantially transparent, and is made of, for example, sapphire, silicon carbide, or glass. The first electrode layer 104 is substantially reflective or opaque, and is formed of, for example, Ag, Al, or Au.
[0075]
In the top-emitting PXLED, at least one of the bonding layer 121 and the second substrate 142 is substantially reflective or opaque. The tie layer 121 or the second substrate 142 can be made reflective, for example, by forming an overlying, substantially reflective layer.
[0076]
In some embodiments, the order of deposition of the n-type and p-type doped layers is reversed, so that layer 108 is a p-type doped layer and layer 116 is an n-type doped layer.
[0077]
9A to 9F show a related method of making a PXLED. The steps shown in FIGS. 9A to 9D are the same as those in FIGS. 8A to 8D.
[0078]
FIG. 9E illustrates the next stage in which the mask layer 128 is used as an etch layer. Thus, the defect-rich region 134-i is partially removed at this stage, creating a hole 122-i where the grid of openings 130-i in the mask layer 128 was originally located. After forming the holes 122-i, the mask layer 128 is removed. After formation of holes 122-i, the overall thickness of epi layer 124 can be optimized by further etching or other techniques.
[0079]
FIG. 9F shows the next stage where holes 122-i are filled with a non-conductive material 143 to substantially flatten the top surface of the device. The non-conductive material can be, for example, spin-on-glass (SOG). Next, the first electrode layer 104 is deposited on the substantially planarized upper surface formed by the n-type doped layer 108 and the non-conductive material 143. With this architecture, the first electrode layer 104 is electrically coupled only to the n-type doped layer 108. Next, a second electrode layer 120 is formed on the region of the p-type doped layer 116 replaced by the photonic crystal structure, facilitating its fabrication. Similar to the embodiment of FIGS. 8A to 8G, PXLEDs made by the methods of FIGS. 9A to 9F can be substrate emitting or top emitting devices.
[0080]
In the above embodiment, the first electrode layer 104 and the second electrode layer 120 are formed in a horizontally removed area, so that the current flow includes a substantially horizontal path.
[0081]
In some embodiments, the second substrate 142 is a good conductor, so the second electrode layer 120 can be deposited directly on the epi layer 124 or the tie layer 121 can be Can act as a layer. In these embodiments, the path of the current is substantially vertical across the epi layer 124.
[0082]
10A to 10E show another method of making a PXLED. This method also utilizes epitaxial lateral overgrowth or ELOG technology, which can be useful for III-Nitride based semiconductor structures such as, for example, GaN-based LEDs.
[0083]
FIG. 10A shows a step of forming a mask layer 128 on the host substrate 102. The grating of openings 130-i may be formed by mask layer 128 using high resolution lithography techniques such as electron beam lithography, nanoimprint lithography, deep x-ray lithography, interferometry lithography, high temperature embossing, or microcontact printing. Can be formed.
[0084]
FIG. 10B shows a step of forming an n-type doped layer 108 overlying the first substrate 102 and the mask layer 128. Active layer 112 is formed so as to overlap n-type doped layer 108, and p-type doped layer 116 is formed so as to overlap active layer 112. A feature of the ELOG technique is that the growth of the n-type doped layer 108 starts from the first substrate 102 mainly through the lattice of the openings 130-i. Thus, the growing n-type doped layer 108 extends laterally into the region 138-i, rather than growing directly above the mask layer 128.
[0085]
Defects are generally agglomerated by the first substrate 102, and will therefore mainly emanate from the grid of openings 130-i. When the growth of the n-type doped layer 108 extends to the region 138-i, defects and dislocations end and tend to disappear from each other in the overgrown region. Therefore, the defect concentration is high in the defect-rich region 134-i directly above the lattice of the opening 130-i, while it is low in the defect-rich region 138-i of the opening 130-i. Become.
[0086]
FIG. 10C illustrates the step of aligning the opening in the mask layer with the defect-rich region 134-i. This method is described in WHF Talbot's "Facts Regarding Optical Science, Vol. 9", pages 401 to 407, Vol. 9, published by Taylor and Francis in 1836. Utilize the "Talbot" effect described in No. 4.
[0087]
According to the "Talbot" effect, a periodic structure of period length a, when illuminated by coherent light having a plane wavefront with wavelength λ in the material, has a distance D = 2a through "Fresnel" diffraction. ² It forms its own image at points that are integral multiples of / λ.
[0088]
To take advantage of the “Talbot” effect, the thickness of the epi layer 124 is selected to be D or an integer multiple of D. Further, the substrate 102 is formed from a substantially transparent material, and the mask layer is formed from a substantially opaque material. Further, the photosensitive layer 149 is deposited so as to overlap the p-type doped layer 116. The "Talbot" effect is exploited by vertically irradiating light having a plane wavefront on the side of the substrate 102 opposite the epi layer 124. Only the part of the incident light in the grating of the openings 130-i will enter the epi layer 124. Light propagating through the grid of openings 130-i creates an image of the grid of openings 130-i at a distance D due to the "Talbot" effect. Therefore, the photosensitive layer 149 is exposed to the image of the lattice of the openings 130-i. The exposed areas of the photosensitive layer 149 are removed at a later stage to create aligned openings 150-i. The “Talbot” effect can be achieved in this embodiment, for example, by using a near-collimated light source.
[0089]
FIG. 10D illustrates the use of aligned openings to form holes 122-i. For example, dry etching can be used to ensure that the walls of holes 122-i are substantially vertical. Due to the "Talbot" effect, the aligned openings 150-i are aligned with the defect-rich regions 134-i. Thus, the etching step removes regions 134-i with a high defect density, so that the remaining epi layer 124 consists of regions 138-i with substantially fewer defects. Therefore, PXLEDs made by this technique will have a low defect density. After the etching step, the photosensitive layer 149 is removed.
[0090]
FIG. 10E illustrates the steps of forming a first electrode layer 104 overlying the n-type doped layer 108 and a second electrode layer 120 overlying the p-type doped layer 116. The first electrode layer 104 is formed on the region of the n-type doped layer 108 which has been replaced with the photonic crystal structure to facilitate its manufacture. The second electrode layer 120 can be formed by, for example, oblique deposition. This technique minimizes the deposition of contact material inside the holes 122-i.
[0091]
11A to 11E show a method associated with the method of FIGS. 10A to 10E. The steps in FIGS. 11A and 11B are the same as the steps in FIGS. 10A and 10B.
[0092]
FIG. 11C illustrates a different way to utilize the “Talbot” effect. The thickness of the epi layer 124 is selected to be D or an integer multiple of D. Further, substrate 102 is formed from a substantially transparent material, and mask layer 128 is formed from a substantially opaque material. Further, a negative photosensitive layer is deposited so as to overlap the p-type doped layer 116. The "Talbot" effect is exploited by vertically irradiating light having a plane wavefront on the side of the substrate 102 opposite the epi layer 124. Only the part of the incident light in the grating of the openings 130-i will enter the epi layer 124. Light propagating through the grid of openings 130-i creates an image of the grid of openings 130-i at a distance D due to the "Talbot" effect. Accordingly, the photosensitive layer is exposed to the image of the lattice of the openings 130-i. The unexposed areas of the photosensitive layer 149 are removed at a later stage to create an aligned mask layer 148-i. The “Talbot” effect can be achieved in this embodiment, for example, by using a near collimated light source.
[0093]
Next, a second electrode layer 120 is formed so as to overlap the p-type doped layer 116 and the photosensitive layer.
[0094]
FIG. 11D illustrates forming the aligned openings 150-i by a lift-off technique. The aligned mask layer 148-i is removed along with a corresponding portion of the second electrode layer 120 to expose the p-type doped layer 116 in the defect-rich region 134-i. Due to the "Talbot" effect, the aligned mask layer 148-i is aligned with the defect-rich region 134-i. Thus, the aligned openings 150-i will be aligned with the defect-rich regions 134-i.
[0095]
FIG. 11E illustrates a next step in which the second electrode layer 120 is left intact to remove at least partially the defect-rich region 134-i. The defect-rich region 134-i is removed deep enough to reach the n-type doped layer 108. At this stage, a hole 122-i is formed. Finally, the first electrode layer 104 is formed on the region of the n-type doped layer 108 that has been replaced with the photonic crystal structure, to facilitate its manufacture.
[0096]
In this manner, the defect-rich region 134-i is substantially removed, so that the remaining epi layer 124 includes a substantially defect-free region 138-i. Therefore, PXLEDs made by this method have a low defect density and reduce the aforementioned harmful effects including poor reliability, reduced efficiency, and reduced brightness.
[0097]
In a substrate-emitting PXLED, the host substrate 102 is formed from a substantially transparent material, for example, sapphire, silicon carbide, or glass, and the second electrode layer 120 is formed from a substantially reflective or opaque material; For example, it is formed from Ag, Al, or Au. In a top emitting PXLED, the host substrate 102 is substantially reflective or opaque, for example, metallized sapphire. In some embodiments, the second electrode layer 120 is formed from a substantially transparent material, for example, ITO or a thin metal layer.
[0098]
12A to 12E illustrate a method related to FIGS. 11A to 11E. The steps in FIGS. 12A and 12B are the same as the steps in FIGS. 11A and 11B.
[0099]
FIG. 12C shows an alternative use of the “Talbot” effect. In this method, a photoresist is deposited as a photosensitive layer on the p-type doped layer 116. The photoresist is exposed using the "Talbot" effect. In a subsequent stage, the exposed portions of the photosensitive layer are removed from the defect-rich regions 134-i to create a photosensitive layer 149 having aligned openings 150-i.
[0100]
FIG. 12D shows the next stage in which the defective areas 134-i are at least partially removed to form holes 122-i, and then the photosensitive layer 149 is removed. Again, the defect-rich region 134-i is removed deep enough to reach the n-type doped layer 108.
[0101]
FIG. 12E shows the next stage in which holes 122-i are filled with a non-conductive material 143 to substantially planarize the top surface of the device. The non-conductive material can be, for example, spin-on-glass (SOG). Next, a second electrode layer 120 is deposited on the substantially planarized upper surface formed by the p-type doped layer 116 and the non-conductive material 143. With this architecture, the second electrode layer 120 is electrically coupled to only the p-type doped layer 116. Next, the first electrode layer 104 is formed on the region of the n-type doped layer 108 that has been replaced with the photonic crystal structure to facilitate its manufacture. Similar to the embodiment of FIGS. 11A-11E, PXLEDs made by the methods of FIGS. 12A-12E can be substrate emitting or top emitting devices.
[0102]
In the above embodiment, the first electrode layer 104 and the second electrode layer 120 are formed in a horizontally removed area, so that the current flow includes a substantially horizontal path.
[0103]
In some embodiments, the host substrate 102 is a good conductor, and thus the first electrode layer 104 can be deposited on the host substrate 102 prior to forming the epi layer 124. In these embodiments, the path of the current is substantially vertical across the epi layer 124.
[0104]
FIG. 13 shows an embodiment of the PXLED 100 in a high power package. For example, area 1mm ² Or more PXLEDs can be packaged in a high power package. The high power package includes a heat sink 204 formed from a low heat resistant material. Heat sink 204 also serves as a reflective cup, reflecting light emitted from LED 200 toward the base of the package. A further function of the heat sink 204 is to adaptively compensate for the effects of thermal expansion of the components of the packaged LED. LED 200 is attached to heat sink 204 with solder or die attach epoxy. LED 200 is electrically coupled to inner lead 208 by wire bond 212. In some embodiments, LEDs having an inverted or flip-chip design are electrically coupled to inner leads 208 by solder balls and solder bars. Inner lead 208 is electrically coupled to outer lead 216. Inner lead 208, outer lead 216, and wire bonds are formed from a suitably selected metal. The LED 200 is housed in a transparent housing containing an epoxy dome lens 220 for improved light extraction. A soft gel 224 having a high refractive index is deposited between the LED 200 and the epoxy dome lens 220 to improve light extraction. The packaged LED is structurally supported by a support frame 228. In embodiments where the extraction efficiency of the LED is between about 50% and 100% in air, lens 220 and soft gel 224 are not required.
[0105]
There are many different packages that can house PXLEDs. The choice of the most appropriate package depends, inter alia, on the particular application.
[0106]
The above-described embodiments are merely illustrative and are not intended to be limiting. Those skilled in the art will recognize variations from the embodiments described above, which are within the scope of the disclosure of this patent. Accordingly, the invention is limited only by the claims.
[Brief description of the drawings]
FIG. 1 is a side view of an embodiment of a photonic crystal light emitting diode.
FIG. 2 is a side view of another embodiment of a photonic crystal light emitting diode.
FIG. 3 is a top view of an embodiment of a photonic crystal light emitting diode.
FIG. 4 shows relative luminescence (solid line) and extraction efficiency (dashed line) for the embodiment of FIG. 1 as a function of normalized frequency.
FIG. 5A shows relative luminescence (solid line) and extraction efficiency (dashed line) for the embodiment of FIG. 2 as a function of normalized frequency.
FIG. 5B shows the product of relative emission and extraction efficiency as a function of normalized frequency.
FIG. 6A illustrates a step in the method of making a photonic crystal light emitting diode.
FIG. 6B illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 6C illustrates one step of the method for making a photonic crystal light emitting diode.
FIG. 6D illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 6E illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 7A illustrates a step in another method of making a photonic crystal light emitting diode.
FIG. 7B shows a step in the method for making a photonic crystal light emitting diode.
FIG. 7C illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 7D illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 7E illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 7F illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 8A illustrates a step in yet another method of making a photonic crystal light emitting diode.
FIG. 8B shows a step in the method for making a photonic crystal light emitting diode.
FIG. 8C illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 8D illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 8E illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 8F illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 8G illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 9A illustrates a stage in yet another method of making a photonic crystal light emitting diode.
FIG. 9B is a diagram showing a step in the method for manufacturing a photonic crystal light-emitting diode.
FIG. 9C illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 9D illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 9E illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 9F illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 10A illustrates a step in yet another method of making a photonic crystal light emitting diode.
FIG. 10B illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 10C illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 10D illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 10E illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 11A illustrates a stage in yet another method of making a photonic crystal light emitting diode.
FIG. 11B illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 11C illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 11D illustrates one step of the same method for making a photonic crystal light emitting diode.
FIG. 11E illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 12A illustrates a step in yet another method of making a photonic crystal light emitting diode.
FIG. 12B shows a step in the method for making a photonic crystal light emitting diode.
FIG. 12C illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 12D illustrates one step of the same method for making a photonic crystal light emitting diode.
FIG. 12E illustrates a step in the method for making a photonic crystal light emitting diode.
FIG. 13 shows a packaged LED.
[Explanation of symbols]
100 Photonic crystal LED (PXLED)
104 first electrode layer
108 n-type doped layer
112 Active layer
116 p-type doped layer
122-i hole
124 Epi layer

Claims (92)

A first semiconductor layer doped with a first dopant, coupled to the first electrode layer;
An active layer capable of emitting light, overlying the first semiconductor layer;
A second semiconductor layer overlying the active layer, doped with a second dopant of the opposite type to the first dopant;
A second electrode layer overlying the second semiconductor layer;
Including
At least one of the active layer and the second semiconductor layer has a periodically fluctuating thickness having alternating maximum and minimum values, the period of the periodic fluctuation and the air of the emitted light. The ratio to the medium wavelength is greater than about 0.1 and less than about 5; and the thickness of the second semiconductor layer at the minimum is about the thickness of the emitted light in the second semiconductor layer. Less than one wavelength,
A light-emitting diode, characterized in that: The light emitting diode according to claim 1, wherein the first dopant is n-type, and the second dopant is p-type. The light emitting diode according to claim 1, wherein the first semiconductor layer overlaps the first electrode layer. The first electrode layer partially overlies the first semiconductor layer;
Said first semiconductor layer overlies a substrate having a substantially reflective surface;
The light emitting diode according to claim 1, wherein: The first electrode layer partially overlies the first semiconductor layer;
The second electrode layer is substantially reflective;
Said first semiconductor layer overlies a substantially transparent substrate;
The light emitting diode according to claim 1, wherein: Said first semiconductor layer, the active layer, and said second semiconductor layer, the light emitting diode of claim 1, characterized in that it has a small surface recombination velocity than 10 5 ^cm / sec. The light emitting diode according to claim 1, wherein the first semiconductor layer, the active layer, and the second semiconductor layer include a group III element and a group V element. The light emitting diode according to claim 1, wherein the first semiconductor layer, the active layer, and the second semiconductor layer include GaN. The periodically varying thickness is periodic in at least one direction parallel to a plane of the second semiconductor layer with a plane having one or more directions;
The light emitting diode according to claim 1, wherein: The light emitting diode of claim 1, wherein the second semiconductor layer has a planar lattice of through holes aligned to the minimum. The light emitting diode according to claim 10, wherein the active layer has a planar lattice of holes aligned with the planar lattice of through holes in the second semiconductor layer. The active layer has a planar lattice of through holes aligned with the planar lattice of through holes of the second semiconductor layer,
The first semiconductor layer has a plane lattice of holes aligned with the plane lattice of through holes between the second semiconductor layer and the active layer;
The light emitting diode according to claim 11, wherein: The light emitting diode according to claim 10, wherein the planar grating is a triangular grating, a square grating, or a hexagonal grating. The light emitting diode according to claim 10, wherein the planar grating is a honeycomb-shaped grating. 15. The light-emitting diode according to claim 14, wherein the intensity of the emitted light having intensity and polarization is substantially independent of polarization. The light emitting diode of claim 10, wherein the hole is filled with a dielectric. The light emitting diode according to claim 16, wherein the dielectric is silicon oxide. At least one of the active layer and the second semiconductor layer has a photonic band structure including one or more bands having an edge;
The energy of the emitted light is near an edge of a band of the at least one photonic band structure having a periodically varying thickness of the active layer and the second semiconductor layer;
The light emitting diode according to claim 1, wherein: The light emitting diode has a spontaneous emission ratio and light extraction efficiency, and the product of the spontaneous emission ratio and light extraction efficiency is greater than the band edge than at a plurality of energies away from the band edge. The light emitting diode of claim 18, wherein the light emitting diode is greater at nearby energy. The dielectric, the active layer, and the second semiconductor layer have a dielectric constant of about 1 to about 16;
The hole occupies about 10% to about 50% of the area of the second semiconductor layer;
The light emitting diode according to claim 16, wherein: The second semiconductor layer has a plane and a normal, and the intensity of light emitted in a direction substantially perpendicular to the plane of the second semiconductor layer depends on the normal of the plane of the second semiconductor layer. The light emitting diode according to claim 1, wherein the intensity of the light emitted in a direction substantially different from the line is higher. The first semiconductor layer and the second semiconductor layer include AlInGaN,
The active layer includes InGaN,
The first and second electrode layers include at least one of Ag, Al, and Au,
The periodic variation in thickness is a triangular lattice of holes, the diameter of the holes having a diameter being between about 0.3a and about 0.72a, where a is the period of the periodically varying thickness. The depth of the hole having a depth is between about 0.375a and about 2a;
The first and second semiconductor layers together form an epilayer having a thickness between about 0.375a and about 2a;
The light emitted by the active layer has a frequency between about 0.66 (c / a) and about 0.75 (c / a), where c is the speed of light in air.
The light emitting diode according to claim 1, wherein: The first semiconductor layer and the second semiconductor layer include AlInGaN,
The active layer includes InGaN,
The first and second electrode layers include at least one of Ag, Al, and Au,
The periodic variation in thickness is a triangular lattice of holes, wherein the diameter of the holes having a diameter is between about 0.3a and about 0.72a, where a is the period of the periodically varying thickness. The depth of the hole having a depth is greater than about 2a;
The first and second semiconductor layers together have a thickness greater than about 4a;
The light emitted by the active layer is about 0.275 (c / a) to about 0.375 (c / a), where c is the speed of light in air, and about 0.58 (c / A) to about 0.68 (c / a).
The light emitting diode according to claim 1, wherein: The light emitting diode,
Support frame,
A heat sink for extracting heat from the light emitting diodes, wherein the heat sink is disposed in the support frame and the light emitting diodes are disposed over the light emitting diodes;
A plurality of leads electrically coupled to the light emitting diode;
A transparent housing,
Placed in a package containing
The light emitting diode according to claim 1, wherein: A first semiconductor layer doped with a first dopant;
An active layer capable of emitting light, overlying the first semiconductor layer;
A second semiconductor layer overlying the active layer, doped with a second dopant of the opposite type to the first dopant;
Including
At least one of the active layer and the second semiconductor layer has a periodically fluctuating thickness having alternating maximum and minimum values, the period of the periodic fluctuation and the air of the emitted light. The ratio to the medium wavelength is greater than about 0.1 and less than about 5, and the thickness of the second semiconductor layer at the minimum value is less than the thickness of the emitted light in the second semiconductor layer. Less than one wavelength,
At least one of the first semiconductor layer, the active layer, and the second semiconductor layer includes a group III element and a group V element.
A light-emitting diode, characterized in that: The light emitting diode according to claim 25, wherein the group III element is gallium and the group V element is nitrogen. It said first semiconductor layer and the second semiconductor layer, the light emitting diode of claim 25, characterized in that it comprises a small surface recombination velocity than 10 5 ^cm / sec. The light emitting diode according to claim 25, wherein the first dopant is n-type and the second dopant is p-type. The light emitting diode according to claim 25, wherein the first semiconductor layer overlaps the first electrode layer. The first electrode layer partially overlies the first semiconductor layer;
Said first semiconductor layer overlies a substrate having a substantially reflective surface;
The light emitting diode according to claim 25, wherein: The first electrode layer partially overlies the first semiconductor layer;
The second electrode layer is substantially reflective;
Said first semiconductor layer overlies a substantially transparent substrate;
The light emitting diode according to claim 25, wherein: The periodically varying thickness is periodic in at least one direction parallel to a plane of the second semiconductor layer with a plane having one or more directions;
The light emitting diode according to claim 25, wherein: The light emitting diode of claim 25, wherein the second semiconductor layer has a planar grid of through holes aligned to the minimum. The light emitting diode of claim 33, wherein the active layer has a planar lattice of holes aligned with the planar lattice of through holes in the second semiconductor layer. The active layer has a planar lattice of through holes aligned with the planar lattice of through holes of the second semiconductor layer,
The first semiconductor layer has a plane lattice of holes aligned with the plane lattice of through holes between the second semiconductor layer and the active layer;
The light emitting diode according to claim 34, wherein: The light emitting diode according to claim 33, wherein the plane lattice is a triangular lattice, a square lattice, or a hexagonal lattice. The light emitting diode according to claim 33, wherein the planar lattice is a honeycomb lattice. The light emitting diode of claim 37, wherein the intensity of the emitted light having intensity and polarization is substantially independent of polarization. The light emitting diode of claim 33, wherein the hole is filled with a dielectric. The light emitting diode according to claim 39, wherein the dielectric is silicon oxide. At least one of the active layer and the second semiconductor layer having a periodically varying thickness has a photonic band structure including one or more bands having an edge,
The energy of the emitted light is near an edge of a band of the at least one photonic band structure having a periodically varying thickness of the active layer and the second semiconductor layer;
The light emitting diode according to claim 25, wherein: The light emitting diode has a spontaneous emission ratio and light extraction efficiency, and the product of the spontaneous emission ratio and light extraction efficiency is greater than the band edge than at a plurality of energies away from the band edge. 42. The light emitting diode of claim 41, wherein the light emitting diode is greater at near energy. The dielectric constant of the dielectric, the first semiconductor layer, and the second semiconductor layer has a value of about 1 to about 16,
The hole occupies about 10% to about 50% of the area of the second semiconductor layer;
40. The light emitting diode according to claim 39. The second semiconductor layer has a plane and a normal, and the intensity of light emitted in a direction substantially perpendicular to the plane of the second semiconductor layer depends on the normal of the plane of the second semiconductor layer. 26. The light emitting diode of claim 25, wherein the intensity of the light emitted in a direction substantially different from the line is greater. The first semiconductor layer and the second semiconductor layer include AlInGaN,
The active layer includes InGaN,
The periodically varying thickness is a triangular lattice of holes, wherein the diameter of the hole having a diameter is between about 0.3a and about 0.72a, where a is the period of the periodically varying thickness. The depth of the hole having a depth is between about 0.375a and about 2a;
The first and second semiconductor layers together form an epilayer having a thickness between about 0.375a and about 2a;
The light emitted by the active layer has a frequency between about 0.66 (c / a) and about 0.75 (c / a), where c is the speed of light in air.
The light emitting diode according to claim 25, wherein: The first semiconductor layer and the second semiconductor layer include AlInGaN,
The active layer includes InGaN,
The periodically varying thickness is a triangular lattice of holes, wherein the diameter of the hole having a diameter is between about 0.3a and about 0.72a, where a is the period of the periodically varying thickness. The depth of said hole having a depth is greater than about 2a;
The first and second semiconductor layers together have a thickness greater than about 4a;
The light emitted by the active layer is about 0.275 (c / a) to about 0.375 (c / a), where c is the speed of light in air, and about 0.58 (c / A) to about 0.68 (c / a).
The light emitting diode according to claim 25, wherein: substrate,
Overlying the substrate, a plurality of semiconductor layers capable of emitting light,
An upper electrode layer overlying the plurality of semiconductor layers, and a planar lattice of openings having a ratio of the period of the lattice to the wavelength of the emitted light in the air greater than about 0.1 and less than about 5. Having a photosensitive layer overlying the upper electrode layer,
Preparing a semiconductor structure comprising:
Removing the upper electrode layer and at least partially removing the plurality of semiconductor layers in a region corresponding to the planar lattice of the opening, thereby forming a planar lattice of holes;
A method for manufacturing a light emitting diode, comprising: The step of preparing the semiconductor structure includes:
Forming a first semiconductor layer doped with a first dopant overlying the substrate;
Forming an active layer capable of emitting the light overlying the first semiconductor layer;
Forming a second semiconductor layer overlying the active layer and doped with a second dopant of a type opposite to the first dopant;
48. The method of claim 47, comprising: The step of forming a planar grid of holes comprises:
Forming a planar lattice of holes in at least the active layer and the second semiconductor layer;
49. The method of claim 48, comprising: The step of preparing the semiconductor structure includes:
Removing the second semiconductor layer and the active layer over regions of the first semiconductor layer replaced by the planar lattice of holes;
Forming a first electrode layer overlying a portion of the replaced region of the first semiconductor layer;
49. The method of claim 48, comprising: The step of preparing the semiconductor structure includes:
Forming the substrate using a substantially reflective surface;
48. The method of claim 47, comprising: The step of preparing the semiconductor structure includes:
Forming the substrate from a substantially transparent material;
Forming the upper electrode layer from a substantially reflective material;
48. The method of claim 47, comprising: The step of preparing the semiconductor structure includes:
Forming a first electrode layer on a side of the substrate opposite the plurality of semiconductor layers;
48. The method of claim 47, comprising: Providing the photosensitive layer having a planar lattice of openings,
Removing a portion of the photosensitive layer by high-resolution lithography to form a planar lattice of openings,
48. The method of claim 47, comprising: Removing the photosensitive layer by high-resolution lithography technology,
Removing said portion of said photosensitive layer using electron beam lithography, nano-imprint lithography, deep x-ray lithography, interferometric lithography, high temperature embossing, or microcontact printing.
The method of claim 54, comprising: The step of forming the hole includes:
Forming a planar grid of holes by dry processing;
48. The method of claim 47, comprising: A first substrate,
A mask layer overlying the substrate, the mask layer having a first planar lattice of openings, and a ratio of a period of the planar lattice of the openings to a wavelength of light in air of greater than about 0.1 and greater than about 5; A plurality of semiconductor layers overlying the first substrate, wherein the plurality of semiconductor layers can also emit small light;
Preparing a semiconductor structure comprising:
Forming a planar lattice of holes in the plurality of semiconductor layers by at least partially removing the plurality of semiconductor layers in a region corresponding to the first planar lattice in the opening of the mask layer;
A method for manufacturing a light emitting diode, comprising: The step of preparing the semiconductor structure includes:
Forming a first semiconductor layer doped with a first dopant overlying the mask layer and the first substrate;
Forming an active layer capable of emitting the light overlying the first semiconductor layer;
Forming a second semiconductor layer overlying the active layer and doped with a second dopant of a type opposite to the first dopant;
58. The method of claim 57, comprising: Forming the first semiconductor layer, the active layer, and the second semiconductor layer;
Forming the first semiconductor layer, the active layer, and the second semiconductor layer using an epitaxial lateral overgrowth technique;
The method of claim 58, comprising: Forming a tie layer overlying the second semiconductor layer;
Forming a second substrate overlying the tie layer;
Removing the first substrate;
The method of claim 59, further comprising: Removing the mask layer;
By depositing the first electrode layer obliquely so that there is no substantial electrical contact between the first electrode layer and the second semiconductor layer, Forming an overlapping first electrode layer;
Forming a second electrode layer overlying the region of the second semiconductor layer replaced by the planar lattice of holes;
61. The method of claim 60, further comprising: The step of forming a planar grid of holes comprises:
Forming a photosensitive layer overlying the mask layer;
Irradiating light from the direction of the second substrate to expose the photosensitive layer in a region corresponding to the first lattice in an opening of the mask layer;
61. The method of claim 60, comprising: The step of forming a planar grid of holes comprises:
By removing a portion of the photosensitive layer overlying the first mask layer, leaving the exposed region of the photosensitive layer, and removing the first mask layer from the first semiconductor layer ,
Forming an aligned mask layer grid corresponding to the first planar grid of openings in the first mask layer;
63. The method of claim 62, wherein: Forming a first electrode layer overlying the first semiconductor layer and the aligned mask layer;
The method of claim 63, further comprising: The lift-off technique is used to remove the second grid of openings from the first grid of the first electrode layer by removing the grid of the aligned mask layer and the portion of the first electrode layer overlying the aligned mask layer. Forming on the electrode layer,
The method of claim 64, further comprising: Forming a plane grid of holes by at least partially removing the plurality of semiconductor layers in a region corresponding to the second plane grid in the opening of the first electrode layer;
The method of claim 65, further comprising: Forming a second electrode layer overlying the region of the second semiconductor layer replaced by the lattice of holes;
67. The method of claim 66, further comprising: The step of forming the first electrode layer and the second electrode layer includes forming at least one of the first electrode layer and the second electrode layer from a substantially reflective material. Including
Forming the second substrate includes forming the second substrate from a substantially transparent material.
The method of claim 67, wherein: The method of claim 67, wherein forming the second substrate comprises forming the second substrate using a substantially reflective surface. The method of claim 57, further comprising removing the first mask layer to expose a surface of the first semiconductor layer. Filling the grid of holes with a dielectric to form a substantially planar surface having the exposed surface of the first semiconductor layer;
Forming a first electrode layer overlying the substantially planar surface;
71. The method of claim 70, further comprising: Forming a second electrode layer overlying the region of the second semiconductor layer replaced by the lattice of holes;
72. The method of claim 71, further comprising: The step of forming the first electrode layer and the second electrode layer includes forming at least one of the first electrode layer and the second electrode layer from a substantially reflective material. Including
Forming the second substrate includes forming the second substrate from a substantially transparent material.
73. The method of claim 72, wherein: The method of claim 72, wherein forming the second substrate comprises forming the second substrate using a substantially reflective surface. substrate,
A mask layer having a first planar grid of openings overlying the substrate;
A plurality of semiconductor layers overlying the mask layer, and a photosensitive layer overlying the plurality of semiconductor layers,
Preparing a semiconductor structure comprising:
Irradiating the first planar grating of the opening with light from the direction of the substrate;
Creating an image of the aperture of the first planar grating of the aperture on the photosensitive layer by causing diffraction of the illuminated light;
A method for manufacturing a light emitting diode, comprising: The step of preparing the semiconductor structure includes:
Forming the substrate;
Forming the mask layer on the substrate with a first planar lattice of openings,
Forming a first semiconductor layer doped with a first dopant overlying the mask layer;
Forming an active layer capable of emitting light overlying the first semiconductor layer;
Forming a second semiconductor layer overlying the active layer and doped with a second dopant of a type opposite to the first dopant;
Including
The ratio of the period of the plane grating of the opening to the wavelength of the emitted light in air is greater than about 0.1 and less than about 5;
78. The method of claim 75, wherein: Forming the first semiconductor layer, the active layer, and the second semiconductor layer;
Forming the first semiconductor layer, the active layer, and the second semiconductor layer using an epitaxial lateral overgrowth technique;
77. The method of claim 76, comprising: The step of preparing the plurality of semiconductor layers includes:
A total of which is proportional to the square of the lattice spacing of the first plane lattice of the opening having a lattice spacing, and proportional to the reciprocal of the wavelength of the emitted light having a wavelength in the plurality of semiconductor layers in the plurality of semiconductor layers; Forming the plurality of semiconductor layers using a thickness;
77. The method of claim 76, comprising: The step of creating the image comprises:
Irradiating the light from a near collimating light source to create an image of the opening of a first planar grating of the opening;
78. The method of claim 75, comprising: Forming a second planar grid of openings in the photosensitive layer by removing the photosensitive layer in areas of the first planar grid of the openings corresponding to the image of the openings;
77. The method of claim 76, further comprising: Forming a planar lattice of holes in the plurality of semiconductor layers by at least partially removing the plurality of semiconductor layers in a region corresponding to a second planar lattice of the opening;
Removing the photosensitive layer to expose the surface of the second semiconductor layer;
81. The method of claim 80, further comprising: Forming a first electrode layer overlying the region of the first semiconductor layer replaced by the planar lattice of holes;
By depositing the second electrode layer obliquely so that there is no substantial electrical contact between the second electrode layer and the first semiconductor layer, Forming an overlapping second electrode layer;
The method of claim 81, further comprising: Filling a planar grid of holes with a dielectric to form a substantially planar surface having the exposed surface of the second semiconductor layer;
Forming a second electrode layer overlying the substantially planar surface;
The method of claim 81, further comprising: Forming a first electrode layer overlying a region of the first semiconductor layer replaced by the planar lattice of holes;
84. The method of claim 83, further comprising: The step of forming the first electrode layer and the second electrode layer includes the step of forming at least one of the first electrode layer and the second electrode layer from a substantially reflective material. Including
Forming the substrate includes forming the substrate from a substantially transparent material.
85. The method according to claim 84, wherein: 85. The method of claim 84, wherein forming the substrate comprises forming the substrate using a substantially reflective surface. Forming a grid of aligned mask layers from the photosensitive layer by removing the photosensitive layer except in regions of the first planar grating of the opening corresponding to the image of the opening;
77. The method of claim 75, further comprising: Forming a second electrode layer overlying the plurality of semiconductor layers and the grid of aligned mask layers;
Forming a second planar grid of openings in said second electrode layer by removing said aligned mask layer grid and corresponding overlying portions of said second electrode layer;
The method of claim 87, further comprising: Forming a planar lattice of holes in the plurality of semiconductor layers by at least partially removing the plurality of semiconductor layers in a region corresponding to a second planar lattice of the opening;
89. The method of claim 88, further comprising: Forming a first electrode layer overlying a region of the first semiconductor layer replaced by the planar lattice of holes;
90. The method of claim 89, further comprising: The step of forming the first electrode layer and the second electrode layer includes forming at least one of the first electrode layer and the second electrode layer from a substantially reflective material. Including
Forming the substrate includes forming the substrate from a substantially transparent material.
90. The method of claim 90, wherein: The method of claim 90, wherein forming the substrate comprises forming the substrate using a substantially reflective surface.

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