JP2004286862A - Light beam scanning circuit, light beam scanner, and image forming device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a light beam scanning circuit that can control light emitting timing of a plurality of light sources by using the plurality of light sources and a composite clock generator, and also to provide a light beam scanner and an image forming device. <P>SOLUTION: A delay synchronizing signal forming part 81 forms a delay synchronizing signal from a reference synchronizing signal formed by a synchronizing detection signal sensor 25 and outputs to respective pixel clock generating parts 74a-74d. In addition, the pixel clock generating parts 74a-74d generate pixel clocks (CH1-CH4) using each delay synchronizing signal as a trigger. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a light beam scanning circuit, a light beam scanning device, and an image forming apparatus, and more particularly, to a light beam scanning device that forms an optical writing latent image on a photoreceptor using a plurality of laser beams and adjusts the writing magnification. The present invention relates to a circuit, a light beam scanning device, and an image forming device.
[0002]
[Prior art]
2. Description of the Related Art In an image forming apparatus such as a printer or a copying machine using an electrophotographic method, a charging device uniformly charges the surface of a photoreceptor, and a light beam corresponding to external recording data is applied to the surface of the photoreceptor by an optical writing unit. Irradiation forms an electrostatic latent image. In the optical writing means, the light beam irradiating the surface of the photoconductor converges parallel light beams emitted by a laser diode or the like, and scans the surface of the photoconductor by a rotary deflection unit. Further, the optical writing unit of the laser scanning optical system needs a synchronization signal that defines the writing start timing, and this signal is generated by a synchronization detection unit provided at an arbitrary position of the optical writing unit.
[0003]
As a method of forming an electrostatic latent image, an image forming apparatus of a so-called binary recording system in which a light beam is turned ON / OFF on a photoreceptor surface is increasing. In the binary recording method, a recording signal is subjected to image processing such as a dither method or an error diffusion method to realize halftone reproduction. A developing means attaches an image visualizing agent to the electrostatic latent image formed on the photoreceptor surface as described above to obtain an image visualized image visualized on the photoreceptor surface, and transfers the image visualized image to a transfer unit. The image transferred to the recording medium and transferred to the transfer material is heated and pressed by a fixing unit, and is fixed on the recording medium. In recent years, demands for higher pixel density and higher speed have been increasing in the image forming apparatus.
[0004]
As a method of increasing the speed of the image forming apparatus, a plurality of light beams are simultaneously irradiated on the photoreceptor surface using a multi-beam laser capable of simultaneously emitting a plurality of light beams or a laser diode array element including a plurality of laser diodes. A method of forming an electrostatic latent image has been used. Some laser diode array elements are configured on a single chip, and a plurality of lines can be optically written using a multi-beam for simultaneously operating a plurality of light beams.
[0005]
When performing image formation using a laser diode array element light source in which a plurality of such light sources are arranged, a part of the light beam is detected by a synchronization detection unit outside an image recording range, and a synchronization signal in the main scanning direction is used. By controlling the timing of image formation in the main scanning on the basis of this signal, it is general to prevent image shift in the sub-scanning direction orthogonal to the main scanning direction.
[0006]
As a timing control method of image recording in the main scanning direction, a phase synchronization method is used in which a phase between a synchronization detection signal and a pixel clock for image formation is always constant. As shown in FIG. 13, when the light emitting sources of the laser diode array element are arranged so that a straight line connecting the center points of the light sources is orthogonal to the main scanning direction, the beam scanning timing of each light emitting source is all the same. Therefore, the beam scanning timing only needs to consider the phase synchronization between the synchronization detection signal and the pixel clock for any of the plurality of light emitting sources.
[0007]
However, the pitch in the sub-scanning direction corresponding to the desired recording density is determined by the layout conditions of the optical system in which a lens or the like that directs the irradiated beam from the light source interval of the laser diode array element and the fixed interval to the photosensitive member surface is arranged. As shown in FIG. 4, it is necessary to arrange the center lines connecting the center points of the light emitting sources at an arbitrary angle with respect to the main scanning direction.
In such a case, the scanning timing of each light source in the main scanning direction is not the same, and the light emission timing of each light emitting source is formed in order to form an image on the photosensitive member surface in the sub scanning direction at right angles to the main scanning direction. Need to be controlled.
As a conventional technique for controlling the light emission timing of each light source of such a plurality of beams, there is a multi-beam image forming apparatus disclosed in Japanese Patent Application Laid-Open No. H11-163,837. In Patent Document 1, (N-1) remaining pixel clock signals for the remaining light beam are generated based on the reference clock generating means and the reference clock signal, and the light emission timing is controlled using the remaining pixel clock. .
[0008]
Further, in the image forming apparatus disclosed in Patent Document 2, as a method of synchronizing a plurality of beams, a plurality of clocks of the same frequency having different phases are generated, and selected from the plurality of clocks and used for pixel recording. Was.
[0009]
In the above-described writing apparatus, a desired recording density can be obtained from the layout conditions of an optical system having a lens and the like for guiding a beam emitted from the light source spacing of the laser diode array element and the fixed spacing on the photosensitive member surface. In order to obtain the pitch in the sub-scanning direction, it is necessary to arrange the center lines connecting the center points of the light emitting sources at an arbitrary angle with respect to the main scanning direction as shown in FIG.
In this case, the scanning timing of each light source in the main scanning direction is not the same, and it is necessary to control the emission timing of each light emitting source in order to form an image on the photosensitive member surface in the sub scanning direction at right angles to the main scanning direction. Yes.
[0010]
As a method of controlling the light emission timing of each light source of a plurality of beams as described above, based on a reference clock signal, a pixel clock signal in which a delay time is added to the remaining plurality of light beams is generated, and the pixel clock is used. There is a method of controlling the light emission timing.
[0011]
FIG. 8 is a diagram showing a light beam scanning circuit for controlling the light emission timing in such a conventional technique. In the circuit shown in FIG. 8, one pixel clock generator is configured.
As shown in FIG. 8, the light beam scanning circuit includes a laser diode array 10, LD driving units 73a to 73d, PWM control units 74a to 74d, a clock delay unit 75, and an image data I / F ( Interface) 76, a pixel clock generator 77, and a synchronization detection signal generator 79.
The laser diode array (LD array) 10 includes a plurality (four in this prior art) of laser diodes (LD) 71 a to 71 d and a photodiode (PD) 72.
[0012]
The gradation data of each pixel is input from the image processing unit (not shown) to the PWM control unit 74 via the image data I / F 76. The PWM control unit 74 outputs a signal for controlling the light emission time of the light emission source to the LD drive unit 73 (light emission time LD drive circuit 73) according to the input grayscale data. The LD driving unit 73 causes each of the laser diodes 71a to 71d of the LD array 10 to emit light according to the input signal.
[0013]
At this time, the light emission timing controlled by the PWM control unit 74 is controlled by clocks delayed by clock delay means provided to the PWM control unit 74, respectively.
[0014]
The timing at which the laser diode 71 is driven to emit light for each pixel is determined by a pixel clock.
[0015]
The pixel clock generated by the pixel clock generator 77 is supplied to clock delay means 75 corresponding to each light source (laser diodes 71a to 71d).
The clock delay means 75 generally uses an inductive element, but has disadvantages such as low resolution, large shape, and poor temperature characteristics. There is a digital method using a shift register. In this case, the resolution depends on the frequency of the shift clock of the shift register. That is, in the case of the shift register system based on the pixel clock, the minimum delay amount is the delay amount corresponding to the pixel clock, and in image formation using this system, the vertical line resist fluctuates in units of one pixel.
[0016]
FIG. 5 is a diagram showing a timing chart in the conventional technique shown in FIG. As shown in FIG. 5, each pixel clock is delayed by a predetermined delay amount from the reference pixel clock. The delay amount is defined by the delay amount specification of the delay element used in the clock delay unit 75, and the operating frequency is also limited.
[0017]
[Patent Document 1]
JP 2000-121971 A
[Patent Document 2]
JP-A-2002-244057
[0018]
[Problems to be solved by the invention]
However, in the clock generation circuit having the above configuration in the related art, the image clock is independently generated, and it is difficult to manage the phase between the pixel clocks.
[0019]
Further, the light beam scanning device has a plurality of composite clock generators each having a pixel clock generation unit and a PWM control unit, and it is necessary to control the light emission timing of each light emitting source using the plurality of composite clock generators. If there is, there is a problem that the conventional technology cannot cope.
[0020]
The present invention has been made in view of the above problems, and uses a plurality of light sources, a composite clock generator, and a light beam scanning circuit, a light beam scanning device, and an image control method that can control light emission timing of the plurality of light sources. It is an object to provide a forming device.
[0021]
[Means for Solving the Problems]
In order to achieve the object, according to the present invention, there are provided a plurality of light sources arranged at predetermined intervals, a scanning unit for emitting a light beam from each of the plurality of light sources and scanning the image bearing member, Synchronous detection generating means for detecting a synchronous detection signal for alignment in the main scanning direction, and a delay synchronous signal for generating a delayed synchronous signal delayed by a predetermined time from the reference synchronous signal using the synchronous detection signal as a reference synchronous signal It is characterized by having a signal generating means and a pixel clock generating means for generating and outputting a pixel clock for forming an image by using a delay synchronization signal as a trigger.
[0022]
Further, according to the present invention, the delay synchronization signal generating means multiplies the delay amount of the integral multiple of the pixel clock by the period time of the pixel clock by (n / m) (0 ≦ n ≦ 16, 1). ≦ m ≦ 16, n <m) and the delay synchronization signal is generated with the delay amount as the sum.
[0023]
Further, according to the present invention, there is provided a delay amount setting means for setting at least one of a delay amount setting of an integral multiple of the number of clocks and a value (n / m) multiplied by a cycle time of the pixel clock. And
[0024]
Further, according to the present invention, the delay amount setting means independently generates a plurality of delay synchronization signals respectively corresponding to the plurality of light sources.
[0025]
The present invention is also a light beam scanning device that emits a plurality of light beams, deflects the emitted plurality of light beams, and scans the image carrier, and includes a plurality of light sources arranged at predetermined intervals. Scanning means for emitting a light beam from each of the plurality of light sources to scan the image carrier, and a synchronization detection generating means for detecting the light beam and generating a synchronization detection signal for alignment in the main scanning direction. A delay synchronization signal generating means for generating a delay synchronization signal delayed by a predetermined time from the reference synchronization signal using the synchronization detection signal as a reference synchronization signal; and generating a pixel clock for forming an image by using the delay synchronization signal as a trigger. And a pixel clock generating means for outputting the pixel clock.
[0026]
Further, according to the present invention, the delay synchronization signal generating means multiplies the delay amount of the integral multiple of the pixel clock by the period time of the pixel clock by (n / m) (0 ≦ n ≦ 16, 1). ≦ m ≦ 16, n <m) and the delay synchronization signal is generated with the delay amount as the sum.
[0027]
Further, according to the present invention, there is provided a delay amount setting means for setting at least one of a delay amount setting of an integral multiple of the number of clocks and a value (n / m) multiplied by a cycle time of the pixel clock. And
[0028]
Further, according to the present invention, the delay amount setting means independently generates a plurality of delay synchronization signals respectively corresponding to the plurality of light sources.
[0029]
Further, the present invention is an image forming apparatus that emits a plurality of light beams, deflects the emitted plurality of light beams, and scans a uniformly charged image carrier to form an image. A plurality of light sources arranged at predetermined intervals, a scanning unit for emitting a light beam from each of the plurality of light sources and scanning the image bearing member, and a light source for detecting the light beam and performing positioning in the main scanning direction. A synchronization detection generating means for generating a synchronization detection signal, a synchronization detection signal as a reference synchronization signal, a delay synchronization signal generating means for generating a delay synchronization signal delayed by a predetermined time from the reference synchronization signal, and a delay synchronization signal as a trigger, Pixel clock generation means for generating and outputting a pixel clock for forming an image.
[0030]
Further, according to the present invention, the delay synchronization signal generating means multiplies the delay amount of the integral multiple of the pixel clock by the period time of the pixel clock by (n / m) (0 ≦ n ≦ 16, 1). ≦ m ≦ 16, n <m) and the delay synchronization signal is generated with the delay amount as the sum.
[0031]
Further, according to the present invention, there is provided a delay amount setting means for setting at least one of a delay amount setting of an integral multiple of the number of clocks and a value (n / m) multiplied by a cycle time of the pixel clock. And
[0032]
Further, according to the present invention, the delay amount setting means independently generates a plurality of delay synchronization signals respectively corresponding to the plurality of light sources.
[0033]
According to the invention, an electrophotographic method is used.
[0034]
Further, according to the present invention, a digital electrophotographic system is used.
[0035]
Further, according to the invention, the digital writing pixel density is 1200 dpi.
[0036]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a diagram illustrating a configuration of an image forming apparatus including a writing device according to an embodiment of the present invention. Hereinafter, an example in which the plurality of light sources are laser beams will be described with reference to FIG. The image forming apparatus may be a copying machine, a facsimile, a printer, or the like.
[0037]
As shown in FIG. 1, the image forming apparatus includes a writing device 100, a photoreceptor (image bearing member) 21, a synchronization detection mirror 23, a condenser lens 24, a synchronization detection signal sensor 25, and a condenser lens (Collimating lens) 26.
The writing device 100 includes a plurality of laser light sources (denoted as a laser diode array or an LD array) 10, a condenser lens (collimating lens) 11, an aperture 12, cylinder lenses 13, 20, a rotary scanning unit 14, It has a polygon mirror 15, fθ lenses 17 and 18, and a folding mirror 19.
[0038]
The plurality of laser beams emitted from the plurality of laser light sources 10 are collimated by a condenser lens 11, only a required beam diameter is extracted by an aperture 12 having a slit portion corresponding to the size of a dot, and an appropriate The photosensitive member is scanned in the main scanning direction, which is the major axis direction of the photosensitive member, by a polygon mirror 15 serving as a rotary scanning unit.
On the optical path, fθ lenses 17 and 18 for converting equiangular scanning to constant-speed scanning, an optical path changing mirror 19, and a cylinder lens 20 for condensing light in the rotation direction of the photoconductor 21 are arranged. The imaging spot array (small laser beam spot) 22 is imaged.
Further, the beam turned back by the synchronization detection mirror 23 is irradiated to the synchronization detection signal sensor 25 to generate a synchronization signal.
[0039]
FIG. 9 is a diagram illustrating a configuration of a light beam scanning circuit according to an embodiment of the present invention. Although the light beam scanning circuit has a plurality of composite clock generators, the present embodiment uses four composite clock generators as an example.
[0040]
As shown in FIG. 9, the light beam scanning circuit includes a laser diode array 10, LD driving units 73a to 73d, an image data I / F (interface) 76, a pixel clock generation unit 77, It has a signal generation means 79, composite clock generators 80a to 80d, and a delay synchronization signal generation section 81.
The laser diode array (LD array) 10 includes a plurality (four in this embodiment) of laser diodes (LD) 71 a to 71 d and a photodiode (PD) 72.
The composite clock generators 80a to 80d include PWM control units 74a to 74d and pixel clock generation units 77a to 77d, respectively.
[0041]
The light emission timing of the plurality of light sources (LDs 71a to 71d) is controlled by the phase of the pixel clock generated by the composite clock generators 80a to 80d. The synchronization detection signal generation means 79 generates a synchronization signal serving as a trigger for defining the phase of the pixel clock. The delay synchronization signal generation unit 81 generates a plurality of delay synchronization signals from the reference synchronization signal based on the generated synchronization signal.
[0042]
FIG. 6 is a timing chart of the generation of the delay synchronization signal according to the embodiment of the present invention.
In the present embodiment, the delay synchronization signal generation unit 81 generates the delay synchronization signals 1 to 4 from the (reference) synchronization signal generated by the synchronization detection signal generation unit (synchronization detection signal sensor) 25, Output to the generating units 74a to 74d. Further, the pixel clock generators 74a to 74d generate the pixel clocks (CH1 to CH4) using the delay synchronization signals 1 to 4 as triggers, respectively.
[0043]
FIG. 7 is a timing chart of a reference pixel clock and a delay synchronization signal according to an embodiment of the present invention, and an enlarged view of a delay amount of the delay synchronization signal.
In the present embodiment, the delay synchronization signal generation unit 81 sets the delay amount of an integral multiple of the reference pixel clock and the cycle time of the pixel clock to (n / m) (0 ≦ n ≦ 16, 1 ≦ m ≦ 16). , N <m), and a value obtained by adding the time to the reference synchronization signal to generate a delay synchronization signal.
[0044]
Further, an information input device (for example, a key switch group such as a touch panel and a keyboard) (not shown) may be connected to the delay synchronization signal generation unit 81. In this case, the operator can use the information input device to arbitrarily set the values of “the delay amount of an integral multiple of the reference pixel clock” and “n / m”.
FIG. 7 shows an example in which the delay times T1 = (1 + 3/16) t, T2 = (2 + 5/16) t, and T3 = (3 + 7/16) t. As described above, in the present embodiment, the delay time can be set with a clock accuracy of 16 times the pixel clock, and the light emission timing can be controlled with an accuracy of 1/16 pixel when converted to pixel positions.
[0045]
FIG. 6 shows a timing chart for generating a pixel clock by using a delay synchronization signal as a trigger in one embodiment of the present invention.
By configuring the circuit shown in FIG. 9 and generating a pixel clock using each delay synchronization signal as a trigger as shown in FIG. 6, the light emission timing of a plurality of light sources can be accurately controlled.
[0046]
FIG. 12 is a diagram showing the configuration of the composite clock generators 80a to 80d in one embodiment of the present invention in more detail. Each of the composite clock generators 80a to 80d has a pixel clock generation unit and a PWM control unit, and has a configuration in which a conventional individual clock generation circuit function and a conventional PWM control function can be realized by one circuit.
[0047]
FIG. 11 is a block diagram of the delay synchronization signal generator 81 according to one embodiment of the present invention.
As shown in FIG. 11, the delay synchronization signal generator 81 includes a pixel clock delay amount setting circuit 84, a pixel clock multiplication clock delay amount setting circuit 85, a synchronization signal delay amount setting / delay synchronization signal number setting register 86, , A delay synchronization signal generation circuit 87, a signal input unit 88, and a signal output unit 89.
[0048]
The pixel clock delay amount setting circuit 84 sets a time that is an integral multiple of the pixel clock cycle. The setting input is given as delay amount data 1 of the signal input unit 88.
[0049]
The pixel clock multiplication clock delay setting circuit 85 sets a time for multiplying the cycle of the pixel clock by n / m. The setting input is given by the delay amount data 2 of the signal input unit 88.
[0050]
The above-mentioned delay amount data 1 and 2 are transmitted by an information input device (for example, a key switch group such as a touch panel and a keyboard) connected to the pixel clock delay amount setting circuit 84 and the pixel clock multiplication clock delay setting circuit 85. It may be input. In this case, the operator uses the information input device according to the output (print) image, and uses the information input device to set the delay amount data 1 to “the delay amount of an integer multiple of the reference pixel clock” and the delay amount data 2 to “n / m”. ”Is set as desired.
[0051]
The synchronization signal delay amount setting / delay synchronization signal number setting register 86 adds the respective delay amounts set by the pixel clock delay amount setting circuit 84 and the pixel clock multiplication clock delay amount setting circuit 85.
[0052]
The synchronization signal delay amount setting / delay synchronization signal number setting register 86 sets the number of delay synchronization signals to be generated and allocates a delay amount to any specified delay synchronization signal.
In the synchronization signal delay amount setting / delay synchronization signal number setting register 86, for example, the delay amount of the delay synchronization signal 1 is T1, the delay amount of the delay synchronization signal 2 is T2, the delay amount of the delay synchronization signal 3 is T3, and the delay synchronization signal 4 is Is set as T4, and this setting information is transmitted to the delay synchronization signal generation circuit 87.
[0053]
The delay synchronization signal generation circuit 87 uses the synchronization signal input from the signal input unit 88 as a reference synchronization signal based on the setting information obtained from the synchronization signal delay amount setting / delay synchronization signal number setting register 86, and To generate a delay synchronization signal to which a specified number of specified delays are added.
[0054]
The signal output unit 89 outputs the delay synchronization signal generated by the delay synchronization signal generation circuit 87.
[0055]
As described above, the delay synchronization signal generation unit 77 has a circuit that can arbitrarily set the delay amount setting of the integer multiple clock and the time obtained by multiplying the pixel clock cycle time by (n / m). Therefore, the delay synchronization signal generation unit 77 can freely set the number of delay signals and the delay amount of each delay signal.
[0056]
FIG. 10 is a diagram illustrating an image forming apparatus according to an embodiment of the present invention. In the present embodiment, the image forming apparatus includes a light beam scanning device 300, a photoconductor 21, a synchronization detection mirror 23, a cylinder lens 24, a condenser lens 26, a motor driver 82, and a motor control unit 83. Have.
[0057]
The light beam scanning device 300 is a combination of the light beam scanning circuit shown in FIG. 9 and the writing device shown in FIG.
As shown in FIG. 10, the light beam scanning device 300 includes an LD array (multiple laser light sources) 10, a condenser lens (collimating lens) 11, an aperture 12, cylinder lenses 13 and 20, and a rotary scan. Means 14, polygon mirror 15, fθ lenses 17, 18, folding mirror 19, synchronization detection signal sensor 25, LD driving units 73a to 73d, image data I / F 76, pixel clock generation unit 77, It has composite clock generators 80 a to 80 d and a delay synchronization signal generator 81.
The composite clock generators 80a to 80d include PWM control units 74a to 74d and pixel clock generation units 77a to 77d, respectively.
[0058]
The plurality of delay synchronization signals generated by the delay synchronization signal generator 81 are respectively applied to the plurality of composite clock generators 80a to 80d (pixel clock generators 77a to 77d).
The pixel clock generation units 77a to 77d generate a pixel clock using the delay synchronization signal as a trigger.
The grayscale data input from the image data I / F 76 by the pixel clocks generated by the pixel clock generation units 77a to 77d are converted into PWM signals by the PWM control units 74a to 74d.
The PWM signals converted by the PWM control units 74a to 74d are applied to the LD driving units 73a to 73d. The LD driving units 73a to 73d control ON / OFF of a current to a laser diode in the LD array 10 to cause each diode of the LD array 10 in which a plurality of laser diodes are arrayed to emit light. The light emission start timing of each diode is synchronized with the ON timing of each delay synchronization signal generated by the delay synchronization signal generation unit 81.
[0059]
The plurality of beams emitted from the LD array 10 are converted into parallel light by a condenser lens 11 of a writing device, and only a required beam diameter is extracted by an aperture 12 having a slit portion corresponding to the size of a dot. The photosensitive member 21 is scanned in the main scanning direction, which is the long axis direction of the photosensitive member 21, by a polygon mirror 15 formed to have an appropriate beam diameter and connected to the rotary scanning means 14 (polygon motor). The rotation scanning unit 14 is controlled by a control signal from a motor driver 82 based on control information from a motor control unit 83.
On the beam optical path, fθ lenses 17 and 18 for converting equiangular scanning into uniform scanning, an optical path changing mirror 19, and a cylinder lens 20 for condensing light in the rotation direction of the photoconductor 21 are arranged. An image of the imaging spot array 22 (micro laser beam spot) is formed. At this time, the imaging start timing of each line of the minute laser beam spot on the surface of the photoconductor 21 is synchronized with the ON timing of each delay synchronization signal generated by the delay synchronization signal generation unit 81.
[0060]
The light beam scanning device 300 sets the delay amount with respect to the reference synchronization signal to (n / m) (0 ≦ n ≦ 16, 1 ≦ m ≦ 16, n <m) are added to generate a time. Further, the light beam scanning device 300 can freely set the number of delay signals and the delay amount of each delay signal.
[0061]
FIG. 2 is a schematic diagram of an image forming apparatus using a light beam scanning device according to an embodiment of the present invention.
As shown in FIG. 2, the image forming apparatus includes a photoreceptor 21, a paper storage unit 40, a paper feeding unit 41, a developing unit 42, a charging unit 44, a cleaning unit 46, a fixing unit 47, a paper transport unit 48, a transfer unit 49, a resist transport roller 50, a resist unit 51, an image forming apparatus control unit 53, and a light beam scanning device 300.
The following description is based on the assumption that the light beam scanning device 300 shown in FIG. 10 is used for the image forming apparatus.
[0062]
As shown in FIG. 2, around the photoconductor 21, a charging unit 44, a developing unit 42, a transfer unit 49, a cleaning unit 46, and a light beam scanning device 300 are arranged.
[0063]
When the image forming apparatus control unit 53 outputs an image forming start instruction, the photoconductor 21 rotates clockwise, and the light beam scanning device 300 drives the rotary scanning unit 14 (polygon motor) to generate a synchronization signal, The charging unit 44 charges the photoconductor 21.
Further, in response to an image forming start instruction from the image forming apparatus control unit 53, the light beam scanning device 300 synchronizes a plurality of beams in synchronization with a synchronization signal in accordance with image data input from an external input device (not shown). Then, a latent image is formed on the surface of the photoconductor 21.
[0064]
The plurality of delay synchronization signals generated by the delay synchronization signal generator 81 are respectively applied to the plurality of composite clock generators 80a to 80d (pixel clock generators 77a to 77d).
The pixel clock generation units 77a to 77d generate a pixel clock using the delay synchronization signal as a trigger.
The image data I / F 76 outputs gradation data to the PWM control units 74a to 74d according to the pixel clocks generated by the pixel clock generation units 77a to 77d, respectively.
The PWM control units 74a to 74d convert the input gradation data into PWM signals.
The PWM signal is applied to the LD driving units 73a to 73d. The LD driving units 73a to 73d control ON / OFF of a current to the laser diode, and emit light of each diode of the LD array 10 in which a plurality of laser diodes are arrayed. The light emission start timing of each diode is synchronized with the ON timing of each delay synchronization signal generated by the delay synchronization signal generation unit 81.
[0065]
A plurality of beams emitted from the LD array 10 are converted into parallel light by a condensing lens 11 of a writing device, and only a required beam diameter is extracted by an aperture 12 having a slit portion corresponding to the size of a dot. The photosensitive member 21 is scanned in the main scanning direction, which is the long axis direction of the photosensitive member 21, by the polygon mirror 15 which is formed to have an appropriate beam diameter and is connected to the rotary scanning means 14. On the optical path, fθ lenses 17 and 18 for converting equiangular scanning to constant velocity scanning, an optical path changing mirror 19, and a cylinder lens 20 for condensing light in the rotation direction of the photoconductor 21 are arranged. An image of a small laser beam spot is formed. At this time, the imaging start timing of each line of the minute laser beam spot on the photoconductor surface is synchronized with the ON timing of each delay synchronization signal generated by the delay synchronization signal generation unit 81.
[0066]
The LD driving units 73a to 73d supply a current to a laser diode (LD array), which is a light emitting source, to cause the laser diode to emit light and generate a light beam for forming a latent image on the surface of the photoconductor 21. A visualized image is obtained by an image visualizing agent in the developing means 42.
The paper stored in the paper storage unit 40 is fed by the paper feeding unit 41, and the registration unit 51 matches the paper conveyance timing and the writing timing, and transfers the visible image by the image visualizing agent to a predetermined position by the transfer unit 49. Make it possible.
The visible image transferred to the sheet by the image visualizing agent is fixed by the fixing unit 47, and the input image data is visualized and fixed on the sheet.
[0067]
In addition, the light beam scanning device 300 in the image forming apparatus sets the delay amount with respect to the reference synchronization signal to (n / m) (0 ≦ n ≦ 16, 1 ≦ m ≦ 16, n <m). Further, the light beam scanning device 300 can freely set the number of delay signals and the delay amount of each delay signal.
[0068]
Note that the above image forming apparatus may use an electrophotographic process method.
In this case, the photoconductor 21 is formed by forming an OPC film on a photoconductive layer and using a toner formed of a resin as an image visualizing agent. Even in such an electrophotographic process type image forming apparatus, by using the light beam scanning device 300 of the present embodiment, it is possible to provide an image forming apparatus capable of outputting an image without vertical line fluctuation.
[0069]
Also, in a digital electrophotographic image forming apparatus using a laser beam using a laser diode as a plurality of writing lights of an optical writing unit, an image without vertical line fluctuation can be obtained by using the light beam scanning device 300 of the present embodiment. An image forming apparatus capable of outputting can be provided.
[0070]
Further, in an image forming apparatus having a high pixel density with a digital writing pixel density of 1200 dpi, by using the light beam scanning device 300 of the present embodiment, an image forming apparatus capable of outputting an image without vertical line fluctuation is provided. I can do it.
[0071]
As described above, according to the present embodiment, in the light beam scanning circuit that scans the surface of the photoreceptor 21 with a plurality of light beams emitted from the LD array 10 at a desired timing and with a predetermined pixel clock, A plurality of light emitting sources arranged at intervals of, scanning the photosensitive body 21 with a plurality of beams output from the plurality of light emitting sources, detecting light beams of the plurality of beams, and synchronizing for positioning in the main scanning direction. A detection signal is generated, a synchronization detection signal is used as a reference synchronization signal, a delay synchronization signal having a predetermined delay time is generated from the reference synchronization signal, and a predetermined pixel for forming an image is generated by using the delay synchronization signal as a trigger. Generate and output a clock.
Therefore, it is possible to control the light emission timing of the plurality of light sources when using the composite clock generator, and to adjust the writing magnification of the image formed on the photoconductor in the main scanning direction.
[0072]
Further, according to the present embodiment, the delay amount of the delay synchronization signal is expressed by (n / m) (0 ≦ n ≦ 16, 1 ≦ m ≦ 16, n <m) to generate a time.
Therefore, it becomes possible to control the light emission timing of a plurality of light sources with high accuracy when using the composite clock generator.
[0073]
Further, according to the present embodiment, a delay amount setting of an integer multiple clock number and a value for multiplying the pixel clock cycle time by (n / m) are arbitrarily set.
Therefore, it becomes possible to control the light emission timings of a plurality of light sources when using the composite clock generator with high precision and with an arbitrary delay amount.
[0074]
Further, according to the present embodiment, a delay amount setting of an integer multiple clock number and a value for multiplying the pixel clock cycle time by (n / m) are arbitrarily set.
Therefore, in a light beam scanning circuit using a plurality of composite clock generators, it becomes possible to control the light emission timing of a plurality of light sources with high precision and with an arbitrary delay amount.
[0075]
In the present embodiment, “0 ≦ n ≦ 16, 1 ≦ m ≦ 16, n <m”, but “n is an integer of 0 or more, m is an integer of 1 or more, and n <m” Then, another value may be used.
[0076]
The above embodiment is an example of a preferred embodiment of the present invention, and the embodiment of the present invention is not limited to this, and may be variously modified and implemented without departing from the gist of the present invention. Becomes possible.
[0077]
【The invention's effect】
As described above, according to the present invention, when an image is formed on an image-bearing body surface by light beams emitted from a plurality of light sources, the writing magnification of the image in the main scanning direction can be easily adjusted. It becomes.
[Brief description of the drawings]
FIG. 1 is a diagram illustrating an image forming apparatus according to an embodiment of the present invention.
FIG. 2 is a schematic diagram of an image forming apparatus according to an embodiment of the present invention.
FIG. 3 is a diagram illustrating a laser diode array according to an embodiment of the present invention.
FIG. 4 is a diagram showing an image spot array on a photoconductor when a plurality of light sources are arranged such that a straight line connecting the center points of the light sources is inclined at a predetermined angle with respect to the main scanning direction. .
FIG. 5 is a timing chart showing a conventional delayed pixel clock.
FIG. 6 is a timing chart showing a delay synchronization signal and a pixel clock generated by using the delay synchronization signal as a trigger according to the embodiment of the present invention.
FIG. 7 is an enlarged timing chart of a part of the delay synchronization signal according to the embodiment of the present invention.
FIG. 8 is a diagram showing a light beam scanning circuit using a conventional pixel clock delay circuit.
FIG. 9 is a diagram illustrating a light beam scanning circuit according to an embodiment of the present invention.
FIG. 10 is a diagram illustrating an image forming apparatus according to an embodiment of the present invention.
FIG. 11 is a diagram illustrating a delay synchronization signal generation unit according to an embodiment of the present invention.
FIG. 12 is a diagram showing the configuration of a composite clock generator according to an embodiment of the present invention in more detail.
FIG. 13 is a diagram showing an image spot array on a photoconductor when a plurality of light sources are arranged such that a straight line connecting the center points of the light sources is orthogonal to the main scanning direction.
[Explanation of symbols]
10 LD array
11,26 Condensing lens
12 Aperture
13, 20, 24 cylinder lens
14 Rotary scanning means
15 Polygon mirror
17, 18 fθ lens
19 Folding mirror
21 Photoconductor
22 imaging spot train
23 Synchronization detection mirror
25 Synchronous detection signal sensor
40 Paper storage section
41 Paper feed unit
42 Developing section
44 Charging part
46 Cleaning unit
47 Fixing unit
48 Paper transport unit
49 Transfer unit
50 Registration transport roller
51 Resist part
53 Image Forming Apparatus Control Unit
60 Inclined Multiple Beam Light Source
61 Inclined Beam Spot
62 Aligned Beam Spot
71a-71d laser diode
72 Photodiode
73a to 73d LD driver
74a-74d PWM control unit
75 Clock delay means
76 Image Data Interface
77, 77a-77d Pixel clock generator
78 Basic Clock
79 Synchronization detection signal generation means
80a-80d composite clock generator
81 Delay synchronization signal generation unit
82 Motor Driver
83 Motor control means
84 Pixel clock delay amount setting circuit
85 Pixel clock multiplication clock delay amount setting circuit
86 Synchronous signal delay amount setting / delayed synchronous signal number setting register
87 Delay synchronization signal generation circuit
88 signal input section
89 signal output section
100 writing device
300 light beam scanning device

Claims (15)

Scanning means for providing a plurality of light sources arranged at predetermined intervals, and scanning the image carrier by emitting light beams from the plurality of light sources,
Synchronization detection generating means for detecting the light beam and generating a synchronization detection signal for alignment in the main scanning direction,
A delay synchronization signal generating unit configured to generate the delay synchronization signal delayed by a predetermined time from the reference synchronization signal, using the synchronization detection signal as a reference synchronization signal;
Pixel clock generation means for generating and outputting the pixel clock for forming an image, using the delay synchronization signal as a trigger,
A light beam scanning circuit, comprising: The delay synchronization signal generating means includes:
The delay amount of an integral multiple of the pixel clock is added to the time (0 ≦ n ≦ 16, 1 ≦ m ≦ 16, n <m) obtained by multiplying the cycle time of the pixel clock by (n / m). 2. The light beam scanning circuit according to claim 1, wherein the delay synchronizing signal is generated by using the result as a delay amount. 3. The apparatus according to claim 2, further comprising: a delay amount setting unit configured to set at least one of a delay amount setting of the integral multiple clock number and a value (n / m) multiplied by a cycle time of the pixel clock. Light beam scanning circuit. The delay amount setting means,
4. The light beam scanning circuit according to claim 3, wherein a plurality of delay synchronization signals respectively corresponding to the plurality of light sources are independently generated. A light beam scanning device that emits a plurality of light beams and deflects the emitted plurality of light beams to scan the image bearing member,
Scanning means comprising a plurality of light sources arranged at predetermined intervals, and scanning the image carrier by emitting light beams from the plurality of light sources,
Synchronization detection generating means for detecting the light beam and generating a synchronization detection signal for alignment in the main scanning direction,
A delay synchronization signal generating unit configured to generate the delay synchronization signal delayed by a predetermined time from the reference synchronization signal, using the synchronization detection signal as a reference synchronization signal;
Pixel clock generation means for generating and outputting the pixel clock for forming an image, using the delay synchronization signal as a trigger,
A light beam scanning device, comprising: The delay synchronization signal generating means includes:
The delay amount of an integral multiple of the pixel clock is added to the time (0 ≦ n ≦ 16, 1 ≦ m ≦ 16, n <m) obtained by multiplying the cycle time of the pixel clock by (n / m). 6. The light beam scanning device according to claim 5, wherein the delay synchronizing signal is generated by using the result as a delay amount. 7. A delay amount setting means for setting at least one of a delay amount setting of the integral multiple clock number and a value (n / m) multiplied by a cycle time of the pixel clock. Light beam scanning device. The delay amount setting means,
8. The light beam scanning device according to claim 7, wherein a plurality of delay synchronization signals respectively corresponding to the plurality of light sources are independently generated. An image forming apparatus that emits a plurality of light beams, deflects the emitted plurality of light beams, and scans a uniformly charged image carrier to form an image.
Scanning means comprising a plurality of light sources arranged at predetermined intervals, and scanning the image carrier by emitting light beams from the plurality of light sources,
Synchronization detection generating means for detecting the light beam and generating a synchronization detection signal for alignment in the main scanning direction,
A delay synchronization signal generating unit configured to generate the delay synchronization signal delayed by a predetermined time from the reference synchronization signal, using the synchronization detection signal as a reference synchronization signal;
Pixel clock generation means for generating and outputting the pixel clock for forming an image, using the delay synchronization signal as a trigger,
An image forming apparatus comprising: The delay synchronization signal generating means includes:
The delay amount of an integral multiple of the pixel clock is added to the time (0 ≦ n ≦ 16, 1 ≦ m ≦ 16, n <m) obtained by multiplying the cycle time of the pixel clock by (n / m). The image forming apparatus according to claim 9, wherein the delay synchronization signal is generated by using the result as a delay amount. 11. A delay amount setting means for setting at least one of a delay amount setting of the integral multiple clock number and a value (n / m) for multiplying a cycle time of the pixel clock. Image forming apparatus. The delay amount setting means,
The image forming apparatus according to claim 11, wherein a plurality of delay synchronization signals respectively corresponding to the plurality of light sources are independently generated. The image forming apparatus according to claim 9, wherein an electrophotographic method is used. 14. The image forming apparatus according to claim 13, wherein a digital electrophotographic method is used. The image forming apparatus according to claim 14, wherein the digital writing pixel density is 1200 dpi.

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