JP2004281450A - Method of manufacturing semiconductor device and electronic equipment - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To mount a driver IC on a film substrate with a stable quality by absorbing the dimensional variations of the film substrate under the mounting conditions by solving the problem that the dimensional variations become large and defective mounting occurs frequently when the pitch is 30 μm. <P>SOLUTION: After the dimension of an FPC is measured through the alignment of bonding and an IC is sucked to a bonding head preset to a temperature which is sufficiently lower than the bonding temperature, the insufficient dimension of the bonding head from the required dimension is corrected by raising the temperature of the head. After the dimensional correction is performed, the bonding head is pressurized under the same condition and joining is completed by again raising the temperature of the bonding head to a joining temperature under the same condition. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing an electronic device such as a mobile phone, an information terminal, and a handy terminal, and for example, relates to a method for manufacturing a semiconductor device used for a display device or the like. More specifically, the present invention relates to mounting of a semiconductor element such as a driver IC, for example, to connection between a film substrate in which wiring is formed on an insulating substrate such as polyimide and an IC with bumps.
[0002]
[Prior art]
According to the conventional technology, for example, face-down mounting of an IC for driving a display device is performed by bonding to a polyimide-based film substrate using a method of holding a connection using an adhesive. Using a plated bump formed by plating a bump made of Au or a stud bump to which wire bonding is applied, the film substrate is press-bonded with an anisotropic conductive film (for example, see Patent Document 1), or a silver paste is used as the bump. The image was transferred and connected to a film substrate, and an underfill was filled and connected between them. In the case of pressure bonding with an anisotropic conductive film, elongation of the film caused by the heat of pressure bonding is corrected on the film side (see Patent Document 2). When metal diffusion connection is used, a method of soldering to the electrodes of the film substrate using solder for the bumps of the IC and filling the underfill, Au plating on the bumps of the IC, and Sn plating on the electrodes on the film substrate side. And a method of performing Au-Sn eutectic connection and filling an underfill.
[0003]
In recent years, display devices using ICs that drive a display panel and have a bump pitch of 45 μm and 900 electrodes have been mass-produced. For mounting a pitch of 45 μm, Au—Sn eutectic connection is the most suitable connection method. On the film substrate, a seed layer made of nickel or the like for adhering copper to the polyimide film is sputtered at 30 °, and subsequently, copper is sputtered at 2000 °. Electroplating is performed so that the total thickness of the electrodes is about 8 μm. Patterning is performed using a photolithographic method, and electroless tin plating is performed to form pure tin of about 0.15 to 0.25 μm. After forming the solder resist, the film substrate is completed. The film substrate is set on a stage at about 50 ° C. The IC is attracted to the bonding head and heated to 450 ° C. The bonding head may be heated beforehand to deliver the IC. While the IC and the film substrate are opposed to each other, two diagonal marks of the IC and two marks of the film substrate are recognized by the upper and lower two-view camera, and respective coordinates are calculated. The Y axis and the θ axis are corrected to predetermined positions facing the IC, and the IC is heated to 450 ° C. and pressed for 2 seconds to complete the gold-tin eutectic connection.
[0004]
[Patent Document 1]
JP 05-249479 A (Page 3, FIG. 1)
[0005]
[Patent Document 2]
JP-A-2000-312070 (page 4, FIG. 2)
[0006]
[Problems to be solved by the invention]
The size of ICs has been reduced year by year, and mass production of mounting ICs having a pitch of 40 μm and film substrates has begun. As for ICs, studies are underway on shrinking and finer pitch to reduce the price. The formation of a straight bump is limited to a space of 13 μm, and the width of the bump is 15 to 17 μm at present, which is the limit for stable mass production. Therefore, the pitch of ICs that can be mass-produced at present is 30 μm pitch. In the case of an IC having a bump arrangement of 30 μm pitch and the number of electrodes exceeding 1000 pins, a mounting position deviation from the film substrate occurred. The displacement is a phenomenon in which the accumulated pitches of the IC and the film substrate do not match, and the terminals at the ends are largely displaced when they are matched at the center terminal.
[0007]
One of the causes is that the film substrate is thermally deformed by heat at the time of mounting. Particularly, in the case of Au-Sn eutectic connection, since the temperature of the connection portion is heated to 350 to 380 ° C, deviation occurs even when polyimide having high heat resistance is used. As a countermeasure against the displacement, the pattern for correcting the extension of the entire pattern of the film substrate or only the IC mounting portion was reduced at a constant magnification. In the corrected pattern, the degree of deviation was small, but variation in elongation occurred, so that this alone did not solve the cause.
[0008]
Another cause is a method of manufacturing a film substrate. Generally, a film substrate is manufactured by a roll method. At this time, since a raw material having a width of 200 to 500 is used, a mask layout for obtaining more products is to arrange the products freely at 0 °, 90 °, 180 ° and 270 ° so that the products are tied together. Therefore, it was manufactured so as to obtain the largest number of pieces. Since the raw material of the film substrate is obtained by uniaxially stretching the polyimide, the characteristics are different between a machine direction (MD) and a transfer direction (TD). In the physical properties published by film manufacturers, even if the properties of strength, elongation, Young's modulus, heat shrinkage, thermal expansion coefficient, and humidity expansion coefficient are the same in MD and TD, the actual MD and TD directions The characteristics of dimensional change are different. Further, depending on the mask layout of the film substrate, a certain side connected to the IC may be in the MD direction or TD. However, this mask layout is a design problem, and it is possible to set design rules that match the design of the IC and the direction of the film.
[0009]
Also, the initial dimensional variation of the film substrate is one of the major causes. Normally, the initial dimensional variation of a film substrate using a material in which a metal thin film is sputtered on a polyimide film and copper is formed by electroplating has a variation of ± 0.06%. Since the pattern mask of the film substrate is under a constant condition, the dimensions of the product are not stable despite the fact that there is almost no variation and the pattern mask is stable. This is because, due to the characteristics of the polyimide film of the film substrate, a dimensional change occurs at a temperature and a dimensional change occurs in a state of water absorption and drying. For example, in the case of Kapton 100EN manufactured by Toray DuPont, the coefficient of thermal expansion is 16 ppm / ° C. for both MD and TD, and the coefficient of humidity expansion is 15 ppm /% RH for both MD and TD. This influence causes the dimensional variation of the film substrate.
[0010]
The current variation in the cumulative pitch dimension of the film substrate is ± 0.06% before mounting even in the TD direction with good dimensional accuracy, and ± 0.10% after gold-tin eutectic connection. In order to mount at a pitch of 30 μm, for example, in the case of a long IC chip of 17 mm, the allowable deviation amount between the mounted bump and the pattern of the film substrate is ± 10 μm.
[0011]
However, the deviation due to the mounting apparatus is about ± 5 μm, and in the current film substrate, the cumulative pitch fluctuation before mounting is about ± 10 μm, and after mounting, it is ± 17 μm. For example, the mounting method of gold-tin eutectic connection is as follows: the film substrate is heated to 50 to 80 ° C, the IC is attracted to a head heated to 450 ° C, alignment is performed by a camera, and position correction is performed. Pressurized for 1 to 2 seconds and connected. Regarding the amount of positional deviation between the IC after mounting and the film substrate, the dimensional variation of the mounted film is divided to both ends on the basis of the center, so that the variation is half of ± 8.5 μm, and the maximum total is ± 13. It becomes 5 μm. Therefore, mounting a long IC chip of 17 mm at a pitch of 30 μm caused many failures and became expensive. In order to achieve the mounting at a pitch of 30 μm using a 17 mm IC, the accuracy required for the film substrate is ± 3 μm at the initial stage of the accumulated pitch variation. With this accuracy, even if there is a variation in the mounting position of the mounting apparatus, the accumulated pitch variation after the mounting can be made within ± 10 μm of the allowable connection value of the electrodes. For this purpose, the initial size variation of the film substrate needs to be about ± 0.02%, which is less than half of the conventional variation, and the accuracy after gold-tin eutectic mounting needs to be about ± 0.05%. is there.
[0012]
According to the present invention, in order to realize high-density mounting of the IC and the film substrate, the cumulative pattern pitch of the film substrate and the dimensions of the IC are individually matched. Thereby, stable joining quality can be realized.
[0013]
[Means for Solving the Problems]
In order to solve such a problem of conventional mounting, the present invention corrects misalignment between a film substrate and a semiconductor element by utilizing thermal expansion by temperature control. Thereby, the dimensional variation of the film substrate can be eliminated. That is, the method for manufacturing a semiconductor device according to the present invention includes the steps of aligning the semiconductor element and the film substrate, measuring the dimensions of the film substrate, and, according to the measured dimensions of the film substrate, The method includes the steps of adjusting at least one temperature to thermally expand the film substrate to perform dimensional correction, and joining the semiconductor element and the film substrate in the dimensional corrected state.
[0014]
In addition, the method for manufacturing an electronic device of the present invention includes a step of aligning the semiconductor element and the film substrate, measuring the dimensions of the film substrate, and, according to the measured dimensions of the film substrate, forming the semiconductor element and the film substrate. The method includes a step of adjusting a temperature by adjusting at least one temperature to thermally expand the film substrate, and a step of joining the semiconductor element and the film substrate with the dimension corrected.
[0015]
BEST MODE FOR CARRYING OUT THE INVENTION
The mounting method of the present invention is a method of mounting a semiconductor element having bumps made of gold or the like and a film substrate having metal wiring formed on an insulating film made of polyimide or the like. Then, the dimensions of the semiconductor element and the film substrate are measured. At this time, the temperature applied to the film substrate and the semiconductor element is set to be lower than the temperature applied at the time of sufficient bonding. The position coordinates are detected by camera alignment. Usually, two diagonal marks near the outer shape are recognized, the coordinates are calculated, and the position is adjusted using the X, Y, and θ axes of the apparatus. At this time, the dimension between the marks recognized by the camera is measured, and when the dimensions of the semiconductor element and the film substrate do not match, the temperature of the semiconductor element or the film substrate is adjusted, and the dimension between the marks is adjusted by thermal expansion. The dimensions to be adjusted at this time may be corrected because the temperature of one of the IC chips and the substrate may decrease when the IC chip and the substrate actually come into contact with each other, and the thermal contraction may occur. In this state, pressurization is performed to press the bumps of the semiconductor element and the lead of the film substrate so that they do not shift, and the pressure is applied to the head and the stage of the film substrate, which has absorbed the semiconductor, and the junction is heated. By adopting a mounting method in which the bonding is performed, bonding can be performed with high mounting accuracy.
In this way, the electronic device
【Example】
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0017]
(Example 1)
FIG. 1 shows a mounting process flow according to this embodiment. The film substrate 2 has a pattern 22 made of copper having a thickness of 8 μm on a polyimide film 21 having a thickness of 25 μm, a tin plating of 0.15 to 0.25 μm on a pure tin layer, and a solder resist 23 is formed. The film substrate 2 is fixed to the stage 4 by suction, and the FPC is set in step a. The temperature of the stage 4 is set to 50 ° C. Next, the IC 1 is attracted to the bonding head 3 in step b. The bonding head 3 is set at 200 ° C. by a ceramic heater method. In the IC, a circuit is formed on the surface of the single crystal silicon 11 with a size of 17 × 4 mm, and a bump 12 is formed as a protruding electrode made of gold. The bumps 12 are formed on the outer periphery of the IC 1 at a pitch of 30 μm. Next, in step c, the marks on the IC 1 and the film substrate 2 are confirmed by the upper and lower two-view camera 5. FIG. 2 shows a schematic diagram of this step. The upper and lower two-view camera 5 has cameras mounted in the directions of the arrows, and recognizes a mark near the corner of the IC 1 diagonally. Further, the film substrate 2 recognizes substantially the same position. The upper and lower two-view camera 5 operates on independent X, Y, and Z axes. In step d, the positions of the IC 1 and the film substrate 2 are corrected based on the data on which the pattern has been recognized. For correction, the stage 4 on which the film substrate 2 is set has X, Y, and θ axes, and the stage 4 moves by the correction value. At the same time, it is checked whether the film substrate 2 and the IC 1 have predetermined dimensions. The dimensional variation at the diagonal of the IC is 1 μm or less, which is not a problem. However, since the dimensional variation of the film substrate 2 is ± 10 μm on the long side, in the next step e, the IC varies depending on the measurement result by the camera. The temperature of the bonding head 3 that is adsorbing is raised. The thermal expansion coefficient of the IC is 5 ppm. The temperature of the head 3 required for the eutectic connection is 450 ° C., and the range of the dimensional variation of the film substrate is about 20 μm. Is 250 ° C., and the thermal expansion amount of the IC in this range is calculated to be 21.25 μm, which can cover the variation of the film substrate.
[0018]
In this embodiment, since the film substrate 2 has a predetermined size of “−5 μm”, the bonding head 3 is heated to 260 ° C. Next, in step f, the positions and dimensions of the IC 1 and the film substrate 2 are confirmed by the upper and lower two-view camera 5 for confirmation. If the confirmation is NG, the position correction of the film substrate 2 and the dimensional correction of the IC 1 are performed again. In addition, the recognition process of the upper and lower two-view camera 5 may be deleted if unnecessary. With the film substrate 2 of the IC 1 at a predetermined position and dimensions, the bonding head 3 is pressed in the next step g, and the bumps 12 of the IC 1 and the leads 22 of the film substrate 2 are pressed. Thereafter, the bonding head 3 is heated to 450 ° C. in the next step in order to perform gold-tin eutectic bonding at the pressurized portion. In 2 seconds, the temperature rises to 450 ° C., the bonding head 3 rises, and the bonding is completed. FIG. 3 shows a schematic diagram of the completed state.
[0019]
Heating for dimensional correction is not limited to the IC side, but may be on the film substrate side. The temperature of the bonding head 3 at the time of camera recognition is not limited to 200 ° C., but may be any temperature.
[Brief description of the drawings]
FIG. 1 is a process flow of the present invention.
FIG. 2 is a schematic view showing a process of mounting the present invention.
FIG. 3 is a schematic diagram showing a state in which mounting is completed.
[Explanation of symbols]
1 IC
2 Film substrate 3 Bonding head 4 Stage 5 Vertical two-view camera 11 Monocrystalline Si
12 Au bump 21 Polyimide film 22 Pattern 23 Solder resist

Claims (2)

In a method of manufacturing a semiconductor device in which a semiconductor element having a bump is mounted on a film substrate,
A step of aligning the semiconductor element and the film substrate, and measuring the dimensions of the film substrate,
According to the measured dimensions of the film substrate, adjusting the temperature of at least one of the semiconductor element and the film substrate, performing a dimensional correction by thermally expanding the film substrate,
Bonding the semiconductor element and the film substrate in a state where the dimensions have been corrected. In a method for manufacturing an electronic device having a film substrate on which a semiconductor element is mounted,
A step of aligning the semiconductor element and the film substrate, and measuring the dimensions of the film substrate,
According to the measured dimensions of the film substrate, adjusting the temperature of at least one of the semiconductor element and the film substrate, performing a dimensional correction by thermally expanding the film substrate,
Bonding the semiconductor element and the film substrate in a state in which the dimensions have been corrected.

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