JP2004279548A - Display driving method, circuit therefor, and image display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display driving method, which has well-balanced life characteristics of light emitting elements of two terminals illuminating with lightness corresponding to supplied DC currents, display picture quality of a moving picture, and light emission efficiency, and to provide a circuit therefor and an image display device. <P>SOLUTION: The method includes the stages of: using one terminal of a light emitting element as a common electrode and supplying positive electric power to the other terminal for a 1st specified period to make the light emitting element illuminate; supplying negative electric power to the other terminal for a 2nd specified period to apply a reverse bias to the light emitting element; and supplying neither the positive electric power nor the negative electric power to the other terminal for a 3rd specified time to stop a current supplied from outside from flowing to the light emitting element. Those stages are periodically repeated. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a display driving method, a circuit thereof, and an image display device, and more particularly, to a display driving method of a two-terminal light emitting element that emits light at a brightness corresponding to a supplied direct current.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, a driving circuit that drives a two-terminal light emitting element that emits light at a brightness corresponding to a direct current supplied by an organic EL (hereinafter, sometimes referred to as an OLED: an organic light emitting diode) by a TFT and uses the driving circuit. Various image display devices have been proposed. Active driving using this TFT is superior to passive driving in terms of the luminous efficiency and life of the OLED.
[0003]
By the way, the above-mentioned light-emitting element simultaneously generates a parasitic capacitance in parallel with a pure diode component. It is known that reactive power is generated by charging and discharging the parasitic capacitance without contributing to light emission.
[0004]
In addition, the active driving circuit generally has a hold effect that the luminance of display light is kept substantially constant for one field of an image signal due to the principle of operation. It is known that the display quality of a moving image deteriorates.
[0005]
Further, the light emitting element has a problem that the light emission luminance deteriorates with time, in other words, a problem of life characteristics.
[0006]
As a basic driving method of an OLED, there is a method in which the potential of one terminal of a light-emitting element is set to a reference potential (earth potential) and a positive potential is applied to the other terminal in a pulsed manner (for example, see Non-Patent Document 1). ).
[0007]
According to this method, charge and discharge from the parasitic capacitance hardly occur, so that reactive power is reduced and light emission efficiency is improved. In addition, deterioration of the display quality of a moving image due to the hold effect is reduced.
[0008]
However, the above method cannot avoid the problem of life characteristics.
[0009]
On the other hand, there is a method of applying an AC voltage between two terminals of a light emitting element (for example, see Non-Patent Document 1).
[0010]
1 will be described with reference to the waveform diagram of the voltage, current, and light emission luminance in FIG. 2 for the driving circuit for one pixel in FIG.
[0011]
In the drive circuit 5, one terminal (common electrode) 2a of the light emitting element 1 is grounded and is at a reference potential, and the anode voltage va is applied to the other terminal 2b of the light emitting element 1. Then, a current i corresponding to the anode voltage va flows through the light emitting element 1, and light emission having a luminance L corresponding to the current i is generated. As described above, the parasitic capacitance 4 is generated in parallel with the diode component 3 of the light emitting element 1.
[0012]
In the drive circuit 5, since the reverse voltage vr, in other words, the reverse bias voltage is applied, the light emission luminance deteriorated due to the aging is recovered. That is, the life characteristics of the light emitting element 1 are improved.
[0013]
[Non-patent document 1]
T. Tsujioka, et al. , Jpn. J. Appl. Vol. 39, Pp. 3463-3465 (June 2000)
[0014]
[Problems to be solved by the invention]
However, in the drive circuit 5 that applies the AC voltage, the current i flows due to the rectangular wave voltage va. At this time, the charge accumulated in the parasitic capacitance 4 is charged and discharged. Causes an overshoot at the time of falling and an undershoot at the time of falling. Since the period in which the overshoot and undershoot currents flow does not contribute to the light emission luminance, the power in this period is power loss (reactive power).
[0015]
That is, in the driving circuit 5, the relative deterioration of the light emission luminance with time is improved, but the absolute value of the light emission efficiency is reduced.
[0016]
As described above, the drive circuit for applying an AC voltage and the drive circuit for applying a positive voltage in a pulsed manner have their respective advantages and disadvantages.Currently, a drive circuit incorporating the advantages of both of these drive circuits is currently available. Not reported.
[0017]
Further, no example has been reported in which these are realized by a TFT drive circuit.
[0018]
The present invention has been made in view of the above problems, and has a good balance between the life characteristics of a two-terminal light emitting element that emits light at a brightness corresponding to a supplied direct current, display quality of moving images, and luminous efficiency. It is an object of the present invention to provide a display driving method, a circuit thereof, and an image display device.
[0019]
[Means for Solving the Problems]
In order to achieve the above object, a display driving method according to the present invention is a display driving method for a two-terminal light emitting element that emits light at a brightness corresponding to a supplied DC current, wherein one terminal of the light emitting element is shared. A step of supplying a positive power to the other terminal as an electrode for a first predetermined period; a step of supplying a negative power to the other terminal for a second predetermined period; and a step of supplying the positive power and the negative power to the other terminal. None of the steps is not supplied for the third predetermined period.
[0020]
This makes it possible to improve the balance between the life characteristics, the display quality of moving images, and the luminous efficiency of the two-terminal light-emitting element that emits light at a brightness corresponding to the supplied direct current.
[0021]
In this case, it is preferable that the step of not supplying the third predetermined period is provided before or after the step of supplying the first predetermined period or both.
[0022]
In addition, a display driving circuit according to the present invention includes a two-terminal light-emitting element that emits light at a brightness corresponding to a supplied direct current, and a drain and a source connected between one terminal of the light-emitting element and a positive power supply. A first field-effect transistor, a second field-effect transistor having a source and a drain connected between a gate and a data electrode of the first field-effect transistor, a gate of the first field-effect transistor, A third field effect transistor having a source and a drain connected between a positive power supply and a fourth field effect transistor having a source and a drain connected between the one terminal of the light emitting element and the negative power supply. In synchronization with the vertical synchronization of the image signal, each of the second to fourth field effect transistors within a predetermined period different from each other and separated by a predetermined time within one field period of the image signal. And wherein the turning on once.
[0023]
The display drive circuit according to the present invention includes a two-terminal light-emitting element that emits light at a brightness corresponding to a supplied DC current, and a first terminal in which one of a source and a drain is connected to a positive power supply. A field-effect transistor; a second field-effect transistor having a source and a drain connected between the gate and the data electrode of the first field-effect transistor; and the other of the source and the drain of the first field-effect transistor And a third field-effect transistor having a source and a drain connected between one terminal of the light-emitting element and a fourth field-effect transistor having a source and drain connected between the one terminal of the light-emitting element and a negative power supply. And a field-effect transistor, in synchronization with the vertical synchronization of the image signal, within a predetermined period of time different from each other and separated by a predetermined time within one field period of the image signal. Characterized in that to the fourth respectively on one field-effect transistor of.
[0024]
In this case, the second or third field-effect transistor is n-type, and the source and drain of the fourth field-effect transistor are connected to the anode of the light-emitting element and the second or third field-effect transistor. It is connected between the gates, and is configured so that the gate of the second or third field-effect transistor is set to a negative voltage when the second or third field-effect transistor is turned off. .
[0025]
Further, in the display driving circuit according to the present invention, the display driving circuit further includes a capacitor connected between a gate of the first field-effect transistor and the positive power supply.
[0026]
With the configuration of the display driving circuit, the display driving method according to the present invention can be suitably realized.
[0027]
Further, an image display device according to the present invention includes the above display drive circuit.
[0028]
Thus, the effects of the display driving circuit according to the present invention can be suitably obtained.
[0029]
BEST MODE FOR CARRYING OUT THE INVENTION
Preferred embodiments of a display driving method, a circuit thereof, and an image display device according to the present invention (hereinafter, referred to as embodiments) will be described with reference to the drawings, taking an organic EL element as a light emitting element. Will be described.
[0030]
A display driving circuit and a display driving method according to a first example of the present embodiment will be described with reference to a circuit diagram of a driving circuit for one pixel in FIG. 3 and waveform diagrams of voltage, current, and emission luminance in FIG. I do. In FIG. 3, the organic EL element is represented by a light emitting element 10, and the light emission luminance thereof is represented by L.
[0031]
The cathode of the light emitting element 10 is connected to a common electrode (indicated by a ground symbol in FIG. 1). The drain (D) of a p-type (channel) FET (field effect transistor) 12 as a TFT is connected to the anode of the light emitting element 10, and the source (S) of the FET 12 has a positive potential with respect to the common electrode. It is connected to a positive power supply (+ Vss).
[0032]
Generally, in a TFT, it is not necessary to distinguish between a drain and a source, and the same operation is performed even if the drain and the source are connected to each other in the opposite direction. Reference symbols such as “D” and “D” are omitted as necessary.
[0033]
A holding capacitor (capacitor) 14 is formed between the gate (G) of the FET 12 and the positive power supply. The gate (G) of the FET 12 is connected to the drain (or the source of the n-type FET 16; hereinafter, represented by only one of the source and the drain), and the source of the FET 16 is connected to the data electrode. I have. The gate of the FET 16 is connected to the scan electrode S10.
[0034]
The drain of the n-type FET 18 is connected to the gate of the FET 12, the source of the FET 18 is connected to the positive power supply, and the gate of the FET 18 is connected to the scan electrode S12.
[0035]
The drain of the n-type FET 20 is connected to the anode of the light emitting element 10, the source of the FET 20 is connected to a negative power supply (-Vr) for applying a reverse bias, and the gate of the FET 20 is connected to the scan electrode S14. Although there is no distinction between the source and the drain in the FET 20, the negative power supply side is referred to as a source (S) for the sake of convenience in the following description.
[0036]
As shown in the waveform diagram of FIG. 4, the scanning electrode S10 is turned on once for one short period in synchronization with the vertical synchronization of the image signal once in one field period of the image signal (1/60 second in the case of the Japanese television system). When the power supply potential is set, the FET 16 is turned on only during that period, and the storage capacitor 14 is charged through the FET 16 at the voltage of the data electrode at that time (having a negative potential with respect to the potential of the positive power supply). Since the FET 12 allows a current of a constant value corresponding to the voltage between the gate and the source, that is, the voltage between both ends of the storage capacitor 14 to flow between the source and the drain, the light emitting element 10 has a luminance corresponding to the voltage charged in the storage capacitor 14. It emits light.
[0037]
After the FET 16 is turned off from on, the charge stored in the storage capacitor 14 is maintained, and as long as the charge is maintained, the light emitting element 10 continues to emit light at a constant luminance.
[0038]
Next, for example, when the signal given to the scan electrode S10 is delayed for a fixed time and given to the scan electrode S12, the FET 18 is turned on when the electrode S12 reaches the positive power supply potential, and the electric charge accumulated in the storage capacitor 14 is changed to the FET 18 , And thereafter the voltage across the storage capacitor 14 becomes zero. As a result, the FET 12 is turned off, and the supply of the current from the outside, that is, the current from the positive power supply to the light emitting element 10 is cut off. Accordingly, no reactive power is supplied to the light emitting element 10 during this time (T1 in FIG. 4). On the other hand, as described in the section of the prior art, the electric charge accumulated in the parasitic capacitance is discharged through the diode component (see FIG. 1). In the embodiment, a part of the discharge current contributes to light emission.
[0039]
Next, when the electrode S14 is set to the positive power supply potential when the discharge of the parasitic capacitance has sufficiently proceeded, the FET 20 is turned on, the negative power supply potential (-Vr) is applied to the anode of the light emitting element 10, and the reverse bias is applied to the light emitting element 10. The voltage is applied. Further, when the electrode S14 is returned to the zero potential, the FET 20 is turned off, and the current supplied from the outside of the light emitting element 10 is cut off again. At this time, the charge accumulated in the parasitic capacitance becomes a reverse bias for the diode, but since the reverse resistance of the diode component of the light emitting element 10 is not infinite, a certain amount of the charge is discharged through the diode component. For this reason, the overshoot at the time of the rise of the current I when the positive power supply voltage is applied to the FET 12 next time is suppressed low, and the reactive power is reduced accordingly.
[0040]
By repeating these operations at a constant cycle, the waveform diagram of FIG. 2 is obtained. In FIG. 2, reference numeral T1 indicates the first current interruption period, and reference numeral T2 indicates the second current interruption period.
[0041]
The FETs 16, 18, and 20 may be n-channel or p-channel. In the case of p-channel, the same operation as described above can be realized by inverting the waveforms of the scan electrodes S10, S12, and S14 up and down (positive and negative), respectively. it can.
[0042]
According to the display driving method and the circuit according to the present embodiment, the reverse bias voltage is applied for a certain period, and further, the current flowing to the light emitting element is cut off for a certain period. For this reason, the holding time of the display light is shortened, the motion blur is reduced, the display quality of the moving image is improved, the reactive power is reduced, and the light emission efficiency is improved. In addition, the deterioration of light emission luminance with time is reduced, and the life characteristics are improved. Therefore, the display quality of the moving image, the luminous efficiency, and the life characteristics are well balanced.
[0043]
In the display driving method and the circuit according to the present embodiment, the storage capacitor may be omitted as necessary. Even when the storage capacitor is omitted, since the storage capacitor is usually formed between the FET 12 and the positive power supply by the capacitance between the electrodes, the light emitting element 10 continues to emit light at a constant luminance by the charge of the storage capacitor.
[0044]
In the display driving method and its circuit according to the present embodiment, the current cutoff period is preferably provided when the positive power supply voltage changes from + to-as described above. Alternatively, it may be provided when the positive power supply voltage changes from + to-, or may be provided when both change.
[0045]
Next, for a display drive circuit and a display drive method according to the second example of the present embodiment, see the circuit diagram of the drive circuit for one pixel in FIG. 5 and the waveform diagrams of the voltage, current, and emission luminance in FIG. Will be explained.
[0046]
The display driving circuit according to the second example of the present embodiment has the same components as the display driving circuit according to the first example of the present embodiment. Therefore, in the display drive circuit according to the second example of the present embodiment, the same components as those in the first example are denoted by the same reference numerals as those in the first example, and also include the operation of the circuit. A duplicate description will be omitted.
[0047]
In the display driving circuit according to the second example of the present embodiment, the source (or drain) of the n-type FET 22 is connected to the drain (or source) of the FET 12, and the drain (or source) of the FET 22 is the anode of the light emitting element 10. , And the gate of the FET 22 is connected to the scan electrode S12. In the second example of the present embodiment, there is no FET 18 in the first example.
[0048]
As shown in the waveform diagram of FIG. 6, in synchronism with the vertical synchronization of the image signal, a signal having a positive potential for a fixed time within one field period of the image signal and a zero potential at other times is supplied to the scan electrode S12. When the scanning electrode S12 is at zero potential, the FET 22 is turned off, and the supply of the current from the outside, that is, the current from the positive power supply to the light emitting element 10 is cut off. Note that the timing when the scanning electrode S12 is set to the + potential may be before or after the scanning electrode S10 returns to the zero potential as long as the scanning electrode S10 is set to the + potential. The FET 22 may be a p-type instead of the n-type. In the case of the p-type, the same operation as described above can be realized by inverting the waveform of the scan electrode S12 up and down (positive / negative). Other operations are the same as those in the first example of the present embodiment.
[0049]
The display driving circuit and the display driving method according to the second example of the present embodiment described above can obtain the same operation and effects as those of the first example of the present embodiment.
[0050]
Next, for a display driving circuit and a display driving method according to a third example of the present embodiment, see the circuit diagram of the driving circuit for one pixel in FIG. 7 and the waveform diagrams of the voltage, current, and emission luminance in FIG. Will be explained.
[0051]
The display driving circuit according to the third example of the present embodiment has the same components as the display driving circuit according to the first example of the present embodiment. Therefore, in the display driving circuit according to the third example of the present embodiment, the same components as those in the first example are denoted by the same reference numerals as those in the first example, and the same elements as those in the first example are duplicated. The description of the operation is omitted.
[0052]
The display drive circuit according to the third example of the present embodiment is different from the first example in that the source of the FET 20 is connected to the scan electrode S10. In this case, the scan electrode S10 is at a negative potential (-Vr) during a period when the scan electrode S10 is not at the + potential, whereby a reverse bias voltage is applied to the anode of the light emitting element 10 when the scan electrode S14 is set at the + potential and the FET 20 is turned on. You. In this case, the FET 16 needs to be n-type.
[0053]
The display driving circuit and the display driving method according to the third example of the present embodiment can obtain the same operation and effects as those of the first example. Further, in this case, the negative power supply as in the first example is unnecessary, and the circuit configuration is simplified.
[0054]
Next, for a display driving circuit and a display driving method according to a fourth example of the present embodiment, see the circuit diagram of the driving circuit for one pixel in FIG. 9 and the waveform diagrams of the voltage, current, and emission luminance in FIG. Will be explained.
[0055]
The display drive circuit according to the fourth example of the present embodiment has the same components as the display drive circuit according to the second example of the present embodiment. Therefore, in the display driving circuit according to the fourth example of the present embodiment, the same components as those in the second example are denoted by the same reference numerals as those in the second example, and the same operations as those in the second example are performed. The description of the operation is omitted.
[0056]
The display drive circuit according to the fourth example of the present embodiment is different from the second example in that the source of the FET 20 is connected to the scan electrode S12. In this case, the scan electrode S12 is at a negative potential (-Vr) during a period when the scan electrode S12 is not at the + potential, so that when the scan electrode S14 is set at the + potential and the FET 20 is turned on, a reverse bias voltage is applied to the anode of the light emitting element 10. You. In this case, the FET 22 needs to be an n-type.
[0057]
The display driving circuit and the display driving method according to the fourth example of the present embodiment can obtain the same operation and effects as those of the second example. In this case, the negative power supply as in the second example is not required, and the circuit configuration is simplified.
[0058]
Next, an image display device according to a fifth example of the present embodiment includes any of the display driving circuits according to the first to fourth examples of the present embodiment, and further includes a type of a light emitting element. Is provided. As these members, those well-known in each image display device such as an organic EL display or the like can be appropriately used, and thus a specific description is omitted.
[0059]
The image display device according to the fifth example of the present embodiment can suitably obtain the operational effects of the display drive circuits according to the first to fourth examples of the present embodiment.
[0060]
【The invention's effect】
According to the display driving method, the circuit thereof, and the image display device according to the present invention, the balance between the life characteristics, the display quality of moving images, and the luminous efficiency of the two-terminal light-emitting element that emits light at a brightness corresponding to the supplied DC current is achieved. Can be good.
[Brief description of the drawings]
FIG. 1 is a diagram showing a driving circuit for one pixel in the related art in which TFTs and the like are partially omitted.
FIG. 2 is a waveform diagram of voltage, current, and light emission luminance in a driving operation of the driving circuit of FIG.
FIG. 3 is a diagram illustrating a drive circuit for one pixel in a display drive circuit according to a first example of the present embodiment;
FIG. 4 is a waveform diagram of a voltage, a current, and light emission luminance in a driving operation of the driving circuit of FIG. 3;
FIG. 5 is a diagram illustrating a drive circuit for one pixel in a display drive circuit according to a second example of the present embodiment;
FIG. 6 is a waveform diagram of a voltage, a current, and light emission luminance in a driving operation of the driving circuit of FIG.
FIG. 7 is a diagram illustrating a drive circuit for one pixel in a display drive circuit according to a third example of the present embodiment;
8 is a waveform diagram of a voltage, a current, and light emission luminance in a driving operation of the driving circuit of FIG. 7;
FIG. 9 is a diagram illustrating a drive circuit for one pixel in a display drive circuit according to a fourth example of the present embodiment;
10 is a waveform chart of voltage, current, and light emission luminance in the driving operation of the driving circuit of FIG. 9;
[Explanation of symbols]
10. Light-emitting devices 12, 16, 18, 20, 22 FET
14 storage capacitors S10, S12, S14 scan electrode

Claims (8)

In a display driving method of a two-terminal light emitting element that emits light at a brightness corresponding to a supplied direct current,
One terminal of the light emitting element as a common electrode,
Supplying a positive power supply to the other terminal for a first predetermined period;
Supplying a negative power supply to the other terminal for a second predetermined period;
Supplying neither the positive power supply nor the negative power supply to the other terminal for a third predetermined period. 2. The display driving method according to claim 1, wherein a step of not supplying the third predetermined period is provided before or after the step of supplying the first predetermined period or both. A two-terminal light-emitting element that emits light at a brightness corresponding to the supplied direct current;
A first field-effect transistor having a drain and a source connected between one terminal of the light-emitting element and a positive power supply;
A second field effect transistor having a source and a drain connected between the gate and the data electrode of the first field effect transistor;
A third field effect transistor having a source and a drain connected between the gate of the first field effect transistor and the positive power supply;
A fourth field effect transistor having a source and a drain connected between the one terminal of the light emitting element and a negative power supply;
In synchronization with the vertical synchronization of the image signal, the second to fourth field effect transistors are respectively set to 1 within a predetermined period different from each other and separated by a predetermined time within one field period of the image signal. A display drive circuit characterized by being turned on once. A two-terminal light-emitting element that emits light at a brightness corresponding to the supplied direct current;
A first field-effect transistor having one of a source and a drain connected to a positive power supply;
A second field effect transistor having a source and a drain connected between the gate and the data electrode of the first field effect transistor;
A third field effect transistor having a source and a drain connected between the other of the source and the drain of the first field effect transistor and one terminal of the light emitting element;
A fourth field effect transistor having a source and a drain connected between the one terminal of the light emitting element and a negative power supply;
Has,
Synchronizing with the vertical synchronization of the image signal, turning on each of the second to fourth field effect transistors once within a predetermined period that is different from each other and separated by a predetermined time within one field period of the image signal. A display drive circuit characterized by the above-mentioned. The second field-effect transistor is n-type, and the source and drain of the fourth field-effect transistor are connected between the anode of the light-emitting element and the gate of the second field-effect transistor; 5. The display driving circuit according to claim 3, wherein a gate of the second field effect transistor is set to a negative voltage when the field effect transistor is turned off. The third field-effect transistor is n-type, and the source and drain of the fourth field-effect transistor are connected between the anode of the light-emitting element and the gate of the third field-effect transistor. 5. The display driving circuit according to claim 3, wherein a gate of the second field effect transistor is set to a negative voltage when the field effect transistor is turned off. The display drive circuit according to claim 3, further comprising a capacitor connected between a gate of the first field-effect transistor and the positive power supply. An image display device comprising the display drive circuit according to claim 1.

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