JP2004274430A - Power amplifier module and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power amplifier by which the temperature dependency of a power gain is reduced. <P>SOLUTION: A multi-stage power amplifier consists of: a first amplifier circuit 2 configured by connecting at least one or more bipolar transistors in parallel and arranged on a first semiconductor substrate; and a second amplifier circuit 3 configured by connecting at least one or more bipolar transistors in parallel and arranged on a second semiconductor substrate. In the bipolar transistor used in the first amplifier circuit 2, the plane shape of the emitter is rectangular. In the bipolar transistor used in the second amplifier circuit 3, has an emitter whose plane shape is annular, for example. In addition, a base electrode is present on the interior of the annular emitter only. Thus, the issue mentioned above is resolved. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a power amplifier and a method of manufacturing the same, which can reduce the temperature dependence of a power gain and enable high power conversion efficiency.
[0002]
[Prior art]
In recent years, with rapid growth in demand for mobile communication devices, research and development of power amplifiers used for communication devices have been actively conducted. As a semiconductor transistor used for a power amplifier for a mobile communication device, a heterojunction bipolar transistor (hereinafter abbreviated as HBT), a field effect transistor (hereinafter abbreviated as FET), a metal-oxide-semiconductor (SiMOS) FET, or the like is used. is there. Among these, the HBT has excellent linearity of input / output characteristics, operates only with a positive power supply, does not require a negative power supply generation circuit and components, has a high output power density, and requires a small chip area. It has features such as space saving and low cost. Therefore, it is mainly used as a transistor for a power amplifier for a mobile communication device.
[0003]
In order to improve the performance of a power amplifier for a mobile communication device, it is essential to improve the performance of an HBT as a basic device. For that purpose, it is necessary to reduce the capacitance between the base and the collector. A technique using an annular emitter-shaped HBT as one of the means is known, for example, from Japanese Patent Laid-Open Publication No. 2001-189319 (Patent Document 1).
[0004]
[Patent Document 1]
JP 2001-189319 A (paragraph: 0008, FIG. 3)
[0005]
[Problems to be solved by the invention]
The technique disclosed in Japanese Patent Application Laid-Open No. 2001-189319 has a drawback that the temperature dependence of the power gain is large (Patent Document 1). FIG. 20 shows the results of measuring the temperature dependence of the power gain of such an HBT alone. FIG. 20 shows the results of an HBT having an annular emitter (hereinafter abbreviated as an annular emitter HBT) and an HBT having a rectangular emitter (hereinafter abbreviated as a rectangular emitter HBT) by lines 20 and 21, respectively. Have been. The total emitter area of both the annular emitter HBT and the rectangular emitter HBT is designed to be equal to about 800 μm ² . Further, the annular emitter HBT is configured by connecting six basic HBTs having an emitter area of 132 μm ² in parallel, and the rectangular emitter HBT is configured by connecting eight basic HBTs having an emitter area of 108 μm ² in parallel. The measurement conditions are a collector voltage of 3.5 V and a frequency of 1.9 GHz. The temperature coefficients of the power gains of the annular emitter HBT and the rectangular emitter HBT are −0.012 dB / ° C. and −0.006 dB / ° C. Therefore, when a power amplifier having a two-stage configuration is formed, the temperature coefficient of the power gain is -0.024 dB / ° C for the annular emitter HBT, and the temperature change of the power gain is -0.012 dB / ° C for the rectangular emitter HBT.
[0006]
The temperature dependence difference between the power gain of the ring emitter HBT and the rectangular emitter HBT is caused by the temperature dependence of the base resistance. The base resistance increases as the temperature rises. On the other hand, the base resistance of the annular emitter HBT is larger than that of the rectangular emitter HBT. For this reason, the change amount of the base resistance due to the temperature change is larger in the annular emitter HBT than in the rectangular emitter HBT. As a result, in the ring-shaped emitter HBT, as the temperature rises, the misalignment of the high frequency matching with the matching circuit increases, and the temperature dependence of the power gain also increases.
[0007]
In view of such a background, a first object of the present invention is to provide a high-performance power amplifier having a small temperature dependence of a power gain. A second object of the present invention is to provide a method of manufacturing a high-performance power amplifier having small temperature dependence of power gain.
[0008]
[Means for Solving the Problems]
The gist of the present invention is as follows. That is, a first amplifier circuit configured by connecting at least one or more bipolar transistors in parallel and a second amplifier circuit configured by connecting at least one or more bipolar transistors in parallel are connected in multiple stages. The bipolar transistor of the first amplifier circuit is a bipolar transistor having a base electrode on both sides of an emitter electrode as a planar arrangement,
The bipolar transistor included in the second amplifier circuit is a bipolar transistor having a portion in which a base electrode, an emitter electrode, and a collector electrode are sequentially arranged as a planar arrangement.
[0009]
The planar shape of the emitter electrode of the bipolar transistor included in the first amplifier circuit having the base electrode on both sides of the emitter electrode is typically a square. Furthermore, rectangles are frequently used.
[0010]
Further, the bipolar transistor of the second amplifier circuit generally has a portion in which a base electrode, an emitter electrode and a collector electrode are sequentially arranged, and the emitter electrode has a portion surrounding at least a part of the base electrode. It is. The planar shape of the emitter electrode of the bipolar transistor may be a closed planar figure having a space therein and at least one of a curved portion and a linear portion, or a partial shape of the closed planar figure. It is common to have
[0011]
Then, the base electrode is arranged in an inner space portion in the plane figure of the emitter electrode.
[0012]
Typically, the planar shape of the emitter electrode of the bipolar transistor included in the second amplifier circuit is annular or a partial annular shape. As described above, this annular shape may be a closed polygonal outer shape.
[0013]
The first amplifier circuit and the second amplifier circuit may be formed on separate semiconductor substrates, or may be formed on a single semiconductor substrate. It is selected according to the design requirements of the whole module.
[0014]
Whether the first or second amplifier circuit is used for the driver stage or the output stage in the power amplifier module is sufficient depending on the design requirements of the entire module.
[0015]
A typical example of the emitter layer material of the bipolar transistor is at least one selected from the group consisting of InGaP, AlGaAs, InP, and InGaAlAs.
[0016]
In order to achieve the second object of the present invention, the semiconductor device is manufactured by sequentially forming an emitter electrode, forming an emitter mesa, forming a base electrode, forming a base mesa, and forming a collector electrode. A more specific example of the process is as follows.
[0017]
Forming at least a collector semiconductor layer on the semi-insulating substrate, a base semiconductor layer on the collector semiconductor layer, and an emitter semiconductor layer on the base semiconductor layer; Forming an emitter electrode of a desired shape on a layer, processing the emitter semiconductor layer into a mesa shape to form an emitter region, forming a base electrode on the base semiconductor layer, Forming a base region by processing the layer into a mesa shape having a region including the emitter region in a planar region, and forming a collector electrode, and forming the emitter electrode and the base electrode. In the processing step, it has the following features.
[0018]
That is, for the bipolar transistor region included in the first amplifier circuit, a planar arrangement of electrodes having base electrodes on both sides of the emitter electrode is adopted as a planar arrangement. On the other hand, the bipolar transistor region of the second amplifier circuit has, as a planar arrangement, a portion in which a base electrode, an emitter electrode, and a collector electrode are sequentially arranged, and the emitter electrode is at least one of the base electrodes. The electrode is processed in an arrangement that is assumed to be a planar arrangement of an electrode having a part surrounding a part. The planar shape and arrangement of these electrodes are the same as in the description of the module structure.
[0019]
Thus, the present invention provides a high power conversion efficiency while sufficiently reducing the temperature dependence of the power gain under the restriction when configuring the power amplifier module using the semiconductor element formed on the insulating or semi-insulating substrate. You can do it if you can.
[0020]
BEST MODE FOR CARRYING OUT THE INVENTION
Prior to illustrating specific embodiments, more specific aspects of the present invention will be listed.
[0021]
In order to achieve the first object of the present invention, in a power amplifier according to the present invention, a first amplifier circuit in which at least one or more bipolar transistors are connected in parallel, and a second amplifier in which at least one or more bipolar transistors are connected in parallel. In a multi-stage power amplifier composed of two amplifier circuits, the bipolar transistor used in the first amplifier circuit has a rectangular emitter shape, and the bipolar transistor used in the second amplifier circuit has a ring-shaped emitter shape. In addition, the base electrode is provided only inside the annular emitter.
[0022]
In order to achieve the first object of the present invention, in a power amplifier according to the present invention, a first amplifier circuit in which at least one or more bipolar transistors are connected in parallel, and at least one or more bipolar transistors are connected in parallel. In the multi-stage power amplifier comprising the second amplifier circuit described above, the planar shape of the bipolar transistor used in the first amplifier circuit is a rectangular emitter shape, and the planar shape of the bipolar transistor used in the second amplifier circuit is an annular shape. It is a part of the emitter and the base electrode is present only inside the annular emitter.
[0023]
In order to achieve the first object of the present invention, in a power amplifier according to the present invention, in an amplifier circuit comprising at least one or more bipolar transistors connected in parallel, the planar shape of the bipolar transistor is an emitter shape. Wherein the base electrode exists only inside the annular emitter, and the base is connected to a resistor having a negative temperature coefficient to cancel the temperature change of the base resistance.
[0024]
In order to achieve the first object of the present invention, a power amplifier according to the present invention relates to an amplifier circuit comprising at least one bipolar transistor connected in parallel, and an amplifier circuit comprising a bipolar transistor connected in parallel. A resistor in which the planar shape of the bipolar transistor has an emitter shape that is part of an annular shape, the base electrode exists only inside the emitter that is part of the annular shape, and the base has a negative temperature coefficient. To cancel the temperature change of the base resistance.
[0025]
Hereinafter, a power amplifier according to an embodiment of the present invention and a method of manufacturing the power amplifier will be described in detail with reference to the drawings. In all of the drawings for describing the embodiments, the same reference numerals are given to components having the same function, and a repeated description thereof will be omitted.
[0026]
<Embodiment 1>
The power amplifier according to the first embodiment will be described with reference to the drawings. FIG. 1 is a block diagram of a power amplifier according to the present embodiment. This example is a two-stage power amplifier. In the figure, reference numerals 2 and 3 denote a first amplifier circuit and a second amplifier circuit, respectively, and reference numerals 4a, 4b and 4c denote input matching circuits, interstage matching circuits and output matching circuits, respectively. The high-frequency signal to be amplified is input from the terminal 22 to the present power amplifier, amplified through the matching circuits 4a, 4b, 4c and the amplifier circuits 2, 3, and then output from the terminal 23.
[0027]
21 and 22 are a cross-sectional view and a plan view, respectively, showing a mounted state of a typical power amplifier module. The semiconductor element 51 and the passive element 52 are mounted on the mounting board 60. Reference numeral 54 denotes a conductor layer, which forms an electrical signal connection with the semiconductor element 51. In this example, a plurality of mounting boards 60, 61, and 62 are used by being stacked. Note that the semiconductor element 51 is the power amplifier described above.
[0028]
FIG. 2 shows a circuit diagram of the first amplifier circuit 2. It is formed by connecting eight basic HBTs 5 having an emitter area of 108 μm ² in parallel. FIG. 2 shows the basic HBT 5 by surrounding it with a dotted line. FIG. 3 shows a plan structure of the amplifier circuit 2, and FIG. 4 shows a cross-sectional structure along AA 'in FIG. Here, reference numerals 18, 7, 8, 9, 10, and 19 indicate an emitter contact layer, an InGaP emitter layer, a GaAs base layer, a GaAs collector layer, a GaAs sub-collector layer, and a GaAs substrate, respectively. Reference numerals 12, 13, and 15 denote an emitter electrode, a base electrode, and a collector electrode, respectively. Further, reference numerals 11, 16, and 14 denote an emitter wiring, a base wiring, and a collector wiring connecting the respective basic HBTs.
[0029]
FIG. 5 shows a detailed plan view of the basic HBT. In this example, the HBT has a rectangular emitter shape. Each part is mounted on a GaAs sub-collector 10 formed on a semi-insulating GaAs substrate. Reference numeral 9 denotes a collector region, and a rectangular emitter electrode 12 is formed on the emitter contact layer 18 at the center in a plan view. As seen in the cross-sectional view of FIG. 4, the emitter layer 7 is formed below the emitter contact layer 18. The rectangular region on both sides of the emitter electrode 12 is seen as the base electrode 13 and the reference numeral 8 is the base region. The rectangular regions existing on both sides of the collector region 9 are the collector electrodes 15.
[0030]
FIG. 6 shows a circuit diagram of the second amplifier circuit 3. In this example, 28 basic HBTs 6 each having an emitter area of 132 μm ² are connected in parallel. FIG. 6 shows the portion of the basic HBT 6 surrounded by a dotted line. FIG. 7 shows a planar structure of the amplifier circuit 3, and FIG. 8 shows a cross-sectional structure along BB 'in FIG. Here, reference numerals 18, 7, 8, 9, 10, and 19 indicate an emitter contact layer, an InGaP emitter layer, a GaAs base layer, a GaAs collector layer, a GaAs sub-collector layer, and a GaAs substrate, respectively. Reference numerals 12, 13, and 15 denote an emitter electrode, a base electrode, and a collector electrode, respectively. Further, reference numerals 11, 16, and 14 denote an emitter wiring, a base wiring, and a collector wiring connecting the respective basic HBTs, respectively.
[0031]
FIG. 9 shows a detailed plan view of the basic HBT. Unlike the example shown in FIG. 3, this example of the basic HBT has an annular emitter shape. Furthermore, in this example, the base electrode is an HBT that exists only inside the annular emitter. Each part is mounted on a GaAs sub-collector 10 formed on a GaAs substrate. Reference numeral 9 denotes a circular collector region, and an annular emitter electrode 12 is formed on the emitter contact layer 18 at the center in a plan view. As seen in the cross-sectional view of FIG. 8, the emitter layer 7 is formed below the emitter contact layer 18. The base electrode 13 is arranged inside the annular emitter electrode 12. The base region is seen as reference numeral 8. The region surrounding most of the collector region 9 is the collector electrode 15.
[0032]
In the power amplifier of this embodiment, the basic HBT used in the second amplifier circuit is a circular ring-shaped emitter HBT as shown in FIG. 9 as a representative example. An HBT having an emitter shape which is a shape and a base electrode existing only inside the emitter which is a part of this annular shape may be used.
[0033]
Further, a polygonal emitter shape HBT shown in FIG. 11 may be used. The example in FIG. 11 is specifically a quadrangle, but other polygons may be used. The arrangement of each part of the HBT is the same as in the example of FIG.
[0034]
That is, in the basic HBT used in the second amplifier circuit, the emitter has a ring shape, a partial ring shape, or a polygonal shape, and the base electrode exists only inside the emitter region. Good.
[0035]
Further, in the power amplifier of the present embodiment, the case where the first amplifier circuit 2 is the driver stage and the second amplifier circuit 3 is the output stage has been described. However, as shown in FIG. In the stage, the second amplifier circuit 3 has the same effect even in the driver stage. However, in this case, the number of parallel basic HBTs used in each amplifier circuit needs to be adjusted.
[0036]
In addition, although an InGaP emitter HBT is shown as an example of a bipolar transistor used in the power amplifier of the present embodiment, in the present invention, a wide range of other materials such as an AlGaAs emitter HBT, an InP emitter HBT using an InP substrate, and an InGaAlAs emitter HBT may be used. HBT can be used.
[0037]
The amplifier circuit 2 and the amplifier circuit 3 may be formed on the same semiconductor substrate. Further, the matching circuits 4a, 4b, and 4c are also formed on the substrate on which the amplifier circuit 2 and the amplifier circuit 3 are formed. Is also good.
[0038]
<Embodiment 2>
Using this example, a method of manufacturing a power amplifier will be described with reference to the drawings.
[0039]
FIGS. 13A to 14H are cross-sectional views of an apparatus showing a method of manufacturing a power amplifier according to manufacturing steps. This example is an example of a two-stage power amplifier. In the figure, reference numerals 24 and 25 indicate a portion where the first amplifier circuit is formed and a portion where the second amplifier circuit is formed, respectively. Hereinafter, the basic HBT will be mainly described. In this example, the basic HBT used for the first amplifier circuit has a rectangular emitter shape HBT, and the basic HBT used for the second amplifier circuit has a ring emitter shape HBT.
[0040]
First, on a semi-insulating GaAs substrate 19, an n-type GaAs sub-collector layer (Si concentration 5 × 10 ¹⁸ cm ⁻³ , thickness 0.6 μm) 10 and an n-type GaAs collector layer (Si concentration 1 × 10 ¹⁶ cm) ^-3 , thickness 0.8 μm) 9, p-type GaAs base layer (C concentration 4 × 10 ¹⁹ cm ⁻³ , thickness 90 nm) 8, n-type InGaP emitter layer (InP molar ratio 0.5, Si concentration 3 ×) 10 ¹⁷ cm ⁻³ , film thickness 30 nm) 7, n-type InGaAs emitter contact layer (InAs molar ratio 0.5, Si concentration 1 × 10 ¹⁹ cm ⁻³ , film thickness 0.2 μm) 18 were formed by metalorganic vapor phase epitaxy. It grows by the method (FIG. 13A).
[0041]
Thereafter, WSi (Si molar ratio 0.3, film thickness 0.3 μm) 12 is deposited on the entire surface of the wafer by high frequency sputtering (FIG. 13B), and the WSi layer is formed by photolithography and CF ₄ . Processing is performed by dry etching to form the emitter electrode 12 (FIG. 13C).
[0042]
Thereafter, the n-type InGaAs emitter contact layer 18 and the n-type InGaP emitter layer 7 are processed into desired shapes to form an emitter region (FIG. 13D). An example of the processing method is as follows. Unnecessary regions of the n-type InGaAs emitter contact layer 18 are removed by photolithography and wet etching using an etching solution (composition example of the etching solution: phosphoric acid: hydrogen peroxide solution: water = 1: 2: 40). Subsequently, unnecessary regions of the n-type InGaP emitter layer 7 are removed by wet etching using hydrochloric acid.
[0043]
Thereafter, a Ti (film thickness: 50 nm) / Pt (film thickness: 50 nm) / Au (film thickness: 200 nm) base electrode 13 is formed using a conventional lift-off method (FIG. 13E).
[0044]
Thereafter, the p-type GaAs base layer 8 is removed by photolithography and wet etching using an etchant (composition example of the etchant: phosphoric acid: hydrogen peroxide solution: water = 1: 2: 40) to remove the base region. Form. Further, etching is performed up to the n-type GaAs collector layer 9 to expose the n-type GaAs sub-collector layer 10 (FIG. 14F).
[0045]
Thereafter, the collector electrode 15 is formed by a usual lift-off method, and is alloyed at 350 ° C. for 30 minutes (FIG. 14G). The configuration of the collector electrode 15 is a laminate of AuGe (thickness: 60 nm) / Ni (thickness: 10 nm) / Au (thickness: 200 nm).
[0046]
Finally, isolation grooves 20 for element isolation are formed. Further, wirings for connecting the emitter electrodes, the base electrodes, and the collector electrodes between the basic HBTs are formed (FIG. 14H). Incidentally, the above-mentioned respective wirings are omitted from the drawings.
[0047]
Needless to say, the plane shape of each part of the HBT can be implemented in various forms as described in the first embodiment. Here, detailed description of this point is also omitted.
[0048]
<Embodiment 3>
In this example, an example of a power amplifier configured by combining various HBTs using the present invention will be described.
[0049]
FIG. 15 is a block diagram showing an example of a two-stage power amplifier. In the figure, reference numerals 2 and 3 are a first amplifier circuit and a second amplifier circuit, respectively. Reference numerals 4a, 4b, and 4c denote an input matching circuit, an interstage matching circuit, and an output matching circuit, respectively. The high frequency signal to be amplified is input to the present power amplifier from a terminal 22, amplified through the matching circuits 4 a, 4 b, 4 c and the amplifier circuits 2 and 3, and then output from a terminal 23.
[0050]
The first amplifying circuit 2 is formed by connecting the emitters HBT having a rectangular shape in plan view in six parallel as described in the first embodiment.
[0051]
The second amplifying circuit 3 is formed by connecting 28 emitters HBT having an annular shape or an HBT having an emitter which is a part of the annular shape in parallel as described in the first embodiment, and connecting a resistor in series with the base wiring 16. 17 is connected (FIG. 17). An example of this resistor is WSiN. Its resistance at room temperature is 10Ω. The resistor 17 may be introduced for each basic HBT as shown in FIG. In this case, the value of the WSiN resistor at room temperature is 280Ω. The resistance value of the WSiN resistor in the present embodiment is an example, and differs depending on the required specifications of the power amplifier.
[0052]
<Characteristics of the present invention>
The characteristics and effects obtained by the present invention will be described with reference to the drawings.
[0053]
18 and 19 show the characteristics of the power amplifier of the present invention and the characteristics of the related art, respectively, in comparison. The measurement conditions are a frequency of 1.9 GHz, a collector voltage of 3.4 V, and an ambient temperature in a range of −20 ° C. to + 85 ° C.
[0054]
FIG. 18 shows the relationship between the power gain and the output power of the conventional power amplifier. As shown in FIG. 18, when the ambient temperature changes in a range from -20 ° C. to + 85 ° C., the power gain changes by 3.3 dB. On the other hand, the relationship between the power gain and the output power of the power amplifier of the present invention is shown in FIG. As shown in FIG. 19, when the ambient temperature changes in a range from −20 ° C. to + 85 ° C., the power gain change is reduced to 2.9 dB. That is, according to the present invention, the temperature change of the power gain is improved by 0.4 dB.
[0055]
【The invention's effect】
The present invention can provide a high-performance power amplifier having a small temperature dependence of power gain. Further, according to another aspect of the present invention, it is possible to provide a method for manufacturing a high-performance power amplifier in which the temperature dependence of the power gain is small.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a power amplifier according to an embodiment of the present invention.
FIG. 2 is a circuit diagram showing an example of a first amplifier circuit of the power amplifier according to one embodiment of the present invention.
FIG. 3 is a plan view showing an example of a first amplifier circuit of the power amplifier according to one embodiment of the present invention.
FIG. 4 is a sectional view showing an example of a first amplifier circuit of the power amplifier according to one embodiment of the present invention;
FIG. 5 is a plan view showing an example of a basic HBT used in a first amplifier circuit of a power amplifier according to an embodiment of the present invention.
FIG. 6 is a circuit diagram showing an example of a second amplifier circuit of the power amplifier according to one embodiment of the present invention.
FIG. 7 is a plan view showing an example of a second amplifier circuit of the power amplifier according to one embodiment of the present invention.
FIG. 8 is a cross-sectional view of a device showing an example of a second amplifier circuit of the power amplifier according to one embodiment of the present invention.
FIG. 9 is a plan view showing an example of a basic HBT used in a second amplifier circuit of the power amplifier according to one embodiment of the present invention.
FIG. 10 is a plan view showing an example of a basic HBT used in a second amplifier circuit of the power amplifier according to one embodiment of the present invention.
FIG. 11 is a plan view showing an example of a basic HBT used in a second amplifier circuit of the power amplifier according to one embodiment of the present invention.
FIG. 12 is a block diagram illustrating an example of a power amplifier according to an embodiment of the present invention.
FIG. 13 is a sectional view of an apparatus showing a method of manufacturing a power amplifier according to an embodiment of the present invention in the order of steps.
FIG. 14 is a cross-sectional view of the apparatus showing, in the order of steps, steps following the step shown in FIG. 13 in the method of manufacturing the power amplifier according to one embodiment of the present invention.
FIG. 15 is a block diagram showing an example of a power amplifier according to another embodiment of the present invention.
FIG. 16 is a plan view showing an example of a second amplifier circuit of a power amplifier according to another embodiment of the present invention.
FIG. 17 is a plan view showing an example of a second amplifier circuit of the power amplifier according to another embodiment of the present invention.
FIG. 18 is a diagram illustrating a measurement result of temperature dependence of characteristics of a power amplifier having a conventional structure.
FIG. 19 is a diagram showing a measurement result of temperature dependence of characteristics of the power amplifier of the present invention.
FIG. 20 is a diagram showing a measurement result of the temperature dependence of the power gain of the single HBT.
FIG. 21 is a cross-sectional view illustrating the mounting of a representative power amplifier module.
FIG. 22 is a plan view illustrating the implementation of a representative power amplifier module.
[Explanation of symbols]
1: power amplifier, 2: first amplifier circuit, 3: second amplifier circuit, 4a: input matching circuit, 4b: interstage matching circuit, 4c: output matching circuit, 5: basic HBT, 6: basic HBT, 7: emitter layer, 8: base layer, 9: collector layer, 10: subcollector layer, 11: emitter wiring, 12: emitter electrode, 13: base electrode, 14: collector wiring, 15: collector electrode, 16: base wiring , 17: Resistor, 18: Emitter contact layer, 19: Semi-insulating GaAs substrate, 20: Temperature dependence of HBT power gain of single ring emitter, 21: Temperature dependence of HBT power gain of single rectangular emitter, 22: High, Wave signal input terminal, 23: high frequency signal output terminal, 24: first amplifier circuit formation region, 25: second amplifier circuit formation region.

Claims (16)

A first amplifier circuit configured by connecting at least one or more bipolar transistors in parallel and a second amplifier circuit configured by connecting at least one or more bipolar transistors in parallel; And
The bipolar transistor included in the first amplifier circuit is a bipolar transistor having a base electrode on both sides of an emitter electrode as a planar arrangement,
The bipolar transistor included in the second amplifier circuit has, as a planar arrangement, a portion in which a base electrode, an emitter electrode, and a collector electrode are sequentially arranged, and a portion in which the emitter electrode surrounds at least a part of the base electrode. A power amplifier module, comprising: a bipolar transistor. The emitter electrode of the bipolar transistor constituting the first amplifier circuit having a base electrode on both sides of the emitter electrode has a square planar shape, and includes a portion where a base electrode, an emitter electrode, and a collector electrode are sequentially arranged. And the emitter electrode of the bipolar transistor constituting the second amplifier circuit, wherein the emitter electrode has a portion surrounding at least a part of the base electrode, the emitter electrode has a space therein and at least a curved portion and a straight portion. Having a closed plane figure with any one of
The power amplifier module according to claim 1, wherein the base electrode is disposed in a space inside the emitter electrode in a plan view. The power amplifier module according to claim 1, wherein a planar shape of the base electrode of the bipolar transistor included in the first amplifier circuit is a quadrangle. The power amplifier module according to claim 2, wherein the planar shape of the base electrode of the bipolar transistor included in the first amplifier circuit is quadrangular. The power amplifier module according to claim 1, wherein the planar shape of the emitter electrode of the bipolar transistor included in the second amplifier circuit is annular. The power amplifier module according to claim 2, wherein the planar shape of the emitter electrode of the bipolar transistor included in the second amplifier circuit is annular. 2. The power amplifier module according to claim 1, wherein the planar shape of the emitter electrode of the bipolar transistor included in the second amplifier circuit is an annular part. 3. The power amplifier module according to claim 2, wherein the planar shape of the emitter electrode of the bipolar transistor included in the second amplifier circuit is a part of a ring. 2. The power amplifier module according to claim 1, wherein each of the first amplifier circuit and the second amplifier circuit is an amplifier circuit formed on a separate semiconductor substrate. 3. The power amplifier module according to claim 1, wherein each of the first amplifier circuit and the second amplifier circuit is an amplifier circuit formed on one semiconductor substrate. The power amplifier module according to claim 1, wherein the first amplifier circuit is a driver stage, and the second amplifier circuit is an output stage. The power amplifier module according to claim 1, wherein the second amplifier circuit is a driver stage, and the first amplifier circuit is an output stage. The power amplifier module according to claim 1, wherein the emitter layer of the bipolar transistor is at least one selected from the group consisting of InGaP, AlGaAs, InP, and InGaAlAs. The power amplifier module according to claim 1, wherein the base region of the second amplifier circuit is connected to a resistor having a negative temperature coefficient. The power amplifier module according to claim 2, wherein the base region of the second amplifier circuit is connected to a resistor having a negative temperature coefficient. Forming at least a collector semiconductor layer on the semi-insulating substrate, a base semiconductor layer on the collector semiconductor layer, and an emitter semiconductor layer on the base semiconductor layer; Forming an emitter electrode of a desired shape on a layer, processing the emitter semiconductor layer into a mesa shape to form an emitter region, forming a base electrode on the base semiconductor layer, Forming a base region by processing the layer into a mesa shape having a region including the emitter region in a planar region, and forming a collector electrode, and forming the emitter electrode and the base electrode. In the processing process,
Processing the bipolar transistor region of the first amplifier circuit as a planar arrangement of electrodes having base electrodes on both sides of the emitter electrode;
The bipolar transistor region of the second amplifier circuit has, as a planar arrangement, a portion in which a base electrode, an emitter electrode, and a collector electrode are sequentially arranged, and the emitter electrode is at least a part of the base electrode. A method for manufacturing a power amplifier module, characterized in that processing is performed in an arrangement in which the electrodes having a portion surrounding the electrodes are arranged in a plane.

Images