JP2004255651A - Thermal head, its driving method, and thermal printer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thermal head easily applied to high-speed recording and having an improved productivity, and to provide its driving method and a thermal printer. <P>SOLUTION: The thermal head includes a plurality of heating elements R1-R256 arranged in an array, shift resistors Sa and Sb comprising shift register cells of the same bit number as those of the heating elements R1-R256, and switching elements SW1-SW256 disposed between the heating elements R1-R256 and the shift resistors Sa, Sb for controlling energization to the heating elements on the basis of image data inputted in the shift registers Sa and Sb. A plurality of the shift resistors are arranged so that a plurality of shift register cells are assigned to each of the heating elements R1-R256. Image data of the present line is inputted to the shift register different from the shift resistor to which image data of a previous line is inputted. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

【００２６】
前記選択回路Ｂは、外部からのラッチ信号（ＬＡＴ）がフリップフロップ回路に入力されると、フリップフロップ回路に設けられた出力端子Ｑ１，Ｑ２からの出力信号が各ロジックゲート回路へ入力され、該出力信号に基づいて２列のシフトレジスタＳａ，Ｓｂのいずれか一方のシフトレジスタが選択され、該選択されたシフトレジスタ内の画像データがラッチＬ１〜Ｌ２５６に転送されるようになっている。
【００２７】
具体的には、本形態において、前記選択回路Ｂは、フリップフロップ回路からの出力信号が出力端子Ｑ１側でハイレベル、出力端子Ｑ２側でローレベルの時、シフトレジスタＳａを選択し、一方、上記出力信号が出力端子Ｑ１側でローレベル、出力端子Ｑ２側でハイレベルの時、シフトレジスタＳｂを選択するようになっている。また、上記出力信号はラッチ信号の入力毎にハイ・ローが交互に反転するため、選択回路Ｂによって選択されるシフトレジスタはライン毎に交互に入れ替わることとなる。
【００２８】
次に、上述したサーマルヘッドを用いてサーマルプリンタを構成する場合について、図３を用いて詳細に説明する。図３は、サーマルプリンタの構成を示す概略図であり、同図に示すサーマルプリンタは、大略的に上述のサーマルヘッドＴと、現ラインの画像データを、前ラインの画像データと異なるシフトレジスタに入力するための制御手段Ｃとで構成されている。
【００２９】
前記制御手段Ｃは、ＣＰＵ（中央処理装置）と、該ＣＰＵに接続されるパラレル形式の画像データをシリアル形式に変換するためのパラレル・シリアル変換回路Ｃａ，Ｃｂ（Ｃａは奇数ライン用、Ｃｂは偶数ライン用）と、該パラレル・シリアル変換回路Ｃａ，Ｃｂの駆動を制御する制御信号やサーマルヘッドＴに供給されるクロック信号（ＣＬＫ１，ＣＬＫ２）、ラッチ信号（ＬＡＴ）、ストローブ信号（ＳＴＢ）等、種々の信号を発生するための信号発生回路Ｓと、を備えた構造を有している。
【００３０】
前記ＣＰＵは、その内部に画像データが入力されるメモリを有しており、かかるメモリに、例えば１ページ分のパラレル形式の画像データが入力されると、該画像データを奇数ライン・偶数ラインを判別し、これらの画像データを奇数ライン・偶数ライン毎にパラレル・シリアル変換回路Ｃａ，Ｃｂに交互に振り分けて送信する作用を為す。
【００３１】
また前記ＣＰＵは、外部メモリ等に格納される制御プログラムに基づいて、信号発生回路Ｓに対して制御信号やクロック信号（ＣＬＫ１，ＣＬＫ２）、ラッチ信号（ＬＡＴ）、ストローブ信号（ＳＴＢ）等の信号を所定のタイミングで発生させる作用を為す。
【００３２】
一方、前記パラレル・シリアル変換回路Ｃａ，Ｃｂは、フリップフロップ回路やゲート回路等を組み合わせて構成された電気回路から成り、奇数ライン用のパラレル・シリアル変換回路Ｃａが奇数ライン用のシフトレジスタＳａに、偶数ライン用のパラレル・シリアル変換回路Ｃｂが偶数ライン用のシフトレジスタＳｂにそれぞれ接続されている。
【００３３】
このようなパラレル・シリアル変換回路Ｃａ，Ｃｂは、信号発生回路Ｓからの制御信号が入力されると、その内部に格納されたパラレル形式の画像データをシリアル形式に変換するとともに、該変換した画像データを信号発生回路Ｓからのクロック信号に同期させてサーマルヘッドＴに向けて送信するようになっており、かかる動作は、奇数ライン用・偶数ライン用のパラレル・シリアル変換回路Ｃａ，Ｃｂで交互に行われるため、これによって前ライン（例えば奇数ライン）の画像データと現ライン（例えば偶数ライン）の画像データとで入力されるシフトレジスタが異なることとなる。
【００３４】
そして前記信号発生回路Ｓは、上述のＣＰＵやパラレル・シリアル変換回路Ｃａ，Ｃｂ、サーマルヘッドＴに対して接続されており、制御信号や、奇数ライン用のクロック信号（ＣＬＫ１）、偶数ライン用のクロック信号（ＣＬＫ２）、ラッチ信号（ＬＡＴ）、ストローブ信号（ＳＴＢ）等の種々の信号を所定のタイミングでパラレル・シリアル変換回路Ｃａ，ＣｂやサーマルヘッドＴに供給することで、パラレル・シリアル変換回路Ｃａ，ＣｂやサーマルヘッドＴの駆動を制御する作用を為す。
【００３５】
かくして前記制御手段Ｃは、外部よりＣＰＵ内のメモリに入力されたパラレル形式の画像データをＣＰＵの駆動によって奇数ライン、偶数ラインに分けてパラレル・シリアル変換回路Ｃａ，Ｃｂに送信するとともに、該送信された画像データを信号発生回路Ｓからの制御信号のタイミングでパラレル形式からシリアル形式に変換し、該変換した画像データをパラレル・シリアル変換回路Ｃａ，ＣｂよりサーマルヘッドＴのシフトレジスタに対して奇数ライン、偶数ラインで別々のシフトレジスタに入力し、これによって画像データを前ラインと現ラインとで異なるシフトレジスタに入力されることとなり、画像データの総入力時間が大幅に短縮され、高速記録に対応可能な高性能のサーマルヘッド及びサーマルプリンタが実現される。
【００３６】
次に、上述したサーマルヘッドを用いて印画を行う場合について図４のタイミングチャートを参照しながら説明する。
【００３７】
まず、上述した制御手段Ｃの作用により、２列のシフトレジスタＳａ，Ｓｂのうち、一方のシフトレジスタＳａに第１ラインの画像データを奇数ライン用のクロック信号（ＣＬＫ１）に同期させて１ビットずつ順番に入力するとともに、該入力された画像データをシフトレジスタセルＳａ１〜Ｓａ２５６間でシリアル転送することによって各シフトレジスタセルＳａ１〜Ｓａ２５６に画像データを格納する。
【００３８】
一方、第１ラインの画像データ入力中に、制御手段Ｃの作用により、次ライン（第２ライン）の画像データを他方のシフトレジスタＳｂに偶数ライン用のクロック信号（ＣＬＫ２）に同期させて１ビットずつ順番に入力する。
【００３９】
このように、前ライン（第１ライン）の画像データ入力中に、現ライン（第２ライン）の画像データを他方のシフトレジスタＳｂに入力したことから、画像データの総入力時間が大幅に短縮され、高速記録に対応可能な高性能のサーマルヘッド及びサーマルプリンタが実現される。
【００４０】
次に、第２ラインの画像データ入力中に、先に述べた第１ラインの画像データの入力が完了し、該入力完了と略同時に制御手段Ｃよりラッチ信号（ＬＡＴ）が選択回路Ｂ及びラッチＬ１〜Ｌ２５６に入力される。そして、前記選択信号Ｂは、ラッチ信号（ＬＡＴ）のタイミングで第１ライン（奇数ライン）の画像データを格納したシフトレジスタＳａを選択し、その内部の画像データをラッチＬ１〜Ｌ２５６にパラレルに転送するようになっている。
【００４１】
このように、選択回路Ｂによって画像データをシフトレジスタに対して入力完了すると略同時に、その画像データをラッチへ転送したことから、画像データの転送時間が短縮化され、サーマルヘッド並びにサーマルプリンタの印画速度を更に高速に成すことができる。
【００４２】
次に、制御手段Ｃからのストローブ信号（ＳＴＢ）がスイッチング素子ＳＷ１〜ＳＷ２５６に供給され、ラッチＬ１〜Ｌ２５６に保持された第１ラインの画像データに基づいてスイッチング素子のオン・オフが制御され、これによって各発熱素子Ｒ１〜Ｒ２５６への通電が選択的に行われ、第１ラインの印画が行われる。
【００４３】
続いて、第３ラインの画像データを奇数ライン用のクロック信号（ＣＬＫ１）に同期させてシフトレジスタＳａに１ビットずつ順番に入力する。一方、この第３ラインの画像データ入力中に、先に述べた第２ラインの画像データの入力が完了し、それと略同時に選択回路Ｂが第２ラインの画像データを格納したシフトレジスタＳｂを選択し、その内部の画像データがラッチＬ１〜Ｌ２５６にパラレルに取り込まれる。
【００４４】
そして、スイッチング素子ＳＷ１〜ＳＷ２５６の駆動によりラッチＬ１〜Ｌ２５６内に格納された第２ラインの画像データに基づいて各発熱素子Ｒ１〜Ｒ２５６への通電が制御され、これによって第２ラインの印画が行われる。
【００４５】
続いて、第４ラインの画像データを偶数ライン用のクロック信号（ＣＬＫ２）に同期させてシフトレジスタＳｂに１ビットずつ順番に入力し、かかる第４ラインの画像データ入力中に、先に述べた第３ライン（奇数ライン）の画像データの入力が完了し、そのデータに基づいて第３ラインの印画が行われる。
【００４６】
かくして、上述したサーマルヘッドは、画像データを２列のシフトレジスタＳａ，Ｓｂにライン毎に交互に入力し、該入力完了したシフトレジスタを選択回路Ｂによって選択するとともに、該選択されたシフトレジスタ内の画像データに基づいて発熱素子Ｒ１〜Ｒ２５６への通電を制御することによって印画が行われる。
【００４７】
本発明は、上述の実施形態に限定されるものではなく、本発明の要旨を逸脱しない範囲において種々の変形、改良が可能である。
【００４８】
例えば、上述の実施形態においては、シフトレジスタを２列設けるようにしたが、これに代えて、シフトレジスタを３列以上設けるようにしても良い。
【００４９】
また、上述の実施形態においては、選択回路Ｂをシフトレジスタとラッチとの間に設けるようにしたが、これに代えて、図５に示す如く、選択回路Ｂをラッチとスイッチング素子との間に設けるようにしても良い。この場合、ラッチをシフトレジスタと同様にＮ列（上述の実施形態においてはＮ＝２）設けるとともに、選択回路Ｂがストローブ信号のタイミングで、２列のラッチ（Ｌａ，Ｌｂ）のいずれか一方のラッチを選択する形となる。また、ラッチ（Ｌａ，Ｌｂ）を２列配設する場合、２列のシフトレジスタＳａ，Ｓｂに対しては奇数ラインの画像データ及び偶数ラインの画像データを同時に入力することができ、これによってクロック信号線を一本で済ませることが可能となる。このようなサーマルヘッドは具体的には図６に示すタイミングチャートのように駆動される。
【００５０】
更に、上述の実施形態において、１ライン分の画像データを複数に分割し、１列のシフトレジスタに対して複数箇所から画像データを入力する“多入力方式”を採用しても良く、この場合、画像データの入力時間を更に短縮することができ、より高レベルの高速印画要求に応えることができる。
【００５１】
【発明の効果】
本発明によれば、列状に配列される複数の発熱素子と、該発熱素子と同一ビット数のシフトレジスタセルから成るシフトレジスタと、前記発熱素子とシフトレジスタとの間に配設され、該シフトレジスタ内に入力された画像データに基づいて前記発熱素子への通電を制御するスイッチング素子と、を備えたサーマルヘッドにおいて、各発熱素子に対してＮ個のシフトレジスタセルが割り当てられるように前記シフトレジスタをＮ列配設するとともに、現ラインの画像データを、前ラインの画像データが入力されたシフトレジスタと異なるシフトレジスタに対して入力させたことから、前ラインの画像データ入力中に、現ライン分の画像データを他のシフトレジスタに入力させることができる。それ故、画像データの総入力時間が大幅に短縮され、高速記録に対応可能な高性能のサーマルヘッド及びサーマルプリンタが実現される。
また本発明によれば、現ラインの画像データの入力が完了したシフトレジスタを選択する選択回路を設け、該選択回路によって選択されたシフトレジスタ内の画像データを前記スイッチング素子側へ転送することにより、画像データの転送時間を短縮化し、サーマルプリンタの印画速度を更に高速に成すことができる。
【図面の簡単な説明】
【図１】本発明のサーマルヘッドにかかる一実施形態を示す等価回路図である。
【図２】図１のサーマルヘッドを構成するヘッド駆動用ＩＣの等価回路図である。
【図３】図１のサーマルヘッドを組み込んで構成されるサーマルプリンタのブロック図である。
【図４】図１のサーマルヘッドを用いて印画動作を行う際のタイミングチャートである。
【図５】本発明のサーマルヘッドかかる他の実施形態におけるヘッド駆動用ＩＣの等価回路図である。
【図６】図５のサーマルヘッドを用いて印画動作を行う際のタイミングチャートである。
【符号の説明】
Ｒ１〜Ｒ２５６・・・発熱素子
Ｄ１〜Ｄ４・・・ヘッド駆動用ＩＣ
Ｂ・・・選択回路
Ｓａ、Ｓｂ・・・シフトレジスタ
Ｓａ１〜Ｓａ２５６，Ｓｂ１〜Ｓｂ２５６・・・シフトレジスタセル
Ｌ１〜Ｌ２５６，Ｌａ１〜Ｌａ２５６，Ｌｂ１〜Ｌｂ２５６・・・ラッチ
ＳＷ１〜ＳＷ２５６・・・スイッチング素子
Ｃ・・・制御手段
Ｃａ，Ｃｂ・・・パラレル・シリアル変換回路
Ｓ・・・信号発生回路[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a thermal head used as a recording device such as a facsimile or a video printer, a driving method thereof, and a thermal printer including the thermal head.
[0002]
[Prior art]
Conventionally, a thermal head has been used as a recording device such as a facsimile or a video printer.
[0003]
Such a conventional thermal head includes a plurality of heating elements arranged in a straight line, and a plurality of head driving ICs for controlling the heat generation of these heating elements. A shift register formed by serially connecting the above shift register cells, a plurality of switching elements corresponding one-to-one with the heating elements, and the like are integrated in a block corresponding to the head driving IC in a one-to-one correspondence. I have.
[0004]
In a shift register of such a head driving IC, during a printing operation, external image data is serially supplied for each printing line in synchronization with a clock signal, and these image data are switched. By transferring the heat to the element and selectively turning on and off the switching element based on the image data, the heating element is selectively energized, and the heat is transferred to a recording medium such as thermal paper to transfer the heat to the recording medium. A predetermined print is formed.
[0005]
[Patent Document 1]
JP-A-62-35759 [0006]
[Problems to be solved by the invention]
In the thermal head described above, the shift register cells are provided in one-to-one correspondence with the heating elements. Is input to all the shift register cells, and the input image data must be transferred to the switching elements before the next line of image data can be input to the shift register. Therefore, there is a problem that it is difficult to respond to recent demands for high-speed printing.
[0007]
Also, in order to meet the demand for high-speed printing, a multi-input type thermal head has been proposed in which one line of image data is divided into a plurality of parts and the divided image data is input from a plurality of locations. Even with the head, it was difficult to meet the demand for higher-speed printing.
[0008]
The present invention has been made in view of the above problems, and an object of the present invention is to provide a high-performance thermal head which can easily cope with high-speed recording, a driving method thereof, and a thermal printer.
[0009]
[Means for Solving the Problems]
The thermal head of the present invention is provided with a plurality of heating elements arranged in a row, a shift register including shift register cells having the same number of bits as the heating elements, and disposed between the heating element and the shift register. A switching element for controlling energization of the heating elements based on image data input to the shift register, wherein N (N is a natural number of 2 or more) N elements for each heating element. The shift registers are arranged in N columns so that shift register cells are allocated, and the image data of the current line is input to a shift register different from the shift register to which the image data of the previous line is input. It is assumed that.
[0010]
Further, in the thermal head of the present invention, the selection circuit for selecting the shift register in which the input of the image data is completed and transferring the image data in the selected shift register to the switching element side includes the switching element and the shift register. It is characterized by being provided between.
[0011]
Further, in the method of driving a thermal head according to the present invention, a plurality of heating elements arranged in a row, a shift register including shift register cells having the same number of bits as the heating elements, and a shift register between the heating elements and the shift register are provided. And a switching element for controlling energization of the heating element based on image data input to the shift register, wherein N switching elements (N is 2 or more) are provided for each heating element. (N is a natural number), and the shift registers are arranged in N columns so that the heating element is designated as a shift register different from the shift register to which the image data of the previous line has been input. Step 1 of inputting image data of the current line to the register, and inputting the current line to the shift register designated in Step 1 After the input of the image data is completed, the shift register is selected, and the image data in the shift register is transferred to the switching element side. In step 2, the switching element is selected based on the image data transferred to the switching element side. It is driven to generate heat through step 3 of controlling energization of the heating element.
[0012]
Still further, the method of driving a thermal head according to the present invention is characterized in that during input of image data of the previous line, image data of the current line is input to a shift register different from that of the previous line.
[0013]
The thermal printer of the present invention includes the above-described thermal head, and control means for inputting the image data of the current line to a shift register different from the shift register to which the image data of the previous line has been input. It is characterized by the following.
[0014]
According to the present invention, a plurality of heating elements arranged in a row, a shift register including a shift register cell having the same bit number as the heating element, and a shift register disposed between the heating element and the shift register, A switching element for controlling energization of the heating elements based on image data input into the shift register, wherein the N shift register cells are allocated to each heating element in the thermal head. Since the shift registers are arranged in N columns and the image data of the current line is input to a shift register different from the shift register to which the image data of the previous line was input, during the input of the image data of the previous line, Image data for the current line can be input to another shift register. Therefore, the total input time of the image data is significantly reduced, and a high-performance thermal head and a high-performance thermal printer capable of coping with high-speed recording are realized.
[0015]
Further, according to the present invention, by providing a selection circuit for selecting a shift register for which the input of the image data of the current line is completed, transferring the image data in the shift register selected by the selection circuit to the switching element side. In addition, the transfer time of image data can be reduced, and the printing speed of the thermal printer can be further increased.
[0016]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 is an equivalent circuit diagram showing one embodiment of the thermal head of the present invention, and FIG. 2 is an equivalent circuit diagram of a head driving IC used in the thermal head of FIG. 1. The thermal head shown in FIG. Each of the heads includes a plurality of heating elements R1 to R256 and a plurality (four in the present embodiment) of head driving ICs (D1 to D4) for controlling heat generation of these heating elements R1 to R256. In the driving ICs (D1 to D4), N columns (N is a natural number of 2 or more, N = 2 in the present embodiment) for serially transferring image data for controlling energization to the heating elements R1 to R256 internally. ) Shift registers Sa and Sb are integrated in each head driving IC by M × N (M is a natural number of 2 or more, M is 64 in this embodiment) shift register cells.
[0017]
The heating elements R1 to R256 are linearly attached and arranged at a density of 160 to 600 dpi (dot per inch) on the upper surface of a substrate made of, for example, alumina ceramics or single crystal silicon, and each is made of tantalum nitride or the like. Since it is formed of an electric resistance material, when power from an external power supply is applied via switching elements (SW1 to SW256) in a head driving IC to be described later, it is necessary to form a print on a recording medium. It generates heat at an appropriate temperature, for example, at a temperature of 150 ° C to 400 ° C.
[0018]
On the other hand, the plurality of head driving ICs (D1 to D4) are arranged in a row on the substrate described above, and two rows of shift registers Sa, Sb, latches L1 to L256, switching elements SW1 to SW256, and the like are integrated, and a selection circuit B is provided between two rows of shift registers Sa and Sb and latches L1 to L256.
[0019]
The two rows of shift registers Sa and Sb are configured by serially connecting shift register cells Sa1 to Sa256 and Sb1 to Sb256 having the same number of bits as the heating elements R1 to R256. Two shift register cells are assigned to each heating element by the shift registers Sa and Sb.
[0020]
The shift registers Sa and Sb input serial image data to internal shift register cells Sa1 to Sa256 and Sb1 to Sb256 one bit at a time in synchronization with clock signals (CLK1 and CLK2). Are serially transferred between the shift register cells Sa1 to Sa256 and Sb1 to Sb256 to store respective image data in predetermined shift register cells Sa1 to Sa256 and Sb1 to Sb256.
[0021]
The latches L1 to L256 are for temporarily holding the image data stored in the shift register cells Sa1 to Sa256 and Sb1 to Sb256, and the latch signals (LAT) are latched by the latches L1 to L256. When supplied to the selection circuit B, of the image data stored in the shift registers Sa and Sb, the image data stored in one of the shift registers selected by the selection circuit B is simultaneously and in parallel with the selection circuit. Taken through B.
[0022]
The switching elements SW1 to SW256 are configured such that the output side of the AND gate is connected to a switching transistor. When the strobe signal (STB) is supplied to the AND gate, the switching elements SW1 to SW256 convert the image data held in the latches L1 to L256. On / off of the switching transistor is controlled based on the switching, and power is supplied to each of the heating elements R1 to R256.
[0023]
Then, between the shift registers Sa and Sb and the latches L1 to L256, one of the two rows of shift registers Sa and Sb is selected at the timing of the latch signal (LAT) and stored in the selected shift register. A selection circuit B for transferring the image data to the latches L1 to L256 is provided.
[0024]
The selection circuit B includes a plurality of logic gate circuits configured by inputting outputs of a pair of AND gates to an OR gate, and a pair of output terminals Q1 and Q1 commonly connected to one of the AND gates of each logic gate circuit. And a flip-flop circuit having Q2. However, Q1 and Q2 are defined as in the following equations.
[0025]
(Equation 1)

[0026]
When the external latch signal (LAT) is input to the flip-flop circuit, the selection circuit B receives output signals from output terminals Q1 and Q2 provided in the flip-flop circuit, and inputs the output signals to the respective logic gate circuits. One of the two rows of shift registers Sa and Sb is selected based on the output signal, and the image data in the selected shift register is transferred to the latches L1 to L256.
[0027]
Specifically, in this embodiment, the selection circuit B selects the shift register Sa when the output signal from the flip-flop circuit is at a high level on the output terminal Q1 side and at a low level on the output terminal Q2 side. When the output signal is at a low level on the output terminal Q1 side and at a high level on the output terminal Q2 side, the shift register Sb is selected. Since the output signal alternates between high and low each time the latch signal is input, the shift register selected by the selection circuit B is alternately switched for each line.
[0028]
Next, a case where a thermal printer is configured using the above-described thermal head will be described in detail with reference to FIG. FIG. 3 is a schematic diagram showing the configuration of a thermal printer. In the thermal printer shown in FIG. 3, the above-described thermal head T and the image data of the current line are stored in a shift register different from the image data of the previous line. And control means C for inputting.
[0029]
The control means C includes a CPU (Central Processing Unit) and parallel / serial conversion circuits Ca and Cb (Ca is for odd lines, Cb is Control signals for controlling the driving of the parallel / serial conversion circuits Ca and Cb, clock signals (CLK1 and CLK2) supplied to the thermal head T, latch signals (LAT), strobe signals (STB), and the like. , And a signal generation circuit S for generating various signals.
[0030]
The CPU has a memory into which image data is input. When parallel image data of, for example, one page is input to the memory, the CPU converts the image data into odd lines and even lines. The image data is discriminated, and the image data is alternately distributed to the parallel / serial conversion circuits Ca and Cb for each odd-numbered line and even-numbered line, and transmitted.
[0031]
Further, the CPU sends a signal such as a control signal, a clock signal (CLK1, CLK2), a latch signal (LAT), a strobe signal (STB) to the signal generation circuit S based on a control program stored in an external memory or the like. At a predetermined timing.
[0032]
On the other hand, the parallel-to-serial conversion circuits Ca and Cb are composed of electric circuits formed by combining flip-flop circuits, gate circuits and the like, and the parallel-to-serial conversion circuit Ca for odd-numbered lines is connected to the shift register Sa for odd-numbered lines. , An even-numbered parallel-serial conversion circuit Cb is connected to the even-numbered line shift register Sb.
[0033]
When the control signal from the signal generation circuit S is input, the parallel-to-serial conversion circuits Ca and Cb convert the parallel image data stored therein into the serial format, and convert the converted image data. The data is transmitted to the thermal head T in synchronization with the clock signal from the signal generation circuit S. This operation is alternately performed by the parallel / serial conversion circuits Ca and Cb for the odd lines and the even lines. Therefore, the shift register to be input differs between the image data of the previous line (for example, the odd line) and the image data of the current line (for example, the even line).
[0034]
The signal generation circuit S is connected to the CPU, the parallel / serial conversion circuits Ca and Cb, and the thermal head T. The signal generation circuit S controls a control signal, a clock signal (CLK1) for odd lines, and a clock signal for even lines. By supplying various signals such as a clock signal (CLK2), a latch signal (LAT), and a strobe signal (STB) to the parallel / serial conversion circuits Ca and Cb and the thermal head T at a predetermined timing, a parallel / serial conversion circuit is provided. It functions to control the driving of Ca, Cb and the thermal head T.
[0035]
Thus, the control means C divides the parallel image data inputted from the outside into the memory in the CPU into odd-numbered lines and even-numbered lines by driving the CPU, and transmits the divided lines to the parallel / serial conversion circuits Ca and Cb. The converted image data is converted from the parallel format to the serial format at the timing of the control signal from the signal generation circuit S, and the converted image data is supplied to the shift register of the thermal head T by the parallel / serial conversion circuits Ca and Cb. Lines and even lines are input to separate shift registers, which causes image data to be input to different shift registers for the previous line and the current line, greatly reducing the total input time of image data and achieving high-speed printing. A compatible high-performance thermal head and thermal printer are realized.
[0036]
Next, a case where printing is performed using the above-described thermal head will be described with reference to a timing chart of FIG.
[0037]
First, the image data of the first line is synchronized with the clock signal (CLK1) for the odd-numbered line by one shift register Sa of the two columns of the shift registers Sa and Sb by the operation of the control means C described above. Each of the shift register cells Sa1 to Sa256 stores the image data by serially transferring the input image data between the shift register cells Sa1 to Sa256.
[0038]
On the other hand, during the input of the image data of the first line, the image data of the next line (second line) is synchronized with the clock signal (CLK2) for the even line by the operation of the control means C to the other shift register Sb. Input in order bit by bit.
[0039]
Since the image data of the current line (second line) is input to the other shift register Sb during the input of the image data of the previous line (first line), the total input time of the image data is greatly reduced. As a result, a high-performance thermal head and thermal printer capable of high-speed recording are realized.
[0040]
Next, during the input of the image data of the second line, the input of the image data of the first line described above is completed, and almost simultaneously with the completion of the input, the latch signal (LAT) is supplied from the control means C to the selection circuit B and the latch. L1 to L256 are input. The selection signal B selects the shift register Sa storing the image data of the first line (odd line) at the timing of the latch signal (LAT), and transfers the internal image data to the latches L1 to L256 in parallel. It is supposed to.
[0041]
As described above, the image data is transferred to the latch almost simultaneously with the completion of the input of the image data to the shift register by the selection circuit B. Therefore, the transfer time of the image data is reduced, and the printing of the thermal head and the thermal printer is performed. The speed can be further increased.
[0042]
Next, a strobe signal (STB) from the control means C is supplied to the switching elements SW1 to SW256, and ON / OFF of the switching elements is controlled based on the image data of the first line held in the latches L1 to L256. As a result, power is selectively supplied to the heating elements R1 to R256, and printing of the first line is performed.
[0043]
Subsequently, the image data of the third line is sequentially input to the shift register Sa bit by bit in synchronization with the clock signal (CLK1) for the odd-numbered line. On the other hand, during the input of the image data of the third line, the input of the image data of the second line described above is completed, and almost simultaneously with this, the selection circuit B selects the shift register Sb storing the image data of the second line. Then, the internal image data is fetched in parallel into the latches L1 to L256.
[0044]
The energization of each of the heating elements R1 to R256 is controlled based on the image data of the second line stored in the latches L1 to L256 by driving the switching elements SW1 to SW256, thereby printing the second line. Is
[0045]
Subsequently, the image data of the fourth line is sequentially input one bit at a time to the shift register Sb in synchronization with the clock signal (CLK2) for the even-numbered lines. The input of the image data of the third line (odd line) is completed, and printing of the third line is performed based on the data.
[0046]
Thus, the above-described thermal head alternately inputs image data to the two rows of shift registers Sa and Sb line by line, selects the input completed shift register by the selection circuit B, and sets the selected shift register in the selected shift register. Printing is performed by controlling the energization of the heating elements R1 to R256 based on the image data.
[0047]
The present invention is not limited to the embodiments described above, and various modifications and improvements can be made without departing from the spirit of the present invention.
[0048]
For example, in the above embodiment, two rows of shift registers are provided. Alternatively, three or more rows of shift registers may be provided.
[0049]
In the above embodiment, the selection circuit B is provided between the shift register and the latch. Alternatively, as shown in FIG. 5, the selection circuit B is provided between the latch and the switching element. It may be provided. In this case, N columns (N = 2 in the above-described embodiment) are provided as in the case of the shift register, and the selection circuit B supplies one of the two columns of latches (La, Lb) at the timing of the strobe signal. It becomes a form to select the latch. When the latches (La, Lb) are arranged in two columns, odd-line image data and even-line image data can be simultaneously input to the two columns of shift registers Sa, Sb, thereby providing a clock. It is possible to use only one signal line. Such a thermal head is specifically driven as shown in the timing chart of FIG.
[0050]
Further, in the above-described embodiment, a “multi-input method” may be adopted in which one line of image data is divided into a plurality of parts and image data is input from a plurality of places to one row of shift registers. In addition, the input time of image data can be further reduced, and a higher level of high-speed printing request can be satisfied.
[0051]
【The invention's effect】
According to the present invention, a plurality of heating elements arranged in a row, a shift register including a shift register cell having the same bit number as the heating element, and a shift register disposed between the heating element and the shift register, A switching element for controlling energization of the heating elements based on image data input into the shift register, wherein the N shift register cells are allocated to each heating element in the thermal head. Since the shift registers are arranged in N columns and the image data of the current line is input to a shift register different from the shift register to which the image data of the previous line was input, during the input of the image data of the previous line, Image data for the current line can be input to another shift register. Therefore, the total input time of the image data is significantly reduced, and a high-performance thermal head and a high-performance thermal printer capable of coping with high-speed recording are realized.
Further, according to the present invention, by providing a selection circuit for selecting a shift register for which the input of the image data of the current line is completed, transferring the image data in the shift register selected by the selection circuit to the switching element side. In addition, the transfer time of image data can be reduced, and the printing speed of the thermal printer can be further increased.
[Brief description of the drawings]
FIG. 1 is an equivalent circuit diagram showing an embodiment according to a thermal head of the present invention.
FIG. 2 is an equivalent circuit diagram of a head driving IC constituting the thermal head of FIG. 1;
FIG. 3 is a block diagram of a thermal printer configured by incorporating the thermal head of FIG. 1;
FIG. 4 is a timing chart when a printing operation is performed using the thermal head of FIG. 1;
FIG. 5 is an equivalent circuit diagram of a head driving IC according to another embodiment of the thermal head of the present invention.
FIG. 6 is a timing chart when a printing operation is performed using the thermal head of FIG. 5;
[Explanation of symbols]
R1 to R256: heating elements D1 to D4: head driving IC
B: selection circuits Sa, Sb: shift registers Sa1 to Sa256, Sb1 to Sb256, shift register cells L1 to L256, La1 to La256, Lb1 to Lb256, latches SW1 to SW256, switching elements C: control means Ca, Cb: parallel-serial conversion circuit S: signal generation circuit

Claims (5)

A plurality of heating elements arranged in a row,
A shift register comprising a shift register cell having the same number of bits as the heating element; and a shift register disposed between the heating element and the shift register, and energizing the heating element based on image data input into the shift register. And a switching element for controlling the
The shift registers are arranged in N columns so that N (N is a natural number of 2 or more) shift register cells are assigned to each heating element, and the image data of the current line is input to the image data of the previous line. A thermal head characterized in that an input is made to a shift register different from the selected shift register. A selection circuit for selecting a shift register for which input of image data has been completed and transferring the image data in the selected shift register to the switching element side is provided between the switching element and the shift register. The thermal head according to claim 1, wherein: A plurality of heating elements arranged in a row,
A shift register comprising a shift register cell having the same number of bits as the heating element; and a shift register disposed between the heating element and the shift register, and energizing the heating element based on image data input into the shift register. And a switching element for controlling the
The shift registers are arranged in N rows so that N (N is a natural number of 2 or more) shift register cells are assigned to each heating element, and the heating elements are heated through the following steps 1 to 3 A method for driving a thermal head, comprising:
Step 1: Designating a shift register different from the shift register into which the image data of the previous line has been inputted, and inputting the image data of the current line to the designated shift register Step 2: Shift register designated in Step 1 After the input of the image data of the current line is completed, the shift register is selected, and the image data in the shift register is transferred to the switching element. Step 3: The image data transferred to the switching element in Step 2 Controlling the energization of the heating element by driving the switching element based on the 4. The method according to claim 3, wherein the image data of the current line is input to a shift register different from that of the previous line during the input of the image data of the previous line. A thermal head according to claim 1 or 2, and control means for inputting image data of a current line to a shift register different from a shift register to which image data of a previous line has been input. A thermal printer, characterized in that:

Images