JP2004235667A - Carrier metal foil with columnar pattern - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing process for a multilayer printed circuit board which has a high density and a high reliability of electrical connection between layers. <P>SOLUTION: By this process, columnar patterns which are to be electrical connection between layers parts are formed on one side of a carrier metal foil by electroplating in the subsequent process. The columnar patterns are embedded in an insulated substrate by superposing a first insulated substrate on the carrier metal foil by making the columnar patterns inside. A first circuit pattern is formed on the opposite side of the surface in which the columnar patterns of carrier metal foil are formed. While the first circuit pattern is embedded in a second insulated substrate by superposing the first insulated substrate on the second insulated substrate by making the first circuit pattern inside, the first and the second insulated substrates are unified. A second circuit pattern making a continuity with the columnar patterns is formed on the surface formed by the columnar patterns for connecting between layers and the first insulated substrate. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a multilayer wiring board.

  As a conventional method of manufacturing a multilayer wiring board, that is, an interlayer connection method, (1) a method of forming a hole through a wiring pattern and an insulating layer, and then metallizing the inside of the hole by plating or the like to obtain conduction between layers, (2) wiring After an insulating layer is formed on a pattern, a method of removing an insulating layer at a portion where interlayer connection is to be performed and then performing interlayer connection simultaneously with surface metallization is used.

  The method (1) is an interlayer connection method used in a general multilayer wiring board. However, since a drill is used to form a through hole, it is difficult to form a small diameter smaller than 200 μm. The positional accuracy is not sufficient at ± 30 μm or more.

  The method (2) is mainly used for forming a multilayer wiring of a semiconductor. Since the diameter of the interlayer connection portion and the hole positioning accuracy use a photomask alignment technique, the method (2) is one method compared to the method (1). Digit is better. However, in this method, the unevenness of the lower wiring pattern cannot be absorbed, and the uneven shape remains on the surface. This not only hinders further multilayering and surface mounting, but also hinders miniaturization of surface wiring. Further, in both of the above methods, since the diameter of the interlayer connection hole is minute, a smooth flow of the plating solution or the like cannot be obtained, and it is difficult to form a metal film having a sufficient thickness. This is a serious problem directly affecting the interlayer connection reliability. The present invention provides a method for manufacturing a multilayer wiring board having high density and high interlayer connection reliability.

  According to the first invention of the present application, (A1) a columnar pattern to be an interlayer connecting portion is formed on one side of a carrier metal foil in a post-process, and (B1) the columnar pattern is placed inside and superimposed on a first insulating base material. The columnar pattern is embedded in the first insulating base material, (C1) the carrier metal foil is processed into a desired first wiring pattern, and (D1) the second insulating base material with the first wiring pattern surface inside. And (E1) exposing the columnar pattern from the first insulating substrate side, and (F1) exposing the columnar pattern And forming a second wiring pattern that is electrically connected to the second wiring pattern.

  In the second invention of the present application, (A2) a metal thin film is formed on a flexible film base material, and (B2) a columnar pattern to be an interlayer connection part is formed on the metal thin film in a later step. And (E2) removing the film substrate to expose the metal thin film surface by embedding the columnar pattern in the first insulating substrate by superimposing the columnar pattern on the first insulating substrate with the columnar pattern inside, and (E2) A first wiring pattern including a metal thin film is formed, and (F2) the first wiring pattern surface is placed inside, the first wiring pattern is superimposed on the second insulating base material, and the first wiring pattern is embedded in the second insulating base material. (G2) exposing the columnar pattern from the first insulating substrate side, and (H2) forming a second wiring pattern electrically connected to the columnar pattern. Method of manufacturing multilayer wiring boards.

  According to the present invention, a multilayer wiring board having high density and high connection reliability can be manufactured.

  The first invention of the present application will be specifically described with reference to FIG. A resist film is formed on one surface of the carrier metal foil 1, and is patterned into a predetermined shape by a photolithographic method. Next, after forming a columnar pattern 2 to be an interlayer connecting portion in a later step by electroplating, the resist pattern is peeled off (FIG. 1A). In this way, a fine columnar pattern for interlayer connection having a diameter of about 50 μm can be formed with an accuracy of 10 μm or less. As a method for manufacturing a carrier metal foil with a columnar pattern, a resist pattern of a desired shape is formed on a metal foil having a predetermined thickness (columnar pattern thickness + carrier metal foil thickness), and a predetermined pattern is formed from the resist pattern surface. There is also a method of chemically etching to the depth. In this case, in order to reduce the variation in the thickness of the columnar pattern, a metal foil having a built-in thin metal layer having a different etching condition from the columnar pattern at a predetermined depth of the metal foil may be used. Next, the carrier metal foil 1 on which the columnar pattern 2 is formed is overlapped with the first insulating substrate 3 with the columnar pattern surface inside, and the columnar pattern is embedded in the insulating substrate 3. The columnar pattern can be easily embedded in the resin of the insulating base material 3 by thermocompression such as pressing (FIG. 1B). In this case, the thickness (FIGS. 1B and 1H) of the insulating film existing on the columnar pattern can be controlled by pressing conditions, the resin content of the first insulating base material, the melt viscosity, and the like. As a method of embedding the columnar pattern in the insulating base material, a viscous resin such as polyamide varnish may be applied on the columnar pattern and then cured by heating.

  Next, a resist film is formed on the surface opposite to the surface on which the columnar pattern of the carrier metal foil is formed, and this is patterned into a desired wiring shape by photolithography, and the first wiring pattern 4 is formed by chemical etching. Form. Thereafter, after the resist pattern is peeled off (FIG. 1C), the first wiring pattern is placed inside the second insulating base 5 by overlapping the first wiring pattern with the second insulating base 5 with the first wiring pattern inside. And the first and second insulating base materials are integrated (FIG. 1D).

  Thereafter, the columnar pattern 2 is exposed from the first insulating base material side, and the second wiring pattern 6 electrically connected to the columnar pattern on the surface formed by the interlayer connecting columnar pattern 2 and the first insulating base material 3. Is formed (FIG. 1E). In this case, in order to obtain good electrical connection with the second wiring pattern, the insulating layer (resin layer) on the columnar pattern is mechanically polished or removed and planarized by plasma etching, excimer laser irradiation, or the like. Is valid. The second wiring pattern may be formed by either an etching method or an additive method. For example, the entire flat surface formed by the columnar pattern 2 and the first insulating base material 3 is metallized to establish conduction with the columnar pattern 2, and this metal layer is patterned to form the second wiring pattern 6. Vacuum film formation techniques such as sputtering and vapor deposition can be applied to the surface metallization and the metallization for simultaneously performing interlayer connection. In this case, a thin film is formed. After forming a resist film on it, patterning, thickening by electroplating, removing the resist film, and etching away the originally formed metal thin film by a semi-additive method. Can be adopted. By employing the semi-additive method, the second wiring pattern 6 can have a wiring width of about 20 μm and a wiring thickness of about 20 μm.

  The second invention of the present application will be specifically described with reference to FIG. A metal thin film 8 having a thickness of submicron to several microns is formed on a flexible film substrate 7. As a method for forming a metal thin film, a vacuum film forming method such as sputtering or vapor deposition or an electroless plating method is suitable. The metal thin film 8 is not particularly limited, and a metal generally used in the field of wiring boards, such as nickel, can be applied. However, plating is easily deposited, and the film substrate 7 is easily removed in a later step. For this purpose, copper is most preferred as a metal having a low specific resistance and a low affinity for a film substrate. In this case, by suppressing the diffusion depth of copper into the film base to 30 nm or less, the film substrate and the copper thin film can be easily separated in a later step. As the film substrate, a normal polymer film can be used, but a stainless steel foil having a thickness of about 0.03 mm can also be used. When using a stainless steel foil, an interdiffusion layer is formed at the stainless steel foil / copper interface in the heating / pressing step in the pressing step. However, it is easy to suppress the interdiffusion layer to 0.03 μm or less. The stainless steel foil can be removed. Next, a resist film is formed on the metal thin film, and this is patterned into a predetermined shape by a photolithographic method. Next, after forming a columnar pattern 9 to be an interlayer connecting portion in a later step by electroplating, the resist pattern is peeled off (FIG. 2A). As a method of manufacturing a column-patterned film substrate, after forming a metal thin film on the film substrate, thickening to a predetermined thickness by electroplating or the like, forming a resist pattern of a desired shape on the thickened surface. There is also a method of chemically etching from the resist pattern surface. In this manner, a fine columnar pattern for interlayer connection having a diameter of about 100 μm can be formed with an accuracy of 10 μm or less. Next, the film substrate 7 on which the columnar pattern 9 is formed is overlapped with the first insulating substrate 10 with the columnar pattern surface inside, and the columnar pattern is embedded in the insulating substrate 10. The columnar pattern can be easily embedded in the resin of the insulating base material 10 by thermocompression bonding such as pressing (FIG. 2B). In this case, the thickness (FIGS. 2B and 2H) of the insulating film existing on the columnar pattern can be controlled by pressing conditions, the resin content of the first insulating base material, the melt viscosity, and the like.

  Next, the film base 7 is mechanically peeled to expose the metal thin film 8, a resist film is formed on the exposed metal thin film surface, and this is patterned into a desired wiring shape by photolithography, and electroplating is performed. The first wiring pattern 11 is formed by the method. Thereafter, the resist pattern is peeled off, and a desired region of the metal thin film 8 is removed by quick etching (FIG. 2C). One wiring pattern 11 is embedded in the second insulating base material 12, and the first and second insulating base materials are integrated (FIG. 2D). Thereafter, the columnar pattern 9 is exposed from the first insulating base material side, and a second wiring pattern 13 electrically connected to the columnar pattern is formed on the surface formed by the columnar pattern 9 and the first insulating base material 10. (FIG. 2 (e)). In this case, in order to obtain good electrical connection with the second wiring pattern, it is effective to mechanically polish the insulating layer on the columnar pattern, or remove and flatten the insulating layer by plasma etching, excimer laser irradiation, or the like. . The second wiring pattern may be formed by either an etching method or an additive method. For example, the entire flat surface formed by the columnar pattern 9 and the first insulating base material 10 is metallized to establish conduction with the columnar pattern 9, and this metal layer is patterned to form the second wiring pattern 13. Vacuum film formation technology such as sputtering or vapor deposition can be applied to metallization for simultaneously performing surface metallization and interlayer connection. Thus, a multilayer wiring board having high density and high interlayer connection reliability can be obtained.

Example 1
After a film resist (PHT 887AF, manufactured by Hitachi Chemical Co., Ltd.) having a thickness of 25 μm was formed on a copper foil having a thickness of 18 μm, the resist corresponding to the interlayer connection portion was removed by exposure and development. Next, after copper was plated by 23 μm by electroplating, the resist was removed with a stripping solution. Thereby, a columnar pattern for interlayer connection having a diameter of 60 μm and a thickness of 23 μm was formed. After the rust prevention treatment, a polyimide insulating film having a thickness of 30 μm was formed on the pattern surface of the copper foil with the columnar pattern. As a method for forming the polyimide insulating film, first, a polyamide varnish was applied by a roll coater and then imidized by two-stage heating (150 ° C., 30 minutes → 350 ° C., 120 minutes). Next, a predetermined resist pattern is formed on the opposite surface of the copper foil, and a desired portion of the copper foil is etched with an ammonium persulfate solution (concentration: 40 g / l, liquid temperature: 40 ± 3 ° C.) to form a line / space. An 85/85 μm wiring pattern was formed. After the resist pattern was removed, the wiring pattern was pressed inside, and the resultant was press-bonded to a glass cloth polyimide resin substrate via an adhesive polyimide prepreg. The pressing conditions are 40 kgf / cm ² and 170 ° C. for 120 minutes. Next, the polyimide layer existing on the columnar pattern was removed by mechanical polishing, and after washing and drying, a chromium and copper thin film were continuously formed by a sputtering apparatus (MLH 6315 type) manufactured by Japan Vacuum Engineering Co., Ltd. Table 1 shows the sputtering conditions.

  Then, a liquid resist (trade name: TF-20, manufactured by Shipley) is spin-coated on the copper thin film (coating condition: 300 rpm, 30 seconds → 700 rpm, 60 seconds), pre-heated at 85 ° C. for 20 minutes, and exposed. After exposure at 550 mJ, the resist pattern was developed with a dedicated developer to form a resist pattern having a line / space of 20/20 μm and a thickness of 18 μm. Next, after forming a copper wiring layer of 15 μm by electroplating, the resist pattern is removed with acetone, and a copper thin film is formed with an ammonium persulfate solution (concentration: 20 g / l, liquid temperature: 40 ± 3 ° C.), and then potassium ferricyanide The chromium thin films were each quick-etched with a mixed solution of potassium hydroxide and potassium hydroxide (concentration: potassium ferricyanide 300 g / l, potassium hydroxide 50 g / l, liquid temperature 40 ± 3 ° C.). As a result, a high-density wiring structure having a wiring width of 20 μm, a wiring thickness of 15 μm, an interlayer connection diameter of 60 μm, and containing two layers of wiring in a thickness of about 60 μm was formed. The connection reliability of this multilayer wiring board was good. The multilayer wiring board of the present invention is also effective when used on a multilayer wiring board formed by an ordinary method.

Example 2
A 1 μm thick copper thin film was formed on a 250 mm square polyimide film (product name: UPILEX S-type, manufactured by Ube Industries, Ltd., thickness: 50 μm) using a sputtering device (MLH 6315D type) manufactured by Japan Vacuum Engineering Co., Ltd. Formed. Table 2 shows the sputtering conditions.

Next, after a 25 μm-thick film resist (PHT 887AF, manufactured by Hitachi Chemical Co., Ltd.) layer was formed on the copper thin film, the resist corresponding to the interlayer connection portion was removed by exposure and development. Next, after copper was plated by 23 μm by electroplating, the resist was removed with a stripping solution. Thereby, a columnar pattern for interlayer connection having a diameter of 60 μm and a thickness of 23 μm was formed. After the rust prevention treatment, the resultant was press-pressed to the heat-fusible polyimide insulating film with the columnar pattern inside. The pressing conditions are a pressure of 40 kgf / cm ² and a temperature of 200 ° C. for 90 minutes. Next, the polyimide film was peeled off, a dry film resist was laminated on the exposed copper thin film surface, a predetermined resist pattern was formed by exposure and development, a wiring pattern was formed by electroplating, and the resist pattern was removed. Next, a desired portion of the copper thin film is quickly etched with an ammonium persulfate solution (concentration: 40 g / l, liquid temperature: 40 ± 3 ° C.) to form a wiring pattern having a line / space of 50/50 μm and a thickness of 25 μm. did. Next, with the wiring pattern on the inside, it was press-pressed to the glass cloth polyimide resin substrate via the polyimide prepreg for adhesion. The pressing conditions are 40 kgf / cm ² and 175 ° C. for 120 minutes. Next, the polyimide layer existing on the columnar pattern was removed by mechanical polishing, and after washing and drying, chromium and copper thin films were continuously formed by sputtering. Table 3 shows the sputtering conditions.

  After that, a liquid resist (trade name: TF-20, manufactured by Shipley) is applied on the copper thin film, pre-heated at 85 ° C. for 20 minutes, exposed at an exposure amount of 550 mJ, and developed with a special developing solution. A resist pattern having a space of 20/20 μm and a thickness of 18 μm was formed. Next, after forming a copper wiring layer of 15 μm by electroplating, the resist pattern is removed with acetone, and a copper thin film is formed with an ammonium persulfate solution (concentration: 20 g / l, liquid temperature: 40 ± 3 ° C.), and then potassium ferricyanide The chromium thin films were each quick-etched with a mixed solution of potassium hydroxide and potassium hydroxide (concentration: potassium ferricyanide 300 g / l, potassium hydroxide 50 g / l, liquid temperature 40 ± 3 ° C.). As a result, a high-density wiring structure in which a high-density two-layer wiring having an upper wiring density of 20/20 μm and a lower wiring of 50/50 μm was accommodated in a thickness of about 60 μm was formed. The connection reliability of this multilayer wiring board was good. The multilayer wiring board of the present invention is also effective when used on a multilayer wiring board formed by an ordinary method. In this case, the connection with the already formed wiring portion is based on, for example, a through-hole connection.

1 (a) to 1 (e) are partial cross-sectional views showing manufacturing steps of the first invention of the present application. 1 (a) to 1 (e) are partial cross-sectional views showing manufacturing steps of the second invention of the present application.

Explanation of reference numerals

1. 1. carrier metal foil 2. Columnar pattern First insulating base material4. First wiring pattern5. Second insulating substrate 6. 6. Second wiring pattern Film base material8. Metal thin film9. Columnar pattern10. First insulating substrate 11. First wiring pattern 12. Second insulating substrate 13. Second wiring pattern h. The thickness of the resin existing between the top of the columnar pattern and the surface of the first insulating substrate

Claims (4)

  Carrier metal foil, metal foil, the metal foil disposed between the carrier metal foil and the metal foil comprises a thin metal layer with different etching conditions, formed by etching the metal foil, A carrier metal foil with a columnar pattern formed with a columnar pattern for interlayer connection whose surface is rustproofed.   A carrier metal foil, a metal foil, and a thin metal layer having different etching conditions from the metal foil disposed between the carrier metal foil and the metal foil, and the thickness of the metal foil is reduced by the carrier metal. A carrier metal foil with a columnar pattern, formed by etching the metal foil and having a rust-preventive surface and a columnar pattern for interlayer connection, the thickness being greater than the thickness of the foil.   The carrier metal foil with a columnar pattern according to claim 1 or 2, wherein the thin metal layer is nickel.   The carrier metal foil with a columnar pattern according to any one of claims 1 to 3, wherein the thin metal layer is thinner than the metal foil or the carrier metal foil.

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