JP2004226792A - Driving method of plasma display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a driving method of a plasma display panel that is stably operable without being influenced by temperature of operational environment. <P>SOLUTION: This driving method is for the plasma display panel comprising discharge cells formed at intersections of scanning electrodes, sustaining electrodes and data electrodes. One field period is composed of multiple subfields having an initialization period, a writing period and a sustaining period. In the initialization period of at least one subfield, when applying a sloping waveform voltage to scanning electrodes to generate the discharge by all the discharge cells related to the image display, a final value of the sloping waveform voltage is controlled based on panel temperature. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for driving a plasma display panel used as an image display device such as a television receiver or an information display terminal.
[0002]
[Prior art]
FIG. 5 is a perspective view showing a main part of a conventional AC type plasma display panel (PDP). As shown in FIG. 5, a plurality of scan electrodes 2 and sustain electrodes 3 are provided in pairs on a front substrate 1 made of glass, and a dielectric layer 4 is provided so as to cover the scan electrodes 2 and the sustain electrodes 3. Is formed, and a protective layer 5 is formed on the dielectric layer 4. A plurality of data electrodes 8 covered with an insulator layer 7 are provided on a rear substrate 6 made of glass, and partitions 9 parallel to the data electrodes 8 are provided on the insulator layer 7 between the data electrodes 8. . Further, a phosphor layer 10 is provided on the surface of the insulator layer 7 and on the side surfaces of the partition walls 9, and the front substrate 1 and the rear substrate 6 are formed in a discharge space so that the scan electrodes 2 and the sustain electrodes 3 are orthogonal to the data electrodes 8. Are arranged facing each other. The discharge space is filled with, for example, a mixed gas of neon and xenon as a discharge gas.
[0003]
In this PDP, as shown in the electrode arrangement diagram of FIG. 6, m data electrodes D1 to Dm (data electrodes 8 in FIG. 5) are arranged in the column direction, and n scan electrodes are arranged in the row direction. SCN1 to SCNn (scan electrode 2 in FIG. 5) and sustain electrodes SUS1 to SUSn (sustain electrode 3 in FIG. 5) are arranged in pairs. Then, one discharge cell is formed at a portion where a pair of scan electrode SCNi and sustain electrode SUSi (i = 1 to n) and one data electrode Dj (j = 1 to m) intersect.
[0004]
The plasma display device using the PDP divides one field period of a video signal into a plurality of sub-fields having a luminance weight, and causes discharge in the discharge cells by the number of times corresponding to the luminance weight in each sub-field. . Then, a driving method of expressing a gradation of a video signal by combining subfields causing discharge is used, and an initializing discharge for initializing a state of charges in all discharge cells is gradual. A method has been proposed in which a weak discharge is generated by using a ramped lamp voltage to suppress unnecessary light emission and improve the contrast ratio (for example, see Patent Document 1).
[0005]
FIG. 7 is an operation drive timing chart showing an example of a conventional PDP driving method. One field period is composed of first to eighth subfields, and thereby, 256 gray scales are displayed. Each subfield includes an initializing period, a writing period, a sustaining period, and an erasing period. First, the operation in the first subfield will be described.
[0006]
As shown in FIG. 7, in the initialization period of the first subfield, all data electrodes D1 to Dm and all sustain electrodes SUS1 to SUSn are held at 0 (V), and all scan electrodes SCN1 to SCNn are Applies a ramp voltage that gradually rises from voltage Vp (V), which is lower than the discharge start voltage, to voltage Vr (V), which is higher than the discharge start voltage, to all sustain electrodes SUS1 to SUSn. While this ramp voltage rises, in all the discharge cells, the first weak initializing discharge occurs from scan electrodes SCN1 to SCNn to data electrodes D1 to Dm and sustain electrodes SUS1 to SUSn, respectively, and scan electrodes SCN1 to SCNn. Negative wall charges are accumulated on the top (the surface of the protective layer 5 on the scan electrodes SCN1 to SCNn), and the data electrodes D1 to Dm (the surface of the phosphor layer 10 on the data electrodes D1 to Dm) and the sustain electrodes Positive wall charges are accumulated on SUS1 to SUSn (the surface of protective layer 5 on sustain electrodes SUS1 to SUSn).
[0007]
Thereafter, all the sustain electrodes SUS1 to SUSn are maintained at the positive voltage Vh (V), and all the scan electrodes SCN1 to SCNn have a voltage Vg (V) which is lower than the discharge start voltage for all the sustain electrodes SUS1 to SUSn. , A ramp voltage gradually falling toward 0 (V) exceeding the discharge starting voltage is applied. While this ramp voltage falls, a second weak initializing discharge occurs again from the sustain electrodes SUS1 to SUSn to the scan electrodes SCN1 to SCNn in all the discharge cells, and the negative wall charges on the scan electrodes SCN1 to SCNn are generated again. And the wall voltage (positive voltage) due to the positive wall charge on sustain electrodes SUS1 to SUSn is weakened. On the other hand, the positive wall charges on the data electrodes D1 to Dm are kept as they are. Thus, the initialization operation in the initialization period ends. Due to the wall charges accumulated in this initialization operation, the voltage applied to each discharge cell is close to the discharge start voltage.
[0008]
In the address period of the first subfield, all the scan electrodes SCN1 to SCNn are held at Vs (V), and a scan pulse voltage 0 (V) is applied to the scan electrodes SCNi in order from the first row to the nth row. In each row, a positive write pulse voltage Vw (V) is applied to the data electrode Dj corresponding to the video signal. At this time, since the wall charges accumulated during the initialization period exist in each discharge cell, the data electrode Dj to which the address pulse voltage Vw (V) is applied and the scan electrode SCNi to which the scan pulse voltage 0 (V) is applied. In the discharge cell at the intersection with, a write discharge occurs between the data electrode Dj and the scan electrode SCNi and between the sustain electrode SUSi and the scan electrode SCNi, and a positive voltage is accumulated on the scan electrode SCNi, and the sustain electrode SUSi A negative voltage is accumulated on the upper side and the data electrode Dj. Thus, the writing operation in the writing period ends.
[0009]
In the sustain period of the first subfield, first, all the scan electrodes SCN1 to SCNn and the sustain electrodes SUS1 to SUSn are temporarily returned to 0 (V), and then all the scan electrodes SCN1 to SCNn and all the sustain electrodes SUS1 to SUS1 are changed. By alternately applying the positive sustain pulse voltage Vm (V) to SUSn, in the discharge cells in which the address discharge has occurred, the sustain discharge is generated between the scan electrode SCNi and the sustain electrode SUSi every time the sustain pulse is applied. appear. When a positive sustain pulse voltage Vm (V) is applied to all of the scan electrodes SCN1 to SCNn at the end of the sustain period, the sustain cell generates a sustain discharge between the scan electrode SCNi and the sustain electrode SUSi. Discharge occurs, and a negative voltage is accumulated on scan electrode SCNi and a positive voltage is accumulated on sustain electrode SUSi in the discharge cell. Thereafter, the sustain pulse voltage returns to 0 (V). Thus, the maintenance operation for the maintenance period is completed. An image is displayed by exciting the phosphor layer provided in each discharge cell with the ultraviolet light generated by the sustain discharge.
[0010]
In the erase period of the first subfield, when a ramp voltage gradually rising from 0 (V) to Ve (V) is applied to all the sustain electrodes SUS1 to SUSn, the sustain cells in the sustain cells that have undergone the sustain discharge are applied. A weak erase discharge occurs between the electrode SUSi and the scan electrode SCNi, and the negative voltage on the scan electrode SCNi and the positive voltage on the sustain electrode SUSi are weakened to stop the sustain discharge. Thus, the erase operation in the erase period is completed.
[0011]
In the above operation, for the discharge cells where no display is performed, the initialization discharge occurs during the initialization period, but the address discharge, the sustain discharge and the erase discharge are not performed, and in the discharge cell where the display is not performed, the scan electrode SCNi The wall charges on the upper and sustain electrodes SUSi and the wall charges on the data electrodes Dj are kept in the state at the end of the initializing period of the first subfield.
[0012]
The image in the first sub-field is displayed by all the operations from the above initialization period to the erasing period. Hereinafter, the same operation is performed over the second to eighth subfields. The luminance of the discharge cells displayed in these subfields is determined by the number of times the sustain pulse voltage Vm (V) is applied. Thus, for example, by setting the number of application times of sustain pulse voltage in each subfield as appropriate, ⁰ 2 luminance by the sustain ^discharge, 2 1, ^{2 2,} one field period of eight subfields is ... 2 ⁷ , Gray scale display of 2 ⁸ = 256 gray scales becomes possible.
[0013]
FIG. 8 is a block diagram of a conventional plasma display device that requires a PDP having the structure described above and a drive sequence. FIG. 8 shows components related to the present invention, and other components such as a signal input unit and a sound output mounted on an actual plasma display device are omitted. The PDP 21 is connected to a scan electrode drive circuit 22, a sustain electrode drive circuit 23, and a data electrode drive circuit 24 for driving scan electrodes, sustain electrodes, and data electrodes, respectively. A signal processing circuit 25 is connected to each drive circuit, and sends a control signal based on an external input signal and an internal signal. Further, a power supply 26 is provided to supply power set to a predetermined voltage to the scan electrode drive circuit 22, the sustain electrode drive circuit 23, the data electrode drive circuit 24, the signal processing circuit 25, and the like. The PDP 21 and various circuits are housed in a housing to form a plasma display device. The arrows in FIG. 8 schematically show exchanges of control signals, power supply, and the like.
[0014]
[Patent Document 1]
JP 2000-259117 A
[Problems to be solved by the invention]
However, such a plasma display panel has a wide operable temperature range due to the use of gas discharge. However, display failure occurs depending on the temperature of the operating environment. However, there has been a problem that display defects occur in the above.
[0016]
The present invention has been made to solve such a problem, and an object of the present invention is to provide a method of driving a plasma display panel that can operate stably without being affected by the temperature of an operating environment. I do.
[0017]
[Means for Solving the Problems]
As a result of intensive studies on the above-mentioned problems, display defects that occur when the operating environment of the PDP becomes low are caused by the wall charges formed in the discharge cells during the initialization period being lower than those at room temperature. Was found to be due to the fact that it was much less. This point will be described with reference to FIGS.
[0018]
FIG. 9 shows an example of the temperature dependence of the discharge start voltage in the PDP. The discharge start voltage when the temperature of the PDP (panel temperature) is room temperature (hereinafter simply referred to as “room temperature”) considered to be a normal use environment is referred to. Represents the amount of change in the discharge starting voltage with respect to the panel temperature. Here, the room temperature is 24 ° C. As can be seen from FIG. 9, the change in the discharge starting voltage when the panel temperature rises from room temperature is within about 4 V, whereas the change in the discharge starting voltage when the panel temperature becomes low is considerably large. It can be seen that when the temperature reaches 0 ° C., the voltage rises by about 15 V as compared with the case at room temperature. As described above, when the panel temperature decreases from room temperature, the discharge starting voltage greatly increases.
[0019]
By the way, in the address period, the address discharge is performed by utilizing the wall charges accumulated in the initialization period. Therefore, in order to surely perform the address discharge in the address period, a wall is applied to each discharge cell in the initialization period before the address period. It is necessary to accumulate electric charges appropriately. For this purpose, a necessary and sufficient initializing discharge must be generated by applying a lamp voltage during the initializing period. In addition, sufficient initialization discharge does not occur. This will be described with reference to FIG.
[0020]
FIG. 10 shows an initializing voltage waveform applied to the scan electrode during the initializing period of FIG. 7, and this initializing voltage waveform is set on the assumption that the environment in which the panel is used is approximately room temperature. It is. In FIG. 10, Vfs0 (V) represents the firing voltage between the scan electrode and the data electrode when the panel temperature is room temperature, and Vfs1 (V) represents the scan electrode and the data when the panel temperature is 0 ° C. It shows the firing voltage between the electrodes. Here, a discharge between a scan electrode and a data electrode in a certain discharge cell will be described, but the same can be said for a discharge between a scan electrode and a sustain electrode.
[0021]
First, the operation at room temperature, which is considered as a normal use environment, will be described. A ramp voltage that gradually rises from a voltage Vp (V), which is equal to or lower than the discharge start voltage, to the scan electrode toward a voltage Vr (V) exceeding the discharge start voltage is applied to the scan electrode. In the process of increasing the ramp voltage, if the discharge starting voltage Vfs0 (V) between the scan electrode and the data electrode of the discharge cell of interest exceeds the first weak initializing between the scan electrode and the data electrode. Discharge occurs, and negative wall charges are accumulated on the scan electrodes, and positive wall charges are accumulated on the data electrodes. This initialization discharge occurs continuously while the lamp voltage continues to rise, but stops when the lamp voltage stops rising. Therefore, the duration of the first initialization discharge is the time from when the lamp voltage exceeds the discharge start voltage Vfs0 (V) between the scan electrode and the data electrode to when the increase in the lamp voltage is completed. The longer the time, the greater the absolute value of the accumulated wall charges. If the duration is too long, the accumulated amount of wall charges becomes excessive and cannot be appropriately weakened even in the second initializing discharge, so that an abnormal discharge occurs in the subsequent writing operation or sustaining operation. I will do it. Therefore, in the initialization period, the reached value Vr (V) of the lamp voltage is set so that the initialization discharge is appropriately performed.
[0022]
However, in the panel having the characteristics as shown in FIG. 9, when the temperature of the use environment is low and the panel temperature is, for example, 0 ° C., the discharge starting voltage Vfs1 between the scan electrode and the data electrode of the discharge cell of interest. (V) is about 15 V higher than the discharge start voltage Vfs0 (V) at room temperature. The duration of the setup discharge in this state is a period from when the lamp voltage exceeds Vfs1 (V) to when it reaches Vr (V), and is compared with the duration of the setup discharge when the panel temperature is room temperature. Then, since it becomes shorter, the accumulation amount of wall charges is reduced as compared with the operation state at room temperature. That is, the state of the wall charges after the initializing discharge at 0 ° C. becomes insufficient compared with the state of the wall charges after the initializing discharge at room temperature, and the subsequent address operation and sustaining operation cannot be properly performed. It has been found that this causes a PDP display defect in an extremely low-temperature operating environment.
[0023]
The present invention has been made based on the above findings, and the present invention is a method of driving a plasma display panel having a discharge cell formed at the intersection of a scan electrode, a sustain electrode, and a data electrode. The field period is composed of a plurality of subfields having an initialization period, an address period, and a sustain period. In the initialization period of at least one subfield, a ramp waveform voltage for generating a discharge in all discharge cells related to image display is set. When the voltage is applied to the scan electrode, an attained value of the ramp waveform voltage is controlled based on a panel temperature.
[0024]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
[0025]
FIG. 1 shows a block diagram of a plasma display device according to an embodiment of the present invention. The plasma display device according to the present embodiment has substantially the same configuration as the conventional plasma display device shown in FIG. 8, and differs from the plasma display device in that the temperature detection means 27 for detecting the panel temperature and the temperature detection means 27 detect the panel temperature. And control means 28 for controlling the output voltage of the power supply 26 based on the panel temperature information. Here, the same components as those of the conventional plasma display device are denoted by the same reference numerals. The PDP 21, the scan electrode drive circuit 22, the sustain electrode drive circuit 23, the data electrode drive circuit 24, the signal processing circuit 25, the power supply 26, and the control means 28 are housed in the housing of the plasma display device. Further, the temperature detecting means 27 is attached to, for example, a housing of the plasma display device, and the temperature detecting means 27 may be provided inside the housing of the plasma display device. The structure of PDP 21 is the same as that described with reference to FIG. 5, and the electrode arrangement of PDP 21 is the same as that described with reference to FIG.
[0026]
Next, a driving method of the PDP according to the present embodiment will be described with reference to the drawings. In the PDP driving method, one field period is constituted by, for example, first to eighth subfields as in the conventional driving method, and thereby 256 gradations are displayed. Each subfield is composed of an initializing period, a writing period, a sustaining period, and an erasing period, and the driving voltage waveform applied to each electrode is the same as the conventional one except for the initializing period. In the present embodiment, the drive voltage waveform applied to the scan electrodes during the initialization period is changed according to the panel temperature, which is different from the conventional drive method.
[0027]
FIG. 2 shows a driving voltage waveform applied to the scan electrodes during the initialization period among the driving voltage waveforms of the PDP according to the present embodiment. FIG. 2A shows a driving voltage waveform when the panel temperature is room temperature. FIG. 3B shows a drive voltage waveform when the panel temperature is lower than room temperature. In the initialization period, all data electrodes D1 to Dm are held at 0 (V), and all the sustain electrodes SUS1 to SUSn are initially held at 0 (V). The positive voltage Vh (V) is maintained at some point in the middle, and these are the same as in the conventional case.
[0028]
In the driving voltage waveform shown in FIG. 2A, when the panel temperature is room temperature, a necessary and sufficient initializing discharge occurs, so that wall charges are appropriately accumulated in all discharge cells related to image display in the PDP. Thus, the ultimate value Vr0 (V) of the ramp voltage (gradient waveform voltage) that gradually rises from Vp (V) is set. That is, in the address period following the initialization period, the reached value Vr0 (V) of the lamp voltage is set so that the address discharge corresponding to the display data can be normally performed.
[0029]
Next, in the drive voltage waveform shown in FIG. 2B, the ultimate value Vr1 (V) of the lamp voltage is set to a value higher than Vr0 (V), and the slope of the lamp voltage is shown in FIG. If you are the same. As described with reference to FIG. 10, when the panel temperature is low, the discharge starting voltage of the discharge cell increases as compared with that at room temperature. Is corrected to a value higher than Vr0 (V). As a result, the duration of the setup discharge when the panel temperature is low can be made equal to the duration of the setup discharge when the panel temperature is room temperature. The wall charges are appropriately accumulated, and the subsequent write operation and sustain operation can be performed normally.
[0030]
As described above, when the lamp voltage for generating a discharge (initialization discharge) in all the discharge cells involved in the image display is applied to the scan electrodes SCN1 to SCNn during the initialization period, the reached value of the lamp voltage is used as the panel temperature. By performing the control based on this, the display operation of the plasma display panel can be performed normally even when the panel temperature becomes low due to the extremely low temperature operation environment.
[0031]
Next, a case where the operating environment is at a high temperature will be described. When the panel temperature becomes high due to the high operating environment, the discharge starting voltage decreases as shown in FIG. At this time, during the initialization period, when an initialization waveform set assuming that the operating environment is at room temperature is applied to the scan electrodes, the duration of the first initialization discharge becomes longer, and an excessive amount of time is left on each electrode. An amount of wall charge is accumulated, an excessive amount of wall charge remains without being weakened even in the second setup discharge, and abnormal discharge occurs in the subsequent address operation and sustain operation.
[0032]
Therefore, when the operating environment is at a high temperature, the drive voltage waveform applied to the scan electrodes during the initialization period is set as shown in FIG. That is, the ultimate value Vr2 (V) of the ramp voltage, which gradually rises from the voltage Vp (V), is set to a value lower than the ultimate value Vr0 (V) of the lamp voltage applied at room temperature, and this value Vr2 ( V) is controlled based on the panel temperature detected by the temperature detecting means 27. The drive voltage waveforms applied to data electrodes D1 to Dm and sustain electrodes SUS1 to SUSn are the same as in the conventional case.
[0033]
By setting the ultimate value Vr2 (V) of the lamp voltage in this manner, the amount by which the discharge start voltage Vfs2 (V) of the discharge cell falls below Vfs0 (V) is corrected, and thereby the duration of the initialization discharge is maintained. Since the time can be substantially equal to the duration of the setup discharge at room temperature, abnormal discharge due to excessive accumulation of wall charges can be prevented.
[0034]
As described above, in the present embodiment, the panel temperature is detected by the temperature detecting means 27 and the attained value of the lamp voltage is controlled based on the detected panel temperature. The reached value of the voltage is set high, and the reached value of the lamp voltage is set low when the panel temperature is high. That is, since the reached value of the lamp voltage is controlled so as to compensate for the change in the discharge starting voltage of the discharge cell due to the change in the panel temperature, the amount of wall charge accumulated by the initializing discharge can be appropriately adjusted over a wide operating temperature range. And stable address discharge and sustain discharge can be realized.
[0035]
In the above embodiment, the ultimate value of the lamp voltage controlled based on the panel temperature does not need to be changed exactly in accordance with the change in the discharge starting voltage of the discharge cell due to the change in the panel temperature. What is necessary is just to change within the range in which the sustain discharge is normally performed. FIG. 4 shows the concept of controlling the ultimate value of the lamp voltage. A curve a in FIG. 4 represents a change amount of the discharge starting voltage of the discharge cell with respect to the panel temperature shown in FIG. An area b indicated by hatching shows an example of an allowable range of a correction amount when correcting the ultimate value of the lamp voltage in accordance with the change of the panel temperature, and is based on the ultimate value Vr0 (V) of the lamp voltage. It is expressed by the amount of change. As described above, by changing the attained value of the lamp voltage in the range of the region b in response to the change in the panel temperature, the initializing discharge can be appropriately performed, and the subsequent address discharge and sustain discharge can be normally performed. Therefore, the PDP can be operated stably.
[0036]
In the plasma display device shown in FIG. 1, the output of the temperature detecting means 27 is configured to be fed back to the power supply 26, but the present invention is not limited to this configuration. For example, a power supply or the like for supplying a lamp voltage may be incorporated in the scan electrode drive circuit 22. In such a case, the output of the temperature detection unit 27 is fed back to the scan electrode drive circuit 22, The present invention may be implemented.
[0037]
Further, in the above-described embodiment, each subfield constituting one field includes an initializing period, a writing period, a sustaining period, and an erasing period, and is initialized in all discharge cells related to display during the initializing period of all subfields. Although the description has been given of the case where the oxidizing discharge occurs, the present invention can be applied to other cases. For example, each of a plurality of subfields forming one field has an initializing period, an address period, and a sustaining period, and an initializing discharge occurs in all discharge cells related to display in the initializing period of at least one subfield. The same effect can be obtained by applying the present invention to a drive in which an initialization discharge is generated only in a discharge cell in which a sustain discharge has occurred in an immediately preceding sustain period in an initialization period of other subfields. Obtainable. That is, one field period is composed of a plurality of subfields having an initializing period, a writing period, and a sustaining period, and in the initializing period of at least one subfield, an inclination for generating discharge in all discharge cells related to image display. When a waveform voltage is applied to the scanning electrodes, the PDP can be operated stably by controlling the value of the ramp waveform voltage based on the panel temperature.
[0038]
Furthermore, in the above-described embodiment, the case where a ramp voltage that changes slowly is used as the ramp waveform voltage has been described. However, any other ramp voltage waveform having a ramp in a range that does not cause strong discharge may be used. The present invention can also be applied to the present invention.
[0039]
【The invention's effect】
As can be seen from the above description, according to the present invention, the plasma display panel can be operated stably without being affected by the temperature of the operating environment.
[Brief description of the drawings]
FIG. 1 is a block diagram of a plasma display device according to an embodiment of the present invention. FIGS. 2A and 2B show an initialization voltage waveform applied to a plasma display panel in an embodiment of the present invention. FIG. 3 is a waveform diagram showing an initialization voltage waveform applied to a plasma display panel in one embodiment of the present invention. FIG. 4 is a diagram showing a correction amount of a reached value of a lamp voltage in one embodiment of the present invention. FIG. 5 is a perspective view showing a main part of a conventional plasma display panel. FIG. 6 is a schematic plan view showing an electrode arrangement of the plasma display panel. FIG. 7 is a driving operation timing chart of the plasma display panel. FIG. 9 is a block diagram of a conventional plasma display device. FIG. 9 is a characteristic diagram showing temperature dependence of a discharge starting voltage in a conventional plasma display panel. Waveform diagram showing the initializing voltage waveform to be applied between the display panel EXPLANATION OF REFERENCE NUMERALS
2 scan electrode 3 sustain electrode 8 data electrode 21 plasma display panel 22 scan electrode drive circuit 23 sustain electrode drive circuit 24 data electrode drive circuit 25 signal processing circuit 26 power supply 27 temperature detection means 28 control means

Claims (2)

A method for driving a plasma display panel comprising a discharge cell formed at an intersection of a scan electrode, a sustain electrode, and a data electrode, wherein one field period comprises a plurality of sub-fields having an initialization period, an address period, and a sustain period. And applying a ramp waveform voltage for generating a discharge in all discharge cells involved in image display to the scan electrode during an initialization period of at least one subfield. A method for driving a plasma display panel, characterized in that the control is performed based on the following. 2. The method according to claim 1, wherein the arrival value of the ramp waveform voltage is increased when the panel temperature is low, and the arrival value of the ramp waveform voltage is decreased when the panel temperature is high.

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