JP2004214918A - A/d conversion circuit apparatus, clamp circuit apparatus, and electronic circuit system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an A/D conversion circuit apparatus with less noise by digitally eliminating the noise even when the noise is superimposed on a reference level, and also to provide a clamp circuit apparatus and an electronic circuit system. <P>SOLUTION: The A/D conversion circuit apparatus includes two A/D converters 28, 29 included in an IC and for converting an analog signal into a digital signal, the one A/D converter 28 converts an analog video signal into a digital signal, and the other A/D converter 29 converts a ground signal in pairs with the analog video signal into a digital signal. Then, an arithmetic unit 30 calculates a difference between digital data outputted respectively from the two A/D converters 28, 29. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an A / D conversion circuit device, a clamp circuit device, and an electronic circuit system that convert an analog signal into a digital signal when digitally processing a video signal.
[0002]
[Prior art]
Conventionally, when processing a video signal digitally, an analog video signal is converted to a digital signal using an A / D converter. For example, as shown in FIG. 6, when A / D conversion is performed on a video signal, the video signal must fall within the A / D reference potential. Therefore, when performing A / D conversion, a clamp circuit is required so that the video signal has a predetermined potential.
[0003]
Generally, the clamp circuit clamps using a portion of the video signal outside the video signal period.
[0004]
FIG. 7 is a diagram showing a general example of such a clamp circuit. In FIG. 7, after a direct current (DC) component is cut off by a capacitor (C) 1, the clamp circuit is connected via an analog switch 2 and a resistor 3 to a transistor 4 which is a high impedance active element. Then, by obtaining the potential to be clamped during the clamp pulse period, a clamping operation can be obtained.
[0005]
In the feedback-type clamp circuit, a clamp potential is derived from the A / D-converted data, and is returned to the clamp circuit to be pulled into a certain DC value.
[0006]
Also, there is known an A / D converter that minimizes deterioration of S / N ratio characteristics due to the influence of noise even when the A / D converter is mounted on a large-scale digital circuit (for example, see Patent Document 1).
[0007]
Further, there is known an A / D conversion error correction circuit for simultaneously sampling one video signal with a plurality of A / D converters and correcting an error due to an offset difference between the A / D converters when serially switching and outputting serially. (For example, see Patent Document 2).
[0008]
[Patent Document 1]
JP-A-6-216772
[Patent Document 2]
JP-A-10-28053
[Problems to be solved by the invention]
As described above, in the A / D conversion circuit, as shown in FIG. 8A, a reference which is a reference between a video signal on which noise is not superimposed (no noise) and a ground (GND) signal of the video signal. A / D conversion is performed based on the potential. Therefore, if the reference potential is shifted or noise is superimposed as shown in FIG. 8B, accurate analog / digital conversion cannot be performed, which is a major cause for distorting the video signal. Has become.
[0011]
As described above, when noise is superimposed on the reference potential at the time of A / D conversion, digital noise due to clock interference, such as vertical stripes, horizontal stripes, and oblique stripes, generated in the substrate tends to appear in the video. In addition, as shown in FIG. 8C, when the clamp potential is shifted, white balance and brightness are affected.
[0012]
Therefore, the present invention has been made in view of the above-described circumstances, and even when noise is superimposed on a reference potential, an A / D converter circuit device, a clamp circuit device, and an electronic circuit system which are digitally removed and have less noise. The purpose is to provide.
[0013]
[Means for Solving the Problems]
That is, the present invention provides a clamp circuit for clamping an input analog video signal, and a converter for converting an analog video signal from the clamp circuit into a digital signal, and a first A / D converter for converting an analog video signal to digital. Circuit, a second A / D conversion circuit that converts a ground signal paired with the analog video signal into a digital signal, and a difference between digital data output from each of the first and second A / D conversion circuits. A / D conversion circuit device comprising: an arithmetic unit for performing an arithmetic operation.
[0014]
Also, the present invention provides a clamp circuit for clamping an input analog video signal, an A / D conversion circuit for converting the analog video signal from the clamp circuit into a digital signal, and a holding means for holding the clamped digital video signal. Calculating means for calculating a difference between the data held by the holding means and expected clamp level data; and feedback to an input video signal of the holding means so as to cancel the difference when the difference occurs. And a feedback circuit for performing the above operation.
[0015]
The present invention further provides a clamp circuit for clamping an input analog video signal, and a converter for converting the analog video signal from the clamp circuit into a digital signal, and a first A / D converter for converting the analog video signal to digital. Circuit, a second A / D conversion circuit that converts a ground signal paired with the analog video signal into a digital signal, and a difference between digital data output from each of the first and second A / D conversion circuits. A first calculating means for calculating, a holding means for holding a digital video signal during a clamp period, a second calculating means for calculating a difference between data held by the holding means and expected clamp level data; When a difference occurs to be calculated by the second calculating means, the input image of the holding means is canceled so as to cancel the difference. An electronic circuit system characterized by comprising a feedback means for feeding back the item.
[0016]
The A / D conversion circuit device of the present invention has two A / D conversion circuits for converting an analog signal to a digital signal, and one of the first A / D conversion circuits is used for analog video. The signal is converted to a digital signal, and the other second A / D conversion circuit converts the analog video signal and the ground signal paired to the digital signal to digital. Then, the difference between the digital data output from each of the first and second A / D conversion circuits is calculated by the calculation means.
[0017]
Further, in the clamp circuit device of the present invention, the digital video signal during the clamp period is held by the holding means, and the difference between the data held by the holding means and the expected clamp level data is calculated by the calculating means. Then, when the difference occurs, the feedback is fed back to the video signal so that the difference is canceled.
[0018]
Further, the electronic circuit system of the present invention has two A / D conversion circuits for converting an analog signal to a digital signal, and one of the first A / D conversion circuits converts the analog video signal. The analog video signal and the ground signal paired with the analog video signal are converted to digital by the other second A / D conversion circuit. Then, the difference between the digital data output from each of the first and second A / D conversion circuits is calculated by the first calculation means. Further, the digital video signal during the clamp period is held by the holding means, and the difference between the data held by the holding means and the expected clamp level data is calculated by the second calculating means. Then, when the difference occurs, the feedback is fed back to the video signal so that the difference is canceled.
[0019]
In the A / D conversion circuit device according to the present invention, noise is removed by using an arithmetic unit that subtracts digital data equivalent to noise leaking into the reference potential from the digital data after A / D conversion. Also, for the shifted clamp potential, only the shifted amount is digitally DC-corrected using an arithmetic unit.
[0020]
Even if noise is superimposed on the reference potential, by removing it digitally, an A / D conversion circuit device with less noise can be realized. In addition, since the clamp circuit device performs the correction by the calculation by applying the digital feedback, the analog disturbance is not picked up, and the stable clamp operation can be obtained.
[0021]
Further, even for a video signal on which a copy guard signal is superimposed, very stable clamping can be performed.
[0022]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0023]
FIG. 1 is a diagram showing a configuration of an electronic circuit system according to one embodiment of the present invention.
[0024]
In FIG. 1, a capacitor (C) 21 for cutting a DC component of a video signal and holding a clamp potential is an analog switch 22 that is turned on only during a period of clamping by a clamp pulse, and a transistor 24 having a high impedance input. Connected to the base. A resistor (R) 23 for transmitting a clamp potential to the capacitor 21 is connected to the analog switch 22. A resistor 26 is connected to the emitter of the transistor 24, and a signal is matched between the video signal current-amplified by the transistor 24 and the ground (GND) of the video signal, so that the signal is provided inside the IC at the subsequent stage. A common choke 26 for transmission to the A / D converters 28 and 29 in this embodiment is connected.
[0025]
Inside the IC, A / D converters 28 and 29 as first and second A / D conversion circuits, an arithmetic unit 30 as arithmetic means, and a sample and hold circuit (sample and hold circuit) 31 as hold means And a comparator 32 as a second calculating means.
[0026]
The A / D converter 28 is a circuit for converting an analog video signal into a digital signal. The A / D converter 29 is a circuit for digitally converting a GND paired with the analog video signal. The calculator 30 calculates the difference between the output of the A / D converter 28 and the output of the A / D converter 29, and also calculates the error of the clamp potential.
[0027]
The sample hold circuit 31 is for sampling and storing the digital value during the clamp period a. The comparator 32 derives the difference between the output of the sample and hold circuit 31 and the digital value to be clamped.
[0028]
The sample-and-hold circuit 31, the comparator 32 and the arithmetic unit 30 constitute a feedback unit.
[0029]
In such a configuration, the input video signal has its DC component cut off by the capacitor 21 and is divided into only AC components. Then, as shown in FIG. 2, the clamp potential is applied via the resistor 23 while the clamp pulse is at the high (H) level.
[0030]
The current is amplified by the transistor 24, the signal is matched with the GND of the video signal by the common choke 26, and is input to the A / D converter 28 and the A / D converter 29 in the IC. In the A / D converter 28 and the A / D converter 29, as shown in FIG. 2, when noise is superimposed on the reference potential and the potential fluctuates, the digital data after A / D conversion includes: The noise component appears.
[0031]
Conventionally, A / D conversion of a video signal is performed by only one of the A / D converters 28. Therefore, the video signal b on which the noise is superimposed has to be used.
[0032]
Therefore, in the present invention, the digital data obtained by A / D conversion of the GND of the video signal by the A / D converter 29 is subtracted from the digital data of the A / D converter 28, so that the digital data is superimposed by the fluctuation of the reference potential. Noise components are removed.
[0033]
In particular, in the configuration example of FIG. 1, since the A / D in the same IC is considered, the reference potentials of the two A / D converters are common, so that the superposition of noise is also common. Therefore, by taking the difference between the two A / D converters 28 and 29, it is possible to completely remove noise as indicated by the video signal c.
[0034]
Further, as shown in FIG. 3, when a clamp potential shift of the color difference signal occurs, a shift of even 1 LSB (for one gradation of digital) usually results in a loss of white balance, resulting in a reddish or greenish image.
[0035]
In the present invention, the data of the clamp period is taken in by the sample and hold circuit 31 by the amount of the shift of the clamp potential, the difference between the digital value and the expected value of the clamp is calculated, and the video signal is fed back by the amount of the shift. . If this feedback is performed by an analog circuit as in the related art, convergence time may be required or the clamp may fluctuate due to the time constant of an external CR integrator (not shown). However, when feedback is applied digitally as in the present invention, convergence is immediately made, and a stable operation can be obtained.
[0036]
FIG. 4 is a diagram illustrating an example of each signal when a video signal on which a copy guard signal is superimposed is input.
[0037]
As shown in FIGS. 4A and 4B, the copy guard signal is a signal superimposed on about 20 lines where the picture starts immediately after the vertical synchronizing signal. A level signal is added. Therefore, if clamping is performed during this period, proper clamping cannot be performed.
[0038]
Therefore, the circuit is configured so that the clamp operation by the clamp mask signal is not performed during the period when the copy guard signal is added. In such a case, a clamp fluctuation occurs.
[0039]
However, the clamp fluctuation due to the analog feedback as shown in FIG. 4C operates to gradually return the clamp potential shifted during the mask period to the original clamp potential. However, such an operation requires a lot of time to converge. On the other hand, when the clamp correction is performed by the digital feedback of the present invention as shown in FIG. 4E, the original clamp potential can be immediately set after the clamp mask period ends.
[0040]
As described above, according to the present invention, it is possible to remove not only the noise component superimposed on the video signal but also the noise component superimposed on both the video signal and the GND of the video signal.
[0041]
In the above-described embodiment, as shown in FIG. 4, the clamp mask period is stopped only during the copy guard signal period. However, the present invention is not limited to this.
[0042]
For example, the clamp mask may be stopped during the period of the copy guard signal and the period of the vertical synchronization signal.
[0043]
Further, when the copy guard signal is not superimposed on the video signal, the clamp mask period may be stopped only during the period of the vertical synchronization signal.
[0044]
【The invention's effect】
As described above, according to the present invention, even if noise is superimposed on the reference potential, it can be digitally removed, so that an A / D conversion circuit with less noise can be realized. In addition, since the clamp circuit also performs digital correction and performs correction by calculation, analog disturbance is not picked up, and a stable clamp operation can be obtained. Furthermore, a very stable clamp can be performed on a video signal on which a copy guard signal is superimposed.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration of an electronic circuit system according to an embodiment of the present invention.
FIG. 2 is a diagram for explaining a noise removal operation according to the present invention.
FIG. 3 is a diagram for explaining correction of a clamp potential shift according to the present invention;
FIG. 4 is a diagram for supplementing the description when a copy guard signal is input.
FIG. 5 is a diagram for supplementing the description of another example when a copy guard signal is input.
FIG. 6 is a diagram illustrating a video signal and an A / D reference potential.
FIG. 7 is a diagram for explaining a conventional A / D conversion circuit.
FIG. 8 is a diagram illustrating a case where noise is superimposed on a reference potential and a case where a clamp potential is shifted.
[Explanation of symbols]
21: Capacitor, 22: Analog switch, 23, 25: Resistor, 24: Transistor, 26: Common choke, 28, 29: A / D converter, 30: Arithmetic unit, 31: Sample hold circuit (sample & hold circuit) , 32 ... Comparator.

Claims (12)

A clamp circuit for clamping an input analog video signal,
A first A / D conversion circuit that converts an analog video signal from the clamp circuit into a digital signal, and converts the analog video signal into a digital signal;
A second A / D conversion circuit for converting the analog video signal and the ground signal paired into a digital signal,
Calculating means for calculating a difference between digital data output from each of the first and second A / D conversion circuits;
An A / D conversion circuit device comprising: 2. The A / D conversion circuit device according to claim 1, further comprising means for stopping a clamp during an output period of the copy guard signal superimposed on an initial period of the input video signal. 2. The A / D conversion circuit device according to claim 1, further comprising means for stopping clamping during an output period of the vertical synchronization signal of the input video signal. 2. A according to claim 1, further comprising: means for stopping clamping during an output period of a copy guard signal superimposed on an initial period of the input video signal and an output period of a vertical synchronization signal of the video signal. / D conversion circuit device. A clamp circuit for clamping an input analog video signal,
An A / D conversion circuit for converting an analog video signal from the clamp circuit into a digital signal;
Holding means for holding the clamped digital video signal;
Calculating means for calculating a difference between the data held by the holding means and expected clamp level data;
Feedback means for feeding back to the input video signal of the hold means so as to cancel the difference when the difference occurs,
A clamp circuit device comprising: 6. The clamp circuit device according to claim 5, further comprising: means for stopping clamping during an output period of the copy guard signal superimposed on the initial period of the video signal. 6. The clamp circuit device according to claim 5, further comprising: means for stopping clamping during an output period of the vertical synchronizing signal of the video signal. 6. The clamp circuit device according to claim 5, further comprising means for stopping clamping during an output period of a copy guard signal superimposed on an initial period of the video signal and an output period of a vertical synchronization signal of the video signal. . A clamp circuit for clamping an input analog video signal,
A first A / D conversion circuit that converts an analog video signal from the clamp circuit into a digital signal, and converts the analog video signal into a digital signal;
A second A / D conversion circuit for converting the analog video signal and the ground signal paired into a digital signal,
First calculating means for calculating a difference between digital data output from each of the first and second A / D conversion circuits;
Holding means for holding a digital video signal during a clamp period;
Second calculating means for calculating a difference between the data held by the holding means and expected clamp level data;
Feedback means for feeding back to the input video signal of the hold means so as to cancel the difference when a difference occurs to be calculated by the second calculation means;
An electronic circuit system comprising: 10. The electronic circuit system according to claim 9, further comprising: means for stopping clamping during an output period of the copy guard signal superimposed on an initial period of the input video signal. 10. The electronic circuit system according to claim 9, further comprising means for stopping clamping during an output period of the vertical synchronization signal of the input video signal. 10. The electronic device according to claim 9, further comprising means for stopping clamping during an output period of a copy guard signal superimposed on an initial period of the input video signal and an output period of a vertical synchronization signal of the video signal. Circuit system.

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