JP2004207354A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device including a thin film gate electrode and a low resistance silicide layer on the gate electrode, and also to provide a method of manufacturing the same semiconductor device. <P>SOLUTION: In the semiconductor device, the gate insulation film 2 is formed on the semiconductor substrate 1, and thereafter a polycrystal silicon film 3 is also formed on the gate insulation film 2. After naturally oxidized film 4 is formed on the polycrystal silicon film 3, a polycrystal silicon film 5 is formed. Thereafter, a gate electrode 11 is formed by patterning the polycrystal silicon film 3, the naturally oxidized film 4 and polycrystal silicon film 5. After an insulation silicide wall 8 is formed on the side surface of the gate electrode 11, a cobalt film 10 is formed on the substrate. Successively, the cobalt silicide films 10a, 10b are formed through reaction of silicon and cobalt of the second silicon film 5a and high concentration source/drain area 9 with the heat treatment. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a MIS transistor having a silicide layer above a gate electrode and a method for manufacturing the same.
[0002]
[Prior art]
2. Description of the Related Art In recent years, integrated circuits composed of MIS transistors have been greatly miniaturized, and the minimum processing size has reached a deep submicron region of 0.1 μm. However, as one of the factors hindering the miniaturization, there is a problem that the improvement in the performance of the integrated circuit is hindered, such as a circuit speed delay due to an increase in the thin line resistance of the gate electrode. Therefore, in order to reduce the thin line resistance of the gate electrode, many improvements have been made to the structure and manufacturing method of the constituent elements. Among them, a manufacturing method has been proposed in which the surface of a polycrystalline silicon film constituting a gate electrode is converted into a metal silicide to reduce the resistance of the gate electrode (for example, see Patent Document 1).
[0003]
A conventional method for manufacturing a semiconductor device having a silicide gate structure will be described with reference to the drawings.
[0004]
3 (a) to 3 (d) are cross-sectional views showing a process for manufacturing a semiconductor device provided with a conventional MIS transistor having a silicide gate structure.
[0005]
First, in a step shown in FIG. 3A, a trench-type isolation insulating film (not shown) surrounding an active region is formed on a silicon substrate 101, and then a silicon oxide film is formed on the active region of the silicon substrate 101. The gate insulating film 102 is formed. After that, after depositing a polycrystalline silicon film on the substrate, the polycrystalline silicon film is patterned by lithography and dry etching to form a gate electrode 103 made of polycrystalline silicon on the gate insulating film 102. Thereafter, low-concentration source / drain regions 104 are formed by implanting low-concentration impurity ions into the active region using the gate electrode 103 as a mask.
[0006]
Next, in the step shown in FIG. 3B, after depositing an oxide film on the substrate by the CVD method, the oxide film is etched back to form an insulating side film made of an oxide film on the side surface of the gate electrode 103. A wall 105 is formed. Thereafter, high concentration impurity ions are implanted into the active region using the gate electrode 103 and the insulating sidewalls 105 as a mask to form a high concentration source / drain region.
[0007]
Next, in a step shown in FIG. 3C, a cobalt film 107 is deposited on the entire surface of the substrate by a sputtering method.
[0008]
Next, in a step shown in FIG. 3D, silicon and cobalt in the gate electrode 103 and the high-concentration source / drain regions 106 are reacted with each other by heat treatment to form silicide. Thereafter, by selectively removing unreacted cobalt remaining on the insulating sidewall 105 and the like, a cobalt silicide film 107a is formed on the gate electrode 103, and a high concentration source / drain region 106 A cobalt silicide film 107b is formed.
[0009]
The gate electrode 103 having the cobalt silicide film 107a formed by such a manufacturing method maintains a low resistance even in a thin line having a gate length of 0.1 μm or less. Can realize excellent circuit performance.
[0010]
[Patent Document 1]
JP-A-2000-31143 (page 5, FIG. 1 and FIG. 2)
[0011]
[Problems to be solved by the invention]
However, the conventional method of manufacturing a semiconductor device having a MIS transistor having a silicide gate structure as described above has the following problems.
[0012]
(1) With the miniaturization of the gate electrode, it is necessary to reduce the thickness of the polycrystalline silicon film. However, when the thickness of the polycrystalline silicon film is reduced, the cobalt silicide film silicided by the reaction between silicon and cobalt in the polycrystalline silicon film reaches the gate insulating film, and significantly reduces the reliability of the gate insulating film.
[0013]
(2) In order to prevent the cobalt silicide film from reaching the gate insulating film as in (1) above, it is necessary to reduce the thickness of the cobalt film to be deposited in advance. However, when the cobalt film is thinned, the cobalt silicide film is apt to be broken by agglomeration or the like, which causes a remarkable increase in the resistance of the gate electrode.
[0014]
SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device in which a gate electrode can be made thinner and has a low-resistance silicide layer on the gate electrode, and a method for manufacturing the same.
[0015]
[Means for Solving the Problems]
A semiconductor device according to the present invention includes a gate insulating film formed on a semiconductor substrate, a first silicon film formed on the gate insulating film, a protective film formed on the first silicon film, A first metal silicide film formed by silicidation of at least a part of the formed second silicon film, wherein the first silicon film and the first metal silicide film are electrically connected.
[0016]
In the above semiconductor device, an insulating sidewall formed on a side surface of the first silicon film, the protective film, and the first metal silicide film, and a semiconductor substrate formed on a side of the insulating sidewall. A second metal silicide film.
[0017]
In the above semiconductor device, the first metal silicide film is formed by silicidation of the entire second silicon film.
[0018]
In the above semiconductor device, it is preferable that the thickness of the protective film is 0.5 to 1.5 nm.
[0019]
According to the method of manufacturing a semiconductor device of the present invention, a step (a) of forming a gate insulating film on a semiconductor substrate, a step (b) of forming a first silicon film on the gate insulating film, Forming a protective film (c), forming a second silicon film on the protective film (d), and patterning the first silicon film, the protective film and the second silicon film to form a gate electrode portion A step (e), a step (f) of forming an insulating sidewall on the side surface of the gate electrode portion, a step (g) of forming a metal film on the substrate after the step (f), and a step (g) )), A step (h) of forming a first metal silicide film by reacting at least a part of the second silicon film with the metal film by heat treatment.
[0020]
In the method of manufacturing a semiconductor device, in the step (h), the first metal silicide film is formed by reacting the entire second silicon film with the metal film.
[0021]
In the above method for manufacturing a semiconductor device, in the step (h), the second metal silicide film is formed by reacting the metal film with the semiconductor substrate located on the side of the insulating sidewall.
[0022]
In the method of manufacturing a semiconductor device, in the step (h), the protective film serves as a stopper, and the first silicon film is not silicided.
[0023]
In the above method for manufacturing a semiconductor device, the thickness of the protective film is preferably 0.5 to 1.5 nm.
[0024]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0025]
1 (a) to 1 (d), 2 (a) and 2 (b) are cross-sectional views showing steps of manufacturing a semiconductor device having a MIS transistor having a silicide gate structure according to the present invention. is there.
[0026]
First, in a step shown in FIG. 1A, a trench type element isolation insulating film (not shown) surrounding an active region is formed on a silicon substrate 1, and then a thickness of about 2 nm is formed on the active region of the silicon substrate 1. A gate insulating film 2 made of a silicon oxide film is formed. Thereafter, a polycrystalline silicon film 3 having a thickness of about 100 nm is deposited on the gate insulating film 2 and then exposed to the atmosphere to form a natural oxide film 4 having a thickness of 0.5 to 1.0 nm on the polycrystalline silicon film 3. To form
[0027]
Next, in a step shown in FIG. 1B, a polycrystalline silicon film 5 having a thickness of about 50 nm is deposited on the natural oxide film 4. After that, a photoresist film is applied on the entire surface of the polycrystalline silicon film 5, and a photoresist pattern 6 is formed by a photolithography process.
[0028]
Next, in the step shown in FIG. 1C, the polycrystalline silicon film 5, the natural oxide film 4, and the polycrystalline silicon film 3 are sequentially etched using the photoresist pattern 6 as a mask to form a first silicon film 3a and a protective film. A gate electrode portion 11 made of 4a and the second silicon film 5a is formed. Thereafter, after removing the photoresist pattern 6, low concentration impurity ions are implanted into the active region using the gate electrode portion 11 as a mask to form a low concentration source / drain region 7. In this embodiment, the gate insulating film 2 is left on the source / drain region when the gate electrode portion 11 is formed. However, after the gate electrode portion 11 is formed, the gate insulating film 2 is formed on the source / drain region. The insulating film 2 may be removed.
[0029]
Next, in a step shown in FIG. 1D, an oxide film having a thickness of about 70 nm is deposited on the substrate by the CVD method, and the oxide film is etched back to form an oxide film on the side surface of the gate electrode portion 11. An insulating sidewall 8 made of a film is formed. Thereafter, high concentration impurity ions are implanted into the active region using the gate electrode portion 11 and the insulating sidewall 8 as a mask, thereby forming the high concentration source / drain regions 9.
[0030]
Next, in a step shown in FIG. 2A, a 10 nm-thick cobalt film 10 is deposited on the entire surface of the substrate by a sputtering method.
[0031]
Next, in the step shown in FIG. 2B, a first heat treatment at 430 ° C. for 90 seconds is performed by lamp annealing to cause the second silicon film 5a and the silicon in the high concentration source / drain regions 9 to react with cobalt, It is silicided. At this time, in the gate electrode portion 11, cobalt enters the second silicon film 5a and a cobalt silicide reaction proceeds to partly or entirely silicide the second silicon film 5a. The silicidation reaction does not occur at least in the first silicon film 3a as a stopper for the formation of silicide. After that, unreacted cobalt remaining on the insulating sidewalls 8 and the like is selectively removed, and a second heat treatment at 750 ° C. for 30 seconds is performed by lamp annealing, so that cobalt is left on the gate electrode portion 11. A silicide film 10a is formed, and a cobalt silicide film 10b is formed on high concentration source / drain region 9. As a result, thick and low-resistance cobalt silicide films 10a and 10b are formed.
[0032]
According to the present embodiment, since the protective film 4a is formed on the first silicon film 3a of the gate electrode portion 11, a thick cobalt film 10 is deposited and the cobalt silicide film 10a is formed on the gate electrode portion 11. Even if it is formed, at least the first silicon film 3a of the gate electrode portion 11 is not silicided because the protective film 4a serves as a stopper for silicidation. Therefore, the cobalt silicide film 10a never reaches the gate insulating film 2, and the cobalt silicide film 10a does not cause a characteristic failure of the gate insulating film 2. In addition, since the cobalt silicide film 10a can be formed to have a large thickness, the resistance of the gate electrode portion 11 can be reduced. Since the protective film 4a serving as a silicidation stopper is sufficiently thin, conduction between the cobalt silicide film 10a and the first silicon film 3a can be sufficiently achieved. Therefore, a thinner gate electrode can be achieved, and a semiconductor device having a highly reliable MIS transistor having a low-resistance silicide film on the gate electrode can be obtained.
[0033]
In this embodiment, a cobalt film is used as the silicide film forming metal film, but a metal film such as a titanium film or a nickel film which can react with silicon to form a silicide film may be used. Further, although a polycrystalline silicon film has been described as the first silicon film and the second silicon film to be the gate electrode portions, an amorphous silicon film may be used.
[0034]
In the present embodiment, a natural oxide film is used as the protective film. However, a similar effect can be obtained by using a film formed by the following method.
[0035]
In the first method, after the polycrystalline silicon film 3 is deposited, it is exposed to an oxygen plasma atmosphere to form a plasma oxide film having a thickness of about 1 nm, and this plasma oxide film is used as a protective film serving as a silicidation stopper. .
[0036]
In the second method, after the polycrystalline silicon film 3 is deposited, it is exposed to a nitrogen plasma atmosphere to form a plasma nitride film having a thickness of about 1 nm, and this plasma nitride film is used as a protective film serving as a silicidation stopper. .
[0037]
In the third method, after depositing the polycrystalline silicon film 3, heat treatment is performed in an oxygen atmosphere to form a thermal oxide film having a thickness of about 1 nm, and this thermal oxide film is used as a protective film serving as a silicidation stopper. Used.
[0038]
In the fourth method, after the polycrystalline silicon film 3 is deposited, heat treatment is performed in a nitrogen atmosphere to form a thermal nitride film having a thickness of about 1 nm, and this thermal nitride film is used as a protective film serving as a silicidation stopper. Used.
[0039]
In the fifth method, after depositing the polycrystalline silicon film 3, an oxide film having a thickness of about 1 nm is formed in an aqueous ammonia solution, and this oxide film is used as a protective film serving as a silicidation stopper.
[0040]
The thickness of the protective film is preferably 0.5 to 1.5 nm. This is because when the thickness of the protective film is smaller than 0.5 nm, the function as a stopper for silicidation is reduced, and when the thickness is larger than 1.5 nm, the conduction resistance between the first silicon film and the cobalt silicide film is reduced. As a result, the resistance of the gate electrode increases.
[0041]
【The invention's effect】
According to the semiconductor device and the method of manufacturing the same of the present invention, a low-resistance silicide film can be formed on a gate electrode, and even if the silicon film thickness for a gate electrode is reduced by miniaturization, the formed silicide film is Since there is no contact with the insulating film, a low-resistance gate electrode and a highly reliable gate insulating film can be simultaneously realized.
[Brief description of the drawings]
FIGS. 1A to 1D are cross-sectional views showing a first half of a manufacturing process of a semiconductor device according to an embodiment of the present invention; FIGS. 3A to 3D are cross-sectional views showing a first half of a manufacturing process of a semiconductor device according to an embodiment. FIGS. 3A to 3D are cross-sectional views showing a conventional manufacturing process of a semiconductor device.
REFERENCE SIGNS LIST 1 silicon substrate 2 gate insulating film 3 polycrystalline silicon film 3 a first silicon film 4 natural oxide film 4 a protective film 5 polycrystalline silicon film 5 a second silicon film 6 photoresist pattern 7 low-concentration source / drain region 8 insulating sidewall 9 High concentration source / drain region 10 Cobalt film 10a Cobalt silicide film 10b Cobalt silicide film 11 Gate electrode part

Claims (9)

A gate insulating film formed on a semiconductor substrate,
A first silicon film formed on the gate insulating film;
A protective film formed on the first silicon film;
A first metal silicide film formed by silicidizing at least a part of the second silicon film formed on the protective film;
A semiconductor device, wherein the first silicon film and the first metal silicide film are electrically connected. The semiconductor device according to claim 1,
An insulating sidewall formed on side surfaces of the first silicon film, the protective film, and the first metal silicide film;
A second metal silicide film formed on the semiconductor substrate located on a side of the insulating sidewall. The semiconductor device according to claim 1, wherein
The semiconductor device according to claim 1, wherein the first metal silicide film is formed by silicidation of the entire second silicon film. The semiconductor device according to any one of claims 1 to 3,
A semiconductor device, wherein the thickness of the protective film is 0.5 to 1.5 nm. (A) forming a gate insulating film on a semiconductor substrate;
(B) forming a first silicon film on the gate insulating film;
(C) forming a protective film on the first silicon film;
(D) forming a second silicon film on the protective film;
(E) patterning the first silicon film, the protective film, and the second silicon film to form a gate electrode portion;
(F) forming an insulating sidewall on a side surface of the gate electrode portion;
(G) forming a metal film on the substrate after the step (f);
A semiconductor which comprises, after the step (g), a step (h) of forming a first metal silicide film by reacting at least a part of the second silicon film with the metal film by heat treatment. Device manufacturing method. The method for manufacturing a semiconductor device according to claim 5,
The method of manufacturing a semiconductor device, wherein in the step (h), the first metal silicide film is formed by reacting the entire second silicon film with the metal film. The method for manufacturing a semiconductor device according to claim 5, wherein
In the step (h), a method of manufacturing a semiconductor device, comprising reacting the metal film with the semiconductor substrate located on a side of the insulating sidewall to form a second metal silicide film. The method of manufacturing a semiconductor device according to claim 5,
In the step (h), the protection film serves as a stopper, and the first silicon film is not silicided. The method of manufacturing a semiconductor device according to claim 5,
A method for manufacturing a semiconductor device, wherein the thickness of the protective film is 0.5 to 1.5 nm.

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