JP2004194305A - Current control method, current supply circuit capable of using the same, semiconductor circuit, analog digital converter, electronic device, and receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a technology for reducing the power consumption of a circuit having an amplifier. <P>SOLUTION: A current supply circuit 80 is designed to supply bias currents to operational amplifiers 30a, 30b composing a pipe-line type AD converter circuit 10. A current switching circuit 70 is designed to switch an output current in response to a current control signal outputted from a current control means 100 so that the current supplied to the operational amplifier 30 via a transistor 40 from a bias circuit 50 is switched. When a high-frequency operation is performed, currents sufficient for the operation are supplied. When a low frequency operation is performed, each of the supplied currents is switched to have a low current value. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

  The present invention relates to an electric circuit, and more particularly to a semiconductor circuit having an amplifier, an AD converter, an electronic device, a receiving device, a current supply circuit for supplying current to an amplifier, and a method for controlling a current supplied to an amplifier.

  As an example of a circuit for converting an input analog signal into a digital signal, there is a pipeline type AD converter. The pipeline type AD converter is obtained by connecting a plurality of stages of low bit sub-AD converters, and performs AD conversion stepwise by each sub-AD converter. An operational amplifier is inserted between the stages of the sub-A / D converter, and amplifies an analog signal input to the sub-A / D converter of the next stage.

In a device equipped with a pipeline type AD converter, when one pipeline type AD converter is operated at a plurality of different operation frequencies, the operation mode is adjusted to the strictest characteristic among the operation modes, that is, the operation at the highest frequency. It is necessary to design a circuit. In general, the higher the operating frequency of a pipeline type AD converter, the more current consumption is required in the operational amplifier constituting the pipeline type AD converter. Therefore, all of the current sufficient for the operation at the highest frequency among the plurality of operation modes is required. The circuit was designed to supply the operational amplifier in the operation mode described above.
JP 2001-28519 A

  However, in the circuit design as described above, when operating in an operation mode with a low operation frequency, an excessive current is supplied, and unnecessary power is consumed.

  The present invention has been made in view of such a problem, and an object of the present invention is to provide a technique for reducing power consumption of a circuit having an amplifier.

  One embodiment of the present invention relates to a control method. In this method, when supplying a current necessary for operating the amplifier, the value of the current is changed according to the operating frequency of the amplifier. When the operating frequency of the amplifier is high, sufficient current is supplied for its operation.On the other hand, when the operating frequency of the amplifier is low, the current to be supplied can be switched to a lower current value to reduce power consumption. it can.

  Another embodiment of the present invention relates to a current supply circuit. This current supply circuit is a circuit for supplying a current necessary for the operation of an amplifier, wherein a current switching means for receiving a current control signal generated in response to switching of an operating frequency of the amplifier and switching a current supplied to the amplifier. Is provided.

  Still another embodiment of the present invention relates to a semiconductor circuit. The semiconductor circuit includes a plurality of amplifiers and current switching means for switching a current supplied to the plurality of amplifiers in response to a current control signal generated in accordance with the switching of the operating frequency of the amplifier.

  The semiconductor circuit further includes a bias circuit connected to each of the plurality of amplifiers and configured to supply a bias current to the amplifier. The current switching unit switches a current output to the bias circuit, thereby controlling the plurality of amplifiers. May be switched.

  The current switching means may comprehensively switch the current supplied to the plurality of amplifiers. For example, all the amplifiers constituting the circuit may be switched at once by one current switching means. The current switching means may be provided corresponding to each of the plurality of amplifiers, and may switch a current supplied to an amplifier connected thereto.

  The current switching means is a circuit configured by a plurality of current paths provided in parallel, and each current path may include a transistor circuit in which a gate terminal and a drain terminal are short-circuited, and a switch circuit. . A current path is selected by turning on and off the switch circuit, and a current determined by characteristics of the transistor circuit is output. The switch circuit may be configured by a MOSFET or the like.

  Still another embodiment of the present invention relates to an AD converter. The AD converter includes a plurality of sub-AD converters connected in series, an amplifier inserted between the sub-AD converters, for amplifying an input signal to a next-stage sub-AD converter, and an operation of the amplifier. Current switching means for switching a current supplied to the amplifier in response to a current control signal generated in response to the switching of the frequency.

  Yet another embodiment of the present invention relates to an electronic device. The electronic device receives a plurality of amplifiers, current control means for controlling a current to be supplied to the amplifier in accordance with switching of the operating frequency of the amplifier, and a current control signal issued from the current control means. Current switching means for switching a current supplied to the plurality of amplifiers.

  Yet another embodiment of the present invention also relates to an electronic device. The electronic device includes a plurality of sub-A / D conversion circuits connected in series, an amplifier inserted between the sub-A / D conversion circuits, and amplifying an input signal to a next-stage sub-A / D conversion circuit, and supplying the amplifier to the amplifier. A / D converter including current switching means for switching current, frequency control means for switching the operating frequency of the amplifier, and current control for controlling current to be supplied to the amplifier in accordance with switching of the operating frequency of the amplifier Current control means for issuing a signal to the current switching means, the frequency control means, when the AD converter converts a plurality of input signals in a time-division manner, the number of the input signal series The operating frequency is switched in accordance with this.

  The frequency control means may increase the operating frequency as the number of the series of input signals increases, and the current control means may increase the current supplied to the amplifier as the operating frequency increases. This makes it possible to appropriately supply a current necessary for the operation of the amplifier. Conversely, the current control means may reduce the current supplied to the amplifier as the operating frequency is lower. Thereby, power consumption can be reduced. Note that such frequency / current control is digital switching, and can be dynamically changed. That is, these switchings correspond to the operation mode switching of the electronic device system, and can be freely changed during operation, for example, corresponding to the low power consumption mode.

  A plurality of antennas, a plurality of sub-A / D conversion circuits connected in series, an amplifier inserted between the sub-A / D conversion circuits, and amplifying an input signal to the next-stage sub-A / D conversion circuit; A / D converter including current switching means for switching current, frequency control means for switching the operating frequency of the amplifier, and current control for controlling current to be supplied to the amplifier in accordance with switching of the operating frequency of the amplifier Current control means for issuing a signal to the current switching means, the frequency control means, the AD converter, when converting a plurality of series of input signals received by the plurality of antennas in a time-division manner, The operating frequency is switched according to the number of input signal sequences.

  The frequency control means may set the operating frequency higher in a mode in which the receiving apparatus receives analog signals in a diversity manner with a plurality of antennas than in a mode in which the receiving apparatus receives analog signals with one antenna. The current control means may increase a current supplied to the amplifier as the operating frequency increases.

  It is to be noted that any combination of the above-described components and any conversion of the expression of the present invention between a method, an apparatus, a system, and the like are also effective as embodiments of the present invention.

  According to the present invention, a technique for reducing power consumption of a circuit having an amplifier can be provided.

(First Embodiment)
FIG. 1 shows an overall configuration of a pipeline type AD converter circuit 10 according to a first embodiment of the present invention. The analog signal Vin input to the input terminal is input to the first-stage sub-AD converter 20a and is converted into a digital signal having a predetermined number of bits. This digital signal is output to the encoder 12 and the sub DA converter 22a. The sub DA converter 22a converts the digital signal output from the sub AD converter 20a into an analog signal. Then, a signal obtained by subtracting the output signal of the sub D / A converter 22a from the input signal to the sub A / D converter 20a is amplified by the operational amplifier 30a and used as an input signal to the sub-A / D converter 20b at the next stage. AD conversion is performed stepwise by repeating the above signal processing by a predetermined number of stages, and finally, a digital signal is output from the encoder 12.

  The pipeline type AD converter circuit 10 includes a current supply circuit 80 that supplies a bias current to the operational amplifiers 30a and 30b constituting the pipeline type AD converter circuit 10. The current supply circuit 80 is configured to be capable of switching a bias current to be supplied to each operational amplifier 30, and includes a bias circuit 50a and 50b connected to each of the operational amplifiers 30a and 30b, and a bias circuit 50a and 50b. Transistors 40a and 40b, constant current source 60, and current switching circuit 70 are connected between operational amplifiers 30a and 30b, respectively.

  The current switching circuit 70 switches the current supplied from the constant current source 60 to a plurality of different current values according to the current control signal from the current control means 100, and outputs the current to the bias circuits 50a and 50b. The currents adjusted by the bias circuits 50a and 50b are input to the gate electrodes of the transistors 40a and 40b, respectively. Since the current flowing between the source and the drain changes in accordance with the change in the current flowing to the gate electrodes of the transistors 40a and 40b, the current consumption of the operational amplifiers 30a and 30b is switched. In the present embodiment, the current switching circuit 70 switches the current supplied to the plurality of operational amplifiers 30a and 30b as a whole. That is, one current switching circuit 70 switches the bias currents of all the operational amplifiers 30 constituting the pipeline type AD converter circuit 10 at a time.

  The current control means 100 sends a current control signal to the current switching circuit 70 according to the operating frequency required for the pipeline type AD converter circuit 10. Generally, as the bias current supplied to the operational amplifier 30 included in the pipeline type AD converter circuit 10 increases, the slew rate of the operational amplifier 30 increases, and high-frequency AD conversion can be realized. That is, when operating the pipeline type AD converter circuit 10 at a high frequency, it is necessary to supply a bias current sufficient for the operation, while when operating at a low frequency, it is necessary to supply a smaller current than at a high frequency. Is enough. Therefore, in the current supply circuit 80 of the present embodiment, when high-frequency AD conversion is required in the pipelined AD converter circuit 10, a bias current sufficient for the operation is supplied while low-frequency AD conversion is performed. Is performed, the power consumption is reduced by switching the value of the bias current low. As a result, an appropriate bias current can be supplied according to the operating frequency, reducing unnecessary current consumption and reducing power consumption compared to conventional circuits that supply a constant bias current regardless of the operating frequency. can do.

  For example, when switching the operation frequency of the pipeline type AD converter circuit 10 according to the operation mode of the electronic device incorporating the pipeline type AD converter circuit 10, the current control means 100 executes the program for controlling the operation mode of the electronic device. It may be. At this time, the current control means 100 can be realized by hardware such as a CPU and a memory. In the operation mode requiring high-frequency AD conversion, the current control means 100 sends a current control signal to the current switching circuit 70 to output a current necessary to realize a high slew rate. In the case of the operation mode in which the low-frequency AD conversion is performed, a current control signal for outputting a current having a value lower than the current required for the high-frequency operation is sent to the current switching circuit 70. According to such a configuration, it is possible to dynamically control the bias current in accordance with the change in the operating frequency required for the pipelined AD converter circuit 10 and reduce the average power consumption. The current control means 100 may be realized by hardware such as a system register.

  The current control means 100 may statically switch the value of the bias current. For example, when a design change is made to the operating frequency of the pipelined AD converter circuit 10, a bias current suitable for operation at the changed operating frequency can be set, and a bias current having a plurality of current values is set in advance. Is provided in advance. Then, after the operating frequency is finally determined, a current control signal is supplied to the current switching circuit 70 so as to supply an appropriate bias current. In this case, the current control means 100 may be a changeover switch such as a dip switch, or may be a program such as firmware or a driver. The switching element of the current switching circuit 70 may be constituted by a dip switch and can be switched from outside. A program such as firmware can be externally updated after the device is manufactured. Thus, even after the device is manufactured, it is possible to set an appropriate bias current in response to a change in the operating frequency of the pipelined AD converter circuit 10 and suppress unnecessary power consumption.

  FIG. 2 shows an example of a circuit configuration of the current switching circuit 70. The current switching circuit 70 inputs the current supplied from the constant current source 60 from the input terminal 71 and outputs the current from the output terminal 77 to the bias circuit 50. Two current paths connected in parallel are provided between the input terminal 71 and the output terminal 77. The first path includes a switch element 72a, a transistor 76a, and a switch element from the input terminal 71 side. 74a are connected in this order, and the switch element 72b, the transistor 76a, and the switch element 74b are similarly connected to the second path in this order. Each of the transistors 76a and 76b has a source electrode grounded, a gate electrode and a drain electrode short-circuited, and functions as a load resistor having a rectifying action. That is, by using the transistors 76a and 76b having different characteristics, different currents can be output between the first path and the second path.

  By turning on / off the switch elements 72a, 72b, 74a, and 74b, a current path is selected, and the output current is switched. In addition to the path selection, all the switching elements 72a, 72b, 74a, and 74b may be turned on to change the characteristics of the transistors 76a and 76b. The switch elements 72a, 72b, 74a, and 74b may actually be realized by MOSFETs or the like, and input a current control signal from the current control means 100 to these MOSFETs to control the on / off of the switches. Is also good. FIG. 2 shows an example in which two types of current values can be switched, but of course, three or more types of paths may be provided. Further, the current value may be continuously controlled using a variable resistor or the like.

  FIG. 3 shows an example of a circuit configuration of the bias circuit 50. The bias circuit 50 includes four transistors 52, 54, 56, and 58, adjusts the current input from the current switching circuit 70 to the input terminal 51, and outputs the current from the output terminal 59 to the transistor 40. The bias circuit 50 shown in FIG. 3 is an example, and an arbitrary bias circuit can be applied.

  FIG. 4 shows an example of a circuit configuration of the operational amplifier 30. The operational amplifier 30 operates by the bias current input from the bias circuit 50 to the bias current input terminal 31 via the transistor 40, amplifies the difference between the input voltage Vin and the auto-zero voltage Vaz, and sets the amplified voltage to the output voltage Vout. FIG. 4 shows an example in which the operational amplifier 30 is configured by an active load circuit, but any other operational amplifier 30 can be applied. It is preferable that the bias current is variably controlled within a range where the operational amplifier 30 maintains ideal characteristics.

  Note that any combination of the circuits shown in FIG. 1 may be configured as an LSI. When the current control means 100 is realized by a register or the like, an LSI including the register may be included.

(Second embodiment)
FIG. 5 shows an overall configuration of a pipelined AD converter circuit 10 according to a second embodiment of the present invention. In the first embodiment, the bias current values input to all the operational amplifiers 30 are switched by one current switching circuit 70. However, in the present embodiment, the bias current values are changed for each of the operational amplifiers 30. Switchable current switching circuits 70a and 70b are provided. The same components as those of the pipeline type AD converter circuit 10 of the first embodiment shown in FIG. 1 are denoted by the same reference numerals. Hereinafter, a description will be given centering on portions different from the first embodiment.

  The current switching circuits 70a and 70b receive a current control signal from the current control means 100, switch the value of the output current, and supply the values to the bias circuits 50a and 50b, respectively. The circuit configuration of the current switching circuits 70a and 70b is the same as the circuit configuration of the current switching circuit 70 of the first embodiment shown in FIG. The current control means 100 may send the same current control signal to all the current switching circuits 70, or may send different current control signals to the individual current switching circuits 70. In this way, by variably controlling the bias current supplied to the individual operational amplifiers 30, finer current control becomes possible.

(Third embodiment)
FIG. 6 shows an overall configuration of a receiving apparatus 200 according to the third embodiment of the present invention. The receiving device 200 is a portable television receiving device, and decodes and reproduces MPEG stream data from a received broadcast wave. The receiving device 200 includes two antennas 102a and 102b, and is configured to be able to receive signals by a diversity system. By receiving a broadcast wave in a diversity system, even if the reception signal of one antenna 102a is disturbed due to multipath interference due to a reflected wave or the like, the reception signal from the other antenna 102b can be used appropriately. MPEG stream data can be decoded.

  A broadcast signal received by the antenna 102a is band-limited by a band pass filter (BPF) 104a, amplified by a low noise amplifier (LNA) 106a, and input to the frequency conversion IC 110. In the frequency conversion IC 110, the broadcast signals are multiplied by the quadrature local oscillation signals generated by the frequency generation circuit 122 and the phase shifter 116a by the mixers 112a and 114a, and the I baseband signal and Q It is converted to a baseband signal. The I-baseband signal and the Q-baseband signal are subjected to low-pass filters 118a and 120a to remove harmonic components, respectively, and then sent to sample-and-hold circuits 132a and 134a of an orthogonal frequency division multiplexing (OFDM) demodulation LSI 130. Is entered.

  Similarly, the broadcast signal received by the antenna 102b is band-limited by the band-pass filter 104b, amplified by the low noise amplifier 106b, and input to the frequency conversion IC 110. In the frequency conversion IC 110, the broadcast signals are multiplied by the quadrature local oscillation signals generated by the frequency generation circuit 122 and the phase shifter 116b by the mixers 112b and 114b, and the I baseband signal and Q It is converted to a baseband signal. The I baseband signal and the Q baseband signal are input to the sample-hold circuits 132b and 134b of the OFDM demodulation LSI 130 after the harmonic components are removed by the low-pass filters 118b and 120b, respectively.

  In the OFDM demodulation LSI 130, signals of a total of four sequences of an I baseband signal and a Q baseband signal respectively obtained from broadcast signals received by the two antennas 102a and 102b are converted into digital signals by the pipeline type AD converter circuit 10. And demodulated by the OFDM demodulation circuit 140. Further, the subcarriers rearranged in the frequency direction or the time direction by the deinterleave circuit 142 are deinterleaved in the original order, subjected to error correction by the error correction circuit 144, and output MPEG data.

  Here, in the present embodiment, the pipeline type AD converter circuit 10 of the first or second embodiment is used instead of providing four AD converter circuits for AD converting four series of signals. Then, the four series of signals are AD-converted in a time-division manner. Therefore, the analog signals held by the four sample-hold circuits 132a, 134a, 132b, and 134b are selected one by one by an analog selector (parallel-serial conversion) 136 and input to the pipeline type AD converter circuit 10. A digital signal output from the pipeline type AD converter circuit 10 in a time-division manner is divided into four original signals by a digital selector (serial-parallel conversion) 138, and each signal is input to an OFDM demodulation circuit 140. Is done. With such a configuration, the circuit scale can be reduced, and the device can be reduced in size, weight, and cost.

  The diversity scheme enables transmission of high-quality signals, but requires a plurality of signal processing systems as described above, so that the circuit scale and power consumption generally increase. In the present embodiment, it is possible to switch the reception mode between a normal mode in which a broadcast wave is received only by one antenna 102a and a diversity mode in which a broadcast wave is received in a diversity system by two antennas 102a and 102b. By doing so, an increase in power consumption is suppressed.

  In the normal mode, two series of signals may be AD-converted, but in the diversity mode, four series of signals must be AD-converted within the same time. Therefore, in the diversity mode, the pipeline type AD converter circuit 10 is operated at twice the frequency as in the normal mode. For example, in the normal mode, a clock of 4 MHz is supplied from the clock generation circuit 146 to the pipeline type AD converter circuit 10, and in the diversity mode, a clock of 8 MHz is supplied to the pipeline type AD converter circuit 10 from the clock generation circuit 146. This is equivalent to AD conversion of each signal at a frequency of 2 MHz.

  The control unit 150 controls switching of the reception mode between the normal mode and the diversity mode. In the diversity mode, control section 150 turns on sample and hold circuits 132b and 134b and causes clock generation circuit 146 to generate a clock signal of, for example, 8 MHz. In the normal mode, the control unit 150 turns off the sample and hold circuit 132b and the sample and hold circuit 134b, and causes the clock generation circuit 146 to generate, for example, a 4 MHz clock signal. That is, the control unit 150 functions as a frequency control unit.

  The current control means 100 of the pipeline type AD converter circuit 10 receives an instruction of the operating frequency required for the pipeline type AD converter circuit 10 from the control unit 150, and sends a current control signal to the current switching circuit 70. Specifically, when the pipeline type AD converter circuit 10 is operated at a high frequency, for example, 8 MHz in the diversity mode, a bias current sufficient for the operation is supplied to the operational amplifier 30, and in the normal mode, the pipeline type AD converter circuit 10 is operated. When operating the converter circuit 10 at a low frequency, for example, 4 MHz, a bias current smaller than that in the diversity mode is supplied to the operational amplifier 30. Thereby, power consumption can be reduced.

  The present invention has been described based on the embodiments. This embodiment is an exemplification, and it is understood by those skilled in the art that various modifications can be made to the combination of each component and each processing process, and that such modifications are also within the scope of the present invention. . Hereinafter, such an example will be described.

  In the embodiment, the pipeline type AD converter has been described as an example of the semiconductor circuit having the amplifier. However, the technology of the present invention can be applied to any semiconductor circuit having the amplifier, such as a front-end circuit for storage use. For example, in the case of a front-end circuit for storage use, power consumption can be reduced by controlling the amount of current supplied to the operational amplifier according to the read or write speed.

  In the embodiment, the pipeline type AD converter having a plurality of amplifiers has been described as an example. However, the technology of the present invention can be applied to a semiconductor circuit having one amplifier. In the embodiments, the operational amplifier has been described as an example, but the technology of the present invention can be applied to any amplifier such as an RF amplifier.

FIG. 2 is a diagram illustrating a circuit configuration of the pipeline type AD converter according to the first embodiment. FIG. 3 is a diagram illustrating an example of a circuit configuration of a current switching circuit. FIG. 3 is a diagram illustrating an example of a circuit configuration of a bias circuit. FIG. 3 is a diagram illustrating an example of a circuit configuration of an operational amplifier. FIG. 9 is a diagram illustrating a circuit configuration of a pipelined AD converter according to a second embodiment. FIG. 14 is a diagram illustrating an overall configuration of a receiving device according to a third embodiment.

Explanation of reference numerals

  10 pipeline type AD converter circuit, 20 sub AD converter, 22 sub DA converter, 30 operational amplifier, 40 transistor, 50 bias circuit, 60 constant current source, 70 current switching circuit, 72 switch element, 74 switch element, 76 transistor, 80 current supply circuit, 100 current control means, 102a, 102b antenna, 122 frequency generation circuit, 136 analog selector, 138 digital selector, 140 OFDM demodulation circuit, 142 deinterleave circuit, 144 error correction circuit, 146 clock generation circuit, 150 control , 200 receiving device.

Claims (14)

  A current control method comprising: supplying a current required for operation of an amplifier, changing the value of the current according to the operating frequency of the amplifier. In the circuit that supplies the current necessary for the operation of the amplifier,
A current supply circuit, comprising: current switching means for receiving a current control signal generated in response to switching of an operating frequency of the amplifier and switching a current supplied to the amplifier. A plurality of amplifiers,
Current switching means for switching a current supplied to the plurality of amplifiers in response to a current control signal generated in accordance with the switching of the operating frequency of the amplifier;
A semiconductor circuit comprising: A bias circuit that is connected to each of the plurality of amplifiers and supplies a bias current to the amplifier;
4. The semiconductor circuit according to claim 3, wherein the current switching unit switches a current supplied to the plurality of amplifiers by switching a current output to the bias circuit. 5.   5. The semiconductor circuit according to claim 3, wherein the current switching unit switches the current supplied to the plurality of amplifiers as a whole. 6.   6. The semiconductor circuit according to claim 3, wherein said current switching means is provided corresponding to each of said plurality of amplifiers, and switches a current supplied to an amplifier connected thereto. The current switching means is a circuit configured by a plurality of current paths provided in parallel,
7. The semiconductor circuit according to claim 3, wherein each current path includes a transistor circuit in which a gate terminal and a drain terminal are short-circuited, and a switch circuit. A plurality of sub-AD conversion circuits connected in series;
An amplifier inserted between the sub-AD conversion circuits and amplifying an input signal to the next-stage sub-AD conversion circuit;
Current switching means for receiving a current control signal issued in response to switching of the operating frequency of the amplifier, and switching a current supplied to the amplifier;
An AD converter, comprising: A plurality of amplifiers,
Current control means for controlling a current to be supplied to the amplifier in accordance with switching of an operating frequency of the amplifier;
Current switching means for receiving a current control signal issued from the current control means and switching a current supplied to the plurality of amplifiers;
An electronic device comprising: A plurality of sub-A / D conversion circuits connected in series; an amplifier inserted between the sub-A / D conversion circuits and amplifying an input signal to the next-stage sub-A / D conversion circuit; and a current switch for switching a current supplied to the amplifier. An AD conversion device including:
Frequency control means for switching the operating frequency of the amplifier,
Current control means for issuing, to the current switching means, a current control signal for controlling a current to be supplied to the amplifier in accordance with switching of the operating frequency of the amplifier,
The electronic apparatus according to claim 1, wherein the frequency control means switches the operating frequency according to the number of the input signal series when the AD converter converts the plurality of series of input signals by time division. The frequency control means, the greater the number of the input signal sequence, the higher the operating frequency,
11. The electronic device according to claim 10, wherein the current control unit increases the current supplied to the amplifier as the operating frequency increases. Multiple antennas,
A plurality of sub-A / D conversion circuits connected in series; an amplifier inserted between the sub-A / D conversion circuits and amplifying an input signal to the next-stage sub-A / D conversion circuit; and a current switch for switching a current supplied to the amplifier. An AD conversion device including:
Frequency control means for switching the operating frequency of the amplifier,
Current control means for issuing a current control signal to the current switching means for controlling a current to be supplied to the amplifier in accordance with switching of the operating frequency of the amplifier,
The frequency control means, when causing the AD converter to convert a plurality of input signals received by the plurality of antennas in a time-division manner, switching the operating frequency according to the number of input signal sequences. Characteristic receiving device.   The frequency control means increases the operating frequency in a mode in which the receiving device receives analog signals in a diversity manner with a plurality of antennas, compared to a mode in which the receiving device receives analog signals with one antenna. The receiving device according to claim 12.   14. The receiver according to claim 13, wherein the current control unit increases the current supplied to the amplifier as the operating frequency increases.

Images